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     <h1>Notes on the KL8JA Asynchronous Interface</h1>
    
    
    <p>
    
     Part of <a href="http://www.cs.uiowa.edu/%7Ejones/pdp8/hard8e/index.html">
      
      the PDP-8/E Hardware Documentation
      
     </a>
     <br>
     
    
     by
     <a href="http://www.cs.uiowa.edu/%7Ejones/">Douglas W. Jones</a>
     
     <br>
    
    
    <a href="http://www.uiowa.edu/">
     T<small>HE</small> U<small>NIVERSITY</small>
    <small>OF</small> I<small>OWA</small></a>
    <a href="http://www.cs.uiowa.edu/">Department of Computer Science</a>
    
    </p>
    
    
  </div>
 

<p>
The M8655 KL8-JA OMNIBUS interface board supports asynchronous
communications at a variety of baud rates, with either an RS232 or a
current loop interface.  Unlike the earlier KL8E, the board uses a
UART chip, but most of the options that might be programmable in a
more modern system are still selected by jumpers on the board.
</p><p>
In most respects, the M8655 board and the M8650 board are interchangable,
but the M8655 can generate and detect parity, and it can support data
widths from 5 to 8 bits, while the M8650 can support higher nonstandard
baud rates and is thus more appropriate for high speed PDP-8 to PDP-8
links.  There's also no way to send a break on an M8655, while this can
be sent on an M8650 by jamming data into the transmit buffer while it is
transmitting.
</p><p>
The following figure gives the General geography of the M8655 board:
</p><pre>      \\____//           \\____//          \\____//           \\____//
 ______||__||_____________||__||____________||__||_____________||__||_____
| o  ____      _ o  _o    _         o _o    _     _   o _ o  _   _ _ _ _ o|
|   |_   |    | |  | |   | |     o   : :   | |   | | ..| |  | |          ||
|     |  |    | |  | |   | |    FIL  : :   | |   | |   | |  | | |  CAN    |
|     |  |    |_|  |_|   |_|     o   :_:   |_|   |_| ..|_|  |_|  _ _ _ _ ||
|     |  |     _    _     _     _     _     _     _     _      _     ___  |
|     | B|    | |  | |   | |   | |   | |   | |   | |   | |    | |   |   | |
|     | E|    | |  | |   | |   | |   | |   | |   | |   | |    | |   |OSC| |
|     | R| .o |_|  |_|   |_|   |_|   |_|   |_|   |_|   |_|    |_|   |___| |
|    _| G| TTY _    _     _     _     _     _     _     _      _      _   |
|   |____| .o | |  | |   | |   | |   | |   | |   | |   | |    | |    | |  |
|             | |  | |   | |   | |   | |   | |   | |   | |  . | |    | |  |
|             |_|  |_|   |_|   |_|   |_|   |_|   |_|   |_|    |_|    |_|  |
|                                                           .             |
|   _     _    _    _     _     _     _                 _      _      _   |
|  | |   | |  | |  | |   | |   | |   | |               | |    : :    | |  |
|  | |   | |  | |  | |   | |   | |   | |    ____       | |    : :    | |  |
|  |_|   |_|  |_|  |_|   |_|   |_|   |_|   |    |      |_|    :_:    |_|  |
|   _     _    _    _     _     _     _    |    |       _     ___    ___  |
|  | |   | |  | |  | |   | |   | |   | |   |    |      | |   |   |  |   | |
|  | |   | |  | |  | |   | |   | |   | |   |    |  o o | |   |   |  |   | |
|  |_|   |_|  |_|  |_|   |_|   |_|   |_|   |    | NP SB|_|   |___|  |___| |
|   _     _    _    _     _     _     _    |    |  o o  _    XMIT    RCV  |
|  | | o | |  | |  | |   | |   | |   | |   |____| o o o| |    | |    | |  |
|  | |SWD| |  | |  | |   | |   | |   | |        EVN 1 2| |    | |    | |  |
|  |_|.o |_|  |_|  |_|   |_|   |_|   |_|          o o o|_|    |_|    |_|  |
|    W3                                                                   |
|_    .           __||               _||               __||              |
  |              |   |              |  |              |   |              |
  |______________|   |______________|  |______________|   |______________|
</pre>
Given an M8655 board, various optional jumpers and switch settings must be
inspected and possibly changed prior to any use of the board.  The
following sections treat the primary options that limit the range of baud
rates supported, that select a particular rate, and that select the I/O
device addresses used for the board.
<p>
</p><h2>Basic Communications Options</h2>
<pre>      \\____//           \\____//          \\____//           \\____//
 ______||__||_____________||__||____________||__||_____________||__||_____
| o  ____      _ o  _o    _         o _o    _     _   o _ o  _   _ _ _ _ o|
|   |_   |    | |  | |   | |     o   : :   | |   | | ..| |  | |          ||
|     |  |    | |  | |   | |    FIL  : :   | |   | |W5W2 |  | | |  CAN    |
|     |  |    |_|  |_|   |_|     o   :_:   |_|   |_| ..|_|  |_|  _ _ _ _ ||
|     |  |     _ 
|     | B|    | |                |                   |
|     | E|W1  | |             Null after          Max baud
|     | R| .o |_|             line feed.            rate
|    _| G| TTY
|   |____| .o --- 110 baud
</pre>
The TTY jumper position (sometimes bridged by a zero-ohm resistor) is required
for use at 110 baud with a current loop interface.  At higher rates, this
jumper (or zero-ohm resistor) should be removed.
<p>
The FIL jumper position, if jumpered, causes 4 nulls to be inserted after
every linefeed transmitted.  This provides the correct delay for the DEC VT05
terminal running at 2400 baud when powered from a 60 Hz line, and the wrong
delay at almost any other baud rate or power environment for almost any
terminal that requires a delay after linefeed.
</p><p>
A zero ohm resistor or wire jumper should be inserted at either W2
or W5, but not both.  This selects the highest baud rate the board will
support.
</p><pre>	W5 (left) - 19200 baud
	W2 (right) - 9600 baud
</pre>
The originl GI UART could only handle 9600 baud; the SMC COM 2017 UART
used on later boards can handle either baud rate.
<p>

</p><h2>Jumpering for Error Reporting</h2>

<pre>|   _     _
|  | | o | |
|  | |SWD| |
|  |_|.o |_|
|    W3
|_    .           __|
  |              |
  |______________|
</pre>
The split lugs marked SWD are in parallel with the jumper location W3.
If no jumper is present in either location, the M8655 KL8-JA board will
look, to software, exactly like an M8650 KL8E board.
<p>
If a jumper is present at this location, the board recognizes a new
software option allowing reporting of the UART status word with each
character read.  The command to turn this option on and off is:
</p><pre>   KIE (6xx5) -- Bit 11 of AC is the interrupt enable bit, as usual;
                 Bit 10 of AC is the status word report reqest bit.
</pre>
If the status report request bit is set, the data returned in AC by the
KRS (6xx4) and KRB (6xx6) commands is formatted as follows:
<pre>      bit[0]     -- error detected.
      bit[1]     -- parity error detected in this character
      bit[2]     -- framing error detected, this might not be a character
      bit[3]     -- overrun error detected, previous character lost
      bits[4-11] -- the data read (as usual)
</pre>

<h2>Jumpering For Data Format</h2>

<pre>				_      _      _   |
			       | |    | |    | |  |
			       | |  . | |    | |  |
			       |_| W4 |_|    |_|  |
				    .             |
				_      _      _   |
			       | |    : :    | |  |
		    ____       | |    : :    | |  |
		   |    |      |_|    :_:    |_|  |
		   |    |       _     ___    ___  |
		   |    |      | |   |   |  |   | |
		   |    |  o o | |   |   |  |   | |
		   |    | NP SB|_|   |___|  |___| |
		   |    |  o o  _    XMIT    RCV  |
		   |____| o o o| |    | |    | |  |
			EVN 1 2| |    | |    | |  |
			  o o o|_|    |_|    |_|  |
						  |
			       __||              |
			      |   |              |
	       |______________|   |______________|
</pre>
There are 5 pairs of split lugs and one zero ohm
resistor or jumper wire in this group.  In general,
if none of these are jumpered, the board will behave
like an M8650.
<dl>
<dt>SB controls the number of stop bits.
</dt><dt>W4 is a zero-ohm resistor in parallel with SB.
</dt><dd> If either jumper SB or W4 is present, 1 stop bit will be appended to
	each character transmitted.
<pp>
</pp></dd><dt>NP controls parity generation and checking.
</dt><dd> If the jumper is present, a parity bit will be appended to transmitted
	data and inspected on received data.
<pp>
</pp></dd><dt>EVN controls the sense of the parity bit.
</dt><dd> If the jumper is present, even parity will be used; otherwise, odd parity
	will be used.
<pp>
</pp></dd><dt>NB1 and NB2 control the number of data bits per character.
</dt><dd>
<pre>NB1,NB2
 0   0      8
 1   0      7   0 = jumper absent
 0   1      6   1 = jumper present
 1   1      5
</pre>
</dd></dl>

<h2>Switch Settings</h2>

<pre>		      ___    ___  |
		     |   |  |   | |
		     |   |  |   | |
		     |___|  |___| |
		     XMIT    RCV  |
		      | |    | |  |
		      | |    | |  |
		      |_|    |_|  |
				  |
		  |              |
		  |              |
		  |______________|
</pre>
The two DIP switches are divided logically into 2 groups of
switches to control the baud rate and device addresses.
The bottom 6 switches on each DIP switch cluster set the
device addresses.  The left switches handle the transmit
address, the right handles the receive address.  Both
switch groups have the same format:
<pre>	 |  ==-  | MD3 MSB of device address
	 |  ==-  | MD4
	 |  ==-  | MD5   For all bits,
	 |  ==-  | MD6   ON = 1, OFF = 0
	 |  ==-  | MD7
	 |  ==-  | MD8 LSB of device address
	 |_______|
</pre>
The 3 baud rate bits, B1, B2, B3 give the baud rate:
<pre>	    _______           _______
	   |       |         |       |
	   |  ==-  |B3       |  ==-  |B1
	   |  ==-  |R=150    |  ==-  |B2

  B1 B2 B3                                      
   0  0  0  =  110 baud
   0  0  1  =  150 baud
   0  1  0  =  300 baud    On = 1, Off = 0
   0  1  1  =  600 baud
   1  0  0  = 1200 baud
   1  0  1  = 2400 baud
   1  1  0  = 4800 baud
   1  1  1  = 9600 or 19200 baud
</pre>
Jumpers W2 and W5 select which of the two highest baud rates is selected
for by the final switch setting shown above.
As a special case, if the R=150 switch is on, the receive baud rate is set
to 150 baud; if this switch is off, the transmit and receive baud rates
are the same.
<p>

</p><h2>Crystal or Integrated Oscillator</h2>

<pre>		      \\____//
		 ______||__||_____
		  o  _   _ _ _ _ o|
		    | |          ||
		    | | |  CAN    |
		    |_|  _ _ _ _ ||
		       _     ___  |
		      | |   |   | |
		      | |   |OSC| |
		      |_|   |___| |
				  |
</pre>
As originally designed, the M8655 board used a large crystal can mounted over
the large pad in the upper right corner of the board.  This was not a
satisfactory design, and DEC abandoned this can in later revisions
of the board.  Instead, the integrated circuit at position E4 (shown at
OSC here) was replaced with a CTS 5.0688 MHZ oscillator
(DigiKey part CTX110).  This requires that the circuit traces connecting to
pins 1 and 8 of E4 be cut (note that pins 7 and 14 were unused), and it
requires that discrete components immediately above, below and to each side
of E4 be removed (be careful not to remove the power supply decoupling
capacitor below E4).  3 jumpers must then be installed:
<ul>
<li>From pin 7 to ground (the left end of a nearby decoupling capacitor).
</li><li>From pin 14 to +5 (the right end of a nearby decoupling capacitor).
</li><li>From pin 13 to pin 8.
</li></ul>
All these jumpers should be 30 gauge wire-wrap wire so that there is room
to put the jumper in the same hole as other component leads.  If your
oscillator has a metal can, mount it with a plastic shim (DigiKey K266-ND,
an OK Socket-Wrap ID tag, should work) so the case doesn't short to any
traces on the board below it.
<p>

</p><h2>Unused sockets</h2>

<p>
The KL8-JA board contains two
sockets that were apparently
used in production line testing
of the board.  Nothing should
be plugged into these sockets
for normal operation.
</p><pre>		   \\____//           \\____//
	   _________||__||_____________||__||_____
	    o _o    _     _   o _ o  _   _ _ _ _ o|
	     : :   | |   | | ..| |  | |          ||
	     : :   | |   | |   | |  | | |  CAN    |
	     :_:   |_|   |_| ..|_|  |_|  _ _ _ _ ||
	      |                        _     ___  |
	   unused!                    | |   |   | |
				      | |   |OSC| |
				      |_|   |___| |
				       _      _   |
				      | |    | |  |
				      | |    | |  |
				      |_|    |_|  |
						  |
				       _      _   |
				      : :    | |  |
			     unused!--: :    | |  |
				      :_:    |_|  |
</pre>

<h2>Cables</h2>

<pre>      \\____//
 ______||__||______
| o  ____        o
|   |_   |
|     |  |
|     |  |
|     |  |
|     | B|
|     | E|
|     | R|
|    _| G|
|   |____|
</pre>
For an RS232 interface, you need the equivalent of DEC's BC01V cable. This
mates with the Berg connector at one end and has a male DB25 connector at
the other end, in conformance with the RS232 specification. For a current
loop interface, you need a 7008360 cable with a Mate-N-Lock connector at the
far end. 
<p>
The following connector hardware will mate with the Berg connector on the
board (DigiKey part numbers for AMP parts): 
</p><pre>                  ASC40G-ND  40 pin gold socket connector
                  ASSR40-ND  strain relief for above
                  ASPT40-ND  pull tab to make it easy to unplug
</pre>

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	46	<div class="HEADBOX">
	47
	48
	49	<h1>Notes on the KL8JA Asynchronous Interface</h1>
	50
	51
	52	<p>
	53
	54	Part of <a href="http://www.cs.uiowa.edu/%7Ejones/pdp8/hard8e/index.html">
	55
	56	the PDP-8/E Hardware Documentation
	57
	58	</a>
	59	<br>
	60
	61
	62
	63	by
	64	<a href="http://www.cs.uiowa.edu/%7Ejones/">Douglas W. Jones</a>
65
66	<br>
67
68
69	<a href="http://www.uiowa.edu/">
70	T<small>HE</small> U<small>NIVERSITY</small>
71	<small>OF</small> I<small>OWA</small></a>
72	<a href="http://www.cs.uiowa.edu/">Department of Computer Science</a>
73
74	</p>
75
76
77
78	</div>
79
80
81
82
83	<p>
84	The M8655 KL8-JA OMNIBUS interface board supports asynchronous
85	communications at a variety of baud rates, with either an RS232 or a
86	current loop interface. Unlike the earlier KL8E, the board uses a
87	UART chip, but most of the options that might be programmable in a
88	more modern system are still selected by jumpers on the board.
89	</p><p>
90	In most respects, the M8655 board and the M8650 board are interchangable,
91	but the M8655 can generate and detect parity, and it can support data
92	widths from 5 to 8 bits, while the M8650 can support higher nonstandard
93	baud rates and is thus more appropriate for high speed PDP-8 to PDP-8
94	links. There's also no way to send a break on an M8655, while this can
95	be sent on an M8650 by jamming data into the transmit buffer while it is
96	transmitting.
97	</p><p>
98	The following figure gives the General geography of the M8655 board:
99	</p><pre> \\____// \\____// \\____// \\____//
100	______\|\|__\|\|_____________\|\|__\|\|____________\|\|__\|\|_____________\|\|__\|\|_____
101	\| o ____ _ o _o _ o _o _ _ o _ o _ _ _ _ _ o\|
102	\| \|_ \| \| \| \| \| \| \| o : : \| \| \| \| ..\| \| \| \| \|\|
103	\| \| \| \| \| \| \| \| \| FIL : : \| \| \| \| \| \| \| \| \| CAN \|
104	\| \| \| \|_\| \|_\| \|_\| o :_: \|_\| \|_\| ..\|_\| \|_\| _ _ _ _ \|\|
105	\| \| \| _ _ _ _ _ _ _ _ _ ___ \|
106	\| \| B\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|
107	\| \| E\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|OSC\| \|
108	\| \| R\| .o \|_\| \|_\| \|_\| \|_\| \|_\| \|_\| \|_\| \|_\| \|_\| \|___\| \|
109	\| _\| G\| TTY _ _ _ _ _ _ _ _ _ _ \|
110	\| \|____\| .o \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|
111	\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| . \| \| \| \| \|
112	\| \|_\| \|_\| \|_\| \|_\| \|_\| \|_\| \|_\| \|_\| \|_\| \|_\| \|
113	\| . \|
114	\| _ _ _ _ _ _ _ _ _ _ \|
115	\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| : : \| \| \|
116	\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| ____ \| \| : : \| \| \|
117	\| \|_\| \|_\| \|_\| \|_\| \|_\| \|_\| \|_\| \| \| \|_\| :_: \|_\| \|
118	\| _ _ _ _ _ _ _ \| \| _ ___ ___ \|
119	\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|
120	\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| o o \| \| \| \| \| \| \|
121	\| \|_\| \|_\| \|_\| \|_\| \|_\| \|_\| \|_\| \| \| NP SB\|_\| \|___\| \|___\| \|
122	\| _ _ _ _ _ _ _ \| \| o o _ XMIT RCV \|
123	\| \| \| o \| \| \| \| \| \| \| \| \| \| \| \| \|____\| o o o\| \| \| \| \| \| \|
124	\| \| \|SWD\| \| \| \| \| \| \| \| \| \| \| \| EVN 1 2\| \| \| \| \| \| \|
125	\| \|_\|.o \|_\| \|_\| \|_\| \|_\| \|_\| \|_\| o o o\|_\| \|_\| \|_\| \|
126	\| W3 \|
127	\|_ . __\|\| _\|\| __\|\| \|
128	\| \| \| \| \| \| \| \|
129	\|______________\| \|______________\| \|______________\| \|______________\|
130	</pre>
131	Given an M8655 board, various optional jumpers and switch settings must be
132	inspected and possibly changed prior to any use of the board. The
133	following sections treat the primary options that limit the range of baud
134	rates supported, that select a particular rate, and that select the I/O
135	device addresses used for the board.
136	<p>
137	</p><h2>Basic Communications Options</h2>
138	<pre> \\____// \\____// \\____// \\____//
139	______\|\|__\|\|_____________\|\|__\|\|____________\|\|__\|\|_____________\|\|__\|\|_____
140	\| o ____ _ o _o _ o _o _ _ o _ o _ _ _ _ _ o\|
141	\| \|_ \| \| \| \| \| \| \| o : : \| \| \| \| ..\| \| \| \| \|\|
142	\| \| \| \| \| \| \| \| \| FIL : : \| \| \| \|W5W2 \| \| \| \| CAN \|
143	\| \| \| \|_\| \|_\| \|_\| o :_: \|_\| \|_\| ..\|_\| \|_\| _ _ _ _ \|\|
144	\| \| \| _
145	\| \| B\| \| \| \| \|
146	\| \| E\|W1 \| \| Null after Max baud
147	\| \| R\| .o \|_\| line feed. rate
148	\| _\| G\| TTY
149	\| \|____\| .o --- 110 baud
150	</pre>
151	The TTY jumper position (sometimes bridged by a zero-ohm resistor) is required
152	for use at 110 baud with a current loop interface. At higher rates, this
153	jumper (or zero-ohm resistor) should be removed.
154	<p>
155	The FIL jumper position, if jumpered, causes 4 nulls to be inserted after
156	every linefeed transmitted. This provides the correct delay for the DEC VT05
157	terminal running at 2400 baud when powered from a 60 Hz line, and the wrong
158	delay at almost any other baud rate or power environment for almost any
159	terminal that requires a delay after linefeed.
160	</p><p>
161	A zero ohm resistor or wire jumper should be inserted at either W2
162	or W5, but not both. This selects the highest baud rate the board will
163	support.
164	</p><pre> W5 (left) - 19200 baud
165	W2 (right) - 9600 baud
166	</pre>
167	The originl GI UART could only handle 9600 baud; the SMC COM 2017 UART
168	used on later boards can handle either baud rate.
169	<p>
170
171	</p><h2>Jumpering for Error Reporting</h2>
172
173	<pre>\| _ _
174	\| \| \| o \| \|
175	\| \| \|SWD\| \|
176	\| \|_\|.o \|_\|
177	\| W3
178	\|_ . __\|
179	\| \|
180	\|______________\|
181	</pre>
182	The split lugs marked SWD are in parallel with the jumper location W3.
183	If no jumper is present in either location, the M8655 KL8-JA board will
184	look, to software, exactly like an M8650 KL8E board.
185	<p>
186	If a jumper is present at this location, the board recognizes a new
187	software option allowing reporting of the UART status word with each
188	character read. The command to turn this option on and off is:
189	</p><pre> KIE (6xx5) -- Bit 11 of AC is the interrupt enable bit, as usual;
190	Bit 10 of AC is the status word report reqest bit.
191	</pre>
192	If the status report request bit is set, the data returned in AC by the
193	KRS (6xx4) and KRB (6xx6) commands is formatted as follows:
194	<pre> bit[0] -- error detected.
195	bit[1] -- parity error detected in this character
196	bit[2] -- framing error detected, this might not be a character
197	bit[3] -- overrun error detected, previous character lost
198	bits[4-11] -- the data read (as usual)
199	</pre>
200
201	<h2>Jumpering For Data Format</h2>
202
203	<pre> _ _ _ \|
204	\| \| \| \| \| \| \|
205	\| \| . \| \| \| \| \|
206	\|_\| W4 \|_\| \|_\| \|
207	. \|
208	_ _ _ \|
209	\| \| : : \| \| \|
210	____ \| \| : : \| \| \|
211	\| \| \|_\| :_: \|_\| \|
212	\| \| _ ___ ___ \|
213	\| \| \| \| \| \| \| \| \|
214	\| \| o o \| \| \| \| \| \| \|
215	\| \| NP SB\|_\| \|___\| \|___\| \|
216	\| \| o o _ XMIT RCV \|
217	\|____\| o o o\| \| \| \| \| \| \|
218	EVN 1 2\| \| \| \| \| \| \|
219	o o o\|_\| \|_\| \|_\| \|
220	\|
221	__\|\| \|
222	\| \| \|
223	\|______________\| \|______________\|
224	</pre>
225	There are 5 pairs of split lugs and one zero ohm
226	resistor or jumper wire in this group. In general,
227	if none of these are jumpered, the board will behave
228	like an M8650.
229	<dl>
230	<dt>SB controls the number of stop bits.
231	</dt><dt>W4 is a zero-ohm resistor in parallel with SB.
232	</dt><dd> If either jumper SB or W4 is present, 1 stop bit will be appended to
233	each character transmitted.
234	<pp>
235	</pp></dd><dt>NP controls parity generation and checking.
236	</dt><dd> If the jumper is present, a parity bit will be appended to transmitted
237	data and inspected on received data.
238	<pp>
239	</pp></dd><dt>EVN controls the sense of the parity bit.
240	</dt><dd> If the jumper is present, even parity will be used; otherwise, odd parity
241	will be used.
242	<pp>
243	</pp></dd><dt>NB1 and NB2 control the number of data bits per character.
244	</dt><dd>
245	<pre>NB1,NB2
246	0 0 8
247	1 0 7 0 = jumper absent
248	0 1 6 1 = jumper present
249	1 1 5
250	</pre>
251	</dd></dl>
252
253	<h2>Switch Settings</h2>
254
255	<pre> ___ ___ \|
256	\| \| \| \| \|
257	\| \| \| \| \|
258	\|___\| \|___\| \|
259	XMIT RCV \|
260	\| \| \| \| \|
261	\| \| \| \| \|
262	\|_\| \|_\| \|
263	\|
264	\| \|
265	\| \|
266	\|______________\|
267	</pre>
268	The two DIP switches are divided logically into 2 groups of
269	switches to control the baud rate and device addresses.
270	The bottom 6 switches on each DIP switch cluster set the
271	device addresses. The left switches handle the transmit
272	address, the right handles the receive address. Both
273	switch groups have the same format:
274	<pre> \| ==- \| MD3 MSB of device address
275	\| ==- \| MD4
276	\| ==- \| MD5 For all bits,
277	\| ==- \| MD6 ON = 1, OFF = 0
278	\| ==- \| MD7
279	\| ==- \| MD8 LSB of device address
280	\|_______\|
281	</pre>
282	The 3 baud rate bits, B1, B2, B3 give the baud rate:
283	<pre> _______ _______
284	\| \| \| \|
285	\| ==- \|B3 \| ==- \|B1
286	\| ==- \|R=150 \| ==- \|B2
287
288	B1 B2 B3
289	0 0 0 = 110 baud
290	0 0 1 = 150 baud
291	0 1 0 = 300 baud On = 1, Off = 0
292	0 1 1 = 600 baud
293	1 0 0 = 1200 baud
294	1 0 1 = 2400 baud
295	1 1 0 = 4800 baud
296	1 1 1 = 9600 or 19200 baud
297	</pre>
298	Jumpers W2 and W5 select which of the two highest baud rates is selected
299	for by the final switch setting shown above.
300	As a special case, if the R=150 switch is on, the receive baud rate is set
301	to 150 baud; if this switch is off, the transmit and receive baud rates
302	are the same.
303	<p>
304
305	</p><h2>Crystal or Integrated Oscillator</h2>
306
307	<pre> \\____//
308	______\|\|__\|\|_____
309	o _ _ _ _ _ o\|
310	\| \| \|\|
311	\| \| \| CAN \|
312	\|_\| _ _ _ _ \|\|
313	_ ___ \|
314	\| \| \| \| \|
315	\| \| \|OSC\| \|
316	\|_\| \|___\| \|
317	\|
318	</pre>
319	As originally designed, the M8655 board used a large crystal can mounted over
320	the large pad in the upper right corner of the board. This was not a
321	satisfactory design, and DEC abandoned this can in later revisions
322	of the board. Instead, the integrated circuit at position E4 (shown at
323	OSC here) was replaced with a CTS 5.0688 MHZ oscillator
324	(DigiKey part CTX110). This requires that the circuit traces connecting to
325	pins 1 and 8 of E4 be cut (note that pins 7 and 14 were unused), and it
326	requires that discrete components immediately above, below and to each side
327	of E4 be removed (be careful not to remove the power supply decoupling
328	capacitor below E4). 3 jumpers must then be installed:
329	<ul>
330	<li>From pin 7 to ground (the left end of a nearby decoupling capacitor).
331	</li><li>From pin 14 to +5 (the right end of a nearby decoupling capacitor).
332	</li><li>From pin 13 to pin 8.
333	</li></ul>
334	All these jumpers should be 30 gauge wire-wrap wire so that there is room
335	to put the jumper in the same hole as other component leads. If your
336	oscillator has a metal can, mount it with a plastic shim (DigiKey K266-ND,
337	an OK Socket-Wrap ID tag, should work) so the case doesn't short to any
338	traces on the board below it.
339	<p>
340
341	</p><h2>Unused sockets</h2>
342
343	<p>
344	The KL8-JA board contains two
345	sockets that were apparently
346	used in production line testing
347	of the board. Nothing should
348	be plugged into these sockets
349	for normal operation.
350	</p><pre> \\____// \\____//
351	_________\|\|__\|\|_____________\|\|__\|\|_____
352	o _o _ _ o _ o _ _ _ _ _ o\|
353	: : \| \| \| \| ..\| \| \| \| \|\|
354	: : \| \| \| \| \| \| \| \| \| CAN \|
355	:_: \|_\| \|_\| ..\|_\| \|_\| _ _ _ _ \|\|
356	\| _ ___ \|
357	unused! \| \| \| \| \|
358	\| \| \|OSC\| \|
359	\|_\| \|___\| \|
360	_ _ \|
361	\| \| \| \| \|
362	\| \| \| \| \|
363	\|_\| \|_\| \|
364	\|
365	_ _ \|
366	: : \| \| \|
367	unused!--: : \| \| \|
368	:_: \|_\| \|
369	</pre>
370
371	<h2>Cables</h2>
372
373	<pre> \\____//
374	______\|\|__\|\|______
375	\| o ____ o
376	\| \|_ \|
377	\| \| \|
378	\| \| \|
379	\| \| \|
380	\| \| B\|
381	\| \| E\|
382	\| \| R\|
383	\| _\| G\|
384	\| \|____\|
385	</pre>
386	For an RS232 interface, you need the equivalent of DEC's BC01V cable. This
387	mates with the Berg connector at one end and has a male DB25 connector at
388	the other end, in conformance with the RS232 specification. For a current
389	loop interface, you need a 7008360 cable with a Mate-N-Lock connector at the
390	far end.
391	<p>
392	The following connector hardware will mate with the Berg connector on the
393	board (DigiKey part numbers for AMP parts):
394	</p><pre> ASC40G-ND 40 pin gold socket connector
395	ASSR40-ND strain relief for above
396	ASPT40-ND pull tab to make it easy to unplug
397	</pre>
398
399	</body></html>