[pdp8.git] / sw / os8 / v3d / sources / fortran / all / clk8a.ra

/PDP-8A OPTION 1 (100 HZ) CLOCK ROUTINE................CLK8A
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/COPYRIGHT (C) 1975
/DIGITAL EQUIPMENT CORPORATION, MAYNARD, MASS.
/
/
/
/THIS SOFTWARE IS FURNISHED UNDER A LICENSE FOR USE ONLY ON A
/SINGLE COMPUTER SYSTEM AND MAY BE COPIED ONLY WITH THE INCLU-
/SION OF THE ABOVE COPYRIGHT NOTICE. THIS SOFTWARE,OR ANY OTHER
/COPIES THEREOF, MAY NOT BE PROVIDED OR OTHERWISE MADE AVAILABLE
/TO ANY OTHER PERSON EXCEPT FOR USE ON SUCH A SYSTEM AND TO ONE WHO
/AGREES TO THESE LICENSE TERMS. TITLE TO AND OWNERSHIP OF THE
/SOFTWARE SHALL AT ALL TIMES REMAIN IN DEC.
/
/
/THE INFORMATION IN THIS SOFTWARE IS SUBJECT TO CHANGE WITHOUT
/NOTICE AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL
/EQUIPMENT CORPORATION.
/
/
/DEC ASSUMES NO RESPONSIBILITY FOR THE USEOR RELIABILITY OF ITS
/SOFTWARE ON EQUIPMENT WHICH IS NOT SUPPLIED BY DEC.
/
/
/
/
/
/
/
/
/
/
/
/


/
/E.P.  11/6/75
/ VERSION 5A 4/26/77 MH
/
/

\f


	EXTERN #DISP	/SYSTEM PAGE 0,NEEDED TO
			/PUT CLOCK STATUS ON PG0
			/(CSTAT) FOR USE BY GEN
			/USER CLOCK SERVICE ROUTS
	EXTERN #T812	/RTS CPTYP
	EXTERN ONQI	/INTERRUPT QUEUER
	CLLE=	6135	/AC11=1 INTRRUPTS ON.
	CLCL=	6136	/CLEAR CLOCK FLAG
	CLSK=	6137	/SKIP ON CLOCK FLAG.
	CSTAT=157	/IDOCLK PUTS CLSA BITS
			/IN HERE
	BASE FTMP0
	INDEX FCNWD
	FIELD1 SYNC
	JSA SETUP	/HERE TO READ A STRIG
			/INITIALIZE ARGS
	TRAP4 DOSYNC	/FCNWD (XR) HOLDS STRIG
			/TO READ
	XTA FCNWD	/=ANS=0,1
	FSTA% FTMP1	/GIVE ANS TO CALLER
	JA GOBAK
FTMP0,	F 0.0		/BASE PAGE
FTMP1,	F 0.0
RPTR,	27;ADDR RTBL	/PTR TO RATE TBL, ALSO
			/USED TO FLT OVRCNT (NOTE
			/THAT THE EXPONENT=27)
MINRAT,	F .02		/MIN ALLOWABLE RATE
TOVR,	F 0.0
NAME,	TEXT	+CLOCK +
	ORG	10*3+FTMP0
	FNOP
	JA	NAME+3
	0
GOBAK,	JA	.
RTBL,	F 16.0		/CONSTANT USED TO CHK FOR
			/EXT CLK BIT IN FCNWD
			/THIS CONST MUST BE NE 0
MAXRAT,
F4096,	F 4096.0	/USED TO GET OVRFLO COUNT
	F 100000.0	/FASTEST RATE IN HERTZ
	F 10000.0	/NEXT FASTEST RATE
	F 1000.0
	F 100.0		/SLOWEST RATE
	F 1.0		/USED BY TIME FOR EXT CLK
\f	BASE 0
 
SETUP,	0;0		/HERE TO INIT ALL FPP SUBS
	STARTD
	FLDA 30		/PICK UP RTN TO CALLER
	FSTA GOBAK
	FLDA 0		/GET PTR TO CALLERS ARGS
	SETX FCNWD	/CLOCK XR AND BASE
	SETB FTMP0
	BASE FTMP0
	FSTA FTMP1
	FLDA% FTMP1,P1
	FSTA FTMP0	/PTR TO 1ST ARG
	FLDA% FTMP1,P2
	FSTA FTMP1	/PTR TO 2ND ARG
	FLDA #T812	/TELLS PDP8,PDP12
	ATX CPTYP	/0=8=DK8ES,1=12=KW12A
	STARTF
	FLDA% FTMP0	/=1ST ARG
	ATX FCNWD	/ALWAYS IN FCNWD
	JA SETUP
\f	ENTRY CLOCK
CLOCK,	JSA SETUP	/HERE FOR CLOCK START
	FLDA%	FTMP0
	FSUB RTBL	/FCNWD IS IN FAC,IF GE 16
	JGE ITSEXT	/(RTBL=16.0) THEN USER IS
			/REQUESTING AN EXTERNAL
			/CLOCK I.E. B8 OF FCNWD
			/IS SET.
	FLDA% FTMP1	/=REQUESTED RATE IN HERTZ
	FSUB MINRAT	/.LE. MINUMUM RATE
	JLE GOTR-2	/MEANS STOP CLOCK.
	FADD MINRAT
	FSUB MAXRAT	/CHK FOR TOO FAST
	JGT GOTR-2
	LDX -4,OVRFLO	/THERE ARE 4 BASIC RATES
	LDX 1,RATE	/=INDEX INTO RTBL; UPON
			/TRAP(CLOCK) RATE=(0,
			/2,3,4,5,6) 0=STOP,
			/6=EXTERNAL
			/2-5=PROGRAMMABLE RATES
LOP0,	FLDA% RPTR,RATE+
			/GET NEXT SLOWEST RATE
	FDIV% FTMP1	/=REQUESTED RATE IN HZ.
			/FAC=OVRFLO COUNT;
	FSUB F4096	/MUST BE MODULO 12 BITS.
	JLE GOTR	/FOUND IT
	JXN LOP0,OVRFLO+
	LDX 0,RATE	/RATE IS TOO SLOW, STOP
			/CLOCK.
GOTR,	FADD F4096	/RESTORE
	FSTA TOVR
	ATX OVRFLO	/OVER FLOW COUNT
	TRAP4 SETCLK	/GO START CLOCK
	JA GOBAK		/RTN TO CALLER
ITSEXT,	LDX 6,RATE	/=RATE FOR EXT CLK
	FLDA% FTMP1	/REQUESTED RATE IS
			/INTERPRETED AS OVRFLO
	JA GOTR+1	/WHEN RATE IS EXTERNAL
\f/MAGIC TABLE USED BY SETCLK TO SET CLOCK ENABLE
/BITS. EVEN NUMBERED ENTRIES ARE FOR THE DK8ES;
/ODD NUMBERED ONES ARE FOR THE KW12A.
 
CLKTBL,	0675		/"STANDARD" DK BITS
	300		/STND KW BITS
	1		/DK STRIG1 BIT
	60		/KW STRIG1 BITS
	2		/DK S2
	14		/KW S2
	4		/S3
P3,	3		/S3
	40		/DK ADC ON OVR BIT
	400		/KW ADC ON OVR BIT
 
			/IF NOT NEXT PAGE DO ORG
	IFNEG .-200 < ORG .-SYNC&7600+200+SYNC >
\fSETCLK,	0		/TRAP HERE TO START CLK
			/THIS ROUT HANDLES BOTH
			/DK8ES AND KW12A.
	CLCL		/TRY AND CLEAR IT HERE????
/	CLLR		/STOP KW AND SET MODE 0;
			/NOP FOR DK.
/	CLEN		/CLR KW12 ENABLE OR
			/READ DK ENABLE.
/	CLA
/	TAD P7540	/TOGGLE KW MODE 0 TO 1 TO
/	CLLR		/CLR CLK COUNTER, OR SET
			/DK ENABLE BITS, RATE FOR
/	CLA CMA		/BOTH NOW=7=STOP.
/	CLZE		/CLR ALL DK ENABLE BITS,
/	CLSA		/CLR STATUS OF BOTH, ALL 
	CLA		/IS NOW CLEAR.
	TAD FCNTBL+1	/SET PTR TO CLKTBL FOR
			/SETTING OF ENABLE REGS.
	TAD CPTYP	/=0 IF PDP8 =1 IF PDP12
	DCA FCNPTR	/TBL ENTRIES ALTERNATE
			/FOR 8 AND 12. CPTYP SETS
			/PTR TO 1ST 8 OR 1ST 12
			/ENTRY
	TAD IDOCLK	/(AC=JMP AROUND). THE
			/FOLLOWING IS ONCE ONLY
			/CODE. THESE LOCS ARE
			/SUBSEQUENTLY USED AS
			/OPERANDS
	DCA .-1
			/THE TAG "ISVBIT" MUST BE
			/IN FRONT OF THE STRIG
			/FLAGS (STFLG) TO COVER
			/THE ILLEGAL CASE OF
			/STRIG 0 IN A FORT CALL
			/TO SYNC.
ISVBIT,	TAD CPTYP	/(AC=0,1) MAKE THE INST
			/RAR CLL (FOR DK) OR THE
			/INST RTR CLL FOR IDOCLK;
STFLG,	RAL CLL		/BECAUSE STATUS BITS FOR
	TAD RARCLL	/STRIGS DIFFER ON DK,KW.
	DCA LOP2+1	/SEE SUB IDOCLK.
			/THE ABOVE 3 LOCS ARE
			/SCHMITT TRIGGER FLAGS.
			/THE ORDER IS S1,S2,S3
			/FOR PDP8 AND S3,S2,S1
			/FOR PDP12. (CHK THE STATUS
			/BITS FOR DK AND KW).
	JMS% KONQI+1	/PUT CLOCK ON THE
ITMP0,	CLSK		/INTERRUPT QUE
			/VIA ONQI.
CLENAB,	ADDR IDOCLK	/THIS LOC WILL HOLD THE
			/ENABLE BITS FOR DK,KW
AROUND,	TAD RATE	/(AC=0,2,3,4,5,6) RATE IS
			/SET BY FPP
	RTR CLL		/START TO POSITION RATE
	RAR		/BITS. B3-B5 FOR DK
			/B0-B2 FOR KW
	TAD CPTYP	/(THIS IS TRICKY) NEED
	RAR		/CPTYP IN LNK BECAUSE
			/POSITION OF RATE BITS
			/DIFFER FOR DK KW.
	TAD% FCNPTR	/AC="STANDARD"
			/ENABLE BITS FOR DK,KW.
	SZL		/IF ITS A KW THE RATE AND
			/AND STND BITS ARE ALREADY
			/POSITIONED AS FOLLOWS:
			/RRR011000000
			/B0-B3 AND B5 WILL GO TO
			/KW CONTROL. B4,B5 WILL
			/GO TO ENABLE. B3 IS ADC
			/ON OVRFLO AND MAY BE SET
			/BELOW. B5 ON CONTROL IS
			/MODE 1. B4 AND B5 ON
			/ENABLE ARE BUFF PRESET TO
			/CLOCK COUNTER AND INTRUPT
			/ON OVRFLO RESPECTIVELY.
	JMP NOBIT-1	/ITS KW GO PUT IN CLENAB.
	RTR		/ITS DK; POSITION RATE TO
	RAR		/B3-B5. NOTE THAT THE LNK
			/(CPTYP=0) IS BEING USED.
	CMA		/NOTE ALSO THAT THE RATE
			/AND STND BITS ARE THE 1S
			/COMP. OF WHAT THEY SHOULD
			/BE, IE CPTYP=LNK=0
			/BECOMES
			/B2=1 OF ENABLE=BUFF
			/PRESET TO CLK CNTR ON
			/OVERFLO. LOOK AT THE RATE
			/BITS IN THE HANDBOOK FOR
			/BOTH DK,KW. R2,R5
			/FOR DK IS 100HZ, 100KHZ
			/RESPECTIVELY. R2,R5 FOR
			/KW IS 100KHZ,100HZ.
			/1S COMP.OF 2=5 ETC.
			/SMARTEN UP STEVE!
			/THE FINAL VALUE OF THE
			/STND DK ENABLE BITS (1ST
			/ENTRY IN CLKTBL) IS LEFT
			/AS AN EXERCISE FOR THE
			/PROGRAMMER.
	JMP NOBIT-1	/GO PUT IN CLENAB
LOP1,	RAR CLL		/ROT 1 FCN BIT INTO LNK.
			/B7=EXT CLK AND IS
			/IGNORED HERE. B8=ADC ON
			/OVRFLO, B9-B11 ARE STRIG3
			/-STRIG1 RESP. BX=1=ENABLE
			/FCN. 0=DISABLE
	DCA FCNWD	/PUT IT BACK (FCNWD IS
			/SET BY FPP)
	SNL		/ENABLE FCN ?
	JMP NOBIT	/NO
	TAD% FCNPTR	/GET BITS FROM THE MAGIC
	TAD CLENAB	/TABLE.
	DCA CLENAB	/UPDATE ENABLE WORD.
NOBIT,	ISZ FCNPTR	/ADV TO NEXT
	ISZ FCNPTR	/TBL ENTRY.
	TAD FCNWD	/WHEN FCNWD GOES TO 0
	AND P17		/WE ARE ALL DONE.
			/THE "AND" IS DONE TO
			/PROTECT AGAINST A BAD
			/ARG FROM THE FORT CALL.
P7540,	SMA SZA		/SMA IS SUPERFLOUS TO
			/THE ROUT; BUT IT
			/CREATES A NICE CONST.
	JMP LOP1	/MORE TO DO
	DCA STFLG	/CLR THE SCHMITT
\f	DCA STFLG+1	/TRIGGER FLAGS.
\f	DCA STFLG+2
	TAD OVRFLO	/SET BUFF PRESET
	CIA		/(FPP SET THIS ARG)
/	CLAB
	CLA
	TAD CLENAB	/THIS IS FOR KW ONLY.
	AND P377	/AC=3XX. 3= OR BUFF PRE
			/INTO CLK CNTR AND ENAB
			/INT ON OVRFLO.
			/XX ARE THE STRIGS.
/	CLEN		/SET KW ENABLE OR
	CLA		/READ DK ENABLE.
	DCA OVRCNT+1	/CLR NUM OF CLK OVRFLOS
	DCA OVRCNT	/SINCE TIME 0.
	TAD CPTYP	/NEED TYPE IN ORDER TO
RARCLL,	RAR CLL		/ISOLATE CONTROL
	TAD CLENAB	/BITS FOR
	SZL		/KW ?
	AND P7540	/YES, B0-B2 IS RATE,
			/B3 IS ADC, B5 IS BUFF
			/PRE TO CLK CNTR ON
			/OVRFLO, B6 IS MOX NIX.
			/IF DK ALL BITS MAY HAVE
			/MEANING
	CLA IAC		/SET BIT 11
	CLLE		/ENABLE THE CLOCK INTERRUPTS
/	CLLR		/START THE CLOCK
	CLA
	CIF CDF
	JMP% SETCLK	/RTN TO RTS
\fDOSYNC,	0		/HERE TO DISPOSITION A
			/A SCHMITT TRIGGER.
	TAD CPTYP	/DK AND KW FLAGS ARE IN
	RAR CLL		/REVERSE ORDER. IF DK
			/ARG IS OK; IF KW THEN
			/MUST SET 1=3, 2=2, 3=1
			/TO GET INDEX TO
			/CORRECT FLAG.
	TAD FCNWD	/=REQUESTED STRIG=1,2,3
			/(SET BY FPP)
	SZL		/DK ?
	CIA		/NO KW
	AND P3		/IE 1 GOES TO -1 GOES
			/TO 3 ETC. "AND" ALSO
			/INSURES RANGE IS 0-3.
			/IF ARG IS 0 RESULT IS
			/ALWAYS 0.
	TAD KSTFLG+1	/GET PTR TO FLAG
	DCA SETCLK
	TAD% SETCLK	/FLAG=0 IF TRIG HAS NOT
			/TRIPPED SINCE THE LAST
			/CALL TO SYNC; =1
			/OTHERWISE IE RTN 0=FALSE
	DCA FCNWD	/,1=TRUE (FPP WILL PICK
			/ UP FCNWD)
	DCA% SETCLK	/CLR FLAG ANYWAY
	CIF CDF
	JMP% DOSYNC	/RTN TO RTS
\fIDOCLK,	JMP AROUND	/HERE ON CLOCK INTERRUPT
			/(JMP AROUND IS A ONCE
			/ONLY CONSTANT).
	CLCL		/JUST TO MAKE SURE!
	TAD KSTFLG+1	/SET PTR TO STRIG FLAGS.
	DCA ITMP0
/	CLSA		/GET CLOCK BITS.
	CLA CLL CML RAR	/SIMULATE TICK
	DCAZ CSTAT	/SAVE THEM FOR SOME
	TADZ CSTAT	/BODY ELSE.
	SPA		/OVER FLOW ?
	ISZ OVRCNT+1	/YES BUMP LO ORD CNTR
	SKP
	ISZ OVRCNT	/BUMP HI ORD
	JMP DOTRIG	/(HI ORD ISZ SKP IS
			/HARMLESS)
LOP2,	ISZ ITMP0	/ADV STRIG FLAG PTR.
	RAR CLL		/(OR RTR CLL IF KW)
			/IE PUT STRIG BIT IN LNK.
			/IF DK THE ORDER OF
			/INTERROGATION IS S1,S2,S3
			/IF KW THE ORDER IS S3,
			/S2,S1. THE STATUS BITS
			/FOR DK ARE ADJACENT IE
			/ B9(S3),B10(S2),B11(S1)
			/FOR KW ITS EVERY OTHER,
			/B6(S1),B8(S2),B10(S3).
	DCA ISVBIT	/SAVE WHATS LEFT.
	RAL		/COPY LNK INTO FLAG IF=1
	SZA		/IE DONT CLR FLAG WHEN
	DCA% ITMP0	/ITS SET.
	TAD ISVBIT
DOTRIG,	AND P377	/THE "AND" INSURES THAT
			/THE HI ORD BITS ARE
			/CLRED SO THAT ISVBIT
			/GOES TO 0 WHEN ALL
			/STRIGS HAVE BEEN
			/DISPOSITIONED. IE
			/CLR OVRFLO BIT FOR DK,KW
			/AND CLR PRE-EVENT BIT
			/ON KW  IF IT IS SET
	SZA		/DONE ?
	JMP LOP2	/NO
	TAD #CLINT	/CALL USER EXTENDED
	SZA CLA		/CLOCK ROUT ?
	JMS% #CLINT+1	/YES
	JMP% IDOCLK	/RTN TO IHANDL
\fFCNPTR,
OVRCNT,
KONQI,	ADDR ONQI
P17,	17
P377,	377
FCNWD,	0		/FPP XRS
CPTYP,	0
RATE,	0
P1,	1
P2,	2
OVRFLO,
FCNTBL,	ADDR CLKTBL
KSTFLG,	ADDR STFLG-1
	ENTRY #CLINT
#CLINT,	0;0
	ENTRY TIME	/FIGURE WHAT TIME IT IS
TIME,	JSA SETUP
	FLDA RPTR	/=27;X;X IS USED TO FLOAT
	STARTD
	FLDA# OVRCNT	/NUM OF CLK OVRFLOS SINCE
	STARTF		/TIME 0
	FNORM
	FMUL TOVR	/=NUM OF BASIC TICKS PER
			/CLOCK OVER FLOW.
			/FAC=NUM OF TICKS SINCE
			/TIME 0.
	FDIV% RPTR,RATE	/DIV BY BASIC RATE IN HZ
			/OR 1 IF EXTERNAL CLK.
	FSTA% FTMP0	/GIVE ANS TO CALLER, ALSO
			/LEAVE ANS IN FAC IN
			/CASE TIME WAS A FCN
			/CALL. ANS=ELAPSED TIME IN
			/SECONDS SINCE TIME 0 OR
			/NUM OF EXTERNAL UNIT
	JA GOBAK	/TICKS
\f
Commit	Line	Data
81e70d48 PH	1	/PDP-8A OPTION 1 (100 HZ) CLOCK ROUTINE................CLK8A
	2	/
	3	/
	4	/
	5	/
	6	/
	7	/
	8	/
	9	/
	10	/
	11	/
	12	/
	13	/
	14	/COPYRIGHT (C) 1975
	15	/DIGITAL EQUIPMENT CORPORATION, MAYNARD, MASS.
	16	/
	17	/
	18	/
	19	/THIS SOFTWARE IS FURNISHED UNDER A LICENSE FOR USE ONLY ON A
	20	/SINGLE COMPUTER SYSTEM AND MAY BE COPIED ONLY WITH THE INCLU-
	21	/SION OF THE ABOVE COPYRIGHT NOTICE. THIS SOFTWARE,OR ANY OTHER
	22	/COPIES THEREOF, MAY NOT BE PROVIDED OR OTHERWISE MADE AVAILABLE
	23	/TO ANY OTHER PERSON EXCEPT FOR USE ON SUCH A SYSTEM AND TO ONE WHO
	24	/AGREES TO THESE LICENSE TERMS. TITLE TO AND OWNERSHIP OF THE
	25	/SOFTWARE SHALL AT ALL TIMES REMAIN IN DEC.
	26	/
	27	/
	28	/THE INFORMATION IN THIS SOFTWARE IS SUBJECT TO CHANGE WITHOUT
	29	/NOTICE AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL
	30	/EQUIPMENT CORPORATION.
	31	/
	32	/
	33	/DEC ASSUMES NO RESPONSIBILITY FOR THE USEOR RELIABILITY OF ITS
	34	/SOFTWARE ON EQUIPMENT WHICH IS NOT SUPPLIED BY DEC.
	35	/
	36	/
	37	/
	38	/
	39	/
	40	/
	41	/
	42	/
	43	/
	44	/
	45	/
	46	/
	47
	48
	49
	50
	51	/
	52	/E.P. 11/6/75
	53	/ VERSION 5A 4/26/77 MH
	54	/
	55	/
	56
	57	\f
	58
	59
	60
	61
	62
	63	EXTERN #DISP /SYSTEM PAGE 0,NEEDED TO
	64	/PUT CLOCK STATUS ON PG0
65	/(CSTAT) FOR USE BY GEN
66	/USER CLOCK SERVICE ROUTS
67	EXTERN #T812 /RTS CPTYP
68	EXTERN ONQI /INTERRUPT QUEUER
69	CLLE= 6135 /AC11=1 INTRRUPTS ON.
70	CLCL= 6136 /CLEAR CLOCK FLAG
71	CLSK= 6137 /SKIP ON CLOCK FLAG.
72	CSTAT=157 /IDOCLK PUTS CLSA BITS
73	/IN HERE
74	BASE FTMP0
75	INDEX FCNWD
76	FIELD1 SYNC
77	JSA SETUP /HERE TO READ A STRIG
78	/INITIALIZE ARGS
79	TRAP4 DOSYNC /FCNWD (XR) HOLDS STRIG
80	/TO READ
81	XTA FCNWD /=ANS=0,1
82	FSTA% FTMP1 /GIVE ANS TO CALLER
83	JA GOBAK
84	FTMP0, F 0.0 /BASE PAGE
85	FTMP1, F 0.0
86	RPTR, 27;ADDR RTBL /PTR TO RATE TBL, ALSO
87	/USED TO FLT OVRCNT (NOTE
88	/THAT THE EXPONENT=27)
89	MINRAT, F .02 /MIN ALLOWABLE RATE
90	TOVR, F 0.0
91	NAME, TEXT +CLOCK +
92	ORG 10*3+FTMP0
93	FNOP
94	JA NAME+3
95	0
96	GOBAK, JA .
97	RTBL, F 16.0 /CONSTANT USED TO CHK FOR
98	/EXT CLK BIT IN FCNWD
99	/THIS CONST MUST BE NE 0
100	MAXRAT,
101	F4096, F 4096.0 /USED TO GET OVRFLO COUNT
102	F 100000.0 /FASTEST RATE IN HERTZ
103	F 10000.0 /NEXT FASTEST RATE
104	F 1000.0
105	F 100.0 /SLOWEST RATE
106	F 1.0 /USED BY TIME FOR EXT CLK
107	\f BASE 0
108
109	SETUP, 0;0 /HERE TO INIT ALL FPP SUBS
110	STARTD
111	FLDA 30 /PICK UP RTN TO CALLER
112	FSTA GOBAK
113	FLDA 0 /GET PTR TO CALLERS ARGS
114	SETX FCNWD /CLOCK XR AND BASE
115	SETB FTMP0
116	BASE FTMP0
117	FSTA FTMP1
118	FLDA% FTMP1,P1
119	FSTA FTMP0 /PTR TO 1ST ARG
120	FLDA% FTMP1,P2
121	FSTA FTMP1 /PTR TO 2ND ARG
122	FLDA #T812 /TELLS PDP8,PDP12
123	ATX CPTYP /0=8=DK8ES,1=12=KW12A
124	STARTF
125	FLDA% FTMP0 /=1ST ARG
126	ATX FCNWD /ALWAYS IN FCNWD
127	JA SETUP
128	\f ENTRY CLOCK
129	CLOCK, JSA SETUP /HERE FOR CLOCK START
130	FLDA% FTMP0
131	FSUB RTBL /FCNWD IS IN FAC,IF GE 16
132	JGE ITSEXT /(RTBL=16.0) THEN USER IS
133	/REQUESTING AN EXTERNAL
134	/CLOCK I.E. B8 OF FCNWD
135	/IS SET.
136	FLDA% FTMP1 /=REQUESTED RATE IN HERTZ
137	FSUB MINRAT /.LE. MINUMUM RATE
138	JLE GOTR-2 /MEANS STOP CLOCK.
139	FADD MINRAT
140	FSUB MAXRAT /CHK FOR TOO FAST
141	JGT GOTR-2
142	LDX -4,OVRFLO /THERE ARE 4 BASIC RATES
143	LDX 1,RATE /=INDEX INTO RTBL; UPON
144	/TRAP(CLOCK) RATE=(0,
145	/2,3,4,5,6) 0=STOP,
146	/6=EXTERNAL
147	/2-5=PROGRAMMABLE RATES
148	LOP0, FLDA% RPTR,RATE+
149	/GET NEXT SLOWEST RATE
150	FDIV% FTMP1 /=REQUESTED RATE IN HZ.
151	/FAC=OVRFLO COUNT;
152	FSUB F4096 /MUST BE MODULO 12 BITS.
153	JLE GOTR /FOUND IT
154	JXN LOP0,OVRFLO+
155	LDX 0,RATE /RATE IS TOO SLOW, STOP
156	/CLOCK.
157	GOTR, FADD F4096 /RESTORE
158	FSTA TOVR
159	ATX OVRFLO /OVER FLOW COUNT
160	TRAP4 SETCLK /GO START CLOCK
161	JA GOBAK /RTN TO CALLER
162	ITSEXT, LDX 6,RATE /=RATE FOR EXT CLK
163	FLDA% FTMP1 /REQUESTED RATE IS
164	/INTERPRETED AS OVRFLO
165	JA GOTR+1 /WHEN RATE IS EXTERNAL
166	\f/MAGIC TABLE USED BY SETCLK TO SET CLOCK ENABLE
167	/BITS. EVEN NUMBERED ENTRIES ARE FOR THE DK8ES;
168	/ODD NUMBERED ONES ARE FOR THE KW12A.
169
170	CLKTBL, 0675 /"STANDARD" DK BITS
171	300 /STND KW BITS
172	1 /DK STRIG1 BIT
173	60 /KW STRIG1 BITS
174	2 /DK S2
175	14 /KW S2
176	4 /S3
177	P3, 3 /S3
178	40 /DK ADC ON OVR BIT
179	400 /KW ADC ON OVR BIT
180
181	/IF NOT NEXT PAGE DO ORG
182	IFNEG .-200 < ORG .-SYNC&7600+200+SYNC >
183	\fSETCLK, 0 /TRAP HERE TO START CLK
184	/THIS ROUT HANDLES BOTH
185	/DK8ES AND KW12A.
186	CLCL /TRY AND CLEAR IT HERE????
187	/ CLLR /STOP KW AND SET MODE 0;
188	/NOP FOR DK.
189	/ CLEN /CLR KW12 ENABLE OR
190	/READ DK ENABLE.
191	/ CLA
192	/ TAD P7540 /TOGGLE KW MODE 0 TO 1 TO
193	/ CLLR /CLR CLK COUNTER, OR SET
194	/DK ENABLE BITS, RATE FOR
195	/ CLA CMA /BOTH NOW=7=STOP.
196	/ CLZE /CLR ALL DK ENABLE BITS,
197	/ CLSA /CLR STATUS OF BOTH, ALL
198	CLA /IS NOW CLEAR.
199	TAD FCNTBL+1 /SET PTR TO CLKTBL FOR
200	/SETTING OF ENABLE REGS.
201	TAD CPTYP /=0 IF PDP8 =1 IF PDP12
202	DCA FCNPTR /TBL ENTRIES ALTERNATE
203	/FOR 8 AND 12. CPTYP SETS
204	/PTR TO 1ST 8 OR 1ST 12
205	/ENTRY
206	TAD IDOCLK /(AC=JMP AROUND). THE
207	/FOLLOWING IS ONCE ONLY
208	/CODE. THESE LOCS ARE
209	/SUBSEQUENTLY USED AS
210	/OPERANDS
211	DCA .-1
212	/THE TAG "ISVBIT" MUST BE
213	/IN FRONT OF THE STRIG
214	/FLAGS (STFLG) TO COVER
215	/THE ILLEGAL CASE OF
216	/STRIG 0 IN A FORT CALL
217	/TO SYNC.
218	ISVBIT, TAD CPTYP /(AC=0,1) MAKE THE INST
219	/RAR CLL (FOR DK) OR THE
220	/INST RTR CLL FOR IDOCLK;
221	STFLG, RAL CLL /BECAUSE STATUS BITS FOR
222	TAD RARCLL /STRIGS DIFFER ON DK,KW.
223	DCA LOP2+1 /SEE SUB IDOCLK.
224	/THE ABOVE 3 LOCS ARE
225	/SCHMITT TRIGGER FLAGS.
226	/THE ORDER IS S1,S2,S3
227	/FOR PDP8 AND S3,S2,S1
228	/FOR PDP12. (CHK THE STATUS
229	/BITS FOR DK AND KW).
230	JMS% KONQI+1 /PUT CLOCK ON THE
231	ITMP0, CLSK /INTERRUPT QUE
232	/VIA ONQI.
233	CLENAB, ADDR IDOCLK /THIS LOC WILL HOLD THE
234	/ENABLE BITS FOR DK,KW
235	AROUND, TAD RATE /(AC=0,2,3,4,5,6) RATE IS
236	/SET BY FPP
237	RTR CLL /START TO POSITION RATE
238	RAR /BITS. B3-B5 FOR DK
239	/B0-B2 FOR KW
240	TAD CPTYP /(THIS IS TRICKY) NEED
241	RAR /CPTYP IN LNK BECAUSE
242	/POSITION OF RATE BITS
243	/DIFFER FOR DK KW.
244	TAD% FCNPTR /AC="STANDARD"
245	/ENABLE BITS FOR DK,KW.
246	SZL /IF ITS A KW THE RATE AND
247	/AND STND BITS ARE ALREADY
248	/POSITIONED AS FOLLOWS:
249	/RRR011000000
250	/B0-B3 AND B5 WILL GO TO
251	/KW CONTROL. B4,B5 WILL
252	/GO TO ENABLE. B3 IS ADC
253	/ON OVRFLO AND MAY BE SET
254	/BELOW. B5 ON CONTROL IS
255	/MODE 1. B4 AND B5 ON
256	/ENABLE ARE BUFF PRESET TO
257	/CLOCK COUNTER AND INTRUPT
258	/ON OVRFLO RESPECTIVELY.
259	JMP NOBIT-1 /ITS KW GO PUT IN CLENAB.
260	RTR /ITS DK; POSITION RATE TO
261	RAR /B3-B5. NOTE THAT THE LNK
262	/(CPTYP=0) IS BEING USED.
263	CMA /NOTE ALSO THAT THE RATE
264	/AND STND BITS ARE THE 1S
265	/COMP. OF WHAT THEY SHOULD
266	/BE, IE CPTYP=LNK=0
267	/BECOMES
268	/B2=1 OF ENABLE=BUFF
269	/PRESET TO CLK CNTR ON
270	/OVERFLO. LOOK AT THE RATE
271	/BITS IN THE HANDBOOK FOR
272	/BOTH DK,KW. R2,R5
273	/FOR DK IS 100HZ, 100KHZ
274	/RESPECTIVELY. R2,R5 FOR
275	/KW IS 100KHZ,100HZ.
276	/1S COMP.OF 2=5 ETC.
277	/SMARTEN UP STEVE!
278	/THE FINAL VALUE OF THE
279	/STND DK ENABLE BITS (1ST
280	/ENTRY IN CLKTBL) IS LEFT
281	/AS AN EXERCISE FOR THE
282	/PROGRAMMER.
283	JMP NOBIT-1 /GO PUT IN CLENAB
284	LOP1, RAR CLL /ROT 1 FCN BIT INTO LNK.
285	/B7=EXT CLK AND IS
286	/IGNORED HERE. B8=ADC ON
287	/OVRFLO, B9-B11 ARE STRIG3
288	/-STRIG1 RESP. BX=1=ENABLE
289	/FCN. 0=DISABLE
290	DCA FCNWD /PUT IT BACK (FCNWD IS
291	/SET BY FPP)
292	SNL /ENABLE FCN ?
293	JMP NOBIT /NO
294	TAD% FCNPTR /GET BITS FROM THE MAGIC
295	TAD CLENAB /TABLE.
296	DCA CLENAB /UPDATE ENABLE WORD.
297	NOBIT, ISZ FCNPTR /ADV TO NEXT
298	ISZ FCNPTR /TBL ENTRY.
299	TAD FCNWD /WHEN FCNWD GOES TO 0
300	AND P17 /WE ARE ALL DONE.
301	/THE "AND" IS DONE TO
302	/PROTECT AGAINST A BAD
303	/ARG FROM THE FORT CALL.
304	P7540, SMA SZA /SMA IS SUPERFLOUS TO
305	/THE ROUT; BUT IT
306	/CREATES A NICE CONST.
307	JMP LOP1 /MORE TO DO
308	DCA STFLG /CLR THE SCHMITT
309	\f DCA STFLG+1 /TRIGGER FLAGS.
310	\f DCA STFLG+2
311	TAD OVRFLO /SET BUFF PRESET
312	CIA /(FPP SET THIS ARG)
313	/ CLAB
314	CLA
315	TAD CLENAB /THIS IS FOR KW ONLY.
316	AND P377 /AC=3XX. 3= OR BUFF PRE
317	/INTO CLK CNTR AND ENAB
318	/INT ON OVRFLO.
319	/XX ARE THE STRIGS.
320	/ CLEN /SET KW ENABLE OR
321	CLA /READ DK ENABLE.
322	DCA OVRCNT+1 /CLR NUM OF CLK OVRFLOS
323	DCA OVRCNT /SINCE TIME 0.
324	TAD CPTYP /NEED TYPE IN ORDER TO
325	RARCLL, RAR CLL /ISOLATE CONTROL
326	TAD CLENAB /BITS FOR
327	SZL /KW ?
328	AND P7540 /YES, B0-B2 IS RATE,
329	/B3 IS ADC, B5 IS BUFF
330	/PRE TO CLK CNTR ON
331	/OVRFLO, B6 IS MOX NIX.
332	/IF DK ALL BITS MAY HAVE
333	/MEANING
334	CLA IAC /SET BIT 11
335	CLLE /ENABLE THE CLOCK INTERRUPTS
336	/ CLLR /START THE CLOCK
337	CLA
338	CIF CDF
339	JMP% SETCLK /RTN TO RTS
340	\fDOSYNC, 0 /HERE TO DISPOSITION A
341	/A SCHMITT TRIGGER.
342	TAD CPTYP /DK AND KW FLAGS ARE IN
343	RAR CLL /REVERSE ORDER. IF DK
344	/ARG IS OK; IF KW THEN
345	/MUST SET 1=3, 2=2, 3=1
346	/TO GET INDEX TO
347	/CORRECT FLAG.
348	TAD FCNWD /=REQUESTED STRIG=1,2,3
349	/(SET BY FPP)
350	SZL /DK ?
351	CIA /NO KW
352	AND P3 /IE 1 GOES TO -1 GOES
353	/TO 3 ETC. "AND" ALSO
354	/INSURES RANGE IS 0-3.
355	/IF ARG IS 0 RESULT IS
356	/ALWAYS 0.
357	TAD KSTFLG+1 /GET PTR TO FLAG
358	DCA SETCLK
359	TAD% SETCLK /FLAG=0 IF TRIG HAS NOT
360	/TRIPPED SINCE THE LAST
361	/CALL TO SYNC; =1
362	/OTHERWISE IE RTN 0=FALSE
363	DCA FCNWD /,1=TRUE (FPP WILL PICK
364	/ UP FCNWD)
365	DCA% SETCLK /CLR FLAG ANYWAY
366	CIF CDF
367	JMP% DOSYNC /RTN TO RTS
368	\fIDOCLK, JMP AROUND /HERE ON CLOCK INTERRUPT
369	/(JMP AROUND IS A ONCE
370	/ONLY CONSTANT).
371	CLCL /JUST TO MAKE SURE!
372	TAD KSTFLG+1 /SET PTR TO STRIG FLAGS.
373	DCA ITMP0
374	/ CLSA /GET CLOCK BITS.
375	CLA CLL CML RAR /SIMULATE TICK
376	DCAZ CSTAT /SAVE THEM FOR SOME
377	TADZ CSTAT /BODY ELSE.
378	SPA /OVER FLOW ?
379	ISZ OVRCNT+1 /YES BUMP LO ORD CNTR
380	SKP
381	ISZ OVRCNT /BUMP HI ORD
382	JMP DOTRIG /(HI ORD ISZ SKP IS
383	/HARMLESS)
384	LOP2, ISZ ITMP0 /ADV STRIG FLAG PTR.
385	RAR CLL /(OR RTR CLL IF KW)
386	/IE PUT STRIG BIT IN LNK.
387	/IF DK THE ORDER OF
388	/INTERROGATION IS S1,S2,S3
389	/IF KW THE ORDER IS S3,
390	/S2,S1. THE STATUS BITS
391	/FOR DK ARE ADJACENT IE
392	/ B9(S3),B10(S2),B11(S1)
393	/FOR KW ITS EVERY OTHER,
394	/B6(S1),B8(S2),B10(S3).
395	DCA ISVBIT /SAVE WHATS LEFT.
396	RAL /COPY LNK INTO FLAG IF=1
397	SZA /IE DONT CLR FLAG WHEN
398	DCA% ITMP0 /ITS SET.
399	TAD ISVBIT
400	DOTRIG, AND P377 /THE "AND" INSURES THAT
401	/THE HI ORD BITS ARE
402	/CLRED SO THAT ISVBIT
403	/GOES TO 0 WHEN ALL
404	/STRIGS HAVE BEEN
405	/DISPOSITIONED. IE
406	/CLR OVRFLO BIT FOR DK,KW
407	/AND CLR PRE-EVENT BIT
408	/ON KW IF IT IS SET
409	SZA /DONE ?
410	JMP LOP2 /NO
411	TAD #CLINT /CALL USER EXTENDED
412	SZA CLA /CLOCK ROUT ?
413	JMS% #CLINT+1 /YES
414	JMP% IDOCLK /RTN TO IHANDL
415	\fFCNPTR,
416	OVRCNT,
417	KONQI, ADDR ONQI
418	P17, 17
419	P377, 377
420	FCNWD, 0 /FPP XRS
421	CPTYP, 0
422	RATE, 0
423	P1, 1
424	P2, 2
425	OVRFLO,
426	FCNTBL, ADDR CLKTBL
427	KSTFLG, ADDR STFLG-1
428	ENTRY #CLINT
429	#CLINT, 0;0
430	ENTRY TIME /FIGURE WHAT TIME IT IS
431	TIME, JSA SETUP
432	FLDA RPTR /=27;X;X IS USED TO FLOAT
433	STARTD
434	FLDA# OVRCNT /NUM OF CLK OVRFLOS SINCE
435	STARTF /TIME 0
436	FNORM
437	FMUL TOVR /=NUM OF BASIC TICKS PER
438	/CLOCK OVER FLOW.
439	/FAC=NUM OF TICKS SINCE
440	/TIME 0.
441	FDIV% RPTR,RATE /DIV BY BASIC RATE IN HZ
442	/OR 1 IF EXTERNAL CLK.
443	FSTA% FTMP0 /GIVE ANS TO CALLER, ALSO
444	/LEAVE ANS IN FAC IN
445	/CASE TIME WAS A FCN
446	/CALL. ANS=ELAPSED TIME IN
447	/SECONDS SINCE TIME 0 OR
448	/NUM OF EXTERNAL UNIT
449	JA GOBAK /TICKS
450	\f