Commit | Line | Data |
---|---|---|
81e70d48 PH |
1 | DEVICE=13*10 / CLOCK DEVICE CODE\r |
2 | /\r | |
3 | DST=7445\r | |
4 | DAD=7443\r | |
5 | CAM=7621\r | |
6 | DLD=DAD CAM\r | |
7 | DDZ=DST CAM / DOUBLE PRECISION DEPOSIT ZERO\r | |
8 | /\r | |
9 | /\r | |
10 | CLZE=6000!DEVICE / ONE'S IN AC CLEAR CLOCK ENABLE REGISTER\r | |
11 | CLSK=6001!DEVICE / SKIP IF CLOCK OVERFLOWS OR ST FIRED\r | |
12 | CLDE=6002!DEVICE /ONE'S IN AC SET CLOCK ENABLE REGISTER\r | |
13 | CLED=6004!DEVICE / CLOCK ENABLE TO AC\r | |
14 | CLSA=6005!DEVICE / CLOCK STATUS REG. TO AC AND AC ONES CLEAR STATUS REG.\r | |
15 | CLBA=6006!DEVICE / CLOCK BUFFER/PRESET TO AC\r | |
16 | CLCA=6007!DEVICE / COUNT REGISTER TO BUFFER/PRESET AND TO AC\r | |
17 | /\r | |
18 | /\r | |
19 | SETCLK, 0\r | |
20 | CLA\r | |
21 | CLED / ENABLE BITS --> AC\r | |
22 | CLZE / CLEAR ENABLE REGISTER\r | |
23 | CLA CMA / -1 --> AC\r | |
24 | CLSA / CLEAR STATUS REGISTER\r | |
25 | CLA\r | |
26 | CLAB / STOP THE CLOCK\r | |
27 | ISZ ONCE / ONCE ONLY ONQUI INITIALISATION\r | |
28 | JMP AROUND\r | |
29 | JMS% XONQI+1 / PLACE CLOCK ONTO THE INTERRUPT CHAIN\r | |
30 | CLSK\r | |
31 | ADDR INTCLK / CLOCK INTERRUPT ROUTINE\r | |
32 | AROUND,\r | |
33 | CLA\r | |
34 | DCA ONCE\r | |
35 | SWP / MQ --> AC\r | |
36 | DCA SAACMQ+1 / SAVE MQ\r | |
37 | \r | |
38 | DDZ; STRIG / CLEAR SCHMITT TRIGG REGISTERS\r | |
39 | DCA STRIG+2\r | |
40 | DDZ; TIME / AND TIME REGISTER\r | |
41 | TAD SAACMQ+1/ RESTORE MQ\r | |
42 | MQL\r | |
43 | TAD CLENAB / CLOCK BITS --> AC\r | |
44 | CLDE / AND START THE CLOCK\r | |
45 | CIF CDF\r | |
46 | JMP% SETCLK\r | |
47 | /\r | |
48 | /\r | |
49 | SAACMQ, 0;0\r | |
50 | XONQI, ADDR ONQI\r | |
51 | STRIG, 0;0;0\r | |
52 | TIME, 0;0 / HOLDS TIME BETWEEN STRIGG INTERRUPTS\r | |
53 | ONCE, -1\r | |
54 | /\r | |
55 | \f/ INTERRUPT SERVICE ROUTINE\r | |
56 | /\r | |
57 | INTCLK, 0\r | |
58 | DST; SAACMQ\r | |
59 | CAM\r | |
60 | TAD KSTRIG\r | |
61 | DCA ITEMP0\r | |
62 | CLSA\r | |
63 | DCA CFLAG\r | |
64 | CLCA\r | |
65 | CLBA / TIME OF STRIG --> MQ\r | |
66 | MQL\r | |
67 | TAD CFLAG\r | |
68 | CLSA / CLEAR CLOCK STATUS REGISTER\r | |
69 | CLA / POSSIBLE THERE WAS AN EVENT SO WE\r | |
70 | TAD CFLAG / ONLY THE EVENTS WE KNOW!\r | |
71 | SPA CLA / OVERFLOW FLAG?\r | |
72 | CLA IAC / THEN WE ADD 4096\r | |
73 | DAD; TIME / MQ HOLDS COUNTER\r | |
74 | DST; TIME /\r | |
75 | /\r | |
76 | CAM\r | |
77 | TAD CFLAG / CLOCK STATUS --> AC\r | |
78 | JMP DOTRIG\r | |
79 | LOP2, ISZ ITEMP0\r | |
80 | RAR CLL\r | |
81 | SZL\r | |
82 | ISZ% ITEMP0\r | |
83 | DOTRIG, AND P377\r | |
84 | SZA\r | |
85 | JMP LOP2\r | |
86 | JMS% XSERV / SPECIAL TRIGGER SERVICE ROUTINE\r | |
87 | \1a\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0 |