| 1 | /* altairz80_defs.h: MITS Altair simulator definitions\r |
| 2 | \r |
| 3 | Copyright (c) 2002-2008, Peter Schorn\r |
| 4 | \r |
| 5 | Permission is hereby granted, free of charge, to any person obtaining a\r |
| 6 | copy of this software and associated documentation files (the "Software"),\r |
| 7 | to deal in the Software without restriction, including without limitation\r |
| 8 | the rights to use, copy, modify, merge, publish, distribute, sublicense,\r |
| 9 | and/or sell copies of the Software, and to permit persons to whom the\r |
| 10 | Software is furnished to do so, subject to the following conditions:\r |
| 11 | \r |
| 12 | The above copyright notice and this permission notice shall be included in\r |
| 13 | all copies or substantial portions of the Software.\r |
| 14 | \r |
| 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r |
| 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\r |
| 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL\r |
| 18 | PETER SCHORN BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r |
| 19 | IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r |
| 20 | CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r |
| 21 | \r |
| 22 | Except as contained in this notice, the name of Peter Schorn shall not\r |
| 23 | be used in advertising or otherwise to promote the sale, use or other dealings\r |
| 24 | in this Software without prior written authorization from Peter Schorn.\r |
| 25 | \r |
| 26 | Based on work by Charles E Owen (c) 1997\r |
| 27 | */\r |
| 28 | \r |
| 29 | #include "sim_defs.h" /* simulator definitions */\r |
| 30 | \r |
| 31 | #define MAXBANKSIZE 65536 /* maximum memory size, a power of 2 */\r |
| 32 | #define MAXBANKSIZELOG2 16 /* log2 of MAXBANKSIZE */\r |
| 33 | #define MAXBANKS 16 /* max number of memory banks, a power of 2 */\r |
| 34 | #define MAXBANKSLOG2 4 /* log2 of MAXBANKS */\r |
| 35 | #define MAXMEMORY (MAXBANKS * MAXBANKSIZE) /* maximum, total memory size */\r |
| 36 | #define ADDRMASK (MAXBANKSIZE - 1) /* address mask */\r |
| 37 | #define ADDRMASKEXTENDED (MAXMEMORY - 1) /* extended address mask */\r |
| 38 | #define BANKMASK (MAXBANKS - 1) /* bank mask */\r |
| 39 | #define MEMORYSIZE (cpu_unit.capac) /* actual memory size */\r |
| 40 | #define KB 1024 /* kilo byte */\r |
| 41 | #define KBLOG2 10 /* log2 of KB */\r |
| 42 | #define ALTAIR_ROM_LOW 0xff00 /* start address of regular Altair ROM */\r |
| 43 | #define RESOURCE_TYPE_MEMORY 1\r |
| 44 | #define RESOURCE_TYPE_IO 2\r |
| 45 | \r |
| 46 | #define NUM_OF_DSK 8 /* NUM_OF_DSK must be power of two */\r |
| 47 | #define LDA_INSTRUCTION 0x3e /* op-code for LD A,<8-bit value> instruction */\r |
| 48 | #define UNIT_NO_OFFSET_1 0x37 /* LD A,<unitno> */\r |
| 49 | #define UNIT_NO_OFFSET_2 0xb4 /* LD a,80h | <unitno> */\r |
| 50 | \r |
| 51 | #define CHIP_TYPE_8080 0\r |
| 52 | #define CHIP_TYPE_Z80 1\r |
| 53 | #define CHIP_TYPE_8086 2\r |
| 54 | \r |
| 55 | /* simulator stop codes */\r |
| 56 | #define STOP_HALT 0 /* HALT */\r |
| 57 | #define STOP_IBKPT 1 /* breakpoint (program counter) */\r |
| 58 | #define STOP_MEM 2 /* breakpoint (memory access) */\r |
| 59 | #define STOP_OPCODE 3 /* invalid operation encountered (8080, Z80, 8086) */\r |
| 60 | \r |
| 61 | #define UNIT_CPU_V_OPSTOP (UNIT_V_UF+0) /* stop on invalid operation */\r |
| 62 | #define UNIT_CPU_OPSTOP (1 << UNIT_CPU_V_OPSTOP)\r |
| 63 | #define UNIT_CPU_V_BANKED (UNIT_V_UF+1) /* banked memory is used */\r |
| 64 | #define UNIT_CPU_BANKED (1 << UNIT_CPU_V_BANKED)\r |
| 65 | #define UNIT_CPU_V_ALTAIRROM (UNIT_V_UF+2) /* ALTAIR ROM exists */\r |
| 66 | #define UNIT_CPU_ALTAIRROM (1 << UNIT_CPU_V_ALTAIRROM)\r |
| 67 | #define UNIT_CPU_V_VERBOSE (UNIT_V_UF+3) /* warn if ROM is written to */\r |
| 68 | #define UNIT_CPU_VERBOSE (1 << UNIT_CPU_V_VERBOSE)\r |
| 69 | #define UNIT_CPU_V_MMU (UNIT_V_UF+4) /* use MMU and slower CPU */\r |
| 70 | #define UNIT_CPU_MMU (1 << UNIT_CPU_V_MMU)\r |
| 71 | #define UNIT_CPU_V_STOPONHALT (UNIT_V_UF+5) /* stop simulation on HALT */\r |
| 72 | #define UNIT_CPU_STOPONHALT (1 << UNIT_CPU_V_STOPONHALT)\r |
| 73 | \r |
| 74 | #ifdef CPUSWITCHER\r |
| 75 | #define UNIT_CPU_V_SWITCHER (UNIT_V_UF+6) /* switcher 8086 <--> 8080/Z80 enabled */\r |
| 76 | #define UNIT_CPU_SWITCHER (1 << UNIT_CPU_V_SWITCHER)\r |
| 77 | #endif\r |
| 78 | \r |
| 79 | #define UNIX_PLATFORM (defined (__linux) || defined(__NetBSD__) \\r |
| 80 | || defined (__OpenBSD__) || defined (__FreeBSD__) || defined (__APPLE__))\r |
| 81 | \r |
| 82 | #define ADDRESS_FORMAT "[0x%05x]"\r |
| 83 | #define PC_FORMAT "\n" ADDRESS_FORMAT " "\r |
| 84 | #define MESSAGE_1(p1) \\r |
| 85 | sprintf(messageBuffer,PC_FORMAT p1,PCX); printMessage()\r |
| 86 | #define MESSAGE_2(p1,p2) \\r |
| 87 | sprintf(messageBuffer,PC_FORMAT p1,PCX,p2); printMessage()\r |
| 88 | #define MESSAGE_3(p1,p2,p3) \\r |
| 89 | sprintf(messageBuffer,PC_FORMAT p1,PCX,p2,p3); printMessage()\r |
| 90 | #define MESSAGE_4(p1,p2,p3,p4) \\r |
| 91 | sprintf(messageBuffer,PC_FORMAT p1,PCX,p2,p3,p4); printMessage()\r |
| 92 | #define MESSAGE_5(p1,p2,p3,p4,p5) \\r |
| 93 | sprintf(messageBuffer,PC_FORMAT p1,PCX,p2,p3,p4,p5); printMessage()\r |
| 94 | #define MESSAGE_6(p1,p2,p3,p4,p5,p6) \\r |
| 95 | sprintf(messageBuffer,PC_FORMAT p1,PCX,p2,p3,p4,p5,p6); printMessage()\r |
| 96 | #define MESSAGE_7(p1,p2,p3,p4,p5,p6,p7) \\r |
| 97 | sprintf(messageBuffer,PC_FORMAT p1,PCX,p2,p3,p4,p5,p6,p7); printMessage()\r |
| 98 | \r |
| 99 | /* use NLP for new line printing while the simulation is running */\r |
| 100 | #if UNIX_PLATFORM\r |
| 101 | #define NLP "\r\n"\r |
| 102 | #else\r |
| 103 | #define NLP "\n"\r |
| 104 | #endif\r |
| 105 | \r |
| 106 | #define TRACE_PRINT(level, args) if(trace_level & level) { \\r |
| 107 | printf args; \\r |
| 108 | }\r |
| 109 | \r |
| 110 | #if defined (__MWERKS__) && defined (macintosh)\r |
| 111 | #define __FUNCTION__ __FILE__\r |
| 112 | #endif\r |
| 113 | \r |
| 114 | typedef struct {\r |
| 115 | uint32 mem_base; /* Memory Base Address */\r |
| 116 | uint32 mem_size; /* Memory Address space requirement */\r |
| 117 | uint32 io_base; /* I/O Base Address */\r |
| 118 | uint32 io_size; /* I/O Address Space requirement */\r |
| 119 | } PNP_INFO;\r |