| 1 | /* This file auto-generated from insns.dat by insns.pl - don't edit it */\r |
| 2 | \r |
| 3 | #include "nasm.h"\r |
| 4 | #include "insns.h"\r |
| 5 | \r |
| 6 | static struct itemplate instrux_AAA[] = {\r |
| 7 | {I_AAA, 0, {0,0,0}, "\1\x37", IF_8086},\r |
| 8 | ITEMPLATE_END\r |
| 9 | };\r |
| 10 | \r |
| 11 | static struct itemplate instrux_AAD[] = {\r |
| 12 | {I_AAD, 0, {0,0,0}, "\2\xD5\x0A", IF_8086},\r |
| 13 | {I_AAD, 1, {IMMEDIATE,0,0}, "\1\xD5\24", IF_8086|IF_SB},\r |
| 14 | ITEMPLATE_END\r |
| 15 | };\r |
| 16 | \r |
| 17 | static struct itemplate instrux_AAM[] = {\r |
| 18 | {I_AAM, 0, {0,0,0}, "\2\xD4\x0A", IF_8086},\r |
| 19 | {I_AAM, 1, {IMMEDIATE,0,0}, "\1\xD4\24", IF_8086|IF_SB},\r |
| 20 | ITEMPLATE_END\r |
| 21 | };\r |
| 22 | \r |
| 23 | static struct itemplate instrux_AAS[] = {\r |
| 24 | {I_AAS, 0, {0,0,0}, "\1\x3F", IF_8086},\r |
| 25 | ITEMPLATE_END\r |
| 26 | };\r |
| 27 | \r |
| 28 | static struct itemplate instrux_ADC[] = {\r |
| 29 | {I_ADC, 2, {MEMORY,REG8,0}, "\300\1\x10\101", IF_8086|IF_SM},\r |
| 30 | {I_ADC, 2, {REG8,REG8,0}, "\1\x10\101", IF_8086},\r |
| 31 | {I_ADC, 2, {MEMORY,REG16,0}, "\320\300\1\x11\101", IF_8086|IF_SM},\r |
| 32 | {I_ADC, 2, {REG16,REG16,0}, "\320\1\x11\101", IF_8086},\r |
| 33 | {I_ADC, 2, {MEMORY,REG32,0}, "\321\300\1\x11\101", IF_386|IF_SM},\r |
| 34 | {I_ADC, 2, {REG32,REG32,0}, "\321\1\x11\101", IF_386},\r |
| 35 | {I_ADC, 2, {REG8,MEMORY,0}, "\301\1\x12\110", IF_8086|IF_SM},\r |
| 36 | {I_ADC, 2, {REG8,REG8,0}, "\1\x12\110", IF_8086},\r |
| 37 | {I_ADC, 2, {REG16,MEMORY,0}, "\320\301\1\x13\110", IF_8086|IF_SM},\r |
| 38 | {I_ADC, 2, {REG16,REG16,0}, "\320\1\x13\110", IF_8086},\r |
| 39 | {I_ADC, 2, {REG32,MEMORY,0}, "\321\301\1\x13\110", IF_386|IF_SM},\r |
| 40 | {I_ADC, 2, {REG32,REG32,0}, "\321\1\x13\110", IF_386},\r |
| 41 | {I_ADC, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\202\15", IF_8086},\r |
| 42 | {I_ADC, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\202\15", IF_386},\r |
| 43 | {I_ADC, 2, {REG_AL,IMMEDIATE,0}, "\1\x14\21", IF_8086|IF_SM},\r |
| 44 | {I_ADC, 2, {REG_AX,SBYTE,0}, "\320\1\x83\202\15", IF_8086|IF_SM},\r |
| 45 | {I_ADC, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x15\31", IF_8086|IF_SM},\r |
| 46 | {I_ADC, 2, {REG_EAX,SBYTE,0}, "\321\1\x83\202\15", IF_386|IF_SM},\r |
| 47 | {I_ADC, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x15\41", IF_386|IF_SM},\r |
| 48 | {I_ADC, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\202\21", IF_8086|IF_SM},\r |
| 49 | {I_ADC, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\202\131", IF_8086|IF_SM},\r |
| 50 | {I_ADC, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\202\141", IF_386|IF_SM},\r |
| 51 | {I_ADC, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\202\21", IF_8086|IF_SM},\r |
| 52 | {I_ADC, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\202\131", IF_8086|IF_SM},\r |
| 53 | {I_ADC, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\202\141", IF_386|IF_SM},\r |
| 54 | ITEMPLATE_END\r |
| 55 | };\r |
| 56 | \r |
| 57 | static struct itemplate instrux_ADD[] = {\r |
| 58 | {I_ADD, 2, {MEMORY,REG8,0}, "\300\17\101", IF_8086|IF_SM},\r |
| 59 | {I_ADD, 2, {REG8,REG8,0}, "\17\101", IF_8086},\r |
| 60 | {I_ADD, 2, {MEMORY,REG16,0}, "\320\300\1\x01\101", IF_8086|IF_SM},\r |
| 61 | {I_ADD, 2, {REG16,REG16,0}, "\320\1\x01\101", IF_8086},\r |
| 62 | {I_ADD, 2, {MEMORY,REG32,0}, "\321\300\1\x01\101", IF_386|IF_SM},\r |
| 63 | {I_ADD, 2, {REG32,REG32,0}, "\321\1\x01\101", IF_386},\r |
| 64 | {I_ADD, 2, {REG8,MEMORY,0}, "\301\1\x02\110", IF_8086|IF_SM},\r |
| 65 | {I_ADD, 2, {REG8,REG8,0}, "\1\x02\110", IF_8086},\r |
| 66 | {I_ADD, 2, {REG16,MEMORY,0}, "\320\301\1\x03\110", IF_8086|IF_SM},\r |
| 67 | {I_ADD, 2, {REG16,REG16,0}, "\320\1\x03\110", IF_8086},\r |
| 68 | {I_ADD, 2, {REG32,MEMORY,0}, "\321\301\1\x03\110", IF_386|IF_SM},\r |
| 69 | {I_ADD, 2, {REG32,REG32,0}, "\321\1\x03\110", IF_386},\r |
| 70 | {I_ADD, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\200\15", IF_8086},\r |
| 71 | {I_ADD, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\200\15", IF_386},\r |
| 72 | {I_ADD, 2, {REG_AL,IMMEDIATE,0}, "\1\x04\21", IF_8086|IF_SM},\r |
| 73 | {I_ADD, 2, {REG_AX,SBYTE,0}, "\320\1\x83\200\15", IF_8086|IF_SM},\r |
| 74 | {I_ADD, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x05\31", IF_8086|IF_SM},\r |
| 75 | {I_ADD, 2, {REG_EAX,SBYTE,0}, "\321\1\x83\200\15", IF_386|IF_SM},\r |
| 76 | {I_ADD, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x05\41", IF_386|IF_SM},\r |
| 77 | {I_ADD, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\200\21", IF_8086|IF_SM},\r |
| 78 | {I_ADD, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\200\131", IF_8086|IF_SM},\r |
| 79 | {I_ADD, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\200\141", IF_386|IF_SM},\r |
| 80 | {I_ADD, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\200\21", IF_8086|IF_SM},\r |
| 81 | {I_ADD, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\200\131", IF_8086|IF_SM},\r |
| 82 | {I_ADD, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\200\141", IF_386|IF_SM},\r |
| 83 | ITEMPLATE_END\r |
| 84 | };\r |
| 85 | \r |
| 86 | static struct itemplate instrux_ADDPD[] = {\r |
| 87 | {I_ADDPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\x58\110", IF_WILLAMETTE|IF_SSE2},\r |
| 88 | {I_ADDPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\x58\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 89 | ITEMPLATE_END\r |
| 90 | };\r |
| 91 | \r |
| 92 | static struct itemplate instrux_ADDPS[] = {\r |
| 93 | {I_ADDPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x58\110", IF_KATMAI|IF_SSE},\r |
| 94 | {I_ADDPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x58\110", IF_KATMAI|IF_SSE},\r |
| 95 | ITEMPLATE_END\r |
| 96 | };\r |
| 97 | \r |
| 98 | static struct itemplate instrux_ADDSD[] = {\r |
| 99 | {I_ADDSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\x58\110", IF_WILLAMETTE|IF_SSE2},\r |
| 100 | {I_ADDSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\x58\110", IF_WILLAMETTE|IF_SSE2},\r |
| 101 | ITEMPLATE_END\r |
| 102 | };\r |
| 103 | \r |
| 104 | static struct itemplate instrux_ADDSS[] = {\r |
| 105 | {I_ADDSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x58\110", IF_KATMAI|IF_SSE},\r |
| 106 | {I_ADDSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x58\110", IF_KATMAI|IF_SSE},\r |
| 107 | ITEMPLATE_END\r |
| 108 | };\r |
| 109 | \r |
| 110 | static struct itemplate instrux_ADDSUBPD[] = {\r |
| 111 | {I_ADDSUBPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD0\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r |
| 112 | {I_ADDSUBPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD0\110", IF_PRESCOTT|IF_SSE3},\r |
| 113 | ITEMPLATE_END\r |
| 114 | };\r |
| 115 | \r |
| 116 | static struct itemplate instrux_ADDSUBPS[] = {\r |
| 117 | {I_ADDSUBPS, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\xD0\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r |
| 118 | {I_ADDSUBPS, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\xD0\110", IF_PRESCOTT|IF_SSE3},\r |
| 119 | ITEMPLATE_END\r |
| 120 | };\r |
| 121 | \r |
| 122 | static struct itemplate instrux_AND[] = {\r |
| 123 | {I_AND, 2, {MEMORY,REG8,0}, "\300\1\x20\101", IF_8086|IF_SM},\r |
| 124 | {I_AND, 2, {REG8,REG8,0}, "\1\x20\101", IF_8086},\r |
| 125 | {I_AND, 2, {MEMORY,REG16,0}, "\320\300\1\x21\101", IF_8086|IF_SM},\r |
| 126 | {I_AND, 2, {REG16,REG16,0}, "\320\1\x21\101", IF_8086},\r |
| 127 | {I_AND, 2, {MEMORY,REG32,0}, "\321\300\1\x21\101", IF_386|IF_SM},\r |
| 128 | {I_AND, 2, {REG32,REG32,0}, "\321\1\x21\101", IF_386},\r |
| 129 | {I_AND, 2, {REG8,MEMORY,0}, "\301\1\x22\110", IF_8086|IF_SM},\r |
| 130 | {I_AND, 2, {REG8,REG8,0}, "\1\x22\110", IF_8086},\r |
| 131 | {I_AND, 2, {REG16,MEMORY,0}, "\320\301\1\x23\110", IF_8086|IF_SM},\r |
| 132 | {I_AND, 2, {REG16,REG16,0}, "\320\1\x23\110", IF_8086},\r |
| 133 | {I_AND, 2, {REG32,MEMORY,0}, "\321\301\1\x23\110", IF_386|IF_SM},\r |
| 134 | {I_AND, 2, {REG32,REG32,0}, "\321\1\x23\110", IF_386},\r |
| 135 | {I_AND, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\204\15", IF_8086},\r |
| 136 | {I_AND, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\204\15", IF_386},\r |
| 137 | {I_AND, 2, {REG_AL,IMMEDIATE,0}, "\1\x24\21", IF_8086|IF_SM},\r |
| 138 | {I_AND, 2, {REG_AX,SBYTE,0}, "\320\1\x83\204\15", IF_8086|IF_SM},\r |
| 139 | {I_AND, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x25\31", IF_8086|IF_SM},\r |
| 140 | {I_AND, 2, {REG_EAX,SBYTE,0}, "\321\1\x83\204\15", IF_386|IF_SM},\r |
| 141 | {I_AND, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x25\41", IF_386|IF_SM},\r |
| 142 | {I_AND, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\204\21", IF_8086|IF_SM},\r |
| 143 | {I_AND, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\204\131", IF_8086|IF_SM},\r |
| 144 | {I_AND, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\204\141", IF_386|IF_SM},\r |
| 145 | {I_AND, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\204\21", IF_8086|IF_SM},\r |
| 146 | {I_AND, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\204\131", IF_8086|IF_SM},\r |
| 147 | {I_AND, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\204\141", IF_386|IF_SM},\r |
| 148 | ITEMPLATE_END\r |
| 149 | };\r |
| 150 | \r |
| 151 | static struct itemplate instrux_ANDNPD[] = {\r |
| 152 | {I_ANDNPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\x55\110", IF_WILLAMETTE|IF_SSE2},\r |
| 153 | {I_ANDNPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\x55\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 154 | ITEMPLATE_END\r |
| 155 | };\r |
| 156 | \r |
| 157 | static struct itemplate instrux_ANDNPS[] = {\r |
| 158 | {I_ANDNPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x55\110", IF_KATMAI|IF_SSE},\r |
| 159 | {I_ANDNPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x55\110", IF_KATMAI|IF_SSE},\r |
| 160 | ITEMPLATE_END\r |
| 161 | };\r |
| 162 | \r |
| 163 | static struct itemplate instrux_ANDPD[] = {\r |
| 164 | {I_ANDPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\x54\110", IF_WILLAMETTE|IF_SSE2},\r |
| 165 | {I_ANDPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\x54\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 166 | ITEMPLATE_END\r |
| 167 | };\r |
| 168 | \r |
| 169 | static struct itemplate instrux_ANDPS[] = {\r |
| 170 | {I_ANDPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x54\110", IF_KATMAI|IF_SSE},\r |
| 171 | {I_ANDPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x54\110", IF_KATMAI|IF_SSE},\r |
| 172 | ITEMPLATE_END\r |
| 173 | };\r |
| 174 | \r |
| 175 | static struct itemplate instrux_ARPL[] = {\r |
| 176 | {I_ARPL, 2, {MEMORY,REG16,0}, "\300\1\x63\101", IF_286|IF_PROT|IF_SM},\r |
| 177 | {I_ARPL, 2, {REG16,REG16,0}, "\1\x63\101", IF_286|IF_PROT},\r |
| 178 | ITEMPLATE_END\r |
| 179 | };\r |
| 180 | \r |
| 181 | static struct itemplate instrux_BOUND[] = {\r |
| 182 | {I_BOUND, 2, {REG16,MEMORY,0}, "\320\301\1\x62\110", IF_186},\r |
| 183 | {I_BOUND, 2, {REG32,MEMORY,0}, "\321\301\1\x62\110", IF_386},\r |
| 184 | ITEMPLATE_END\r |
| 185 | };\r |
| 186 | \r |
| 187 | static struct itemplate instrux_BSF[] = {\r |
| 188 | {I_BSF, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xBC\110", IF_386|IF_SM},\r |
| 189 | {I_BSF, 2, {REG16,REG16,0}, "\320\2\x0F\xBC\110", IF_386},\r |
| 190 | {I_BSF, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xBC\110", IF_386|IF_SM},\r |
| 191 | {I_BSF, 2, {REG32,REG32,0}, "\321\2\x0F\xBC\110", IF_386},\r |
| 192 | ITEMPLATE_END\r |
| 193 | };\r |
| 194 | \r |
| 195 | static struct itemplate instrux_BSR[] = {\r |
| 196 | {I_BSR, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xBD\110", IF_386|IF_SM},\r |
| 197 | {I_BSR, 2, {REG16,REG16,0}, "\320\2\x0F\xBD\110", IF_386},\r |
| 198 | {I_BSR, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xBD\110", IF_386|IF_SM},\r |
| 199 | {I_BSR, 2, {REG32,REG32,0}, "\321\2\x0F\xBD\110", IF_386},\r |
| 200 | ITEMPLATE_END\r |
| 201 | };\r |
| 202 | \r |
| 203 | static struct itemplate instrux_BSWAP[] = {\r |
| 204 | {I_BSWAP, 1, {REG32,0,0}, "\321\1\x0F\10\xC8", IF_486},\r |
| 205 | ITEMPLATE_END\r |
| 206 | };\r |
| 207 | \r |
| 208 | static struct itemplate instrux_BT[] = {\r |
| 209 | {I_BT, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xA3\101", IF_386|IF_SM},\r |
| 210 | {I_BT, 2, {REG16,REG16,0}, "\320\2\x0F\xA3\101", IF_386},\r |
| 211 | {I_BT, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xA3\101", IF_386|IF_SM},\r |
| 212 | {I_BT, 2, {REG32,REG32,0}, "\321\2\x0F\xA3\101", IF_386},\r |
| 213 | {I_BT, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\2\x0F\xBA\204\25", IF_386|IF_SB},\r |
| 214 | {I_BT, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\2\x0F\xBA\204\25", IF_386|IF_SB},\r |
| 215 | ITEMPLATE_END\r |
| 216 | };\r |
| 217 | \r |
| 218 | static struct itemplate instrux_BTC[] = {\r |
| 219 | {I_BTC, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xBB\101", IF_386|IF_SM},\r |
| 220 | {I_BTC, 2, {REG16,REG16,0}, "\320\2\x0F\xBB\101", IF_386},\r |
| 221 | {I_BTC, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xBB\101", IF_386|IF_SM},\r |
| 222 | {I_BTC, 2, {REG32,REG32,0}, "\321\2\x0F\xBB\101", IF_386},\r |
| 223 | {I_BTC, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\2\x0F\xBA\207\25", IF_386|IF_SB},\r |
| 224 | {I_BTC, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\2\x0F\xBA\207\25", IF_386|IF_SB},\r |
| 225 | ITEMPLATE_END\r |
| 226 | };\r |
| 227 | \r |
| 228 | static struct itemplate instrux_BTR[] = {\r |
| 229 | {I_BTR, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xB3\101", IF_386|IF_SM},\r |
| 230 | {I_BTR, 2, {REG16,REG16,0}, "\320\2\x0F\xB3\101", IF_386},\r |
| 231 | {I_BTR, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xB3\101", IF_386|IF_SM},\r |
| 232 | {I_BTR, 2, {REG32,REG32,0}, "\321\2\x0F\xB3\101", IF_386},\r |
| 233 | {I_BTR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\2\x0F\xBA\206\25", IF_386|IF_SB},\r |
| 234 | {I_BTR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\2\x0F\xBA\206\25", IF_386|IF_SB},\r |
| 235 | ITEMPLATE_END\r |
| 236 | };\r |
| 237 | \r |
| 238 | static struct itemplate instrux_BTS[] = {\r |
| 239 | {I_BTS, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xAB\101", IF_386|IF_SM},\r |
| 240 | {I_BTS, 2, {REG16,REG16,0}, "\320\2\x0F\xAB\101", IF_386},\r |
| 241 | {I_BTS, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xAB\101", IF_386|IF_SM},\r |
| 242 | {I_BTS, 2, {REG32,REG32,0}, "\321\2\x0F\xAB\101", IF_386},\r |
| 243 | {I_BTS, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\2\x0F\xBA\205\25", IF_386|IF_SB},\r |
| 244 | {I_BTS, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\2\x0F\xBA\205\25", IF_386|IF_SB},\r |
| 245 | ITEMPLATE_END\r |
| 246 | };\r |
| 247 | \r |
| 248 | static struct itemplate instrux_CALL[] = {\r |
| 249 | {I_CALL, 1, {IMMEDIATE,0,0}, "\322\1\xE8\64", IF_8086},\r |
| 250 | {I_CALL, 1, {IMMEDIATE|NEAR,0,0}, "\322\1\xE8\64", IF_8086},\r |
| 251 | {I_CALL, 1, {IMMEDIATE|FAR,0,0}, "\322\1\x9A\34\37", IF_8086},\r |
| 252 | {I_CALL, 1, {IMMEDIATE|BITS16,0,0}, "\320\1\xE8\64", IF_8086},\r |
| 253 | {I_CALL, 1, {IMMEDIATE|BITS16|NEAR,0,0}, "\320\1\xE8\64", IF_8086},\r |
| 254 | {I_CALL, 1, {IMMEDIATE|BITS16|FAR,0,0}, "\320\1\x9A\34\37", IF_8086},\r |
| 255 | {I_CALL, 1, {IMMEDIATE|BITS32,0,0}, "\321\1\xE8\64", IF_386},\r |
| 256 | {I_CALL, 1, {IMMEDIATE|BITS32|NEAR,0,0}, "\321\1\xE8\64", IF_386},\r |
| 257 | {I_CALL, 1, {IMMEDIATE|BITS32|FAR,0,0}, "\321\1\x9A\34\37", IF_386},\r |
| 258 | {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE,0}, "\322\1\x9A\35\30", IF_8086},\r |
| 259 | {I_CALL, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0}, "\320\1\x9A\31\30", IF_8086},\r |
| 260 | {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0}, "\320\1\x9A\31\30", IF_8086},\r |
| 261 | {I_CALL, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0}, "\321\1\x9A\41\30", IF_386},\r |
| 262 | {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0}, "\321\1\x9A\41\30", IF_386},\r |
| 263 | {I_CALL, 1, {MEMORY|FAR,0,0}, "\322\300\1\xFF\203", IF_8086},\r |
| 264 | {I_CALL, 1, {MEMORY|BITS16|FAR,0,0}, "\320\300\1\xFF\203", IF_8086},\r |
| 265 | {I_CALL, 1, {MEMORY|BITS32|FAR,0,0}, "\321\300\1\xFF\203", IF_386},\r |
| 266 | {I_CALL, 1, {MEMORY|NEAR,0,0}, "\322\300\1\xFF\202", IF_8086},\r |
| 267 | {I_CALL, 1, {MEMORY|BITS16|NEAR,0,0}, "\320\300\1\xFF\202", IF_8086},\r |
| 268 | {I_CALL, 1, {MEMORY|BITS32|NEAR,0,0}, "\321\300\1\xFF\202", IF_386},\r |
| 269 | {I_CALL, 1, {REG16,0,0}, "\320\300\1\xFF\202", IF_8086},\r |
| 270 | {I_CALL, 1, {REG32,0,0}, "\321\300\1\xFF\202", IF_386},\r |
| 271 | {I_CALL, 1, {MEMORY,0,0}, "\322\300\1\xFF\202", IF_8086},\r |
| 272 | {I_CALL, 1, {MEMORY|BITS16,0,0}, "\320\300\1\xFF\202", IF_8086},\r |
| 273 | {I_CALL, 1, {MEMORY|BITS32,0,0}, "\321\300\1\xFF\202", IF_386},\r |
| 274 | ITEMPLATE_END\r |
| 275 | };\r |
| 276 | \r |
| 277 | static struct itemplate instrux_CBW[] = {\r |
| 278 | {I_CBW, 0, {0,0,0}, "\320\1\x98", IF_8086},\r |
| 279 | ITEMPLATE_END\r |
| 280 | };\r |
| 281 | \r |
| 282 | static struct itemplate instrux_CDQ[] = {\r |
| 283 | {I_CDQ, 0, {0,0,0}, "\321\1\x99", IF_386},\r |
| 284 | ITEMPLATE_END\r |
| 285 | };\r |
| 286 | \r |
| 287 | static struct itemplate instrux_CLC[] = {\r |
| 288 | {I_CLC, 0, {0,0,0}, "\1\xF8", IF_8086},\r |
| 289 | ITEMPLATE_END\r |
| 290 | };\r |
| 291 | \r |
| 292 | static struct itemplate instrux_CLD[] = {\r |
| 293 | {I_CLD, 0, {0,0,0}, "\1\xFC", IF_8086},\r |
| 294 | ITEMPLATE_END\r |
| 295 | };\r |
| 296 | \r |
| 297 | static struct itemplate instrux_CLFLUSH[] = {\r |
| 298 | {I_CLFLUSH, 1, {MEMORY,0,0}, "\300\2\x0F\xAE\207", IF_WILLAMETTE|IF_SSE2},\r |
| 299 | ITEMPLATE_END\r |
| 300 | };\r |
| 301 | \r |
| 302 | static struct itemplate instrux_CLI[] = {\r |
| 303 | {I_CLI, 0, {0,0,0}, "\1\xFA", IF_8086},\r |
| 304 | ITEMPLATE_END\r |
| 305 | };\r |
| 306 | \r |
| 307 | static struct itemplate instrux_CLTS[] = {\r |
| 308 | {I_CLTS, 0, {0,0,0}, "\2\x0F\x06", IF_286|IF_PRIV},\r |
| 309 | ITEMPLATE_END\r |
| 310 | };\r |
| 311 | \r |
| 312 | static struct itemplate instrux_CMC[] = {\r |
| 313 | {I_CMC, 0, {0,0,0}, "\1\xF5", IF_8086},\r |
| 314 | ITEMPLATE_END\r |
| 315 | };\r |
| 316 | \r |
| 317 | static struct itemplate instrux_CMP[] = {\r |
| 318 | {I_CMP, 2, {MEMORY,REG8,0}, "\300\1\x38\101", IF_8086|IF_SM},\r |
| 319 | {I_CMP, 2, {REG8,REG8,0}, "\1\x38\101", IF_8086},\r |
| 320 | {I_CMP, 2, {MEMORY,REG16,0}, "\320\300\1\x39\101", IF_8086|IF_SM},\r |
| 321 | {I_CMP, 2, {REG16,REG16,0}, "\320\1\x39\101", IF_8086},\r |
| 322 | {I_CMP, 2, {MEMORY,REG32,0}, "\321\300\1\x39\101", IF_386|IF_SM},\r |
| 323 | {I_CMP, 2, {REG32,REG32,0}, "\321\1\x39\101", IF_386},\r |
| 324 | {I_CMP, 2, {REG8,MEMORY,0}, "\301\1\x3A\110", IF_8086|IF_SM},\r |
| 325 | {I_CMP, 2, {REG8,REG8,0}, "\1\x3A\110", IF_8086},\r |
| 326 | {I_CMP, 2, {REG16,MEMORY,0}, "\320\301\1\x3B\110", IF_8086|IF_SM},\r |
| 327 | {I_CMP, 2, {REG16,REG16,0}, "\320\1\x3B\110", IF_8086},\r |
| 328 | {I_CMP, 2, {REG32,MEMORY,0}, "\321\301\1\x3B\110", IF_386|IF_SM},\r |
| 329 | {I_CMP, 2, {REG32,REG32,0}, "\321\1\x3B\110", IF_386},\r |
| 330 | {I_CMP, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\207\15", IF_8086},\r |
| 331 | {I_CMP, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\207\15", IF_386},\r |
| 332 | {I_CMP, 2, {REG_AL,IMMEDIATE,0}, "\1\x3C\21", IF_8086|IF_SM},\r |
| 333 | {I_CMP, 2, {REG_AX,SBYTE,0}, "\320\1\x83\207\15", IF_8086|IF_SM},\r |
| 334 | {I_CMP, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x3D\31", IF_8086|IF_SM},\r |
| 335 | {I_CMP, 2, {REG_EAX,SBYTE,0}, "\321\1\x83\207\15", IF_386|IF_SM},\r |
| 336 | {I_CMP, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x3D\41", IF_386|IF_SM},\r |
| 337 | {I_CMP, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\207\21", IF_8086|IF_SM},\r |
| 338 | {I_CMP, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\207\131", IF_8086|IF_SM},\r |
| 339 | {I_CMP, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\207\141", IF_386|IF_SM},\r |
| 340 | {I_CMP, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\207\21", IF_8086|IF_SM},\r |
| 341 | {I_CMP, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\207\131", IF_8086|IF_SM},\r |
| 342 | {I_CMP, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\207\141", IF_386|IF_SM},\r |
| 343 | ITEMPLATE_END\r |
| 344 | };\r |
| 345 | \r |
| 346 | static struct itemplate instrux_CMPEQPD[] = {\r |
| 347 | {I_CMPEQPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x00", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 348 | {I_CMPEQPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x00", IF_WILLAMETTE|IF_SSE2},\r |
| 349 | ITEMPLATE_END\r |
| 350 | };\r |
| 351 | \r |
| 352 | static struct itemplate instrux_CMPEQPS[] = {\r |
| 353 | {I_CMPEQPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x00", IF_KATMAI|IF_SSE},\r |
| 354 | {I_CMPEQPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x00", IF_KATMAI|IF_SSE},\r |
| 355 | ITEMPLATE_END\r |
| 356 | };\r |
| 357 | \r |
| 358 | static struct itemplate instrux_CMPEQSD[] = {\r |
| 359 | {I_CMPEQSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x00", IF_WILLAMETTE|IF_SSE2},\r |
| 360 | {I_CMPEQSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x00", IF_WILLAMETTE|IF_SSE2},\r |
| 361 | ITEMPLATE_END\r |
| 362 | };\r |
| 363 | \r |
| 364 | static struct itemplate instrux_CMPEQSS[] = {\r |
| 365 | {I_CMPEQSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x00", IF_KATMAI|IF_SSE},\r |
| 366 | {I_CMPEQSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x00", IF_KATMAI|IF_SSE},\r |
| 367 | ITEMPLATE_END\r |
| 368 | };\r |
| 369 | \r |
| 370 | static struct itemplate instrux_CMPLEPD[] = {\r |
| 371 | {I_CMPLEPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x02", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 372 | {I_CMPLEPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x02", IF_WILLAMETTE|IF_SSE2},\r |
| 373 | ITEMPLATE_END\r |
| 374 | };\r |
| 375 | \r |
| 376 | static struct itemplate instrux_CMPLEPS[] = {\r |
| 377 | {I_CMPLEPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x02", IF_KATMAI|IF_SSE},\r |
| 378 | {I_CMPLEPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x02", IF_KATMAI|IF_SSE},\r |
| 379 | ITEMPLATE_END\r |
| 380 | };\r |
| 381 | \r |
| 382 | static struct itemplate instrux_CMPLESD[] = {\r |
| 383 | {I_CMPLESD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x02", IF_WILLAMETTE|IF_SSE2},\r |
| 384 | {I_CMPLESD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x02", IF_WILLAMETTE|IF_SSE2},\r |
| 385 | ITEMPLATE_END\r |
| 386 | };\r |
| 387 | \r |
| 388 | static struct itemplate instrux_CMPLESS[] = {\r |
| 389 | {I_CMPLESS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x02", IF_KATMAI|IF_SSE},\r |
| 390 | {I_CMPLESS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x02", IF_KATMAI|IF_SSE},\r |
| 391 | ITEMPLATE_END\r |
| 392 | };\r |
| 393 | \r |
| 394 | static struct itemplate instrux_CMPLTPD[] = {\r |
| 395 | {I_CMPLTPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x01", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 396 | {I_CMPLTPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x01", IF_WILLAMETTE|IF_SSE2},\r |
| 397 | ITEMPLATE_END\r |
| 398 | };\r |
| 399 | \r |
| 400 | static struct itemplate instrux_CMPLTPS[] = {\r |
| 401 | {I_CMPLTPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x01", IF_KATMAI|IF_SSE},\r |
| 402 | {I_CMPLTPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x01", IF_KATMAI|IF_SSE},\r |
| 403 | ITEMPLATE_END\r |
| 404 | };\r |
| 405 | \r |
| 406 | static struct itemplate instrux_CMPLTSD[] = {\r |
| 407 | {I_CMPLTSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x01", IF_WILLAMETTE|IF_SSE2},\r |
| 408 | {I_CMPLTSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x01", IF_WILLAMETTE|IF_SSE2},\r |
| 409 | ITEMPLATE_END\r |
| 410 | };\r |
| 411 | \r |
| 412 | static struct itemplate instrux_CMPLTSS[] = {\r |
| 413 | {I_CMPLTSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x01", IF_KATMAI|IF_SSE},\r |
| 414 | {I_CMPLTSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x01", IF_KATMAI|IF_SSE},\r |
| 415 | ITEMPLATE_END\r |
| 416 | };\r |
| 417 | \r |
| 418 | static struct itemplate instrux_CMPNEQPD[] = {\r |
| 419 | {I_CMPNEQPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x04", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 420 | {I_CMPNEQPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x04", IF_WILLAMETTE|IF_SSE2},\r |
| 421 | ITEMPLATE_END\r |
| 422 | };\r |
| 423 | \r |
| 424 | static struct itemplate instrux_CMPNEQPS[] = {\r |
| 425 | {I_CMPNEQPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x04", IF_KATMAI|IF_SSE},\r |
| 426 | {I_CMPNEQPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x04", IF_KATMAI|IF_SSE},\r |
| 427 | ITEMPLATE_END\r |
| 428 | };\r |
| 429 | \r |
| 430 | static struct itemplate instrux_CMPNEQSD[] = {\r |
| 431 | {I_CMPNEQSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x04", IF_WILLAMETTE|IF_SSE2},\r |
| 432 | {I_CMPNEQSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x04", IF_WILLAMETTE|IF_SSE2},\r |
| 433 | ITEMPLATE_END\r |
| 434 | };\r |
| 435 | \r |
| 436 | static struct itemplate instrux_CMPNEQSS[] = {\r |
| 437 | {I_CMPNEQSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x04", IF_KATMAI|IF_SSE},\r |
| 438 | {I_CMPNEQSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x04", IF_KATMAI|IF_SSE},\r |
| 439 | ITEMPLATE_END\r |
| 440 | };\r |
| 441 | \r |
| 442 | static struct itemplate instrux_CMPNLEPD[] = {\r |
| 443 | {I_CMPNLEPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x06", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 444 | {I_CMPNLEPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x06", IF_WILLAMETTE|IF_SSE2},\r |
| 445 | ITEMPLATE_END\r |
| 446 | };\r |
| 447 | \r |
| 448 | static struct itemplate instrux_CMPNLEPS[] = {\r |
| 449 | {I_CMPNLEPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x06", IF_KATMAI|IF_SSE},\r |
| 450 | {I_CMPNLEPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x06", IF_KATMAI|IF_SSE},\r |
| 451 | ITEMPLATE_END\r |
| 452 | };\r |
| 453 | \r |
| 454 | static struct itemplate instrux_CMPNLESD[] = {\r |
| 455 | {I_CMPNLESD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x06", IF_WILLAMETTE|IF_SSE2},\r |
| 456 | {I_CMPNLESD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x06", IF_WILLAMETTE|IF_SSE2},\r |
| 457 | ITEMPLATE_END\r |
| 458 | };\r |
| 459 | \r |
| 460 | static struct itemplate instrux_CMPNLESS[] = {\r |
| 461 | {I_CMPNLESS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x06", IF_KATMAI|IF_SSE},\r |
| 462 | {I_CMPNLESS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x06", IF_KATMAI|IF_SSE},\r |
| 463 | ITEMPLATE_END\r |
| 464 | };\r |
| 465 | \r |
| 466 | static struct itemplate instrux_CMPNLTPD[] = {\r |
| 467 | {I_CMPNLTPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x05", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 468 | {I_CMPNLTPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x05", IF_WILLAMETTE|IF_SSE2},\r |
| 469 | ITEMPLATE_END\r |
| 470 | };\r |
| 471 | \r |
| 472 | static struct itemplate instrux_CMPNLTPS[] = {\r |
| 473 | {I_CMPNLTPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x05", IF_KATMAI|IF_SSE},\r |
| 474 | {I_CMPNLTPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x05", IF_KATMAI|IF_SSE},\r |
| 475 | ITEMPLATE_END\r |
| 476 | };\r |
| 477 | \r |
| 478 | static struct itemplate instrux_CMPNLTSD[] = {\r |
| 479 | {I_CMPNLTSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x05", IF_WILLAMETTE|IF_SSE2},\r |
| 480 | {I_CMPNLTSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x05", IF_WILLAMETTE|IF_SSE2},\r |
| 481 | ITEMPLATE_END\r |
| 482 | };\r |
| 483 | \r |
| 484 | static struct itemplate instrux_CMPNLTSS[] = {\r |
| 485 | {I_CMPNLTSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x05", IF_KATMAI|IF_SSE},\r |
| 486 | {I_CMPNLTSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x05", IF_KATMAI|IF_SSE},\r |
| 487 | ITEMPLATE_END\r |
| 488 | };\r |
| 489 | \r |
| 490 | static struct itemplate instrux_CMPORDPD[] = {\r |
| 491 | {I_CMPORDPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x07", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 492 | {I_CMPORDPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x07", IF_WILLAMETTE|IF_SSE2},\r |
| 493 | ITEMPLATE_END\r |
| 494 | };\r |
| 495 | \r |
| 496 | static struct itemplate instrux_CMPORDPS[] = {\r |
| 497 | {I_CMPORDPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x07", IF_KATMAI|IF_SSE},\r |
| 498 | {I_CMPORDPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x07", IF_KATMAI|IF_SSE},\r |
| 499 | ITEMPLATE_END\r |
| 500 | };\r |
| 501 | \r |
| 502 | static struct itemplate instrux_CMPORDSD[] = {\r |
| 503 | {I_CMPORDSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x07", IF_WILLAMETTE|IF_SSE2},\r |
| 504 | {I_CMPORDSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x07", IF_WILLAMETTE|IF_SSE2},\r |
| 505 | ITEMPLATE_END\r |
| 506 | };\r |
| 507 | \r |
| 508 | static struct itemplate instrux_CMPORDSS[] = {\r |
| 509 | {I_CMPORDSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x07", IF_KATMAI|IF_SSE},\r |
| 510 | {I_CMPORDSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x07", IF_KATMAI|IF_SSE},\r |
| 511 | ITEMPLATE_END\r |
| 512 | };\r |
| 513 | \r |
| 514 | static struct itemplate instrux_CMPPD[] = {\r |
| 515 | {I_CMPPD, 3, {XMMREG,XMMREG,IMMEDIATE}, "\331\3\x66\x0F\xC2\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 516 | {I_CMPPD, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\331\3\x66\x0F\xC2\110\26", IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},\r |
| 517 | ITEMPLATE_END\r |
| 518 | };\r |
| 519 | \r |
| 520 | static struct itemplate instrux_CMPPS[] = {\r |
| 521 | {I_CMPPS, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\331\2\x0F\xC2\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r |
| 522 | {I_CMPPS, 3, {XMMREG,XMMREG,IMMEDIATE}, "\331\2\x0F\xC2\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r |
| 523 | ITEMPLATE_END\r |
| 524 | };\r |
| 525 | \r |
| 526 | static struct itemplate instrux_CMPSB[] = {\r |
| 527 | {I_CMPSB, 0, {0,0,0}, "\332\1\xA6", IF_8086},\r |
| 528 | ITEMPLATE_END\r |
| 529 | };\r |
| 530 | \r |
| 531 | static struct itemplate instrux_CMPSD[] = {\r |
| 532 | {I_CMPSD, 0, {0,0,0}, "\332\321\1\xA7", IF_386},\r |
| 533 | {I_CMPSD, 3, {XMMREG,XMMREG,IMMEDIATE}, "\331\3\xF2\x0F\xC2\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 534 | {I_CMPSD, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\331\3\xF2\x0F\xC2\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 535 | ITEMPLATE_END\r |
| 536 | };\r |
| 537 | \r |
| 538 | static struct itemplate instrux_CMPSS[] = {\r |
| 539 | {I_CMPSS, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\333\2\x0F\xC2\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r |
| 540 | {I_CMPSS, 3, {XMMREG,XMMREG,IMMEDIATE}, "\333\2\x0F\xC2\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r |
| 541 | ITEMPLATE_END\r |
| 542 | };\r |
| 543 | \r |
| 544 | static struct itemplate instrux_CMPSW[] = {\r |
| 545 | {I_CMPSW, 0, {0,0,0}, "\332\320\1\xA7", IF_8086},\r |
| 546 | ITEMPLATE_END\r |
| 547 | };\r |
| 548 | \r |
| 549 | static struct itemplate instrux_CMPUNORDPD[] = {\r |
| 550 | {I_CMPUNORDPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x03", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 551 | {I_CMPUNORDPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x03", IF_WILLAMETTE|IF_SSE2},\r |
| 552 | ITEMPLATE_END\r |
| 553 | };\r |
| 554 | \r |
| 555 | static struct itemplate instrux_CMPUNORDPS[] = {\r |
| 556 | {I_CMPUNORDPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x03", IF_KATMAI|IF_SSE},\r |
| 557 | {I_CMPUNORDPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x03", IF_KATMAI|IF_SSE},\r |
| 558 | ITEMPLATE_END\r |
| 559 | };\r |
| 560 | \r |
| 561 | static struct itemplate instrux_CMPUNORDSD[] = {\r |
| 562 | {I_CMPUNORDSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x03", IF_WILLAMETTE|IF_SSE2},\r |
| 563 | {I_CMPUNORDSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x03", IF_WILLAMETTE|IF_SSE2},\r |
| 564 | ITEMPLATE_END\r |
| 565 | };\r |
| 566 | \r |
| 567 | static struct itemplate instrux_CMPUNORDSS[] = {\r |
| 568 | {I_CMPUNORDSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x03", IF_KATMAI|IF_SSE},\r |
| 569 | {I_CMPUNORDSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x03", IF_KATMAI|IF_SSE},\r |
| 570 | ITEMPLATE_END\r |
| 571 | };\r |
| 572 | \r |
| 573 | static struct itemplate instrux_CMPXCHG[] = {\r |
| 574 | {I_CMPXCHG, 2, {MEMORY,REG8,0}, "\300\2\x0F\xB0\101", IF_PENT|IF_SM},\r |
| 575 | {I_CMPXCHG, 2, {REG8,REG8,0}, "\2\x0F\xB0\101", IF_PENT},\r |
| 576 | {I_CMPXCHG, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xB1\101", IF_PENT|IF_SM},\r |
| 577 | {I_CMPXCHG, 2, {REG16,REG16,0}, "\320\2\x0F\xB1\101", IF_PENT},\r |
| 578 | {I_CMPXCHG, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xB1\101", IF_PENT|IF_SM},\r |
| 579 | {I_CMPXCHG, 2, {REG32,REG32,0}, "\321\2\x0F\xB1\101", IF_PENT},\r |
| 580 | ITEMPLATE_END\r |
| 581 | };\r |
| 582 | \r |
| 583 | static struct itemplate instrux_CMPXCHG486[] = {\r |
| 584 | {I_CMPXCHG486, 2, {MEMORY,REG8,0}, "\300\2\x0F\xA6\101", IF_486|IF_SM|IF_UNDOC},\r |
| 585 | {I_CMPXCHG486, 2, {REG8,REG8,0}, "\2\x0F\xA6\101", IF_486|IF_UNDOC},\r |
| 586 | {I_CMPXCHG486, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xA7\101", IF_486|IF_SM|IF_UNDOC},\r |
| 587 | {I_CMPXCHG486, 2, {REG16,REG16,0}, "\320\2\x0F\xA7\101", IF_486|IF_UNDOC},\r |
| 588 | {I_CMPXCHG486, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xA7\101", IF_486|IF_SM|IF_UNDOC},\r |
| 589 | {I_CMPXCHG486, 2, {REG32,REG32,0}, "\321\2\x0F\xA7\101", IF_486|IF_UNDOC},\r |
| 590 | ITEMPLATE_END\r |
| 591 | };\r |
| 592 | \r |
| 593 | static struct itemplate instrux_CMPXCHG8B[] = {\r |
| 594 | {I_CMPXCHG8B, 1, {MEMORY,0,0}, "\300\2\x0F\xC7\201", IF_PENT},\r |
| 595 | ITEMPLATE_END\r |
| 596 | };\r |
| 597 | \r |
| 598 | static struct itemplate instrux_COMISD[] = {\r |
| 599 | {I_COMISD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\x2F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 600 | {I_COMISD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\x2F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 601 | ITEMPLATE_END\r |
| 602 | };\r |
| 603 | \r |
| 604 | static struct itemplate instrux_COMISS[] = {\r |
| 605 | {I_COMISS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x2F\110", IF_KATMAI|IF_SSE},\r |
| 606 | {I_COMISS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x2F\110", IF_KATMAI|IF_SSE},\r |
| 607 | ITEMPLATE_END\r |
| 608 | };\r |
| 609 | \r |
| 610 | static struct itemplate instrux_CPUID[] = {\r |
| 611 | {I_CPUID, 0, {0,0,0}, "\2\x0F\xA2", IF_PENT},\r |
| 612 | ITEMPLATE_END\r |
| 613 | };\r |
| 614 | \r |
| 615 | static struct itemplate instrux_CVTDQ2PD[] = {\r |
| 616 | {I_CVTDQ2PD, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2},\r |
| 617 | {I_CVTDQ2PD, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2},\r |
| 618 | ITEMPLATE_END\r |
| 619 | };\r |
| 620 | \r |
| 621 | static struct itemplate instrux_CVTDQ2PS[] = {\r |
| 622 | {I_CVTDQ2PS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2},\r |
| 623 | {I_CVTDQ2PS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 624 | ITEMPLATE_END\r |
| 625 | };\r |
| 626 | \r |
| 627 | static struct itemplate instrux_CVTPD2DQ[] = {\r |
| 628 | {I_CVTPD2DQ, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2},\r |
| 629 | {I_CVTPD2DQ, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 630 | ITEMPLATE_END\r |
| 631 | };\r |
| 632 | \r |
| 633 | static struct itemplate instrux_CVTPD2PI[] = {\r |
| 634 | {I_CVTPD2PI, 2, {MMXREG,XMMREG,0}, "\3\x66\x0F\x2D\110", IF_WILLAMETTE|IF_SSE2},\r |
| 635 | {I_CVTPD2PI, 2, {MMXREG,MEMORY,0}, "\301\3\x66\x0F\x2D\110", IF_WILLAMETTE|IF_SSE2},\r |
| 636 | ITEMPLATE_END\r |
| 637 | };\r |
| 638 | \r |
| 639 | static struct itemplate instrux_CVTPD2PS[] = {\r |
| 640 | {I_CVTPD2PS, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 641 | {I_CVTPD2PS, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 642 | ITEMPLATE_END\r |
| 643 | };\r |
| 644 | \r |
| 645 | static struct itemplate instrux_CVTPI2PD[] = {\r |
| 646 | {I_CVTPI2PD, 2, {XMMREG,MMXREG,0}, "\3\x66\x0F\x2A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 647 | {I_CVTPI2PD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x2A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 648 | ITEMPLATE_END\r |
| 649 | };\r |
| 650 | \r |
| 651 | static struct itemplate instrux_CVTPI2PS[] = {\r |
| 652 | {I_CVTPI2PS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x2A\110", IF_KATMAI|IF_SSE|IF_MMX},\r |
| 653 | {I_CVTPI2PS, 2, {XMMREG,MMXREG,0}, "\331\2\x0F\x2A\110", IF_KATMAI|IF_SSE|IF_MMX},\r |
| 654 | ITEMPLATE_END\r |
| 655 | };\r |
| 656 | \r |
| 657 | static struct itemplate instrux_CVTPS2DQ[] = {\r |
| 658 | {I_CVTPS2DQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2},\r |
| 659 | {I_CVTPS2DQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 660 | ITEMPLATE_END\r |
| 661 | };\r |
| 662 | \r |
| 663 | static struct itemplate instrux_CVTPS2PD[] = {\r |
| 664 | {I_CVTPS2PD, 2, {XMMREG,XMMREG,0}, "\2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 665 | {I_CVTPS2PD, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 666 | ITEMPLATE_END\r |
| 667 | };\r |
| 668 | \r |
| 669 | static struct itemplate instrux_CVTPS2PI[] = {\r |
| 670 | {I_CVTPS2PI, 2, {MMXREG,MEMORY,0}, "\301\331\2\x0F\x2D\110", IF_KATMAI|IF_SSE|IF_MMX},\r |
| 671 | {I_CVTPS2PI, 2, {MMXREG,XMMREG,0}, "\331\2\x0F\x2D\110", IF_KATMAI|IF_SSE|IF_MMX},\r |
| 672 | ITEMPLATE_END\r |
| 673 | };\r |
| 674 | \r |
| 675 | static struct itemplate instrux_CVTSD2SI[] = {\r |
| 676 | {I_CVTSD2SI, 2, {REG32,XMMREG,0}, "\3\xF2\x0F\x2D\110", IF_WILLAMETTE|IF_SSE2},\r |
| 677 | {I_CVTSD2SI, 2, {REG32,MEMORY,0}, "\301\3\xF2\x0F\x2D\110", IF_WILLAMETTE|IF_SSE2},\r |
| 678 | ITEMPLATE_END\r |
| 679 | };\r |
| 680 | \r |
| 681 | static struct itemplate instrux_CVTSD2SS[] = {\r |
| 682 | {I_CVTSD2SS, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 683 | {I_CVTSD2SS, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 684 | ITEMPLATE_END\r |
| 685 | };\r |
| 686 | \r |
| 687 | static struct itemplate instrux_CVTSI2SD[] = {\r |
| 688 | {I_CVTSI2SD, 2, {XMMREG,REG32,0}, "\3\xF2\x0F\x2A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 689 | {I_CVTSI2SD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x2A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 690 | ITEMPLATE_END\r |
| 691 | };\r |
| 692 | \r |
| 693 | static struct itemplate instrux_CVTSI2SS[] = {\r |
| 694 | {I_CVTSI2SS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x2A\110", IF_KATMAI|IF_SSE|IF_SD|IF_AR1},\r |
| 695 | {I_CVTSI2SS, 2, {XMMREG,REG32,0}, "\333\2\x0F\x2A\110", IF_KATMAI|IF_SSE},\r |
| 696 | ITEMPLATE_END\r |
| 697 | };\r |
| 698 | \r |
| 699 | static struct itemplate instrux_CVTSS2SD[] = {\r |
| 700 | {I_CVTSS2SD, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 701 | {I_CVTSS2SD, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 702 | ITEMPLATE_END\r |
| 703 | };\r |
| 704 | \r |
| 705 | static struct itemplate instrux_CVTSS2SI[] = {\r |
| 706 | {I_CVTSS2SI, 2, {REG32,MEMORY,0}, "\301\333\2\x0F\x2D\110", IF_KATMAI|IF_SSE},\r |
| 707 | {I_CVTSS2SI, 2, {REG32,XMMREG,0}, "\333\2\x0F\x2D\110", IF_KATMAI|IF_SSE},\r |
| 708 | ITEMPLATE_END\r |
| 709 | };\r |
| 710 | \r |
| 711 | static struct itemplate instrux_CVTTPD2DQ[] = {\r |
| 712 | {I_CVTTPD2DQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2},\r |
| 713 | {I_CVTTPD2DQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 714 | ITEMPLATE_END\r |
| 715 | };\r |
| 716 | \r |
| 717 | static struct itemplate instrux_CVTTPD2PI[] = {\r |
| 718 | {I_CVTTPD2PI, 2, {MMXREG,XMMREG,0}, "\3\x66\x0F\x2C\110", IF_WILLAMETTE|IF_SSE2},\r |
| 719 | {I_CVTTPD2PI, 2, {MMXREG,MEMORY,0}, "\301\3\x66\x0F\x2C\110", IF_WILLAMETTE|IF_SSE2},\r |
| 720 | ITEMPLATE_END\r |
| 721 | };\r |
| 722 | \r |
| 723 | static struct itemplate instrux_CVTTPS2DQ[] = {\r |
| 724 | {I_CVTTPS2DQ, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2},\r |
| 725 | {I_CVTTPS2DQ, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 726 | ITEMPLATE_END\r |
| 727 | };\r |
| 728 | \r |
| 729 | static struct itemplate instrux_CVTTPS2PI[] = {\r |
| 730 | {I_CVTTPS2PI, 2, {MMXREG,MEMORY,0}, "\301\331\2\x0F\x2C\110", IF_KATMAI|IF_SSE|IF_MMX},\r |
| 731 | {I_CVTTPS2PI, 2, {MMXREG,XMMREG,0}, "\331\2\x0F\x2C\110", IF_KATMAI|IF_SSE|IF_MMX},\r |
| 732 | ITEMPLATE_END\r |
| 733 | };\r |
| 734 | \r |
| 735 | static struct itemplate instrux_CVTTSD2SI[] = {\r |
| 736 | {I_CVTTSD2SI, 2, {REG32,XMMREG,0}, "\3\xF2\x0F\x2C\110", IF_WILLAMETTE|IF_SSE2},\r |
| 737 | {I_CVTTSD2SI, 2, {REG32,MEMORY,0}, "\301\3\xF2\x0F\x2C\110", IF_WILLAMETTE|IF_SSE2},\r |
| 738 | ITEMPLATE_END\r |
| 739 | };\r |
| 740 | \r |
| 741 | static struct itemplate instrux_CVTTSS2SI[] = {\r |
| 742 | {I_CVTTSS2SI, 2, {REG32,MEMORY,0}, "\301\333\2\x0F\x2C\110", IF_KATMAI|IF_SSE},\r |
| 743 | {I_CVTTSS2SI, 2, {REG32,XMMREG,0}, "\333\2\x0F\x2C\110", IF_KATMAI|IF_SSE},\r |
| 744 | ITEMPLATE_END\r |
| 745 | };\r |
| 746 | \r |
| 747 | static struct itemplate instrux_CWD[] = {\r |
| 748 | {I_CWD, 0, {0,0,0}, "\320\1\x99", IF_8086},\r |
| 749 | ITEMPLATE_END\r |
| 750 | };\r |
| 751 | \r |
| 752 | static struct itemplate instrux_CWDE[] = {\r |
| 753 | {I_CWDE, 0, {0,0,0}, "\321\1\x98", IF_386},\r |
| 754 | ITEMPLATE_END\r |
| 755 | };\r |
| 756 | \r |
| 757 | static struct itemplate instrux_DAA[] = {\r |
| 758 | {I_DAA, 0, {0,0,0}, "\1\x27", IF_8086},\r |
| 759 | ITEMPLATE_END\r |
| 760 | };\r |
| 761 | \r |
| 762 | static struct itemplate instrux_DAS[] = {\r |
| 763 | {I_DAS, 0, {0,0,0}, "\1\x2F", IF_8086},\r |
| 764 | ITEMPLATE_END\r |
| 765 | };\r |
| 766 | \r |
| 767 | static struct itemplate instrux_DB[] = {\r |
| 768 | ITEMPLATE_END\r |
| 769 | };\r |
| 770 | \r |
| 771 | static struct itemplate instrux_DD[] = {\r |
| 772 | ITEMPLATE_END\r |
| 773 | };\r |
| 774 | \r |
| 775 | static struct itemplate instrux_DEC[] = {\r |
| 776 | {I_DEC, 1, {REG16,0,0}, "\320\10\x48", IF_8086},\r |
| 777 | {I_DEC, 1, {REG32,0,0}, "\321\10\x48", IF_386},\r |
| 778 | {I_DEC, 1, {REGMEM|BITS8,0,0}, "\300\1\xFE\201", IF_8086},\r |
| 779 | {I_DEC, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xFF\201", IF_8086},\r |
| 780 | {I_DEC, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xFF\201", IF_386},\r |
| 781 | ITEMPLATE_END\r |
| 782 | };\r |
| 783 | \r |
| 784 | static struct itemplate instrux_DIV[] = {\r |
| 785 | {I_DIV, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\206", IF_8086},\r |
| 786 | {I_DIV, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\206", IF_8086},\r |
| 787 | {I_DIV, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\206", IF_386},\r |
| 788 | ITEMPLATE_END\r |
| 789 | };\r |
| 790 | \r |
| 791 | static struct itemplate instrux_DIVPD[] = {\r |
| 792 | {I_DIVPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 793 | {I_DIVPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5E\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 794 | ITEMPLATE_END\r |
| 795 | };\r |
| 796 | \r |
| 797 | static struct itemplate instrux_DIVPS[] = {\r |
| 798 | {I_DIVPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x5E\110", IF_KATMAI|IF_SSE},\r |
| 799 | {I_DIVPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x5E\110", IF_KATMAI|IF_SSE},\r |
| 800 | ITEMPLATE_END\r |
| 801 | };\r |
| 802 | \r |
| 803 | static struct itemplate instrux_DIVSD[] = {\r |
| 804 | {I_DIVSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x5E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 805 | {I_DIVSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x5E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 806 | ITEMPLATE_END\r |
| 807 | };\r |
| 808 | \r |
| 809 | static struct itemplate instrux_DIVSS[] = {\r |
| 810 | {I_DIVSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5E\110", IF_KATMAI|IF_SSE},\r |
| 811 | {I_DIVSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5E\110", IF_KATMAI|IF_SSE},\r |
| 812 | ITEMPLATE_END\r |
| 813 | };\r |
| 814 | \r |
| 815 | static struct itemplate instrux_DQ[] = {\r |
| 816 | ITEMPLATE_END\r |
| 817 | };\r |
| 818 | \r |
| 819 | static struct itemplate instrux_DT[] = {\r |
| 820 | ITEMPLATE_END\r |
| 821 | };\r |
| 822 | \r |
| 823 | static struct itemplate instrux_DW[] = {\r |
| 824 | ITEMPLATE_END\r |
| 825 | };\r |
| 826 | \r |
| 827 | static struct itemplate instrux_EMMS[] = {\r |
| 828 | {I_EMMS, 0, {0,0,0}, "\2\x0F\x77", IF_PENT|IF_MMX},\r |
| 829 | ITEMPLATE_END\r |
| 830 | };\r |
| 831 | \r |
| 832 | static struct itemplate instrux_ENTER[] = {\r |
| 833 | {I_ENTER, 2, {IMMEDIATE,IMMEDIATE,0}, "\1\xC8\30\25", IF_186},\r |
| 834 | ITEMPLATE_END\r |
| 835 | };\r |
| 836 | \r |
| 837 | static struct itemplate instrux_EQU[] = {\r |
| 838 | {I_EQU, 1, {IMMEDIATE,0,0}, "\0", IF_8086},\r |
| 839 | {I_EQU, 2, {IMMEDIATE|COLON,IMMEDIATE,0}, "\0", IF_8086},\r |
| 840 | ITEMPLATE_END\r |
| 841 | };\r |
| 842 | \r |
| 843 | static struct itemplate instrux_F2XM1[] = {\r |
| 844 | {I_F2XM1, 0, {0,0,0}, "\2\xD9\xF0", IF_8086|IF_FPU},\r |
| 845 | ITEMPLATE_END\r |
| 846 | };\r |
| 847 | \r |
| 848 | static struct itemplate instrux_FABS[] = {\r |
| 849 | {I_FABS, 0, {0,0,0}, "\2\xD9\xE1", IF_8086|IF_FPU},\r |
| 850 | ITEMPLATE_END\r |
| 851 | };\r |
| 852 | \r |
| 853 | static struct itemplate instrux_FADD[] = {\r |
| 854 | {I_FADD, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\200", IF_8086|IF_FPU},\r |
| 855 | {I_FADD, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\200", IF_8086|IF_FPU},\r |
| 856 | {I_FADD, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xC0", IF_8086|IF_FPU},\r |
| 857 | {I_FADD, 1, {FPUREG,0,0}, "\1\xD8\10\xC0", IF_8086|IF_FPU},\r |
| 858 | {I_FADD, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xC0", IF_8086|IF_FPU},\r |
| 859 | {I_FADD, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xC0", IF_8086|IF_FPU},\r |
| 860 | ITEMPLATE_END\r |
| 861 | };\r |
| 862 | \r |
| 863 | static struct itemplate instrux_FADDP[] = {\r |
| 864 | {I_FADDP, 1, {FPUREG,0,0}, "\1\xDE\10\xC0", IF_8086|IF_FPU},\r |
| 865 | {I_FADDP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xC0", IF_8086|IF_FPU},\r |
| 866 | ITEMPLATE_END\r |
| 867 | };\r |
| 868 | \r |
| 869 | static struct itemplate instrux_FBLD[] = {\r |
| 870 | {I_FBLD, 1, {MEMORY|BITS80,0,0}, "\300\1\xDF\204", IF_8086|IF_FPU},\r |
| 871 | {I_FBLD, 1, {MEMORY,0,0}, "\300\1\xDF\204", IF_8086|IF_FPU},\r |
| 872 | ITEMPLATE_END\r |
| 873 | };\r |
| 874 | \r |
| 875 | static struct itemplate instrux_FBSTP[] = {\r |
| 876 | {I_FBSTP, 1, {MEMORY|BITS80,0,0}, "\300\1\xDF\206", IF_8086|IF_FPU},\r |
| 877 | {I_FBSTP, 1, {MEMORY,0,0}, "\300\1\xDF\206", IF_8086|IF_FPU},\r |
| 878 | ITEMPLATE_END\r |
| 879 | };\r |
| 880 | \r |
| 881 | static struct itemplate instrux_FCHS[] = {\r |
| 882 | {I_FCHS, 0, {0,0,0}, "\2\xD9\xE0", IF_8086|IF_FPU},\r |
| 883 | ITEMPLATE_END\r |
| 884 | };\r |
| 885 | \r |
| 886 | static struct itemplate instrux_FCLEX[] = {\r |
| 887 | {I_FCLEX, 0, {0,0,0}, "\3\x9B\xDB\xE2", IF_8086|IF_FPU},\r |
| 888 | ITEMPLATE_END\r |
| 889 | };\r |
| 890 | \r |
| 891 | static struct itemplate instrux_FCMOVB[] = {\r |
| 892 | {I_FCMOVB, 1, {FPUREG,0,0}, "\1\xDA\10\xC0", IF_P6|IF_FPU},\r |
| 893 | {I_FCMOVB, 2, {FPU0,FPUREG,0}, "\1\xDA\11\xC0", IF_P6|IF_FPU},\r |
| 894 | ITEMPLATE_END\r |
| 895 | };\r |
| 896 | \r |
| 897 | static struct itemplate instrux_FCMOVBE[] = {\r |
| 898 | {I_FCMOVBE, 1, {FPUREG,0,0}, "\1\xDA\10\xD0", IF_P6|IF_FPU},\r |
| 899 | {I_FCMOVBE, 2, {FPU0,FPUREG,0}, "\1\xDA\11\xD0", IF_P6|IF_FPU},\r |
| 900 | ITEMPLATE_END\r |
| 901 | };\r |
| 902 | \r |
| 903 | static struct itemplate instrux_FCMOVE[] = {\r |
| 904 | {I_FCMOVE, 1, {FPUREG,0,0}, "\1\xDA\10\xC8", IF_P6|IF_FPU},\r |
| 905 | {I_FCMOVE, 2, {FPU0,FPUREG,0}, "\1\xDA\11\xC8", IF_P6|IF_FPU},\r |
| 906 | ITEMPLATE_END\r |
| 907 | };\r |
| 908 | \r |
| 909 | static struct itemplate instrux_FCMOVNB[] = {\r |
| 910 | {I_FCMOVNB, 1, {FPUREG,0,0}, "\1\xDB\10\xC0", IF_P6|IF_FPU},\r |
| 911 | {I_FCMOVNB, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xC0", IF_P6|IF_FPU},\r |
| 912 | ITEMPLATE_END\r |
| 913 | };\r |
| 914 | \r |
| 915 | static struct itemplate instrux_FCMOVNBE[] = {\r |
| 916 | {I_FCMOVNBE, 1, {FPUREG,0,0}, "\1\xDB\10\xD0", IF_P6|IF_FPU},\r |
| 917 | {I_FCMOVNBE, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xD0", IF_P6|IF_FPU},\r |
| 918 | ITEMPLATE_END\r |
| 919 | };\r |
| 920 | \r |
| 921 | static struct itemplate instrux_FCMOVNE[] = {\r |
| 922 | {I_FCMOVNE, 1, {FPUREG,0,0}, "\1\xDB\10\xC8", IF_P6|IF_FPU},\r |
| 923 | {I_FCMOVNE, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xC8", IF_P6|IF_FPU},\r |
| 924 | ITEMPLATE_END\r |
| 925 | };\r |
| 926 | \r |
| 927 | static struct itemplate instrux_FCMOVNU[] = {\r |
| 928 | {I_FCMOVNU, 1, {FPUREG,0,0}, "\1\xDB\10\xD8", IF_P6|IF_FPU},\r |
| 929 | {I_FCMOVNU, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xD8", IF_P6|IF_FPU},\r |
| 930 | ITEMPLATE_END\r |
| 931 | };\r |
| 932 | \r |
| 933 | static struct itemplate instrux_FCMOVU[] = {\r |
| 934 | {I_FCMOVU, 1, {FPUREG,0,0}, "\1\xDA\10\xD8", IF_P6|IF_FPU},\r |
| 935 | {I_FCMOVU, 2, {FPU0,FPUREG,0}, "\1\xDA\11\xD8", IF_P6|IF_FPU},\r |
| 936 | ITEMPLATE_END\r |
| 937 | };\r |
| 938 | \r |
| 939 | static struct itemplate instrux_FCOM[] = {\r |
| 940 | {I_FCOM, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\202", IF_8086|IF_FPU},\r |
| 941 | {I_FCOM, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\202", IF_8086|IF_FPU},\r |
| 942 | {I_FCOM, 1, {FPUREG,0,0}, "\1\xD8\10\xD0", IF_8086|IF_FPU},\r |
| 943 | {I_FCOM, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xD0", IF_8086|IF_FPU},\r |
| 944 | ITEMPLATE_END\r |
| 945 | };\r |
| 946 | \r |
| 947 | static struct itemplate instrux_FCOMI[] = {\r |
| 948 | {I_FCOMI, 1, {FPUREG,0,0}, "\1\xDB\10\xF0", IF_P6|IF_FPU},\r |
| 949 | {I_FCOMI, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xF0", IF_P6|IF_FPU},\r |
| 950 | ITEMPLATE_END\r |
| 951 | };\r |
| 952 | \r |
| 953 | static struct itemplate instrux_FCOMIP[] = {\r |
| 954 | {I_FCOMIP, 1, {FPUREG,0,0}, "\1\xDF\10\xF0", IF_P6|IF_FPU},\r |
| 955 | {I_FCOMIP, 2, {FPU0,FPUREG,0}, "\1\xDF\11\xF0", IF_P6|IF_FPU},\r |
| 956 | ITEMPLATE_END\r |
| 957 | };\r |
| 958 | \r |
| 959 | static struct itemplate instrux_FCOMP[] = {\r |
| 960 | {I_FCOMP, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\203", IF_8086|IF_FPU},\r |
| 961 | {I_FCOMP, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\203", IF_8086|IF_FPU},\r |
| 962 | {I_FCOMP, 1, {FPUREG,0,0}, "\1\xD8\10\xD8", IF_8086|IF_FPU},\r |
| 963 | {I_FCOMP, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xD8", IF_8086|IF_FPU},\r |
| 964 | ITEMPLATE_END\r |
| 965 | };\r |
| 966 | \r |
| 967 | static struct itemplate instrux_FCOMPP[] = {\r |
| 968 | {I_FCOMPP, 0, {0,0,0}, "\2\xDE\xD9", IF_8086|IF_FPU},\r |
| 969 | ITEMPLATE_END\r |
| 970 | };\r |
| 971 | \r |
| 972 | static struct itemplate instrux_FCOS[] = {\r |
| 973 | {I_FCOS, 0, {0,0,0}, "\2\xD9\xFF", IF_386|IF_FPU},\r |
| 974 | ITEMPLATE_END\r |
| 975 | };\r |
| 976 | \r |
| 977 | static struct itemplate instrux_FDECSTP[] = {\r |
| 978 | {I_FDECSTP, 0, {0,0,0}, "\2\xD9\xF6", IF_8086|IF_FPU},\r |
| 979 | ITEMPLATE_END\r |
| 980 | };\r |
| 981 | \r |
| 982 | static struct itemplate instrux_FDISI[] = {\r |
| 983 | {I_FDISI, 0, {0,0,0}, "\3\x9B\xDB\xE1", IF_8086|IF_FPU},\r |
| 984 | ITEMPLATE_END\r |
| 985 | };\r |
| 986 | \r |
| 987 | static struct itemplate instrux_FDIV[] = {\r |
| 988 | {I_FDIV, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\206", IF_8086|IF_FPU},\r |
| 989 | {I_FDIV, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\206", IF_8086|IF_FPU},\r |
| 990 | {I_FDIV, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xF8", IF_8086|IF_FPU},\r |
| 991 | {I_FDIV, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xF8", IF_8086|IF_FPU},\r |
| 992 | {I_FDIV, 1, {FPUREG,0,0}, "\1\xD8\10\xF0", IF_8086|IF_FPU},\r |
| 993 | {I_FDIV, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xF0", IF_8086|IF_FPU},\r |
| 994 | ITEMPLATE_END\r |
| 995 | };\r |
| 996 | \r |
| 997 | static struct itemplate instrux_FDIVP[] = {\r |
| 998 | {I_FDIVP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xF8", IF_8086|IF_FPU},\r |
| 999 | {I_FDIVP, 1, {FPUREG,0,0}, "\1\xDE\10\xF8", IF_8086|IF_FPU},\r |
| 1000 | ITEMPLATE_END\r |
| 1001 | };\r |
| 1002 | \r |
| 1003 | static struct itemplate instrux_FDIVR[] = {\r |
| 1004 | {I_FDIVR, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\207", IF_8086|IF_FPU},\r |
| 1005 | {I_FDIVR, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\207", IF_8086|IF_FPU},\r |
| 1006 | {I_FDIVR, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xF0", IF_8086|IF_FPU},\r |
| 1007 | {I_FDIVR, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xF0", IF_8086|IF_FPU},\r |
| 1008 | {I_FDIVR, 1, {FPUREG,0,0}, "\1\xD8\10\xF8", IF_8086|IF_FPU},\r |
| 1009 | {I_FDIVR, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xF8", IF_8086|IF_FPU},\r |
| 1010 | ITEMPLATE_END\r |
| 1011 | };\r |
| 1012 | \r |
| 1013 | static struct itemplate instrux_FDIVRP[] = {\r |
| 1014 | {I_FDIVRP, 1, {FPUREG,0,0}, "\1\xDE\10\xF0", IF_8086|IF_FPU},\r |
| 1015 | {I_FDIVRP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xF0", IF_8086|IF_FPU},\r |
| 1016 | ITEMPLATE_END\r |
| 1017 | };\r |
| 1018 | \r |
| 1019 | static struct itemplate instrux_FEMMS[] = {\r |
| 1020 | {I_FEMMS, 0, {0,0,0}, "\2\x0F\x0E", IF_PENT|IF_3DNOW},\r |
| 1021 | ITEMPLATE_END\r |
| 1022 | };\r |
| 1023 | \r |
| 1024 | static struct itemplate instrux_FENI[] = {\r |
| 1025 | {I_FENI, 0, {0,0,0}, "\3\x9B\xDB\xE0", IF_8086|IF_FPU},\r |
| 1026 | ITEMPLATE_END\r |
| 1027 | };\r |
| 1028 | \r |
| 1029 | static struct itemplate instrux_FFREE[] = {\r |
| 1030 | {I_FFREE, 1, {FPUREG,0,0}, "\1\xDD\10\xC0", IF_8086|IF_FPU},\r |
| 1031 | ITEMPLATE_END\r |
| 1032 | };\r |
| 1033 | \r |
| 1034 | static struct itemplate instrux_FFREEP[] = {\r |
| 1035 | {I_FFREEP, 1, {FPUREG,0,0}, "\1\xDF\10\xC0", IF_286|IF_FPU|IF_UNDOC},\r |
| 1036 | ITEMPLATE_END\r |
| 1037 | };\r |
| 1038 | \r |
| 1039 | static struct itemplate instrux_FIADD[] = {\r |
| 1040 | {I_FIADD, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\200", IF_8086|IF_FPU},\r |
| 1041 | {I_FIADD, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\200", IF_8086|IF_FPU},\r |
| 1042 | ITEMPLATE_END\r |
| 1043 | };\r |
| 1044 | \r |
| 1045 | static struct itemplate instrux_FICOM[] = {\r |
| 1046 | {I_FICOM, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\202", IF_8086|IF_FPU},\r |
| 1047 | {I_FICOM, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\202", IF_8086|IF_FPU},\r |
| 1048 | ITEMPLATE_END\r |
| 1049 | };\r |
| 1050 | \r |
| 1051 | static struct itemplate instrux_FICOMP[] = {\r |
| 1052 | {I_FICOMP, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\203", IF_8086|IF_FPU},\r |
| 1053 | {I_FICOMP, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\203", IF_8086|IF_FPU},\r |
| 1054 | ITEMPLATE_END\r |
| 1055 | };\r |
| 1056 | \r |
| 1057 | static struct itemplate instrux_FIDIV[] = {\r |
| 1058 | {I_FIDIV, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\206", IF_8086|IF_FPU},\r |
| 1059 | {I_FIDIV, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\206", IF_8086|IF_FPU},\r |
| 1060 | ITEMPLATE_END\r |
| 1061 | };\r |
| 1062 | \r |
| 1063 | static struct itemplate instrux_FIDIVR[] = {\r |
| 1064 | {I_FIDIVR, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\207", IF_8086|IF_FPU},\r |
| 1065 | {I_FIDIVR, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\207", IF_8086|IF_FPU},\r |
| 1066 | ITEMPLATE_END\r |
| 1067 | };\r |
| 1068 | \r |
| 1069 | static struct itemplate instrux_FILD[] = {\r |
| 1070 | {I_FILD, 1, {MEMORY|BITS32,0,0}, "\300\1\xDB\200", IF_8086|IF_FPU},\r |
| 1071 | {I_FILD, 1, {MEMORY|BITS16,0,0}, "\300\1\xDF\200", IF_8086|IF_FPU},\r |
| 1072 | {I_FILD, 1, {MEMORY|BITS64,0,0}, "\300\1\xDF\205", IF_8086|IF_FPU},\r |
| 1073 | ITEMPLATE_END\r |
| 1074 | };\r |
| 1075 | \r |
| 1076 | static struct itemplate instrux_FIMUL[] = {\r |
| 1077 | {I_FIMUL, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\201", IF_8086|IF_FPU},\r |
| 1078 | {I_FIMUL, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\201", IF_8086|IF_FPU},\r |
| 1079 | ITEMPLATE_END\r |
| 1080 | };\r |
| 1081 | \r |
| 1082 | static struct itemplate instrux_FINCSTP[] = {\r |
| 1083 | {I_FINCSTP, 0, {0,0,0}, "\2\xD9\xF7", IF_8086|IF_FPU},\r |
| 1084 | ITEMPLATE_END\r |
| 1085 | };\r |
| 1086 | \r |
| 1087 | static struct itemplate instrux_FINIT[] = {\r |
| 1088 | {I_FINIT, 0, {0,0,0}, "\3\x9B\xDB\xE3", IF_8086|IF_FPU},\r |
| 1089 | ITEMPLATE_END\r |
| 1090 | };\r |
| 1091 | \r |
| 1092 | static struct itemplate instrux_FIST[] = {\r |
| 1093 | {I_FIST, 1, {MEMORY|BITS32,0,0}, "\300\1\xDB\202", IF_8086|IF_FPU},\r |
| 1094 | {I_FIST, 1, {MEMORY|BITS16,0,0}, "\300\1\xDF\202", IF_8086|IF_FPU},\r |
| 1095 | ITEMPLATE_END\r |
| 1096 | };\r |
| 1097 | \r |
| 1098 | static struct itemplate instrux_FISTP[] = {\r |
| 1099 | {I_FISTP, 1, {MEMORY|BITS32,0,0}, "\300\1\xDB\203", IF_8086|IF_FPU},\r |
| 1100 | {I_FISTP, 1, {MEMORY|BITS16,0,0}, "\300\1\xDF\203", IF_8086|IF_FPU},\r |
| 1101 | {I_FISTP, 1, {MEMORY|BITS64,0,0}, "\300\1\xDF\207", IF_8086|IF_FPU},\r |
| 1102 | ITEMPLATE_END\r |
| 1103 | };\r |
| 1104 | \r |
| 1105 | static struct itemplate instrux_FISTTP[] = {\r |
| 1106 | {I_FISTTP, 1, {MEMORY|BITS32,0,0}, "\300\1\xDD\201", IF_PRESCOTT|IF_FPU},\r |
| 1107 | {I_FISTTP, 1, {MEMORY|BITS16,0,0}, "\300\1\xDB\201", IF_PRESCOTT|IF_FPU},\r |
| 1108 | {I_FISTTP, 1, {MEMORY|BITS64,0,0}, "\300\1\xDF\201", IF_PRESCOTT|IF_FPU},\r |
| 1109 | ITEMPLATE_END\r |
| 1110 | };\r |
| 1111 | \r |
| 1112 | static struct itemplate instrux_FISUB[] = {\r |
| 1113 | {I_FISUB, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\204", IF_8086|IF_FPU},\r |
| 1114 | {I_FISUB, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\204", IF_8086|IF_FPU},\r |
| 1115 | ITEMPLATE_END\r |
| 1116 | };\r |
| 1117 | \r |
| 1118 | static struct itemplate instrux_FISUBR[] = {\r |
| 1119 | {I_FISUBR, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\205", IF_8086|IF_FPU},\r |
| 1120 | {I_FISUBR, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\205", IF_8086|IF_FPU},\r |
| 1121 | ITEMPLATE_END\r |
| 1122 | };\r |
| 1123 | \r |
| 1124 | static struct itemplate instrux_FLD[] = {\r |
| 1125 | {I_FLD, 1, {MEMORY|BITS32,0,0}, "\300\1\xD9\200", IF_8086|IF_FPU},\r |
| 1126 | {I_FLD, 1, {MEMORY|BITS64,0,0}, "\300\1\xDD\200", IF_8086|IF_FPU},\r |
| 1127 | {I_FLD, 1, {MEMORY|BITS80,0,0}, "\300\1\xDB\205", IF_8086|IF_FPU},\r |
| 1128 | {I_FLD, 1, {FPUREG,0,0}, "\1\xD9\10\xC0", IF_8086|IF_FPU},\r |
| 1129 | ITEMPLATE_END\r |
| 1130 | };\r |
| 1131 | \r |
| 1132 | static struct itemplate instrux_FLD1[] = {\r |
| 1133 | {I_FLD1, 0, {0,0,0}, "\2\xD9\xE8", IF_8086|IF_FPU},\r |
| 1134 | ITEMPLATE_END\r |
| 1135 | };\r |
| 1136 | \r |
| 1137 | static struct itemplate instrux_FLDCW[] = {\r |
| 1138 | {I_FLDCW, 1, {MEMORY,0,0}, "\300\1\xD9\205", IF_8086|IF_FPU|IF_SW},\r |
| 1139 | ITEMPLATE_END\r |
| 1140 | };\r |
| 1141 | \r |
| 1142 | static struct itemplate instrux_FLDENV[] = {\r |
| 1143 | {I_FLDENV, 1, {MEMORY,0,0}, "\300\1\xD9\204", IF_8086|IF_FPU},\r |
| 1144 | ITEMPLATE_END\r |
| 1145 | };\r |
| 1146 | \r |
| 1147 | static struct itemplate instrux_FLDL2E[] = {\r |
| 1148 | {I_FLDL2E, 0, {0,0,0}, "\2\xD9\xEA", IF_8086|IF_FPU},\r |
| 1149 | ITEMPLATE_END\r |
| 1150 | };\r |
| 1151 | \r |
| 1152 | static struct itemplate instrux_FLDL2T[] = {\r |
| 1153 | {I_FLDL2T, 0, {0,0,0}, "\2\xD9\xE9", IF_8086|IF_FPU},\r |
| 1154 | ITEMPLATE_END\r |
| 1155 | };\r |
| 1156 | \r |
| 1157 | static struct itemplate instrux_FLDLG2[] = {\r |
| 1158 | {I_FLDLG2, 0, {0,0,0}, "\2\xD9\xEC", IF_8086|IF_FPU},\r |
| 1159 | ITEMPLATE_END\r |
| 1160 | };\r |
| 1161 | \r |
| 1162 | static struct itemplate instrux_FLDLN2[] = {\r |
| 1163 | {I_FLDLN2, 0, {0,0,0}, "\2\xD9\xED", IF_8086|IF_FPU},\r |
| 1164 | ITEMPLATE_END\r |
| 1165 | };\r |
| 1166 | \r |
| 1167 | static struct itemplate instrux_FLDPI[] = {\r |
| 1168 | {I_FLDPI, 0, {0,0,0}, "\2\xD9\xEB", IF_8086|IF_FPU},\r |
| 1169 | ITEMPLATE_END\r |
| 1170 | };\r |
| 1171 | \r |
| 1172 | static struct itemplate instrux_FLDZ[] = {\r |
| 1173 | {I_FLDZ, 0, {0,0,0}, "\2\xD9\xEE", IF_8086|IF_FPU},\r |
| 1174 | ITEMPLATE_END\r |
| 1175 | };\r |
| 1176 | \r |
| 1177 | static struct itemplate instrux_FMUL[] = {\r |
| 1178 | {I_FMUL, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\201", IF_8086|IF_FPU},\r |
| 1179 | {I_FMUL, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\201", IF_8086|IF_FPU},\r |
| 1180 | {I_FMUL, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xC8", IF_8086|IF_FPU},\r |
| 1181 | {I_FMUL, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xC8", IF_8086|IF_FPU},\r |
| 1182 | {I_FMUL, 1, {FPUREG,0,0}, "\1\xD8\10\xC8", IF_8086|IF_FPU},\r |
| 1183 | {I_FMUL, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xC8", IF_8086|IF_FPU},\r |
| 1184 | ITEMPLATE_END\r |
| 1185 | };\r |
| 1186 | \r |
| 1187 | static struct itemplate instrux_FMULP[] = {\r |
| 1188 | {I_FMULP, 1, {FPUREG,0,0}, "\1\xDE\10\xC8", IF_8086|IF_FPU},\r |
| 1189 | {I_FMULP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xC8", IF_8086|IF_FPU},\r |
| 1190 | ITEMPLATE_END\r |
| 1191 | };\r |
| 1192 | \r |
| 1193 | static struct itemplate instrux_FNCLEX[] = {\r |
| 1194 | {I_FNCLEX, 0, {0,0,0}, "\2\xDB\xE2", IF_8086|IF_FPU},\r |
| 1195 | ITEMPLATE_END\r |
| 1196 | };\r |
| 1197 | \r |
| 1198 | static struct itemplate instrux_FNDISI[] = {\r |
| 1199 | {I_FNDISI, 0, {0,0,0}, "\2\xDB\xE1", IF_8086|IF_FPU},\r |
| 1200 | ITEMPLATE_END\r |
| 1201 | };\r |
| 1202 | \r |
| 1203 | static struct itemplate instrux_FNENI[] = {\r |
| 1204 | {I_FNENI, 0, {0,0,0}, "\2\xDB\xE0", IF_8086|IF_FPU},\r |
| 1205 | ITEMPLATE_END\r |
| 1206 | };\r |
| 1207 | \r |
| 1208 | static struct itemplate instrux_FNINIT[] = {\r |
| 1209 | {I_FNINIT, 0, {0,0,0}, "\2\xDB\xE3", IF_8086|IF_FPU},\r |
| 1210 | ITEMPLATE_END\r |
| 1211 | };\r |
| 1212 | \r |
| 1213 | static struct itemplate instrux_FNOP[] = {\r |
| 1214 | {I_FNOP, 0, {0,0,0}, "\2\xD9\xD0", IF_8086|IF_FPU},\r |
| 1215 | ITEMPLATE_END\r |
| 1216 | };\r |
| 1217 | \r |
| 1218 | static struct itemplate instrux_FNSAVE[] = {\r |
| 1219 | {I_FNSAVE, 1, {MEMORY,0,0}, "\300\1\xDD\206", IF_8086|IF_FPU},\r |
| 1220 | ITEMPLATE_END\r |
| 1221 | };\r |
| 1222 | \r |
| 1223 | static struct itemplate instrux_FNSTCW[] = {\r |
| 1224 | {I_FNSTCW, 1, {MEMORY,0,0}, "\300\1\xD9\207", IF_8086|IF_FPU|IF_SW},\r |
| 1225 | ITEMPLATE_END\r |
| 1226 | };\r |
| 1227 | \r |
| 1228 | static struct itemplate instrux_FNSTENV[] = {\r |
| 1229 | {I_FNSTENV, 1, {MEMORY,0,0}, "\300\1\xD9\206", IF_8086|IF_FPU},\r |
| 1230 | ITEMPLATE_END\r |
| 1231 | };\r |
| 1232 | \r |
| 1233 | static struct itemplate instrux_FNSTSW[] = {\r |
| 1234 | {I_FNSTSW, 1, {MEMORY,0,0}, "\300\1\xDD\207", IF_8086|IF_FPU|IF_SW},\r |
| 1235 | {I_FNSTSW, 1, {REG_AX,0,0}, "\2\xDF\xE0", IF_286|IF_FPU},\r |
| 1236 | ITEMPLATE_END\r |
| 1237 | };\r |
| 1238 | \r |
| 1239 | static struct itemplate instrux_FPATAN[] = {\r |
| 1240 | {I_FPATAN, 0, {0,0,0}, "\2\xD9\xF3", IF_8086|IF_FPU},\r |
| 1241 | ITEMPLATE_END\r |
| 1242 | };\r |
| 1243 | \r |
| 1244 | static struct itemplate instrux_FPREM[] = {\r |
| 1245 | {I_FPREM, 0, {0,0,0}, "\2\xD9\xF8", IF_8086|IF_FPU},\r |
| 1246 | ITEMPLATE_END\r |
| 1247 | };\r |
| 1248 | \r |
| 1249 | static struct itemplate instrux_FPREM1[] = {\r |
| 1250 | {I_FPREM1, 0, {0,0,0}, "\2\xD9\xF5", IF_386|IF_FPU},\r |
| 1251 | ITEMPLATE_END\r |
| 1252 | };\r |
| 1253 | \r |
| 1254 | static struct itemplate instrux_FPTAN[] = {\r |
| 1255 | {I_FPTAN, 0, {0,0,0}, "\2\xD9\xF2", IF_8086|IF_FPU},\r |
| 1256 | ITEMPLATE_END\r |
| 1257 | };\r |
| 1258 | \r |
| 1259 | static struct itemplate instrux_FRNDINT[] = {\r |
| 1260 | {I_FRNDINT, 0, {0,0,0}, "\2\xD9\xFC", IF_8086|IF_FPU},\r |
| 1261 | ITEMPLATE_END\r |
| 1262 | };\r |
| 1263 | \r |
| 1264 | static struct itemplate instrux_FRSTOR[] = {\r |
| 1265 | {I_FRSTOR, 1, {MEMORY,0,0}, "\300\1\xDD\204", IF_8086|IF_FPU},\r |
| 1266 | ITEMPLATE_END\r |
| 1267 | };\r |
| 1268 | \r |
| 1269 | static struct itemplate instrux_FSAVE[] = {\r |
| 1270 | {I_FSAVE, 1, {MEMORY,0,0}, "\300\2\x9B\xDD\206", IF_8086|IF_FPU},\r |
| 1271 | ITEMPLATE_END\r |
| 1272 | };\r |
| 1273 | \r |
| 1274 | static struct itemplate instrux_FSCALE[] = {\r |
| 1275 | {I_FSCALE, 0, {0,0,0}, "\2\xD9\xFD", IF_8086|IF_FPU},\r |
| 1276 | ITEMPLATE_END\r |
| 1277 | };\r |
| 1278 | \r |
| 1279 | static struct itemplate instrux_FSETPM[] = {\r |
| 1280 | {I_FSETPM, 0, {0,0,0}, "\2\xDB\xE4", IF_286|IF_FPU},\r |
| 1281 | ITEMPLATE_END\r |
| 1282 | };\r |
| 1283 | \r |
| 1284 | static struct itemplate instrux_FSIN[] = {\r |
| 1285 | {I_FSIN, 0, {0,0,0}, "\2\xD9\xFE", IF_386|IF_FPU},\r |
| 1286 | ITEMPLATE_END\r |
| 1287 | };\r |
| 1288 | \r |
| 1289 | static struct itemplate instrux_FSINCOS[] = {\r |
| 1290 | {I_FSINCOS, 0, {0,0,0}, "\2\xD9\xFB", IF_386|IF_FPU},\r |
| 1291 | ITEMPLATE_END\r |
| 1292 | };\r |
| 1293 | \r |
| 1294 | static struct itemplate instrux_FSQRT[] = {\r |
| 1295 | {I_FSQRT, 0, {0,0,0}, "\2\xD9\xFA", IF_8086|IF_FPU},\r |
| 1296 | ITEMPLATE_END\r |
| 1297 | };\r |
| 1298 | \r |
| 1299 | static struct itemplate instrux_FST[] = {\r |
| 1300 | {I_FST, 1, {MEMORY|BITS32,0,0}, "\300\1\xD9\202", IF_8086|IF_FPU},\r |
| 1301 | {I_FST, 1, {MEMORY|BITS64,0,0}, "\300\1\xDD\202", IF_8086|IF_FPU},\r |
| 1302 | {I_FST, 1, {FPUREG,0,0}, "\1\xDD\10\xD0", IF_8086|IF_FPU},\r |
| 1303 | ITEMPLATE_END\r |
| 1304 | };\r |
| 1305 | \r |
| 1306 | static struct itemplate instrux_FSTCW[] = {\r |
| 1307 | {I_FSTCW, 1, {MEMORY,0,0}, "\300\2\x9B\xD9\207", IF_8086|IF_FPU|IF_SW},\r |
| 1308 | ITEMPLATE_END\r |
| 1309 | };\r |
| 1310 | \r |
| 1311 | static struct itemplate instrux_FSTENV[] = {\r |
| 1312 | {I_FSTENV, 1, {MEMORY,0,0}, "\300\2\x9B\xD9\206", IF_8086|IF_FPU},\r |
| 1313 | ITEMPLATE_END\r |
| 1314 | };\r |
| 1315 | \r |
| 1316 | static struct itemplate instrux_FSTP[] = {\r |
| 1317 | {I_FSTP, 1, {MEMORY|BITS32,0,0}, "\300\1\xD9\203", IF_8086|IF_FPU},\r |
| 1318 | {I_FSTP, 1, {MEMORY|BITS64,0,0}, "\300\1\xDD\203", IF_8086|IF_FPU},\r |
| 1319 | {I_FSTP, 1, {MEMORY|BITS80,0,0}, "\300\1\xDB\207", IF_8086|IF_FPU},\r |
| 1320 | {I_FSTP, 1, {FPUREG,0,0}, "\1\xDD\10\xD8", IF_8086|IF_FPU},\r |
| 1321 | ITEMPLATE_END\r |
| 1322 | };\r |
| 1323 | \r |
| 1324 | static struct itemplate instrux_FSTSW[] = {\r |
| 1325 | {I_FSTSW, 1, {MEMORY,0,0}, "\300\2\x9B\xDD\207", IF_8086|IF_FPU|IF_SW},\r |
| 1326 | {I_FSTSW, 1, {REG_AX,0,0}, "\3\x9B\xDF\xE0", IF_286|IF_FPU},\r |
| 1327 | ITEMPLATE_END\r |
| 1328 | };\r |
| 1329 | \r |
| 1330 | static struct itemplate instrux_FSUB[] = {\r |
| 1331 | {I_FSUB, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\204", IF_8086|IF_FPU},\r |
| 1332 | {I_FSUB, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\204", IF_8086|IF_FPU},\r |
| 1333 | {I_FSUB, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xE8", IF_8086|IF_FPU},\r |
| 1334 | {I_FSUB, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xE8", IF_8086|IF_FPU},\r |
| 1335 | {I_FSUB, 1, {FPUREG,0,0}, "\1\xD8\10\xE0", IF_8086|IF_FPU},\r |
| 1336 | {I_FSUB, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xE0", IF_8086|IF_FPU},\r |
| 1337 | ITEMPLATE_END\r |
| 1338 | };\r |
| 1339 | \r |
| 1340 | static struct itemplate instrux_FSUBP[] = {\r |
| 1341 | {I_FSUBP, 1, {FPUREG,0,0}, "\1\xDE\10\xE8", IF_8086|IF_FPU},\r |
| 1342 | {I_FSUBP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xE8", IF_8086|IF_FPU},\r |
| 1343 | ITEMPLATE_END\r |
| 1344 | };\r |
| 1345 | \r |
| 1346 | static struct itemplate instrux_FSUBR[] = {\r |
| 1347 | {I_FSUBR, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\205", IF_8086|IF_FPU},\r |
| 1348 | {I_FSUBR, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\205", IF_8086|IF_FPU},\r |
| 1349 | {I_FSUBR, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xE0", IF_8086|IF_FPU},\r |
| 1350 | {I_FSUBR, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xE0", IF_8086|IF_FPU},\r |
| 1351 | {I_FSUBR, 1, {FPUREG,0,0}, "\1\xD8\10\xE8", IF_8086|IF_FPU},\r |
| 1352 | {I_FSUBR, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xE8", IF_8086|IF_FPU},\r |
| 1353 | ITEMPLATE_END\r |
| 1354 | };\r |
| 1355 | \r |
| 1356 | static struct itemplate instrux_FSUBRP[] = {\r |
| 1357 | {I_FSUBRP, 1, {FPUREG,0,0}, "\1\xDE\10\xE0", IF_8086|IF_FPU},\r |
| 1358 | {I_FSUBRP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xE0", IF_8086|IF_FPU},\r |
| 1359 | ITEMPLATE_END\r |
| 1360 | };\r |
| 1361 | \r |
| 1362 | static struct itemplate instrux_FTST[] = {\r |
| 1363 | {I_FTST, 0, {0,0,0}, "\2\xD9\xE4", IF_8086|IF_FPU},\r |
| 1364 | ITEMPLATE_END\r |
| 1365 | };\r |
| 1366 | \r |
| 1367 | static struct itemplate instrux_FUCOM[] = {\r |
| 1368 | {I_FUCOM, 1, {FPUREG,0,0}, "\1\xDD\10\xE0", IF_386|IF_FPU},\r |
| 1369 | {I_FUCOM, 2, {FPU0,FPUREG,0}, "\1\xDD\11\xE0", IF_386|IF_FPU},\r |
| 1370 | ITEMPLATE_END\r |
| 1371 | };\r |
| 1372 | \r |
| 1373 | static struct itemplate instrux_FUCOMI[] = {\r |
| 1374 | {I_FUCOMI, 1, {FPUREG,0,0}, "\1\xDB\10\xE8", IF_P6|IF_FPU},\r |
| 1375 | {I_FUCOMI, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xE8", IF_P6|IF_FPU},\r |
| 1376 | ITEMPLATE_END\r |
| 1377 | };\r |
| 1378 | \r |
| 1379 | static struct itemplate instrux_FUCOMIP[] = {\r |
| 1380 | {I_FUCOMIP, 1, {FPUREG,0,0}, "\1\xDF\10\xE8", IF_P6|IF_FPU},\r |
| 1381 | {I_FUCOMIP, 2, {FPU0,FPUREG,0}, "\1\xDF\11\xE8", IF_P6|IF_FPU},\r |
| 1382 | ITEMPLATE_END\r |
| 1383 | };\r |
| 1384 | \r |
| 1385 | static struct itemplate instrux_FUCOMP[] = {\r |
| 1386 | {I_FUCOMP, 1, {FPUREG,0,0}, "\1\xDD\10\xE8", IF_386|IF_FPU},\r |
| 1387 | {I_FUCOMP, 2, {FPU0,FPUREG,0}, "\1\xDD\11\xE8", IF_386|IF_FPU},\r |
| 1388 | ITEMPLATE_END\r |
| 1389 | };\r |
| 1390 | \r |
| 1391 | static struct itemplate instrux_FUCOMPP[] = {\r |
| 1392 | {I_FUCOMPP, 0, {0,0,0}, "\2\xDA\xE9", IF_386|IF_FPU},\r |
| 1393 | ITEMPLATE_END\r |
| 1394 | };\r |
| 1395 | \r |
| 1396 | static struct itemplate instrux_FWAIT[] = {\r |
| 1397 | {I_FWAIT, 0, {0,0,0}, "\1\x9B", IF_8086},\r |
| 1398 | ITEMPLATE_END\r |
| 1399 | };\r |
| 1400 | \r |
| 1401 | static struct itemplate instrux_FXAM[] = {\r |
| 1402 | {I_FXAM, 0, {0,0,0}, "\2\xD9\xE5", IF_8086|IF_FPU},\r |
| 1403 | ITEMPLATE_END\r |
| 1404 | };\r |
| 1405 | \r |
| 1406 | static struct itemplate instrux_FXCH[] = {\r |
| 1407 | {I_FXCH, 0, {0,0,0}, "\2\xD9\xC9", IF_8086|IF_FPU},\r |
| 1408 | {I_FXCH, 1, {FPUREG,0,0}, "\1\xD9\10\xC8", IF_8086|IF_FPU},\r |
| 1409 | {I_FXCH, 2, {FPUREG,FPU0,0}, "\1\xD9\10\xC8", IF_8086|IF_FPU},\r |
| 1410 | {I_FXCH, 2, {FPU0,FPUREG,0}, "\1\xD9\11\xC8", IF_8086|IF_FPU},\r |
| 1411 | ITEMPLATE_END\r |
| 1412 | };\r |
| 1413 | \r |
| 1414 | static struct itemplate instrux_FXRSTOR[] = {\r |
| 1415 | {I_FXRSTOR, 1, {MEMORY,0,0}, "\300\2\x0F\xAE\201", IF_P6|IF_SSE|IF_FPU},\r |
| 1416 | ITEMPLATE_END\r |
| 1417 | };\r |
| 1418 | \r |
| 1419 | static struct itemplate instrux_FXSAVE[] = {\r |
| 1420 | {I_FXSAVE, 1, {MEMORY,0,0}, "\300\2\x0F\xAE\200", IF_P6|IF_SSE|IF_FPU},\r |
| 1421 | ITEMPLATE_END\r |
| 1422 | };\r |
| 1423 | \r |
| 1424 | static struct itemplate instrux_FXTRACT[] = {\r |
| 1425 | {I_FXTRACT, 0, {0,0,0}, "\2\xD9\xF4", IF_8086|IF_FPU},\r |
| 1426 | ITEMPLATE_END\r |
| 1427 | };\r |
| 1428 | \r |
| 1429 | static struct itemplate instrux_FYL2X[] = {\r |
| 1430 | {I_FYL2X, 0, {0,0,0}, "\2\xD9\xF1", IF_8086|IF_FPU},\r |
| 1431 | ITEMPLATE_END\r |
| 1432 | };\r |
| 1433 | \r |
| 1434 | static struct itemplate instrux_FYL2XP1[] = {\r |
| 1435 | {I_FYL2XP1, 0, {0,0,0}, "\2\xD9\xF9", IF_8086|IF_FPU},\r |
| 1436 | ITEMPLATE_END\r |
| 1437 | };\r |
| 1438 | \r |
| 1439 | static struct itemplate instrux_HADDPD[] = {\r |
| 1440 | {I_HADDPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x7C\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r |
| 1441 | {I_HADDPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x7C\110", IF_PRESCOTT|IF_SSE3},\r |
| 1442 | ITEMPLATE_END\r |
| 1443 | };\r |
| 1444 | \r |
| 1445 | static struct itemplate instrux_HADDPS[] = {\r |
| 1446 | {I_HADDPS, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x7C\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r |
| 1447 | {I_HADDPS, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x7C\110", IF_PRESCOTT|IF_SSE3},\r |
| 1448 | ITEMPLATE_END\r |
| 1449 | };\r |
| 1450 | \r |
| 1451 | static struct itemplate instrux_HLT[] = {\r |
| 1452 | {I_HLT, 0, {0,0,0}, "\1\xF4", IF_8086|IF_PRIV},\r |
| 1453 | ITEMPLATE_END\r |
| 1454 | };\r |
| 1455 | \r |
| 1456 | static struct itemplate instrux_HSUBPD[] = {\r |
| 1457 | {I_HSUBPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x7D\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r |
| 1458 | {I_HSUBPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x7D\110", IF_PRESCOTT|IF_SSE3},\r |
| 1459 | ITEMPLATE_END\r |
| 1460 | };\r |
| 1461 | \r |
| 1462 | static struct itemplate instrux_HSUBPS[] = {\r |
| 1463 | {I_HSUBPS, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x7D\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r |
| 1464 | {I_HSUBPS, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x7D\110", IF_PRESCOTT|IF_SSE3},\r |
| 1465 | ITEMPLATE_END\r |
| 1466 | };\r |
| 1467 | \r |
| 1468 | static struct itemplate instrux_IBTS[] = {\r |
| 1469 | {I_IBTS, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xA7\101", IF_386|IF_SW|IF_UNDOC},\r |
| 1470 | {I_IBTS, 2, {REG16,REG16,0}, "\320\2\x0F\xA7\101", IF_386|IF_UNDOC},\r |
| 1471 | {I_IBTS, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xA7\101", IF_386|IF_SD|IF_UNDOC},\r |
| 1472 | {I_IBTS, 2, {REG32,REG32,0}, "\321\2\x0F\xA7\101", IF_386|IF_UNDOC},\r |
| 1473 | ITEMPLATE_END\r |
| 1474 | };\r |
| 1475 | \r |
| 1476 | static struct itemplate instrux_ICEBP[] = {\r |
| 1477 | {I_ICEBP, 0, {0,0,0}, "\1\xF1", IF_386},\r |
| 1478 | ITEMPLATE_END\r |
| 1479 | };\r |
| 1480 | \r |
| 1481 | static struct itemplate instrux_IDIV[] = {\r |
| 1482 | {I_IDIV, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\207", IF_8086},\r |
| 1483 | {I_IDIV, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\207", IF_8086},\r |
| 1484 | {I_IDIV, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\207", IF_386},\r |
| 1485 | ITEMPLATE_END\r |
| 1486 | };\r |
| 1487 | \r |
| 1488 | static struct itemplate instrux_IMUL[] = {\r |
| 1489 | {I_IMUL, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\205", IF_8086},\r |
| 1490 | {I_IMUL, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\205", IF_8086},\r |
| 1491 | {I_IMUL, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\205", IF_386},\r |
| 1492 | {I_IMUL, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xAF\110", IF_386|IF_SM},\r |
| 1493 | {I_IMUL, 2, {REG16,REG16,0}, "\320\2\x0F\xAF\110", IF_386},\r |
| 1494 | {I_IMUL, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xAF\110", IF_386|IF_SM},\r |
| 1495 | {I_IMUL, 2, {REG32,REG32,0}, "\321\2\x0F\xAF\110", IF_386},\r |
| 1496 | {I_IMUL, 3, {REG16,MEMORY,IMMEDIATE|BITS8}, "\320\301\1\x6B\110\16", IF_186|IF_SM},\r |
| 1497 | {I_IMUL, 3, {REG16,MEMORY,SBYTE}, "\320\301\1\x6B\110\16", IF_186|IF_SM},\r |
| 1498 | {I_IMUL, 3, {REG16,MEMORY,IMMEDIATE|BITS16}, "\320\301\1\x69\110\32", IF_186|IF_SM},\r |
| 1499 | {I_IMUL, 3, {REG16,MEMORY,IMMEDIATE}, "\320\301\135\1\x69\110\132", IF_186|IF_SM},\r |
| 1500 | {I_IMUL, 3, {REG16,REG16,IMMEDIATE|BITS8}, "\320\1\x6B\110\16", IF_186},\r |
| 1501 | {I_IMUL, 3, {REG16,REG16,SBYTE}, "\320\1\x6B\110\16", IF_186|IF_SM},\r |
| 1502 | {I_IMUL, 3, {REG16,REG16,IMMEDIATE|BITS16}, "\320\1\x69\110\32", IF_186},\r |
| 1503 | {I_IMUL, 3, {REG16,REG16,IMMEDIATE}, "\320\135\1\x69\110\132", IF_186|IF_SM},\r |
| 1504 | {I_IMUL, 3, {REG32,MEMORY,IMMEDIATE|BITS8}, "\321\301\1\x6B\110\16", IF_386|IF_SM},\r |
| 1505 | {I_IMUL, 3, {REG32,MEMORY,SBYTE}, "\321\301\1\x6B\110\16", IF_386|IF_SM},\r |
| 1506 | {I_IMUL, 3, {REG32,MEMORY,IMMEDIATE|BITS32}, "\321\301\1\x69\110\42", IF_386|IF_SM},\r |
| 1507 | {I_IMUL, 3, {REG32,MEMORY,IMMEDIATE}, "\321\301\145\1\x69\110\142", IF_386|IF_SM},\r |
| 1508 | {I_IMUL, 3, {REG32,REG32,IMMEDIATE|BITS8}, "\321\1\x6B\110\16", IF_386},\r |
| 1509 | {I_IMUL, 3, {REG32,REG32,SBYTE}, "\321\1\x6B\110\16", IF_386|IF_SM},\r |
| 1510 | {I_IMUL, 3, {REG32,REG32,IMMEDIATE|BITS32}, "\321\1\x69\110\42", IF_386},\r |
| 1511 | {I_IMUL, 3, {REG32,REG32,IMMEDIATE}, "\321\145\1\x69\110\142", IF_386|IF_SM},\r |
| 1512 | {I_IMUL, 2, {REG16,IMMEDIATE|BITS8,0}, "\320\1\x6B\100\15", IF_186},\r |
| 1513 | {I_IMUL, 2, {REG16,SBYTE,0}, "\320\1\x6B\100\15", IF_186|IF_SM},\r |
| 1514 | {I_IMUL, 2, {REG16,IMMEDIATE|BITS16,0}, "\320\1\x69\100\31", IF_186},\r |
| 1515 | {I_IMUL, 2, {REG16,IMMEDIATE,0}, "\320\134\1\x69\100\131", IF_186|IF_SM},\r |
| 1516 | {I_IMUL, 2, {REG32,IMMEDIATE|BITS8,0}, "\321\1\x6B\100\15", IF_386},\r |
| 1517 | {I_IMUL, 2, {REG32,SBYTE,0}, "\321\1\x6B\100\15", IF_386|IF_SM},\r |
| 1518 | {I_IMUL, 2, {REG32,IMMEDIATE|BITS32,0}, "\321\1\x69\100\41", IF_386},\r |
| 1519 | {I_IMUL, 2, {REG32,IMMEDIATE,0}, "\321\144\1\x69\100\141", IF_386|IF_SM},\r |
| 1520 | ITEMPLATE_END\r |
| 1521 | };\r |
| 1522 | \r |
| 1523 | static struct itemplate instrux_IN[] = {\r |
| 1524 | {I_IN, 2, {REG_AL,IMMEDIATE,0}, "\1\xE4\25", IF_8086|IF_SB},\r |
| 1525 | {I_IN, 2, {REG_AX,IMMEDIATE,0}, "\320\1\xE5\25", IF_8086|IF_SB},\r |
| 1526 | {I_IN, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\xE5\25", IF_386|IF_SB},\r |
| 1527 | {I_IN, 2, {REG_AL,REG_DX,0}, "\1\xEC", IF_8086},\r |
| 1528 | {I_IN, 2, {REG_AX,REG_DX,0}, "\320\1\xED", IF_8086},\r |
| 1529 | {I_IN, 2, {REG_EAX,REG_DX,0}, "\321\1\xED", IF_386},\r |
| 1530 | ITEMPLATE_END\r |
| 1531 | };\r |
| 1532 | \r |
| 1533 | static struct itemplate instrux_INC[] = {\r |
| 1534 | {I_INC, 1, {REG16,0,0}, "\320\10\x40", IF_8086},\r |
| 1535 | {I_INC, 1, {REG32,0,0}, "\321\10\x40", IF_386},\r |
| 1536 | {I_INC, 1, {REGMEM|BITS8,0,0}, "\300\1\xFE\200", IF_8086},\r |
| 1537 | {I_INC, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xFF\200", IF_8086},\r |
| 1538 | {I_INC, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xFF\200", IF_386},\r |
| 1539 | ITEMPLATE_END\r |
| 1540 | };\r |
| 1541 | \r |
| 1542 | static struct itemplate instrux_INCBIN[] = {\r |
| 1543 | ITEMPLATE_END\r |
| 1544 | };\r |
| 1545 | \r |
| 1546 | static struct itemplate instrux_INSB[] = {\r |
| 1547 | {I_INSB, 0, {0,0,0}, "\1\x6C", IF_186},\r |
| 1548 | ITEMPLATE_END\r |
| 1549 | };\r |
| 1550 | \r |
| 1551 | static struct itemplate instrux_INSD[] = {\r |
| 1552 | {I_INSD, 0, {0,0,0}, "\321\1\x6D", IF_386},\r |
| 1553 | ITEMPLATE_END\r |
| 1554 | };\r |
| 1555 | \r |
| 1556 | static struct itemplate instrux_INSW[] = {\r |
| 1557 | {I_INSW, 0, {0,0,0}, "\320\1\x6D", IF_186},\r |
| 1558 | ITEMPLATE_END\r |
| 1559 | };\r |
| 1560 | \r |
| 1561 | static struct itemplate instrux_INT[] = {\r |
| 1562 | {I_INT, 1, {IMMEDIATE,0,0}, "\1\xCD\24", IF_8086|IF_SB},\r |
| 1563 | ITEMPLATE_END\r |
| 1564 | };\r |
| 1565 | \r |
| 1566 | static struct itemplate instrux_INT01[] = {\r |
| 1567 | {I_INT01, 0, {0,0,0}, "\1\xF1", IF_386},\r |
| 1568 | ITEMPLATE_END\r |
| 1569 | };\r |
| 1570 | \r |
| 1571 | static struct itemplate instrux_INT03[] = {\r |
| 1572 | {I_INT03, 0, {0,0,0}, "\1\xCC", IF_8086},\r |
| 1573 | ITEMPLATE_END\r |
| 1574 | };\r |
| 1575 | \r |
| 1576 | static struct itemplate instrux_INT1[] = {\r |
| 1577 | {I_INT1, 0, {0,0,0}, "\1\xF1", IF_386},\r |
| 1578 | ITEMPLATE_END\r |
| 1579 | };\r |
| 1580 | \r |
| 1581 | static struct itemplate instrux_INT3[] = {\r |
| 1582 | {I_INT3, 0, {0,0,0}, "\1\xCC", IF_8086},\r |
| 1583 | ITEMPLATE_END\r |
| 1584 | };\r |
| 1585 | \r |
| 1586 | static struct itemplate instrux_INTO[] = {\r |
| 1587 | {I_INTO, 0, {0,0,0}, "\1\xCE", IF_8086},\r |
| 1588 | ITEMPLATE_END\r |
| 1589 | };\r |
| 1590 | \r |
| 1591 | static struct itemplate instrux_INVD[] = {\r |
| 1592 | {I_INVD, 0, {0,0,0}, "\2\x0F\x08", IF_486|IF_PRIV},\r |
| 1593 | ITEMPLATE_END\r |
| 1594 | };\r |
| 1595 | \r |
| 1596 | static struct itemplate instrux_INVLPG[] = {\r |
| 1597 | {I_INVLPG, 1, {MEMORY,0,0}, "\300\2\x0F\x01\207", IF_486|IF_PRIV},\r |
| 1598 | ITEMPLATE_END\r |
| 1599 | };\r |
| 1600 | \r |
| 1601 | static struct itemplate instrux_IRET[] = {\r |
| 1602 | {I_IRET, 0, {0,0,0}, "\322\1\xCF", IF_8086},\r |
| 1603 | ITEMPLATE_END\r |
| 1604 | };\r |
| 1605 | \r |
| 1606 | static struct itemplate instrux_IRETD[] = {\r |
| 1607 | {I_IRETD, 0, {0,0,0}, "\321\1\xCF", IF_386},\r |
| 1608 | ITEMPLATE_END\r |
| 1609 | };\r |
| 1610 | \r |
| 1611 | static struct itemplate instrux_IRETW[] = {\r |
| 1612 | {I_IRETW, 0, {0,0,0}, "\320\1\xCF", IF_8086},\r |
| 1613 | ITEMPLATE_END\r |
| 1614 | };\r |
| 1615 | \r |
| 1616 | static struct itemplate instrux_JCXZ[] = {\r |
| 1617 | {I_JCXZ, 1, {IMMEDIATE,0,0}, "\310\1\xE3\50", IF_8086},\r |
| 1618 | ITEMPLATE_END\r |
| 1619 | };\r |
| 1620 | \r |
| 1621 | static struct itemplate instrux_JECXZ[] = {\r |
| 1622 | {I_JECXZ, 1, {IMMEDIATE,0,0}, "\311\1\xE3\50", IF_386},\r |
| 1623 | ITEMPLATE_END\r |
| 1624 | };\r |
| 1625 | \r |
| 1626 | static struct itemplate instrux_JMP[] = {\r |
| 1627 | {I_JMP, 1, {IMMEDIATE|SHORT,0,0}, "\1\xEB\50", IF_8086},\r |
| 1628 | {I_JMP, 1, {IMMEDIATE,0,0}, "\371\1\xEB\50", IF_8086},\r |
| 1629 | {I_JMP, 1, {IMMEDIATE,0,0}, "\322\1\xE9\64", IF_8086},\r |
| 1630 | {I_JMP, 1, {IMMEDIATE|NEAR,0,0}, "\322\1\xE9\64", IF_8086},\r |
| 1631 | {I_JMP, 1, {IMMEDIATE|FAR,0,0}, "\322\1\xEA\34\37", IF_8086},\r |
| 1632 | {I_JMP, 1, {IMMEDIATE|BITS16,0,0}, "\320\1\xE9\64", IF_8086},\r |
| 1633 | {I_JMP, 1, {IMMEDIATE|BITS16|NEAR,0,0}, "\320\1\xE9\64", IF_8086},\r |
| 1634 | {I_JMP, 1, {IMMEDIATE|BITS16|FAR,0,0}, "\320\1\xEA\34\37", IF_8086},\r |
| 1635 | {I_JMP, 1, {IMMEDIATE|BITS32,0,0}, "\321\1\xE9\64", IF_386},\r |
| 1636 | {I_JMP, 1, {IMMEDIATE|BITS32|NEAR,0,0}, "\321\1\xE9\64", IF_386},\r |
| 1637 | {I_JMP, 1, {IMMEDIATE|BITS32|FAR,0,0}, "\321\1\xEA\34\37", IF_386},\r |
| 1638 | {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE,0}, "\322\1\xEA\35\30", IF_8086},\r |
| 1639 | {I_JMP, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0}, "\320\1\xEA\31\30", IF_8086},\r |
| 1640 | {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0}, "\320\1\xEA\31\30", IF_8086},\r |
| 1641 | {I_JMP, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0}, "\321\1\xEA\41\30", IF_386},\r |
| 1642 | {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0}, "\321\1\xEA\41\30", IF_386},\r |
| 1643 | {I_JMP, 1, {MEMORY|FAR,0,0}, "\322\300\1\xFF\205", IF_8086},\r |
| 1644 | {I_JMP, 1, {MEMORY|BITS16|FAR,0,0}, "\320\300\1\xFF\205", IF_8086},\r |
| 1645 | {I_JMP, 1, {MEMORY|BITS32|FAR,0,0}, "\321\300\1\xFF\205", IF_386},\r |
| 1646 | {I_JMP, 1, {MEMORY|NEAR,0,0}, "\322\300\1\xFF\204", IF_8086},\r |
| 1647 | {I_JMP, 1, {MEMORY|BITS16|NEAR,0,0}, "\320\300\1\xFF\204", IF_8086},\r |
| 1648 | {I_JMP, 1, {MEMORY|BITS32|NEAR,0,0}, "\321\300\1\xFF\204", IF_386},\r |
| 1649 | {I_JMP, 1, {REG16,0,0}, "\320\300\1\xFF\204", IF_8086},\r |
| 1650 | {I_JMP, 1, {REG32,0,0}, "\321\300\1\xFF\204", IF_386},\r |
| 1651 | {I_JMP, 1, {MEMORY,0,0}, "\322\300\1\xFF\204", IF_8086},\r |
| 1652 | {I_JMP, 1, {MEMORY|BITS16,0,0}, "\320\300\1\xFF\204", IF_8086},\r |
| 1653 | {I_JMP, 1, {MEMORY|BITS32,0,0}, "\321\300\1\xFF\204", IF_386},\r |
| 1654 | ITEMPLATE_END\r |
| 1655 | };\r |
| 1656 | \r |
| 1657 | static struct itemplate instrux_JMPE[] = {\r |
| 1658 | {I_JMPE, 1, {IMMEDIATE,0,0}, "\322\2\x0F\xB8\64", IF_IA64},\r |
| 1659 | {I_JMPE, 1, {IMMEDIATE|BITS16,0,0}, "\320\2\x0F\xB8\64", IF_IA64},\r |
| 1660 | {I_JMPE, 1, {IMMEDIATE|BITS32,0,0}, "\321\2\x0F\xB8\64", IF_IA64},\r |
| 1661 | {I_JMPE, 1, {REGMEM|BITS16,0,0}, "\320\2\x0F\x00\206", IF_IA64},\r |
| 1662 | {I_JMPE, 1, {REGMEM|BITS32,0,0}, "\321\2\x0F\x00\206", IF_IA64},\r |
| 1663 | ITEMPLATE_END\r |
| 1664 | };\r |
| 1665 | \r |
| 1666 | static struct itemplate instrux_LAHF[] = {\r |
| 1667 | {I_LAHF, 0, {0,0,0}, "\1\x9F", IF_8086},\r |
| 1668 | ITEMPLATE_END\r |
| 1669 | };\r |
| 1670 | \r |
| 1671 | static struct itemplate instrux_LAR[] = {\r |
| 1672 | {I_LAR, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\x02\110", IF_286|IF_PROT|IF_SM},\r |
| 1673 | {I_LAR, 2, {REG16,REG16,0}, "\320\2\x0F\x02\110", IF_286|IF_PROT},\r |
| 1674 | {I_LAR, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\x02\110", IF_386|IF_PROT|IF_SM},\r |
| 1675 | {I_LAR, 2, {REG32,REG32,0}, "\321\2\x0F\x02\110", IF_386|IF_PROT},\r |
| 1676 | ITEMPLATE_END\r |
| 1677 | };\r |
| 1678 | \r |
| 1679 | static struct itemplate instrux_LDDQU[] = {\r |
| 1680 | {I_LDDQU, 2, {XMMREG,MEMORY,0}, "\3\xF2\x0F\xF0\110", IF_PRESCOTT|IF_SSE3},\r |
| 1681 | ITEMPLATE_END\r |
| 1682 | };\r |
| 1683 | \r |
| 1684 | static struct itemplate instrux_LDMXCSR[] = {\r |
| 1685 | {I_LDMXCSR, 1, {MEMORY,0,0}, "\300\2\x0F\xAE\202", IF_KATMAI|IF_SSE|IF_SD},\r |
| 1686 | ITEMPLATE_END\r |
| 1687 | };\r |
| 1688 | \r |
| 1689 | static struct itemplate instrux_LDS[] = {\r |
| 1690 | {I_LDS, 2, {REG16,MEMORY,0}, "\320\301\1\xC5\110", IF_8086},\r |
| 1691 | {I_LDS, 2, {REG32,MEMORY,0}, "\321\301\1\xC5\110", IF_386},\r |
| 1692 | ITEMPLATE_END\r |
| 1693 | };\r |
| 1694 | \r |
| 1695 | static struct itemplate instrux_LEA[] = {\r |
| 1696 | {I_LEA, 2, {REG16,MEMORY,0}, "\320\301\1\x8D\110", IF_8086},\r |
| 1697 | {I_LEA, 2, {REG32,MEMORY,0}, "\321\301\1\x8D\110", IF_386},\r |
| 1698 | ITEMPLATE_END\r |
| 1699 | };\r |
| 1700 | \r |
| 1701 | static struct itemplate instrux_LEAVE[] = {\r |
| 1702 | {I_LEAVE, 0, {0,0,0}, "\1\xC9", IF_186},\r |
| 1703 | ITEMPLATE_END\r |
| 1704 | };\r |
| 1705 | \r |
| 1706 | static struct itemplate instrux_LES[] = {\r |
| 1707 | {I_LES, 2, {REG16,MEMORY,0}, "\320\301\1\xC4\110", IF_8086},\r |
| 1708 | {I_LES, 2, {REG32,MEMORY,0}, "\321\301\1\xC4\110", IF_386},\r |
| 1709 | ITEMPLATE_END\r |
| 1710 | };\r |
| 1711 | \r |
| 1712 | static struct itemplate instrux_LFENCE[] = {\r |
| 1713 | {I_LFENCE, 0, {0,0,0}, "\3\x0F\xAE\xE8", IF_WILLAMETTE|IF_SSE2},\r |
| 1714 | ITEMPLATE_END\r |
| 1715 | };\r |
| 1716 | \r |
| 1717 | static struct itemplate instrux_LFS[] = {\r |
| 1718 | {I_LFS, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xB4\110", IF_386},\r |
| 1719 | {I_LFS, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xB4\110", IF_386},\r |
| 1720 | ITEMPLATE_END\r |
| 1721 | };\r |
| 1722 | \r |
| 1723 | static struct itemplate instrux_LGDT[] = {\r |
| 1724 | {I_LGDT, 1, {MEMORY,0,0}, "\300\2\x0F\x01\202", IF_286|IF_PRIV},\r |
| 1725 | ITEMPLATE_END\r |
| 1726 | };\r |
| 1727 | \r |
| 1728 | static struct itemplate instrux_LGS[] = {\r |
| 1729 | {I_LGS, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xB5\110", IF_386},\r |
| 1730 | {I_LGS, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xB5\110", IF_386},\r |
| 1731 | ITEMPLATE_END\r |
| 1732 | };\r |
| 1733 | \r |
| 1734 | static struct itemplate instrux_LIDT[] = {\r |
| 1735 | {I_LIDT, 1, {MEMORY,0,0}, "\300\2\x0F\x01\203", IF_286|IF_PRIV},\r |
| 1736 | ITEMPLATE_END\r |
| 1737 | };\r |
| 1738 | \r |
| 1739 | static struct itemplate instrux_LLDT[] = {\r |
| 1740 | {I_LLDT, 1, {MEMORY,0,0}, "\300\1\x0F\17\202", IF_286|IF_PROT|IF_PRIV},\r |
| 1741 | {I_LLDT, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\202", IF_286|IF_PROT|IF_PRIV},\r |
| 1742 | {I_LLDT, 1, {REG16,0,0}, "\1\x0F\17\202", IF_286|IF_PROT|IF_PRIV},\r |
| 1743 | ITEMPLATE_END\r |
| 1744 | };\r |
| 1745 | \r |
| 1746 | static struct itemplate instrux_LMSW[] = {\r |
| 1747 | {I_LMSW, 1, {MEMORY,0,0}, "\300\2\x0F\x01\206", IF_286|IF_PRIV},\r |
| 1748 | {I_LMSW, 1, {MEMORY|BITS16,0,0}, "\300\2\x0F\x01\206", IF_286|IF_PRIV},\r |
| 1749 | {I_LMSW, 1, {REG16,0,0}, "\2\x0F\x01\206", IF_286|IF_PRIV},\r |
| 1750 | ITEMPLATE_END\r |
| 1751 | };\r |
| 1752 | \r |
| 1753 | static struct itemplate instrux_LOADALL[] = {\r |
| 1754 | {I_LOADALL, 0, {0,0,0}, "\2\x0F\x07", IF_386|IF_UNDOC},\r |
| 1755 | ITEMPLATE_END\r |
| 1756 | };\r |
| 1757 | \r |
| 1758 | static struct itemplate instrux_LOADALL286[] = {\r |
| 1759 | {I_LOADALL286, 0, {0,0,0}, "\2\x0F\x05", IF_286|IF_UNDOC},\r |
| 1760 | ITEMPLATE_END\r |
| 1761 | };\r |
| 1762 | \r |
| 1763 | static struct itemplate instrux_LODSB[] = {\r |
| 1764 | {I_LODSB, 0, {0,0,0}, "\1\xAC", IF_8086},\r |
| 1765 | ITEMPLATE_END\r |
| 1766 | };\r |
| 1767 | \r |
| 1768 | static struct itemplate instrux_LODSD[] = {\r |
| 1769 | {I_LODSD, 0, {0,0,0}, "\321\1\xAD", IF_386},\r |
| 1770 | ITEMPLATE_END\r |
| 1771 | };\r |
| 1772 | \r |
| 1773 | static struct itemplate instrux_LODSW[] = {\r |
| 1774 | {I_LODSW, 0, {0,0,0}, "\320\1\xAD", IF_8086},\r |
| 1775 | ITEMPLATE_END\r |
| 1776 | };\r |
| 1777 | \r |
| 1778 | static struct itemplate instrux_LOOP[] = {\r |
| 1779 | {I_LOOP, 1, {IMMEDIATE,0,0}, "\312\1\xE2\50", IF_8086},\r |
| 1780 | {I_LOOP, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE2\50", IF_8086},\r |
| 1781 | {I_LOOP, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE2\50", IF_386},\r |
| 1782 | ITEMPLATE_END\r |
| 1783 | };\r |
| 1784 | \r |
| 1785 | static struct itemplate instrux_LOOPE[] = {\r |
| 1786 | {I_LOOPE, 1, {IMMEDIATE,0,0}, "\312\1\xE1\50", IF_8086},\r |
| 1787 | {I_LOOPE, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE1\50", IF_8086},\r |
| 1788 | {I_LOOPE, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE1\50", IF_386},\r |
| 1789 | ITEMPLATE_END\r |
| 1790 | };\r |
| 1791 | \r |
| 1792 | static struct itemplate instrux_LOOPNE[] = {\r |
| 1793 | {I_LOOPNE, 1, {IMMEDIATE,0,0}, "\312\1\xE0\50", IF_8086},\r |
| 1794 | {I_LOOPNE, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE0\50", IF_8086},\r |
| 1795 | {I_LOOPNE, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE0\50", IF_386},\r |
| 1796 | ITEMPLATE_END\r |
| 1797 | };\r |
| 1798 | \r |
| 1799 | static struct itemplate instrux_LOOPNZ[] = {\r |
| 1800 | {I_LOOPNZ, 1, {IMMEDIATE,0,0}, "\312\1\xE0\50", IF_8086},\r |
| 1801 | {I_LOOPNZ, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE0\50", IF_8086},\r |
| 1802 | {I_LOOPNZ, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE0\50", IF_386},\r |
| 1803 | ITEMPLATE_END\r |
| 1804 | };\r |
| 1805 | \r |
| 1806 | static struct itemplate instrux_LOOPZ[] = {\r |
| 1807 | {I_LOOPZ, 1, {IMMEDIATE,0,0}, "\312\1\xE1\50", IF_8086},\r |
| 1808 | {I_LOOPZ, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE1\50", IF_8086},\r |
| 1809 | {I_LOOPZ, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE1\50", IF_386},\r |
| 1810 | ITEMPLATE_END\r |
| 1811 | };\r |
| 1812 | \r |
| 1813 | static struct itemplate instrux_LSL[] = {\r |
| 1814 | {I_LSL, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\x03\110", IF_286|IF_PROT|IF_SM},\r |
| 1815 | {I_LSL, 2, {REG16,REG16,0}, "\320\2\x0F\x03\110", IF_286|IF_PROT},\r |
| 1816 | {I_LSL, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\x03\110", IF_386|IF_PROT|IF_SM},\r |
| 1817 | {I_LSL, 2, {REG32,REG32,0}, "\321\2\x0F\x03\110", IF_386|IF_PROT},\r |
| 1818 | ITEMPLATE_END\r |
| 1819 | };\r |
| 1820 | \r |
| 1821 | static struct itemplate instrux_LSS[] = {\r |
| 1822 | {I_LSS, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xB2\110", IF_386},\r |
| 1823 | {I_LSS, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xB2\110", IF_386},\r |
| 1824 | ITEMPLATE_END\r |
| 1825 | };\r |
| 1826 | \r |
| 1827 | static struct itemplate instrux_LTR[] = {\r |
| 1828 | {I_LTR, 1, {MEMORY,0,0}, "\300\1\x0F\17\203", IF_286|IF_PROT|IF_PRIV},\r |
| 1829 | {I_LTR, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\203", IF_286|IF_PROT|IF_PRIV},\r |
| 1830 | {I_LTR, 1, {REG16,0,0}, "\1\x0F\17\203", IF_286|IF_PROT|IF_PRIV},\r |
| 1831 | ITEMPLATE_END\r |
| 1832 | };\r |
| 1833 | \r |
| 1834 | static struct itemplate instrux_MASKMOVDQU[] = {\r |
| 1835 | {I_MASKMOVDQU, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF7\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1836 | ITEMPLATE_END\r |
| 1837 | };\r |
| 1838 | \r |
| 1839 | static struct itemplate instrux_MASKMOVQ[] = {\r |
| 1840 | {I_MASKMOVQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF7\110", IF_KATMAI|IF_MMX},\r |
| 1841 | ITEMPLATE_END\r |
| 1842 | };\r |
| 1843 | \r |
| 1844 | static struct itemplate instrux_MAXPD[] = {\r |
| 1845 | {I_MAXPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1846 | {I_MAXPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5F\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1847 | ITEMPLATE_END\r |
| 1848 | };\r |
| 1849 | \r |
| 1850 | static struct itemplate instrux_MAXPS[] = {\r |
| 1851 | {I_MAXPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x5F\110", IF_KATMAI|IF_SSE},\r |
| 1852 | {I_MAXPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x5F\110", IF_KATMAI|IF_SSE},\r |
| 1853 | ITEMPLATE_END\r |
| 1854 | };\r |
| 1855 | \r |
| 1856 | static struct itemplate instrux_MAXSD[] = {\r |
| 1857 | {I_MAXSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x5F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1858 | {I_MAXSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x5F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1859 | ITEMPLATE_END\r |
| 1860 | };\r |
| 1861 | \r |
| 1862 | static struct itemplate instrux_MAXSS[] = {\r |
| 1863 | {I_MAXSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5F\110", IF_KATMAI|IF_SSE},\r |
| 1864 | {I_MAXSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5F\110", IF_KATMAI|IF_SSE},\r |
| 1865 | ITEMPLATE_END\r |
| 1866 | };\r |
| 1867 | \r |
| 1868 | static struct itemplate instrux_MFENCE[] = {\r |
| 1869 | {I_MFENCE, 0, {0,0,0}, "\3\x0F\xAE\xF0", IF_WILLAMETTE|IF_SSE2},\r |
| 1870 | ITEMPLATE_END\r |
| 1871 | };\r |
| 1872 | \r |
| 1873 | static struct itemplate instrux_MINPD[] = {\r |
| 1874 | {I_MINPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5D\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1875 | {I_MINPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5D\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1876 | ITEMPLATE_END\r |
| 1877 | };\r |
| 1878 | \r |
| 1879 | static struct itemplate instrux_MINPS[] = {\r |
| 1880 | {I_MINPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x5D\110", IF_KATMAI|IF_SSE},\r |
| 1881 | {I_MINPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x5D\110", IF_KATMAI|IF_SSE},\r |
| 1882 | ITEMPLATE_END\r |
| 1883 | };\r |
| 1884 | \r |
| 1885 | static struct itemplate instrux_MINSD[] = {\r |
| 1886 | {I_MINSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x5D\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1887 | {I_MINSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x5D\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1888 | ITEMPLATE_END\r |
| 1889 | };\r |
| 1890 | \r |
| 1891 | static struct itemplate instrux_MINSS[] = {\r |
| 1892 | {I_MINSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5D\110", IF_KATMAI|IF_SSE},\r |
| 1893 | {I_MINSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5D\110", IF_KATMAI|IF_SSE},\r |
| 1894 | ITEMPLATE_END\r |
| 1895 | };\r |
| 1896 | \r |
| 1897 | static struct itemplate instrux_MONITOR[] = {\r |
| 1898 | {I_MONITOR, 0, {0,0,0}, "\3\x0F\x01\xC8", IF_PRESCOTT},\r |
| 1899 | {I_MONITOR, 3, {REG_EAX,REG_ECX,REG_EDX}, "\3\x0F\x01\xC8", IF_PRESCOTT},\r |
| 1900 | ITEMPLATE_END\r |
| 1901 | };\r |
| 1902 | \r |
| 1903 | static struct itemplate instrux_MOV[] = {\r |
| 1904 | {I_MOV, 2, {MEMORY,REG_SREG,0}, "\300\1\x8C\101", IF_8086|IF_SM},\r |
| 1905 | {I_MOV, 2, {REG16,REG_SREG,0}, "\320\1\x8C\101", IF_8086},\r |
| 1906 | {I_MOV, 2, {REG32,REG_SREG,0}, "\321\1\x8C\101", IF_386},\r |
| 1907 | {I_MOV, 2, {REG_SREG,MEMORY,0}, "\301\1\x8E\110", IF_8086|IF_SM},\r |
| 1908 | {I_MOV, 2, {REG_SREG,REG16,0}, "\1\x8E\110", IF_8086},\r |
| 1909 | {I_MOV, 2, {REG_SREG,REG32,0}, "\1\x8E\110", IF_386},\r |
| 1910 | {I_MOV, 2, {REG_AL,MEM_OFFS,0}, "\301\1\xA0\45", IF_8086|IF_SM},\r |
| 1911 | {I_MOV, 2, {REG_AX,MEM_OFFS,0}, "\301\320\1\xA1\45", IF_8086|IF_SM},\r |
| 1912 | {I_MOV, 2, {REG_EAX,MEM_OFFS,0}, "\301\321\1\xA1\45", IF_386|IF_SM},\r |
| 1913 | {I_MOV, 2, {MEM_OFFS,REG_AL,0}, "\300\1\xA2\44", IF_8086|IF_SM},\r |
| 1914 | {I_MOV, 2, {MEM_OFFS,REG_AX,0}, "\300\320\1\xA3\44", IF_8086|IF_SM},\r |
| 1915 | {I_MOV, 2, {MEM_OFFS,REG_EAX,0}, "\300\321\1\xA3\44", IF_386|IF_SM},\r |
| 1916 | {I_MOV, 2, {REG32,REG_CREG,0}, "\2\x0F\x20\101", IF_386|IF_PRIV},\r |
| 1917 | {I_MOV, 2, {REG32,REG_DREG,0}, "\2\x0F\x21\101", IF_386|IF_PRIV},\r |
| 1918 | {I_MOV, 2, {REG32,REG_TREG,0}, "\2\x0F\x24\101", IF_386|IF_PRIV},\r |
| 1919 | {I_MOV, 2, {REG_CREG,REG32,0}, "\2\x0F\x22\110", IF_386|IF_PRIV},\r |
| 1920 | {I_MOV, 2, {REG_DREG,REG32,0}, "\2\x0F\x23\110", IF_386|IF_PRIV},\r |
| 1921 | {I_MOV, 2, {REG_TREG,REG32,0}, "\2\x0F\x26\110", IF_386|IF_PRIV},\r |
| 1922 | {I_MOV, 2, {MEMORY,REG8,0}, "\300\1\x88\101", IF_8086|IF_SM},\r |
| 1923 | {I_MOV, 2, {REG8,REG8,0}, "\1\x88\101", IF_8086},\r |
| 1924 | {I_MOV, 2, {MEMORY,REG16,0}, "\320\300\1\x89\101", IF_8086|IF_SM},\r |
| 1925 | {I_MOV, 2, {REG16,REG16,0}, "\320\1\x89\101", IF_8086},\r |
| 1926 | {I_MOV, 2, {MEMORY,REG32,0}, "\321\300\1\x89\101", IF_386|IF_SM},\r |
| 1927 | {I_MOV, 2, {REG32,REG32,0}, "\321\1\x89\101", IF_386},\r |
| 1928 | {I_MOV, 2, {REG8,MEMORY,0}, "\301\1\x8A\110", IF_8086|IF_SM},\r |
| 1929 | {I_MOV, 2, {REG8,REG8,0}, "\1\x8A\110", IF_8086},\r |
| 1930 | {I_MOV, 2, {REG16,MEMORY,0}, "\320\301\1\x8B\110", IF_8086|IF_SM},\r |
| 1931 | {I_MOV, 2, {REG16,REG16,0}, "\320\1\x8B\110", IF_8086},\r |
| 1932 | {I_MOV, 2, {REG32,MEMORY,0}, "\321\301\1\x8B\110", IF_386|IF_SM},\r |
| 1933 | {I_MOV, 2, {REG32,REG32,0}, "\321\1\x8B\110", IF_386},\r |
| 1934 | {I_MOV, 2, {REG8,IMMEDIATE,0}, "\10\xB0\21", IF_8086|IF_SM},\r |
| 1935 | {I_MOV, 2, {REG16,IMMEDIATE,0}, "\320\10\xB8\31", IF_8086|IF_SM},\r |
| 1936 | {I_MOV, 2, {REG32,IMMEDIATE,0}, "\321\10\xB8\41", IF_386|IF_SM},\r |
| 1937 | {I_MOV, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC6\200\21", IF_8086|IF_SM},\r |
| 1938 | {I_MOV, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC7\200\31", IF_8086|IF_SM},\r |
| 1939 | {I_MOV, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC7\200\41", IF_386|IF_SM},\r |
| 1940 | {I_MOV, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\xC6\200\21", IF_8086|IF_SM},\r |
| 1941 | {I_MOV, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\1\xC7\200\31", IF_8086|IF_SM},\r |
| 1942 | {I_MOV, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\1\xC7\200\41", IF_386|IF_SM},\r |
| 1943 | ITEMPLATE_END\r |
| 1944 | };\r |
| 1945 | \r |
| 1946 | static struct itemplate instrux_MOVAPD[] = {\r |
| 1947 | {I_MOVAPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x28\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1948 | {I_MOVAPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x29\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1949 | {I_MOVAPD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x29\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1950 | {I_MOVAPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x28\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1951 | ITEMPLATE_END\r |
| 1952 | };\r |
| 1953 | \r |
| 1954 | static struct itemplate instrux_MOVAPS[] = {\r |
| 1955 | {I_MOVAPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x28\110", IF_KATMAI|IF_SSE},\r |
| 1956 | {I_MOVAPS, 2, {MEMORY,XMMREG,0}, "\300\2\x0F\x29\101", IF_KATMAI|IF_SSE},\r |
| 1957 | {I_MOVAPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x28\110", IF_KATMAI|IF_SSE},\r |
| 1958 | {I_MOVAPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x29\101", IF_KATMAI|IF_SSE},\r |
| 1959 | ITEMPLATE_END\r |
| 1960 | };\r |
| 1961 | \r |
| 1962 | static struct itemplate instrux_MOVD[] = {\r |
| 1963 | {I_MOVD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x6E\110", IF_PENT|IF_MMX|IF_SD},\r |
| 1964 | {I_MOVD, 2, {MMXREG,REG32,0}, "\2\x0F\x6E\110", IF_PENT|IF_MMX},\r |
| 1965 | {I_MOVD, 2, {MEMORY,MMXREG,0}, "\300\2\x0F\x7E\101", IF_PENT|IF_MMX|IF_SD},\r |
| 1966 | {I_MOVD, 2, {REG32,MMXREG,0}, "\2\x0F\x7E\101", IF_PENT|IF_MMX},\r |
| 1967 | {I_MOVD, 2, {XMMREG,REG32,0}, "\3\x66\x0F\x6E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1968 | {I_MOVD, 2, {REG32,XMMREG,0}, "\3\x66\x0F\x7E\101", IF_WILLAMETTE|IF_SSE2},\r |
| 1969 | {I_MOVD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x7E\101", IF_WILLAMETTE|IF_SSE2},\r |
| 1970 | {I_MOVD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1971 | ITEMPLATE_END\r |
| 1972 | };\r |
| 1973 | \r |
| 1974 | static struct itemplate instrux_MOVDDUP[] = {\r |
| 1975 | {I_MOVDDUP, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x12\110", IF_PRESCOTT|IF_SSE3},\r |
| 1976 | {I_MOVDDUP, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x12\110", IF_PRESCOTT|IF_SSE3},\r |
| 1977 | ITEMPLATE_END\r |
| 1978 | };\r |
| 1979 | \r |
| 1980 | static struct itemplate instrux_MOVDQ2Q[] = {\r |
| 1981 | {I_MOVDQ2Q, 2, {MMXREG,XMMREG,0}, "\3\xF2\x0F\xD6\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1982 | ITEMPLATE_END\r |
| 1983 | };\r |
| 1984 | \r |
| 1985 | static struct itemplate instrux_MOVDQA[] = {\r |
| 1986 | {I_MOVDQA, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x6F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1987 | {I_MOVDQA, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x7F\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1988 | {I_MOVDQA, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6F\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1989 | {I_MOVDQA, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x7F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1990 | ITEMPLATE_END\r |
| 1991 | };\r |
| 1992 | \r |
| 1993 | static struct itemplate instrux_MOVDQU[] = {\r |
| 1994 | {I_MOVDQU, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x6F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1995 | {I_MOVDQU, 2, {MEMORY,XMMREG,0}, "\333\300\2\x0F\x7F\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1996 | {I_MOVDQU, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x6F\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1997 | {I_MOVDQU, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x7F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1998 | ITEMPLATE_END\r |
| 1999 | };\r |
| 2000 | \r |
| 2001 | static struct itemplate instrux_MOVHLPS[] = {\r |
| 2002 | {I_MOVHLPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x12\110", IF_KATMAI|IF_SSE},\r |
| 2003 | ITEMPLATE_END\r |
| 2004 | };\r |
| 2005 | \r |
| 2006 | static struct itemplate instrux_MOVHPD[] = {\r |
| 2007 | {I_MOVHPD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x17\101", IF_WILLAMETTE|IF_SSE2},\r |
| 2008 | {I_MOVHPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x16\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2009 | ITEMPLATE_END\r |
| 2010 | };\r |
| 2011 | \r |
| 2012 | static struct itemplate instrux_MOVHPS[] = {\r |
| 2013 | {I_MOVHPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x16\110", IF_KATMAI|IF_SSE},\r |
| 2014 | {I_MOVHPS, 2, {MEMORY,XMMREG,0}, "\300\2\x0F\x17\101", IF_KATMAI|IF_SSE},\r |
| 2015 | ITEMPLATE_END\r |
| 2016 | };\r |
| 2017 | \r |
| 2018 | static struct itemplate instrux_MOVLHPS[] = {\r |
| 2019 | {I_MOVLHPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x16\110", IF_KATMAI|IF_SSE},\r |
| 2020 | ITEMPLATE_END\r |
| 2021 | };\r |
| 2022 | \r |
| 2023 | static struct itemplate instrux_MOVLPD[] = {\r |
| 2024 | {I_MOVLPD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x13\101", IF_WILLAMETTE|IF_SSE2},\r |
| 2025 | {I_MOVLPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x12\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2026 | ITEMPLATE_END\r |
| 2027 | };\r |
| 2028 | \r |
| 2029 | static struct itemplate instrux_MOVLPS[] = {\r |
| 2030 | {I_MOVLPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x12\110", IF_KATMAI|IF_SSE},\r |
| 2031 | {I_MOVLPS, 2, {MEMORY,XMMREG,0}, "\300\2\x0F\x13\101", IF_KATMAI|IF_SSE},\r |
| 2032 | ITEMPLATE_END\r |
| 2033 | };\r |
| 2034 | \r |
| 2035 | static struct itemplate instrux_MOVMSKPD[] = {\r |
| 2036 | {I_MOVMSKPD, 2, {REG32,XMMREG,0}, "\3\x66\x0F\x50\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2037 | ITEMPLATE_END\r |
| 2038 | };\r |
| 2039 | \r |
| 2040 | static struct itemplate instrux_MOVMSKPS[] = {\r |
| 2041 | {I_MOVMSKPS, 2, {REG32,XMMREG,0}, "\2\x0F\x50\110", IF_KATMAI|IF_SSE},\r |
| 2042 | ITEMPLATE_END\r |
| 2043 | };\r |
| 2044 | \r |
| 2045 | static struct itemplate instrux_MOVNTDQ[] = {\r |
| 2046 | {I_MOVNTDQ, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\xE7\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2047 | ITEMPLATE_END\r |
| 2048 | };\r |
| 2049 | \r |
| 2050 | static struct itemplate instrux_MOVNTI[] = {\r |
| 2051 | {I_MOVNTI, 2, {MEMORY,REG32,0}, "\300\2\x0F\xC3\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2052 | ITEMPLATE_END\r |
| 2053 | };\r |
| 2054 | \r |
| 2055 | static struct itemplate instrux_MOVNTPD[] = {\r |
| 2056 | {I_MOVNTPD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x2B\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2057 | ITEMPLATE_END\r |
| 2058 | };\r |
| 2059 | \r |
| 2060 | static struct itemplate instrux_MOVNTPS[] = {\r |
| 2061 | {I_MOVNTPS, 2, {MEMORY,XMMREG,0}, "\300\2\x0F\x2B\101", IF_KATMAI|IF_SSE},\r |
| 2062 | ITEMPLATE_END\r |
| 2063 | };\r |
| 2064 | \r |
| 2065 | static struct itemplate instrux_MOVNTQ[] = {\r |
| 2066 | {I_MOVNTQ, 2, {MEMORY,MMXREG,0}, "\300\2\x0F\xE7\101", IF_KATMAI|IF_MMX|IF_SM},\r |
| 2067 | ITEMPLATE_END\r |
| 2068 | };\r |
| 2069 | \r |
| 2070 | static struct itemplate instrux_MOVQ[] = {\r |
| 2071 | {I_MOVQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x6F\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2072 | {I_MOVQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x6F\110", IF_PENT|IF_MMX},\r |
| 2073 | {I_MOVQ, 2, {MEMORY,MMXREG,0}, "\300\2\x0F\x7F\101", IF_PENT|IF_MMX|IF_SM},\r |
| 2074 | {I_MOVQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x7F\101", IF_PENT|IF_MMX},\r |
| 2075 | {I_MOVQ, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x7E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2076 | {I_MOVQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD6\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2077 | {I_MOVQ, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\xD6\101", IF_WILLAMETTE|IF_SSE2},\r |
| 2078 | {I_MOVQ, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x7E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2079 | ITEMPLATE_END\r |
| 2080 | };\r |
| 2081 | \r |
| 2082 | static struct itemplate instrux_MOVQ2DQ[] = {\r |
| 2083 | {I_MOVQ2DQ, 2, {XMMREG,MMXREG,0}, "\333\2\x0F\xD6\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2084 | ITEMPLATE_END\r |
| 2085 | };\r |
| 2086 | \r |
| 2087 | static struct itemplate instrux_MOVSB[] = {\r |
| 2088 | {I_MOVSB, 0, {0,0,0}, "\1\xA4", IF_8086},\r |
| 2089 | ITEMPLATE_END\r |
| 2090 | };\r |
| 2091 | \r |
| 2092 | static struct itemplate instrux_MOVSD[] = {\r |
| 2093 | {I_MOVSD, 0, {0,0,0}, "\321\1\xA5", IF_386},\r |
| 2094 | {I_MOVSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x10\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2095 | {I_MOVSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x11\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2096 | {I_MOVSD, 2, {MEMORY,XMMREG,0}, "\300\3\xF2\x0F\x11\101", IF_WILLAMETTE|IF_SSE2},\r |
| 2097 | {I_MOVSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x10\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2098 | ITEMPLATE_END\r |
| 2099 | };\r |
| 2100 | \r |
| 2101 | static struct itemplate instrux_MOVSHDUP[] = {\r |
| 2102 | {I_MOVSHDUP, 2, {XMMREG,MEMORY,0}, "\301\3\xF3\x0F\x16\110", IF_PRESCOTT|IF_SSE3},\r |
| 2103 | {I_MOVSHDUP, 2, {XMMREG,XMMREG,0}, "\3\xF3\x0F\x16\110", IF_PRESCOTT|IF_SSE3},\r |
| 2104 | ITEMPLATE_END\r |
| 2105 | };\r |
| 2106 | \r |
| 2107 | static struct itemplate instrux_MOVSLDUP[] = {\r |
| 2108 | {I_MOVSLDUP, 2, {XMMREG,MEMORY,0}, "\301\3\xF3\x0F\x12\110", IF_PRESCOTT|IF_SSE3},\r |
| 2109 | {I_MOVSLDUP, 2, {XMMREG,XMMREG,0}, "\3\xF3\x0F\x12\110", IF_PRESCOTT|IF_SSE3},\r |
| 2110 | ITEMPLATE_END\r |
| 2111 | };\r |
| 2112 | \r |
| 2113 | static struct itemplate instrux_MOVSS[] = {\r |
| 2114 | {I_MOVSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x10\110", IF_KATMAI|IF_SSE},\r |
| 2115 | {I_MOVSS, 2, {MEMORY,XMMREG,0}, "\300\333\2\x0F\x11\101", IF_KATMAI|IF_SSE},\r |
| 2116 | {I_MOVSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x10\110", IF_KATMAI|IF_SSE},\r |
| 2117 | {I_MOVSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x11\101", IF_KATMAI|IF_SSE},\r |
| 2118 | ITEMPLATE_END\r |
| 2119 | };\r |
| 2120 | \r |
| 2121 | static struct itemplate instrux_MOVSW[] = {\r |
| 2122 | {I_MOVSW, 0, {0,0,0}, "\320\1\xA5", IF_8086},\r |
| 2123 | ITEMPLATE_END\r |
| 2124 | };\r |
| 2125 | \r |
| 2126 | static struct itemplate instrux_MOVSX[] = {\r |
| 2127 | {I_MOVSX, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xBE\110", IF_386|IF_SB},\r |
| 2128 | {I_MOVSX, 2, {REG16,REG8,0}, "\320\2\x0F\xBE\110", IF_386},\r |
| 2129 | {I_MOVSX, 2, {REG32,REGMEM|BITS8,0}, "\321\301\2\x0F\xBE\110", IF_386},\r |
| 2130 | {I_MOVSX, 2, {REG32,REGMEM|BITS16,0}, "\321\301\2\x0F\xBF\110", IF_386},\r |
| 2131 | ITEMPLATE_END\r |
| 2132 | };\r |
| 2133 | \r |
| 2134 | static struct itemplate instrux_MOVUPD[] = {\r |
| 2135 | {I_MOVUPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x10\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2136 | {I_MOVUPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x11\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2137 | {I_MOVUPD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x11\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2138 | {I_MOVUPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x10\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2139 | ITEMPLATE_END\r |
| 2140 | };\r |
| 2141 | \r |
| 2142 | static struct itemplate instrux_MOVUPS[] = {\r |
| 2143 | {I_MOVUPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x10\110", IF_KATMAI|IF_SSE},\r |
| 2144 | {I_MOVUPS, 2, {MEMORY,XMMREG,0}, "\300\331\2\x0F\x11\101", IF_KATMAI|IF_SSE},\r |
| 2145 | {I_MOVUPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x10\110", IF_KATMAI|IF_SSE},\r |
| 2146 | {I_MOVUPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x11\101", IF_KATMAI|IF_SSE},\r |
| 2147 | ITEMPLATE_END\r |
| 2148 | };\r |
| 2149 | \r |
| 2150 | static struct itemplate instrux_MOVZX[] = {\r |
| 2151 | {I_MOVZX, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xB6\110", IF_386|IF_SB},\r |
| 2152 | {I_MOVZX, 2, {REG16,REG8,0}, "\320\2\x0F\xB6\110", IF_386},\r |
| 2153 | {I_MOVZX, 2, {REG32,REGMEM|BITS8,0}, "\321\301\2\x0F\xB6\110", IF_386},\r |
| 2154 | {I_MOVZX, 2, {REG32,REGMEM|BITS16,0}, "\321\301\2\x0F\xB7\110", IF_386},\r |
| 2155 | ITEMPLATE_END\r |
| 2156 | };\r |
| 2157 | \r |
| 2158 | static struct itemplate instrux_MUL[] = {\r |
| 2159 | {I_MUL, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\204", IF_8086},\r |
| 2160 | {I_MUL, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\204", IF_8086},\r |
| 2161 | {I_MUL, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\204", IF_386},\r |
| 2162 | ITEMPLATE_END\r |
| 2163 | };\r |
| 2164 | \r |
| 2165 | static struct itemplate instrux_MULPD[] = {\r |
| 2166 | {I_MULPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x59\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2167 | {I_MULPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x59\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2168 | ITEMPLATE_END\r |
| 2169 | };\r |
| 2170 | \r |
| 2171 | static struct itemplate instrux_MULPS[] = {\r |
| 2172 | {I_MULPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x59\110", IF_KATMAI|IF_SSE},\r |
| 2173 | {I_MULPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x59\110", IF_KATMAI|IF_SSE},\r |
| 2174 | ITEMPLATE_END\r |
| 2175 | };\r |
| 2176 | \r |
| 2177 | static struct itemplate instrux_MULSD[] = {\r |
| 2178 | {I_MULSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x59\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2179 | {I_MULSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x59\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2180 | ITEMPLATE_END\r |
| 2181 | };\r |
| 2182 | \r |
| 2183 | static struct itemplate instrux_MULSS[] = {\r |
| 2184 | {I_MULSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x59\110", IF_KATMAI|IF_SSE},\r |
| 2185 | {I_MULSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x59\110", IF_KATMAI|IF_SSE},\r |
| 2186 | ITEMPLATE_END\r |
| 2187 | };\r |
| 2188 | \r |
| 2189 | static struct itemplate instrux_MWAIT[] = {\r |
| 2190 | {I_MWAIT, 0, {0,0,0}, "\3\x0F\x01\xC9", IF_PRESCOTT},\r |
| 2191 | {I_MWAIT, 2, {REG_EAX,REG_ECX,0}, "\3\x0F\x01\xC9", IF_PRESCOTT},\r |
| 2192 | ITEMPLATE_END\r |
| 2193 | };\r |
| 2194 | \r |
| 2195 | static struct itemplate instrux_NEG[] = {\r |
| 2196 | {I_NEG, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\203", IF_8086},\r |
| 2197 | {I_NEG, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\203", IF_8086},\r |
| 2198 | {I_NEG, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\203", IF_386},\r |
| 2199 | ITEMPLATE_END\r |
| 2200 | };\r |
| 2201 | \r |
| 2202 | static struct itemplate instrux_NOP[] = {\r |
| 2203 | {I_NOP, 0, {0,0,0}, "\1\x90", IF_8086},\r |
| 2204 | ITEMPLATE_END\r |
| 2205 | };\r |
| 2206 | \r |
| 2207 | static struct itemplate instrux_NOT[] = {\r |
| 2208 | {I_NOT, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\202", IF_8086},\r |
| 2209 | {I_NOT, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\202", IF_8086},\r |
| 2210 | {I_NOT, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\202", IF_386},\r |
| 2211 | ITEMPLATE_END\r |
| 2212 | };\r |
| 2213 | \r |
| 2214 | static struct itemplate instrux_OR[] = {\r |
| 2215 | {I_OR, 2, {MEMORY,REG8,0}, "\300\1\x08\101", IF_8086|IF_SM},\r |
| 2216 | {I_OR, 2, {REG8,REG8,0}, "\1\x08\101", IF_8086},\r |
| 2217 | {I_OR, 2, {MEMORY,REG16,0}, "\320\300\1\x09\101", IF_8086|IF_SM},\r |
| 2218 | {I_OR, 2, {REG16,REG16,0}, "\320\1\x09\101", IF_8086},\r |
| 2219 | {I_OR, 2, {MEMORY,REG32,0}, "\321\300\1\x09\101", IF_386|IF_SM},\r |
| 2220 | {I_OR, 2, {REG32,REG32,0}, "\321\1\x09\101", IF_386},\r |
| 2221 | {I_OR, 2, {REG8,MEMORY,0}, "\301\1\x0A\110", IF_8086|IF_SM},\r |
| 2222 | {I_OR, 2, {REG8,REG8,0}, "\1\x0A\110", IF_8086},\r |
| 2223 | {I_OR, 2, {REG16,MEMORY,0}, "\320\301\1\x0B\110", IF_8086|IF_SM},\r |
| 2224 | {I_OR, 2, {REG16,REG16,0}, "\320\1\x0B\110", IF_8086},\r |
| 2225 | {I_OR, 2, {REG32,MEMORY,0}, "\321\301\1\x0B\110", IF_386|IF_SM},\r |
| 2226 | {I_OR, 2, {REG32,REG32,0}, "\321\1\x0B\110", IF_386},\r |
| 2227 | {I_OR, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\201\15", IF_8086},\r |
| 2228 | {I_OR, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\201\15", IF_386},\r |
| 2229 | {I_OR, 2, {REG_AL,IMMEDIATE,0}, "\1\x0C\21", IF_8086|IF_SM},\r |
| 2230 | {I_OR, 2, {REG_AX,SBYTE,0}, "\320\1\x83\201\15", IF_8086|IF_SM},\r |
| 2231 | {I_OR, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x0D\31", IF_8086|IF_SM},\r |
| 2232 | {I_OR, 2, {REG_EAX,SBYTE,0}, "\321\1\x83\201\15", IF_386|IF_SM},\r |
| 2233 | {I_OR, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x0D\41", IF_386|IF_SM},\r |
| 2234 | {I_OR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\201\21", IF_8086|IF_SM},\r |
| 2235 | {I_OR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\201\131", IF_8086|IF_SM},\r |
| 2236 | {I_OR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\201\141", IF_386|IF_SM},\r |
| 2237 | {I_OR, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\201\21", IF_8086|IF_SM},\r |
| 2238 | {I_OR, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\201\131", IF_8086|IF_SM},\r |
| 2239 | {I_OR, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\201\141", IF_386|IF_SM},\r |
| 2240 | ITEMPLATE_END\r |
| 2241 | };\r |
| 2242 | \r |
| 2243 | static struct itemplate instrux_ORPD[] = {\r |
| 2244 | {I_ORPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x56\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2245 | {I_ORPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x56\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2246 | ITEMPLATE_END\r |
| 2247 | };\r |
| 2248 | \r |
| 2249 | static struct itemplate instrux_ORPS[] = {\r |
| 2250 | {I_ORPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x56\110", IF_KATMAI|IF_SSE},\r |
| 2251 | {I_ORPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x56\110", IF_KATMAI|IF_SSE},\r |
| 2252 | ITEMPLATE_END\r |
| 2253 | };\r |
| 2254 | \r |
| 2255 | static struct itemplate instrux_OUT[] = {\r |
| 2256 | {I_OUT, 2, {IMMEDIATE,REG_AL,0}, "\1\xE6\24", IF_8086|IF_SB},\r |
| 2257 | {I_OUT, 2, {IMMEDIATE,REG_AX,0}, "\320\1\xE7\24", IF_8086|IF_SB},\r |
| 2258 | {I_OUT, 2, {IMMEDIATE,REG_EAX,0}, "\321\1\xE7\24", IF_386|IF_SB},\r |
| 2259 | {I_OUT, 2, {REG_DX,REG_AL,0}, "\1\xEE", IF_8086},\r |
| 2260 | {I_OUT, 2, {REG_DX,REG_AX,0}, "\320\1\xEF", IF_8086},\r |
| 2261 | {I_OUT, 2, {REG_DX,REG_EAX,0}, "\321\1\xEF", IF_386},\r |
| 2262 | ITEMPLATE_END\r |
| 2263 | };\r |
| 2264 | \r |
| 2265 | static struct itemplate instrux_OUTSB[] = {\r |
| 2266 | {I_OUTSB, 0, {0,0,0}, "\1\x6E", IF_186},\r |
| 2267 | ITEMPLATE_END\r |
| 2268 | };\r |
| 2269 | \r |
| 2270 | static struct itemplate instrux_OUTSD[] = {\r |
| 2271 | {I_OUTSD, 0, {0,0,0}, "\321\1\x6F", IF_386},\r |
| 2272 | ITEMPLATE_END\r |
| 2273 | };\r |
| 2274 | \r |
| 2275 | static struct itemplate instrux_OUTSW[] = {\r |
| 2276 | {I_OUTSW, 0, {0,0,0}, "\320\1\x6F", IF_186},\r |
| 2277 | ITEMPLATE_END\r |
| 2278 | };\r |
| 2279 | \r |
| 2280 | static struct itemplate instrux_PACKSSDW[] = {\r |
| 2281 | {I_PACKSSDW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x6B\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2282 | {I_PACKSSDW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x6B\110", IF_PENT|IF_MMX},\r |
| 2283 | {I_PACKSSDW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x6B\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2284 | {I_PACKSSDW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6B\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2285 | ITEMPLATE_END\r |
| 2286 | };\r |
| 2287 | \r |
| 2288 | static struct itemplate instrux_PACKSSWB[] = {\r |
| 2289 | {I_PACKSSWB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x63\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2290 | {I_PACKSSWB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x63\110", IF_PENT|IF_MMX},\r |
| 2291 | {I_PACKSSWB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x63\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2292 | {I_PACKSSWB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x63\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2293 | ITEMPLATE_END\r |
| 2294 | };\r |
| 2295 | \r |
| 2296 | static struct itemplate instrux_PACKUSWB[] = {\r |
| 2297 | {I_PACKUSWB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x67\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2298 | {I_PACKUSWB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x67\110", IF_PENT|IF_MMX},\r |
| 2299 | {I_PACKUSWB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x67\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2300 | {I_PACKUSWB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x67\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2301 | ITEMPLATE_END\r |
| 2302 | };\r |
| 2303 | \r |
| 2304 | static struct itemplate instrux_PADDB[] = {\r |
| 2305 | {I_PADDB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFC\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2306 | {I_PADDB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFC\110", IF_PENT|IF_MMX},\r |
| 2307 | {I_PADDB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xFC\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2308 | {I_PADDB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xFC\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2309 | ITEMPLATE_END\r |
| 2310 | };\r |
| 2311 | \r |
| 2312 | static struct itemplate instrux_PADDD[] = {\r |
| 2313 | {I_PADDD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFE\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2314 | {I_PADDD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFE\110", IF_PENT|IF_MMX},\r |
| 2315 | {I_PADDD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xFE\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2316 | {I_PADDD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xFE\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2317 | ITEMPLATE_END\r |
| 2318 | };\r |
| 2319 | \r |
| 2320 | static struct itemplate instrux_PADDQ[] = {\r |
| 2321 | {I_PADDQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD4\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2322 | {I_PADDQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD4\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2323 | {I_PADDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD4\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2324 | {I_PADDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD4\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2325 | ITEMPLATE_END\r |
| 2326 | };\r |
| 2327 | \r |
| 2328 | static struct itemplate instrux_PADDSB[] = {\r |
| 2329 | {I_PADDSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEC\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2330 | {I_PADDSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEC\110", IF_PENT|IF_MMX},\r |
| 2331 | {I_PADDSB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xEC\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2332 | {I_PADDSB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xEC\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2333 | ITEMPLATE_END\r |
| 2334 | };\r |
| 2335 | \r |
| 2336 | static struct itemplate instrux_PADDSIW[] = {\r |
| 2337 | {I_PADDSIW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x51\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 2338 | {I_PADDSIW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x51\110", IF_PENT|IF_MMX|IF_CYRIX},\r |
| 2339 | ITEMPLATE_END\r |
| 2340 | };\r |
| 2341 | \r |
| 2342 | static struct itemplate instrux_PADDSW[] = {\r |
| 2343 | {I_PADDSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xED\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2344 | {I_PADDSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xED\110", IF_PENT|IF_MMX},\r |
| 2345 | {I_PADDSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xED\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2346 | {I_PADDSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xED\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2347 | ITEMPLATE_END\r |
| 2348 | };\r |
| 2349 | \r |
| 2350 | static struct itemplate instrux_PADDUSB[] = {\r |
| 2351 | {I_PADDUSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDC\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2352 | {I_PADDUSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDC\110", IF_PENT|IF_MMX},\r |
| 2353 | {I_PADDUSB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDC\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2354 | {I_PADDUSB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDC\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2355 | ITEMPLATE_END\r |
| 2356 | };\r |
| 2357 | \r |
| 2358 | static struct itemplate instrux_PADDUSW[] = {\r |
| 2359 | {I_PADDUSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDD\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2360 | {I_PADDUSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDD\110", IF_PENT|IF_MMX},\r |
| 2361 | {I_PADDUSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDD\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2362 | {I_PADDUSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDD\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2363 | ITEMPLATE_END\r |
| 2364 | };\r |
| 2365 | \r |
| 2366 | static struct itemplate instrux_PADDW[] = {\r |
| 2367 | {I_PADDW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFD\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2368 | {I_PADDW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFD\110", IF_PENT|IF_MMX},\r |
| 2369 | {I_PADDW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xFD\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2370 | {I_PADDW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xFD\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2371 | ITEMPLATE_END\r |
| 2372 | };\r |
| 2373 | \r |
| 2374 | static struct itemplate instrux_PAND[] = {\r |
| 2375 | {I_PAND, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDB\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2376 | {I_PAND, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDB\110", IF_PENT|IF_MMX},\r |
| 2377 | {I_PAND, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDB\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2378 | {I_PAND, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDB\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2379 | ITEMPLATE_END\r |
| 2380 | };\r |
| 2381 | \r |
| 2382 | static struct itemplate instrux_PANDN[] = {\r |
| 2383 | {I_PANDN, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDF\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2384 | {I_PANDN, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDF\110", IF_PENT|IF_MMX},\r |
| 2385 | {I_PANDN, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDF\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2386 | {I_PANDN, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDF\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2387 | ITEMPLATE_END\r |
| 2388 | };\r |
| 2389 | \r |
| 2390 | static struct itemplate instrux_PAUSE[] = {\r |
| 2391 | {I_PAUSE, 0, {0,0,0}, "\333\1\x90", IF_WILLAMETTE|IF_SSE2},\r |
| 2392 | ITEMPLATE_END\r |
| 2393 | };\r |
| 2394 | \r |
| 2395 | static struct itemplate instrux_PAVEB[] = {\r |
| 2396 | {I_PAVEB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x50\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 2397 | {I_PAVEB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x50\110", IF_PENT|IF_MMX|IF_CYRIX},\r |
| 2398 | ITEMPLATE_END\r |
| 2399 | };\r |
| 2400 | \r |
| 2401 | static struct itemplate instrux_PAVGB[] = {\r |
| 2402 | {I_PAVGB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE0\110", IF_KATMAI|IF_MMX},\r |
| 2403 | {I_PAVGB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE0\110", IF_KATMAI|IF_MMX|IF_SM},\r |
| 2404 | {I_PAVGB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE0\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2405 | {I_PAVGB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE0\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2406 | ITEMPLATE_END\r |
| 2407 | };\r |
| 2408 | \r |
| 2409 | static struct itemplate instrux_PAVGUSB[] = {\r |
| 2410 | {I_PAVGUSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xBF", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2411 | {I_PAVGUSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xBF", IF_PENT|IF_3DNOW},\r |
| 2412 | ITEMPLATE_END\r |
| 2413 | };\r |
| 2414 | \r |
| 2415 | static struct itemplate instrux_PAVGW[] = {\r |
| 2416 | {I_PAVGW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE3\110", IF_KATMAI|IF_MMX},\r |
| 2417 | {I_PAVGW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE3\110", IF_KATMAI|IF_MMX|IF_SM},\r |
| 2418 | {I_PAVGW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE3\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2419 | {I_PAVGW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE3\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2420 | ITEMPLATE_END\r |
| 2421 | };\r |
| 2422 | \r |
| 2423 | static struct itemplate instrux_PCMPEQB[] = {\r |
| 2424 | {I_PCMPEQB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x74\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2425 | {I_PCMPEQB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x74\110", IF_PENT|IF_MMX},\r |
| 2426 | {I_PCMPEQB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x74\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2427 | {I_PCMPEQB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x74\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2428 | ITEMPLATE_END\r |
| 2429 | };\r |
| 2430 | \r |
| 2431 | static struct itemplate instrux_PCMPEQD[] = {\r |
| 2432 | {I_PCMPEQD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x76\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2433 | {I_PCMPEQD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x76\110", IF_PENT|IF_MMX},\r |
| 2434 | {I_PCMPEQD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x76\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2435 | {I_PCMPEQD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x76\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2436 | ITEMPLATE_END\r |
| 2437 | };\r |
| 2438 | \r |
| 2439 | static struct itemplate instrux_PCMPEQW[] = {\r |
| 2440 | {I_PCMPEQW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x75\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2441 | {I_PCMPEQW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x75\110", IF_PENT|IF_MMX},\r |
| 2442 | {I_PCMPEQW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x75\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2443 | {I_PCMPEQW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x75\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2444 | ITEMPLATE_END\r |
| 2445 | };\r |
| 2446 | \r |
| 2447 | static struct itemplate instrux_PCMPGTB[] = {\r |
| 2448 | {I_PCMPGTB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x64\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2449 | {I_PCMPGTB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x64\110", IF_PENT|IF_MMX},\r |
| 2450 | {I_PCMPGTB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x64\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2451 | {I_PCMPGTB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x64\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2452 | ITEMPLATE_END\r |
| 2453 | };\r |
| 2454 | \r |
| 2455 | static struct itemplate instrux_PCMPGTD[] = {\r |
| 2456 | {I_PCMPGTD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x66\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2457 | {I_PCMPGTD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x66\110", IF_PENT|IF_MMX},\r |
| 2458 | {I_PCMPGTD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x66\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2459 | {I_PCMPGTD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x66\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2460 | ITEMPLATE_END\r |
| 2461 | };\r |
| 2462 | \r |
| 2463 | static struct itemplate instrux_PCMPGTW[] = {\r |
| 2464 | {I_PCMPGTW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x65\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2465 | {I_PCMPGTW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x65\110", IF_PENT|IF_MMX},\r |
| 2466 | {I_PCMPGTW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x65\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2467 | {I_PCMPGTW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x65\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2468 | ITEMPLATE_END\r |
| 2469 | };\r |
| 2470 | \r |
| 2471 | static struct itemplate instrux_PDISTIB[] = {\r |
| 2472 | {I_PDISTIB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x54\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 2473 | ITEMPLATE_END\r |
| 2474 | };\r |
| 2475 | \r |
| 2476 | static struct itemplate instrux_PEXTRW[] = {\r |
| 2477 | {I_PEXTRW, 3, {REG32,MMXREG,IMMEDIATE}, "\2\x0F\xC5\110\26", IF_KATMAI|IF_MMX|IF_SB|IF_AR2},\r |
| 2478 | {I_PEXTRW, 3, {REG32,XMMREG,IMMEDIATE}, "\3\x66\x0F\xC5\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 2479 | ITEMPLATE_END\r |
| 2480 | };\r |
| 2481 | \r |
| 2482 | static struct itemplate instrux_PF2ID[] = {\r |
| 2483 | {I_PF2ID, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x1D", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2484 | {I_PF2ID, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x1D", IF_PENT|IF_3DNOW},\r |
| 2485 | ITEMPLATE_END\r |
| 2486 | };\r |
| 2487 | \r |
| 2488 | static struct itemplate instrux_PF2IW[] = {\r |
| 2489 | {I_PF2IW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x1C", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2490 | {I_PF2IW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x1C", IF_PENT|IF_3DNOW},\r |
| 2491 | ITEMPLATE_END\r |
| 2492 | };\r |
| 2493 | \r |
| 2494 | static struct itemplate instrux_PFACC[] = {\r |
| 2495 | {I_PFACC, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xAE", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2496 | {I_PFACC, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xAE", IF_PENT|IF_3DNOW},\r |
| 2497 | ITEMPLATE_END\r |
| 2498 | };\r |
| 2499 | \r |
| 2500 | static struct itemplate instrux_PFADD[] = {\r |
| 2501 | {I_PFADD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x9E", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2502 | {I_PFADD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x9E", IF_PENT|IF_3DNOW},\r |
| 2503 | ITEMPLATE_END\r |
| 2504 | };\r |
| 2505 | \r |
| 2506 | static struct itemplate instrux_PFCMPEQ[] = {\r |
| 2507 | {I_PFCMPEQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xB0", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2508 | {I_PFCMPEQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xB0", IF_PENT|IF_3DNOW},\r |
| 2509 | ITEMPLATE_END\r |
| 2510 | };\r |
| 2511 | \r |
| 2512 | static struct itemplate instrux_PFCMPGE[] = {\r |
| 2513 | {I_PFCMPGE, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x90", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2514 | {I_PFCMPGE, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x90", IF_PENT|IF_3DNOW},\r |
| 2515 | ITEMPLATE_END\r |
| 2516 | };\r |
| 2517 | \r |
| 2518 | static struct itemplate instrux_PFCMPGT[] = {\r |
| 2519 | {I_PFCMPGT, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xA0", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2520 | {I_PFCMPGT, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xA0", IF_PENT|IF_3DNOW},\r |
| 2521 | ITEMPLATE_END\r |
| 2522 | };\r |
| 2523 | \r |
| 2524 | static struct itemplate instrux_PFMAX[] = {\r |
| 2525 | {I_PFMAX, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xA4", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2526 | {I_PFMAX, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xA4", IF_PENT|IF_3DNOW},\r |
| 2527 | ITEMPLATE_END\r |
| 2528 | };\r |
| 2529 | \r |
| 2530 | static struct itemplate instrux_PFMIN[] = {\r |
| 2531 | {I_PFMIN, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x94", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2532 | {I_PFMIN, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x94", IF_PENT|IF_3DNOW},\r |
| 2533 | ITEMPLATE_END\r |
| 2534 | };\r |
| 2535 | \r |
| 2536 | static struct itemplate instrux_PFMUL[] = {\r |
| 2537 | {I_PFMUL, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xB4", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2538 | {I_PFMUL, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xB4", IF_PENT|IF_3DNOW},\r |
| 2539 | ITEMPLATE_END\r |
| 2540 | };\r |
| 2541 | \r |
| 2542 | static struct itemplate instrux_PFNACC[] = {\r |
| 2543 | {I_PFNACC, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x8A", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2544 | {I_PFNACC, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x8A", IF_PENT|IF_3DNOW},\r |
| 2545 | ITEMPLATE_END\r |
| 2546 | };\r |
| 2547 | \r |
| 2548 | static struct itemplate instrux_PFPNACC[] = {\r |
| 2549 | {I_PFPNACC, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x8E", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2550 | {I_PFPNACC, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x8E", IF_PENT|IF_3DNOW},\r |
| 2551 | ITEMPLATE_END\r |
| 2552 | };\r |
| 2553 | \r |
| 2554 | static struct itemplate instrux_PFRCP[] = {\r |
| 2555 | {I_PFRCP, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x96", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2556 | {I_PFRCP, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x96", IF_PENT|IF_3DNOW},\r |
| 2557 | ITEMPLATE_END\r |
| 2558 | };\r |
| 2559 | \r |
| 2560 | static struct itemplate instrux_PFRCPIT1[] = {\r |
| 2561 | {I_PFRCPIT1, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xA6", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2562 | {I_PFRCPIT1, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xA6", IF_PENT|IF_3DNOW},\r |
| 2563 | ITEMPLATE_END\r |
| 2564 | };\r |
| 2565 | \r |
| 2566 | static struct itemplate instrux_PFRCPIT2[] = {\r |
| 2567 | {I_PFRCPIT2, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xB6", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2568 | {I_PFRCPIT2, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xB6", IF_PENT|IF_3DNOW},\r |
| 2569 | ITEMPLATE_END\r |
| 2570 | };\r |
| 2571 | \r |
| 2572 | static struct itemplate instrux_PFRSQIT1[] = {\r |
| 2573 | {I_PFRSQIT1, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xA7", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2574 | {I_PFRSQIT1, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xA7", IF_PENT|IF_3DNOW},\r |
| 2575 | ITEMPLATE_END\r |
| 2576 | };\r |
| 2577 | \r |
| 2578 | static struct itemplate instrux_PFRSQRT[] = {\r |
| 2579 | {I_PFRSQRT, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x97", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2580 | {I_PFRSQRT, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x97", IF_PENT|IF_3DNOW},\r |
| 2581 | ITEMPLATE_END\r |
| 2582 | };\r |
| 2583 | \r |
| 2584 | static struct itemplate instrux_PFSUB[] = {\r |
| 2585 | {I_PFSUB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x9A", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2586 | {I_PFSUB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x9A", IF_PENT|IF_3DNOW},\r |
| 2587 | ITEMPLATE_END\r |
| 2588 | };\r |
| 2589 | \r |
| 2590 | static struct itemplate instrux_PFSUBR[] = {\r |
| 2591 | {I_PFSUBR, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xAA", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2592 | {I_PFSUBR, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xAA", IF_PENT|IF_3DNOW},\r |
| 2593 | ITEMPLATE_END\r |
| 2594 | };\r |
| 2595 | \r |
| 2596 | static struct itemplate instrux_PI2FD[] = {\r |
| 2597 | {I_PI2FD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x0D", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2598 | {I_PI2FD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x0D", IF_PENT|IF_3DNOW},\r |
| 2599 | ITEMPLATE_END\r |
| 2600 | };\r |
| 2601 | \r |
| 2602 | static struct itemplate instrux_PI2FW[] = {\r |
| 2603 | {I_PI2FW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x0C", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2604 | {I_PI2FW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x0C", IF_PENT|IF_3DNOW},\r |
| 2605 | ITEMPLATE_END\r |
| 2606 | };\r |
| 2607 | \r |
| 2608 | static struct itemplate instrux_PINSRW[] = {\r |
| 2609 | {I_PINSRW, 3, {MMXREG,REG16,IMMEDIATE}, "\2\x0F\xC4\110\26", IF_KATMAI|IF_MMX|IF_SB|IF_AR2},\r |
| 2610 | {I_PINSRW, 3, {MMXREG,REG32,IMMEDIATE}, "\2\x0F\xC4\110\26", IF_KATMAI|IF_MMX|IF_SB|IF_AR2},\r |
| 2611 | {I_PINSRW, 3, {MMXREG,MEMORY,IMMEDIATE}, "\301\2\x0F\xC4\110\26", IF_KATMAI|IF_MMX|IF_SB|IF_AR2},\r |
| 2612 | {I_PINSRW, 3, {MMXREG,MEMORY|BITS16,IMMEDIATE}, "\301\2\x0F\xC4\110\26", IF_KATMAI|IF_MMX|IF_SB|IF_AR2},\r |
| 2613 | {I_PINSRW, 3, {XMMREG,REG16,IMMEDIATE}, "\3\x66\x0F\xC4\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 2614 | {I_PINSRW, 3, {XMMREG,REG32,IMMEDIATE}, "\3\x66\x0F\xC4\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 2615 | {I_PINSRW, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\3\x66\x0F\xC4\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 2616 | {I_PINSRW, 3, {XMMREG,MEMORY|BITS16,IMMEDIATE}, "\301\3\x66\x0F\xC4\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 2617 | ITEMPLATE_END\r |
| 2618 | };\r |
| 2619 | \r |
| 2620 | static struct itemplate instrux_PMACHRIW[] = {\r |
| 2621 | {I_PMACHRIW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5E\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 2622 | ITEMPLATE_END\r |
| 2623 | };\r |
| 2624 | \r |
| 2625 | static struct itemplate instrux_PMADDWD[] = {\r |
| 2626 | {I_PMADDWD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF5\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2627 | {I_PMADDWD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF5\110", IF_PENT|IF_MMX},\r |
| 2628 | {I_PMADDWD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF5\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2629 | {I_PMADDWD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF5\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2630 | ITEMPLATE_END\r |
| 2631 | };\r |
| 2632 | \r |
| 2633 | static struct itemplate instrux_PMAGW[] = {\r |
| 2634 | {I_PMAGW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x52\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 2635 | {I_PMAGW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x52\110", IF_PENT|IF_MMX|IF_CYRIX},\r |
| 2636 | ITEMPLATE_END\r |
| 2637 | };\r |
| 2638 | \r |
| 2639 | static struct itemplate instrux_PMAXSW[] = {\r |
| 2640 | {I_PMAXSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEE\110", IF_KATMAI|IF_MMX},\r |
| 2641 | {I_PMAXSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEE\110", IF_KATMAI|IF_MMX|IF_SM},\r |
| 2642 | {I_PMAXSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xEE\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2643 | {I_PMAXSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xEE\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2644 | ITEMPLATE_END\r |
| 2645 | };\r |
| 2646 | \r |
| 2647 | static struct itemplate instrux_PMAXUB[] = {\r |
| 2648 | {I_PMAXUB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDE\110", IF_KATMAI|IF_MMX},\r |
| 2649 | {I_PMAXUB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDE\110", IF_KATMAI|IF_MMX|IF_SM},\r |
| 2650 | {I_PMAXUB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDE\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2651 | {I_PMAXUB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDE\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2652 | ITEMPLATE_END\r |
| 2653 | };\r |
| 2654 | \r |
| 2655 | static struct itemplate instrux_PMINSW[] = {\r |
| 2656 | {I_PMINSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEA\110", IF_KATMAI|IF_MMX},\r |
| 2657 | {I_PMINSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEA\110", IF_KATMAI|IF_MMX|IF_SM},\r |
| 2658 | {I_PMINSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xEA\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2659 | {I_PMINSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xEA\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2660 | ITEMPLATE_END\r |
| 2661 | };\r |
| 2662 | \r |
| 2663 | static struct itemplate instrux_PMINUB[] = {\r |
| 2664 | {I_PMINUB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDA\110", IF_KATMAI|IF_MMX},\r |
| 2665 | {I_PMINUB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDA\110", IF_KATMAI|IF_MMX|IF_SM},\r |
| 2666 | {I_PMINUB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDA\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2667 | {I_PMINUB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDA\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2668 | ITEMPLATE_END\r |
| 2669 | };\r |
| 2670 | \r |
| 2671 | static struct itemplate instrux_PMOVMSKB[] = {\r |
| 2672 | {I_PMOVMSKB, 2, {REG32,MMXREG,0}, "\2\x0F\xD7\110", IF_KATMAI|IF_MMX},\r |
| 2673 | {I_PMOVMSKB, 2, {REG32,XMMREG,0}, "\3\x66\x0F\xD7\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2674 | ITEMPLATE_END\r |
| 2675 | };\r |
| 2676 | \r |
| 2677 | static struct itemplate instrux_PMULHRIW[] = {\r |
| 2678 | {I_PMULHRIW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5D\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 2679 | {I_PMULHRIW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x5D\110", IF_PENT|IF_MMX|IF_CYRIX},\r |
| 2680 | ITEMPLATE_END\r |
| 2681 | };\r |
| 2682 | \r |
| 2683 | static struct itemplate instrux_PMULHRWA[] = {\r |
| 2684 | {I_PMULHRWA, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\1\xB7", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2685 | {I_PMULHRWA, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\1\xB7", IF_PENT|IF_3DNOW},\r |
| 2686 | ITEMPLATE_END\r |
| 2687 | };\r |
| 2688 | \r |
| 2689 | static struct itemplate instrux_PMULHRWC[] = {\r |
| 2690 | {I_PMULHRWC, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x59\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 2691 | {I_PMULHRWC, 2, {MMXREG,MMXREG,0}, "\2\x0F\x59\110", IF_PENT|IF_MMX|IF_CYRIX},\r |
| 2692 | ITEMPLATE_END\r |
| 2693 | };\r |
| 2694 | \r |
| 2695 | static struct itemplate instrux_PMULHUW[] = {\r |
| 2696 | {I_PMULHUW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE4\110", IF_KATMAI|IF_MMX},\r |
| 2697 | {I_PMULHUW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE4\110", IF_KATMAI|IF_MMX|IF_SM},\r |
| 2698 | {I_PMULHUW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE4\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2699 | {I_PMULHUW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE4\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2700 | ITEMPLATE_END\r |
| 2701 | };\r |
| 2702 | \r |
| 2703 | static struct itemplate instrux_PMULHW[] = {\r |
| 2704 | {I_PMULHW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE5\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2705 | {I_PMULHW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE5\110", IF_PENT|IF_MMX},\r |
| 2706 | {I_PMULHW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE5\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2707 | {I_PMULHW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE5\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2708 | ITEMPLATE_END\r |
| 2709 | };\r |
| 2710 | \r |
| 2711 | static struct itemplate instrux_PMULLW[] = {\r |
| 2712 | {I_PMULLW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD5\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2713 | {I_PMULLW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD5\110", IF_PENT|IF_MMX},\r |
| 2714 | {I_PMULLW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD5\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2715 | {I_PMULLW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD5\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2716 | ITEMPLATE_END\r |
| 2717 | };\r |
| 2718 | \r |
| 2719 | static struct itemplate instrux_PMULUDQ[] = {\r |
| 2720 | {I_PMULUDQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF4\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2721 | {I_PMULUDQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF4\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2722 | {I_PMULUDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF4\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2723 | {I_PMULUDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF4\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2724 | ITEMPLATE_END\r |
| 2725 | };\r |
| 2726 | \r |
| 2727 | static struct itemplate instrux_PMVGEZB[] = {\r |
| 2728 | {I_PMVGEZB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5C\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 2729 | ITEMPLATE_END\r |
| 2730 | };\r |
| 2731 | \r |
| 2732 | static struct itemplate instrux_PMVLZB[] = {\r |
| 2733 | {I_PMVLZB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5B\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 2734 | ITEMPLATE_END\r |
| 2735 | };\r |
| 2736 | \r |
| 2737 | static struct itemplate instrux_PMVNZB[] = {\r |
| 2738 | {I_PMVNZB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5A\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 2739 | ITEMPLATE_END\r |
| 2740 | };\r |
| 2741 | \r |
| 2742 | static struct itemplate instrux_PMVZB[] = {\r |
| 2743 | {I_PMVZB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x58\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 2744 | ITEMPLATE_END\r |
| 2745 | };\r |
| 2746 | \r |
| 2747 | static struct itemplate instrux_POP[] = {\r |
| 2748 | {I_POP, 1, {REG16,0,0}, "\320\10\x58", IF_8086},\r |
| 2749 | {I_POP, 1, {REG32,0,0}, "\321\10\x58", IF_386},\r |
| 2750 | {I_POP, 1, {REGMEM|BITS16,0,0}, "\320\300\1\x8F\200", IF_8086},\r |
| 2751 | {I_POP, 1, {REGMEM|BITS32,0,0}, "\321\300\1\x8F\200", IF_386},\r |
| 2752 | {I_POP, 1, {REG_CS,0,0}, "\1\x0F", IF_8086|IF_UNDOC},\r |
| 2753 | {I_POP, 1, {REG_DESS,0,0}, "\4", IF_8086},\r |
| 2754 | {I_POP, 1, {REG_FSGS,0,0}, "\1\x0F\5", IF_386},\r |
| 2755 | ITEMPLATE_END\r |
| 2756 | };\r |
| 2757 | \r |
| 2758 | static struct itemplate instrux_POPA[] = {\r |
| 2759 | {I_POPA, 0, {0,0,0}, "\322\1\x61", IF_186},\r |
| 2760 | ITEMPLATE_END\r |
| 2761 | };\r |
| 2762 | \r |
| 2763 | static struct itemplate instrux_POPAD[] = {\r |
| 2764 | {I_POPAD, 0, {0,0,0}, "\321\1\x61", IF_386},\r |
| 2765 | ITEMPLATE_END\r |
| 2766 | };\r |
| 2767 | \r |
| 2768 | static struct itemplate instrux_POPAW[] = {\r |
| 2769 | {I_POPAW, 0, {0,0,0}, "\320\1\x61", IF_186},\r |
| 2770 | ITEMPLATE_END\r |
| 2771 | };\r |
| 2772 | \r |
| 2773 | static struct itemplate instrux_POPF[] = {\r |
| 2774 | {I_POPF, 0, {0,0,0}, "\322\1\x9D", IF_8086},\r |
| 2775 | ITEMPLATE_END\r |
| 2776 | };\r |
| 2777 | \r |
| 2778 | static struct itemplate instrux_POPFD[] = {\r |
| 2779 | {I_POPFD, 0, {0,0,0}, "\321\1\x9D", IF_386},\r |
| 2780 | ITEMPLATE_END\r |
| 2781 | };\r |
| 2782 | \r |
| 2783 | static struct itemplate instrux_POPFW[] = {\r |
| 2784 | {I_POPFW, 0, {0,0,0}, "\320\1\x9D", IF_8086},\r |
| 2785 | ITEMPLATE_END\r |
| 2786 | };\r |
| 2787 | \r |
| 2788 | static struct itemplate instrux_POR[] = {\r |
| 2789 | {I_POR, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEB\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2790 | {I_POR, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEB\110", IF_PENT|IF_MMX},\r |
| 2791 | {I_POR, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xEB\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2792 | {I_POR, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xEB\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2793 | ITEMPLATE_END\r |
| 2794 | };\r |
| 2795 | \r |
| 2796 | static struct itemplate instrux_PREFETCH[] = {\r |
| 2797 | {I_PREFETCH, 1, {MEMORY,0,0}, "\2\x0F\x0D\200", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2798 | ITEMPLATE_END\r |
| 2799 | };\r |
| 2800 | \r |
| 2801 | static struct itemplate instrux_PREFETCHNTA[] = {\r |
| 2802 | {I_PREFETCHNTA, 1, {MEMORY,0,0}, "\300\2\x0F\x18\200", IF_KATMAI},\r |
| 2803 | ITEMPLATE_END\r |
| 2804 | };\r |
| 2805 | \r |
| 2806 | static struct itemplate instrux_PREFETCHT0[] = {\r |
| 2807 | {I_PREFETCHT0, 1, {MEMORY,0,0}, "\300\2\x0F\x18\201", IF_KATMAI},\r |
| 2808 | ITEMPLATE_END\r |
| 2809 | };\r |
| 2810 | \r |
| 2811 | static struct itemplate instrux_PREFETCHT1[] = {\r |
| 2812 | {I_PREFETCHT1, 1, {MEMORY,0,0}, "\300\2\x0F\x18\202", IF_KATMAI},\r |
| 2813 | ITEMPLATE_END\r |
| 2814 | };\r |
| 2815 | \r |
| 2816 | static struct itemplate instrux_PREFETCHT2[] = {\r |
| 2817 | {I_PREFETCHT2, 1, {MEMORY,0,0}, "\300\2\x0F\x18\203", IF_KATMAI},\r |
| 2818 | ITEMPLATE_END\r |
| 2819 | };\r |
| 2820 | \r |
| 2821 | static struct itemplate instrux_PREFETCHW[] = {\r |
| 2822 | {I_PREFETCHW, 1, {MEMORY,0,0}, "\2\x0F\x0D\201", IF_PENT|IF_3DNOW|IF_SM},\r |
| 2823 | ITEMPLATE_END\r |
| 2824 | };\r |
| 2825 | \r |
| 2826 | static struct itemplate instrux_PSADBW[] = {\r |
| 2827 | {I_PSADBW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF6\110", IF_KATMAI|IF_MMX},\r |
| 2828 | {I_PSADBW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF6\110", IF_KATMAI|IF_MMX|IF_SM},\r |
| 2829 | {I_PSADBW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF6\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2830 | {I_PSADBW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF6\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2831 | ITEMPLATE_END\r |
| 2832 | };\r |
| 2833 | \r |
| 2834 | static struct itemplate instrux_PSHUFD[] = {\r |
| 2835 | {I_PSHUFD, 3, {XMMREG,XMMREG,IMMEDIATE}, "\3\x66\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 2836 | {I_PSHUFD, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\3\x66\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},\r |
| 2837 | ITEMPLATE_END\r |
| 2838 | };\r |
| 2839 | \r |
| 2840 | static struct itemplate instrux_PSHUFHW[] = {\r |
| 2841 | {I_PSHUFHW, 3, {XMMREG,XMMREG,IMMEDIATE}, "\333\2\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 2842 | {I_PSHUFHW, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\333\2\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},\r |
| 2843 | ITEMPLATE_END\r |
| 2844 | };\r |
| 2845 | \r |
| 2846 | static struct itemplate instrux_PSHUFLW[] = {\r |
| 2847 | {I_PSHUFLW, 3, {XMMREG,XMMREG,IMMEDIATE}, "\3\xF2\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 2848 | {I_PSHUFLW, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\3\xF2\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},\r |
| 2849 | ITEMPLATE_END\r |
| 2850 | };\r |
| 2851 | \r |
| 2852 | static struct itemplate instrux_PSHUFW[] = {\r |
| 2853 | {I_PSHUFW, 3, {MMXREG,MMXREG,IMMEDIATE}, "\2\x0F\x70\110\22", IF_KATMAI|IF_MMX|IF_SB|IF_AR2},\r |
| 2854 | {I_PSHUFW, 3, {MMXREG,MEMORY,IMMEDIATE}, "\301\2\x0F\x70\110\22", IF_KATMAI|IF_MMX|IF_SM2|IF_SB|IF_AR2},\r |
| 2855 | ITEMPLATE_END\r |
| 2856 | };\r |
| 2857 | \r |
| 2858 | static struct itemplate instrux_PSLLD[] = {\r |
| 2859 | {I_PSLLD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF2\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2860 | {I_PSLLD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF2\110", IF_PENT|IF_MMX},\r |
| 2861 | {I_PSLLD, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x72\206\25", IF_PENT|IF_MMX},\r |
| 2862 | {I_PSLLD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF2\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2863 | {I_PSLLD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF2\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2864 | {I_PSLLD, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x72\206\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 2865 | ITEMPLATE_END\r |
| 2866 | };\r |
| 2867 | \r |
| 2868 | static struct itemplate instrux_PSLLDQ[] = {\r |
| 2869 | {I_PSLLDQ, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x73\207\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 2870 | ITEMPLATE_END\r |
| 2871 | };\r |
| 2872 | \r |
| 2873 | static struct itemplate instrux_PSLLQ[] = {\r |
| 2874 | {I_PSLLQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF3\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2875 | {I_PSLLQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF3\110", IF_PENT|IF_MMX},\r |
| 2876 | {I_PSLLQ, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x73\206\25", IF_PENT|IF_MMX},\r |
| 2877 | {I_PSLLQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF3\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2878 | {I_PSLLQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF3\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2879 | {I_PSLLQ, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x73\206\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 2880 | ITEMPLATE_END\r |
| 2881 | };\r |
| 2882 | \r |
| 2883 | static struct itemplate instrux_PSLLW[] = {\r |
| 2884 | {I_PSLLW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF1\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2885 | {I_PSLLW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF1\110", IF_PENT|IF_MMX},\r |
| 2886 | {I_PSLLW, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x71\206\25", IF_PENT|IF_MMX},\r |
| 2887 | {I_PSLLW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF1\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2888 | {I_PSLLW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF1\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2889 | {I_PSLLW, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x71\206\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 2890 | ITEMPLATE_END\r |
| 2891 | };\r |
| 2892 | \r |
| 2893 | static struct itemplate instrux_PSRAD[] = {\r |
| 2894 | {I_PSRAD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE2\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2895 | {I_PSRAD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE2\110", IF_PENT|IF_MMX},\r |
| 2896 | {I_PSRAD, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x72\204\25", IF_PENT|IF_MMX},\r |
| 2897 | {I_PSRAD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE2\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2898 | {I_PSRAD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE2\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2899 | {I_PSRAD, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x72\204\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 2900 | ITEMPLATE_END\r |
| 2901 | };\r |
| 2902 | \r |
| 2903 | static struct itemplate instrux_PSRAW[] = {\r |
| 2904 | {I_PSRAW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE1\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2905 | {I_PSRAW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE1\110", IF_PENT|IF_MMX},\r |
| 2906 | {I_PSRAW, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x71\204\25", IF_PENT|IF_MMX},\r |
| 2907 | {I_PSRAW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE1\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2908 | {I_PSRAW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE1\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2909 | {I_PSRAW, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x71\204\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 2910 | ITEMPLATE_END\r |
| 2911 | };\r |
| 2912 | \r |
| 2913 | static struct itemplate instrux_PSRLD[] = {\r |
| 2914 | {I_PSRLD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD2\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2915 | {I_PSRLD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD2\110", IF_PENT|IF_MMX},\r |
| 2916 | {I_PSRLD, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x72\202\25", IF_PENT|IF_MMX},\r |
| 2917 | {I_PSRLD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD2\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2918 | {I_PSRLD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD2\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2919 | {I_PSRLD, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x72\202\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 2920 | ITEMPLATE_END\r |
| 2921 | };\r |
| 2922 | \r |
| 2923 | static struct itemplate instrux_PSRLDQ[] = {\r |
| 2924 | {I_PSRLDQ, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x73\203\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 2925 | ITEMPLATE_END\r |
| 2926 | };\r |
| 2927 | \r |
| 2928 | static struct itemplate instrux_PSRLQ[] = {\r |
| 2929 | {I_PSRLQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD3\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2930 | {I_PSRLQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD3\110", IF_PENT|IF_MMX},\r |
| 2931 | {I_PSRLQ, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x73\202\25", IF_PENT|IF_MMX},\r |
| 2932 | {I_PSRLQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD3\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2933 | {I_PSRLQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD3\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2934 | {I_PSRLQ, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x73\202\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 2935 | ITEMPLATE_END\r |
| 2936 | };\r |
| 2937 | \r |
| 2938 | static struct itemplate instrux_PSRLW[] = {\r |
| 2939 | {I_PSRLW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD1\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2940 | {I_PSRLW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD1\110", IF_PENT|IF_MMX},\r |
| 2941 | {I_PSRLW, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x71\202\25", IF_PENT|IF_MMX},\r |
| 2942 | {I_PSRLW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD1\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2943 | {I_PSRLW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD1\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2944 | {I_PSRLW, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x71\202\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 2945 | ITEMPLATE_END\r |
| 2946 | };\r |
| 2947 | \r |
| 2948 | static struct itemplate instrux_PSUBB[] = {\r |
| 2949 | {I_PSUBB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF8\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2950 | {I_PSUBB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF8\110", IF_PENT|IF_MMX},\r |
| 2951 | {I_PSUBB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF8\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2952 | {I_PSUBB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF8\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2953 | ITEMPLATE_END\r |
| 2954 | };\r |
| 2955 | \r |
| 2956 | static struct itemplate instrux_PSUBD[] = {\r |
| 2957 | {I_PSUBD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFA\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2958 | {I_PSUBD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFA\110", IF_PENT|IF_MMX},\r |
| 2959 | {I_PSUBD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xFA\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2960 | {I_PSUBD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xFA\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2961 | ITEMPLATE_END\r |
| 2962 | };\r |
| 2963 | \r |
| 2964 | static struct itemplate instrux_PSUBQ[] = {\r |
| 2965 | {I_PSUBQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFB\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2966 | {I_PSUBQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFB\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2967 | {I_PSUBQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xFB\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2968 | {I_PSUBQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xFB\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2969 | ITEMPLATE_END\r |
| 2970 | };\r |
| 2971 | \r |
| 2972 | static struct itemplate instrux_PSUBSB[] = {\r |
| 2973 | {I_PSUBSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE8\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2974 | {I_PSUBSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE8\110", IF_PENT|IF_MMX},\r |
| 2975 | {I_PSUBSB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE8\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2976 | {I_PSUBSB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE8\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2977 | ITEMPLATE_END\r |
| 2978 | };\r |
| 2979 | \r |
| 2980 | static struct itemplate instrux_PSUBSIW[] = {\r |
| 2981 | {I_PSUBSIW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x55\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 2982 | {I_PSUBSIW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x55\110", IF_PENT|IF_MMX|IF_CYRIX},\r |
| 2983 | ITEMPLATE_END\r |
| 2984 | };\r |
| 2985 | \r |
| 2986 | static struct itemplate instrux_PSUBSW[] = {\r |
| 2987 | {I_PSUBSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE9\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2988 | {I_PSUBSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE9\110", IF_PENT|IF_MMX},\r |
| 2989 | {I_PSUBSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE9\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2990 | {I_PSUBSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE9\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2991 | ITEMPLATE_END\r |
| 2992 | };\r |
| 2993 | \r |
| 2994 | static struct itemplate instrux_PSUBUSB[] = {\r |
| 2995 | {I_PSUBUSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD8\110", IF_PENT|IF_MMX|IF_SM},\r |
| 2996 | {I_PSUBUSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD8\110", IF_PENT|IF_MMX},\r |
| 2997 | {I_PSUBUSB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD8\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 2998 | {I_PSUBUSB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD8\110", IF_WILLAMETTE|IF_SSE2},\r |
| 2999 | ITEMPLATE_END\r |
| 3000 | };\r |
| 3001 | \r |
| 3002 | static struct itemplate instrux_PSUBUSW[] = {\r |
| 3003 | {I_PSUBUSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD9\110", IF_PENT|IF_MMX|IF_SM},\r |
| 3004 | {I_PSUBUSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD9\110", IF_PENT|IF_MMX},\r |
| 3005 | {I_PSUBUSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD9\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 3006 | {I_PSUBUSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD9\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3007 | ITEMPLATE_END\r |
| 3008 | };\r |
| 3009 | \r |
| 3010 | static struct itemplate instrux_PSUBW[] = {\r |
| 3011 | {I_PSUBW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF9\110", IF_PENT|IF_MMX|IF_SM},\r |
| 3012 | {I_PSUBW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF9\110", IF_PENT|IF_MMX},\r |
| 3013 | {I_PSUBW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF9\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 3014 | {I_PSUBW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF9\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3015 | ITEMPLATE_END\r |
| 3016 | };\r |
| 3017 | \r |
| 3018 | static struct itemplate instrux_PSWAPD[] = {\r |
| 3019 | {I_PSWAPD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xBB", IF_PENT|IF_3DNOW|IF_SM},\r |
| 3020 | {I_PSWAPD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xBB", IF_PENT|IF_3DNOW},\r |
| 3021 | ITEMPLATE_END\r |
| 3022 | };\r |
| 3023 | \r |
| 3024 | static struct itemplate instrux_PUNPCKHBW[] = {\r |
| 3025 | {I_PUNPCKHBW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x68\110", IF_PENT|IF_MMX|IF_SM},\r |
| 3026 | {I_PUNPCKHBW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x68\110", IF_PENT|IF_MMX},\r |
| 3027 | {I_PUNPCKHBW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x68\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 3028 | {I_PUNPCKHBW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x68\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3029 | ITEMPLATE_END\r |
| 3030 | };\r |
| 3031 | \r |
| 3032 | static struct itemplate instrux_PUNPCKHDQ[] = {\r |
| 3033 | {I_PUNPCKHDQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x6A\110", IF_PENT|IF_MMX|IF_SM},\r |
| 3034 | {I_PUNPCKHDQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x6A\110", IF_PENT|IF_MMX},\r |
| 3035 | {I_PUNPCKHDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6A\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 3036 | {I_PUNPCKHDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x6A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3037 | ITEMPLATE_END\r |
| 3038 | };\r |
| 3039 | \r |
| 3040 | static struct itemplate instrux_PUNPCKHQDQ[] = {\r |
| 3041 | {I_PUNPCKHQDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x6D\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3042 | {I_PUNPCKHQDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6D\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 3043 | ITEMPLATE_END\r |
| 3044 | };\r |
| 3045 | \r |
| 3046 | static struct itemplate instrux_PUNPCKHWD[] = {\r |
| 3047 | {I_PUNPCKHWD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x69\110", IF_PENT|IF_MMX|IF_SM},\r |
| 3048 | {I_PUNPCKHWD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x69\110", IF_PENT|IF_MMX},\r |
| 3049 | {I_PUNPCKHWD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x69\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 3050 | {I_PUNPCKHWD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x69\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3051 | ITEMPLATE_END\r |
| 3052 | };\r |
| 3053 | \r |
| 3054 | static struct itemplate instrux_PUNPCKLBW[] = {\r |
| 3055 | {I_PUNPCKLBW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x60\110", IF_PENT|IF_MMX|IF_SM},\r |
| 3056 | {I_PUNPCKLBW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x60\110", IF_PENT|IF_MMX},\r |
| 3057 | {I_PUNPCKLBW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x60\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 3058 | {I_PUNPCKLBW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x60\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3059 | ITEMPLATE_END\r |
| 3060 | };\r |
| 3061 | \r |
| 3062 | static struct itemplate instrux_PUNPCKLDQ[] = {\r |
| 3063 | {I_PUNPCKLDQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x62\110", IF_PENT|IF_MMX|IF_SM},\r |
| 3064 | {I_PUNPCKLDQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x62\110", IF_PENT|IF_MMX},\r |
| 3065 | {I_PUNPCKLDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x62\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 3066 | {I_PUNPCKLDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x62\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3067 | ITEMPLATE_END\r |
| 3068 | };\r |
| 3069 | \r |
| 3070 | static struct itemplate instrux_PUNPCKLQDQ[] = {\r |
| 3071 | {I_PUNPCKLQDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x6C\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3072 | {I_PUNPCKLQDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6C\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 3073 | ITEMPLATE_END\r |
| 3074 | };\r |
| 3075 | \r |
| 3076 | static struct itemplate instrux_PUNPCKLWD[] = {\r |
| 3077 | {I_PUNPCKLWD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x61\110", IF_PENT|IF_MMX|IF_SM},\r |
| 3078 | {I_PUNPCKLWD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x61\110", IF_PENT|IF_MMX},\r |
| 3079 | {I_PUNPCKLWD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x61\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 3080 | {I_PUNPCKLWD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x61\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3081 | ITEMPLATE_END\r |
| 3082 | };\r |
| 3083 | \r |
| 3084 | static struct itemplate instrux_PUSH[] = {\r |
| 3085 | {I_PUSH, 1, {REG16,0,0}, "\320\10\x50", IF_8086},\r |
| 3086 | {I_PUSH, 1, {REG32,0,0}, "\321\10\x50", IF_386},\r |
| 3087 | {I_PUSH, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xFF\206", IF_8086},\r |
| 3088 | {I_PUSH, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xFF\206", IF_386},\r |
| 3089 | {I_PUSH, 1, {REG_CS,0,0}, "\6", IF_8086},\r |
| 3090 | {I_PUSH, 1, {REG_DESS,0,0}, "\6", IF_8086},\r |
| 3091 | {I_PUSH, 1, {REG_FSGS,0,0}, "\1\x0F\7", IF_386},\r |
| 3092 | {I_PUSH, 1, {IMMEDIATE|BITS8,0,0}, "\1\x6A\14", IF_186},\r |
| 3093 | {I_PUSH, 1, {SBYTE,0,0}, "\1\x6A\14", IF_186},\r |
| 3094 | {I_PUSH, 1, {IMMEDIATE|BITS16,0,0}, "\320\133\1\x68\130", IF_186},\r |
| 3095 | {I_PUSH, 1, {IMMEDIATE|BITS32,0,0}, "\321\143\1\x68\140", IF_386},\r |
| 3096 | {I_PUSH, 1, {IMMEDIATE,0,0}, "\1\x68\34", IF_186},\r |
| 3097 | ITEMPLATE_END\r |
| 3098 | };\r |
| 3099 | \r |
| 3100 | static struct itemplate instrux_PUSHA[] = {\r |
| 3101 | {I_PUSHA, 0, {0,0,0}, "\322\1\x60", IF_186},\r |
| 3102 | ITEMPLATE_END\r |
| 3103 | };\r |
| 3104 | \r |
| 3105 | static struct itemplate instrux_PUSHAD[] = {\r |
| 3106 | {I_PUSHAD, 0, {0,0,0}, "\321\1\x60", IF_386},\r |
| 3107 | ITEMPLATE_END\r |
| 3108 | };\r |
| 3109 | \r |
| 3110 | static struct itemplate instrux_PUSHAW[] = {\r |
| 3111 | {I_PUSHAW, 0, {0,0,0}, "\320\1\x60", IF_186},\r |
| 3112 | ITEMPLATE_END\r |
| 3113 | };\r |
| 3114 | \r |
| 3115 | static struct itemplate instrux_PUSHF[] = {\r |
| 3116 | {I_PUSHF, 0, {0,0,0}, "\322\1\x9C", IF_8086},\r |
| 3117 | ITEMPLATE_END\r |
| 3118 | };\r |
| 3119 | \r |
| 3120 | static struct itemplate instrux_PUSHFD[] = {\r |
| 3121 | {I_PUSHFD, 0, {0,0,0}, "\321\1\x9C", IF_386},\r |
| 3122 | ITEMPLATE_END\r |
| 3123 | };\r |
| 3124 | \r |
| 3125 | static struct itemplate instrux_PUSHFW[] = {\r |
| 3126 | {I_PUSHFW, 0, {0,0,0}, "\320\1\x9C", IF_8086},\r |
| 3127 | ITEMPLATE_END\r |
| 3128 | };\r |
| 3129 | \r |
| 3130 | static struct itemplate instrux_PXOR[] = {\r |
| 3131 | {I_PXOR, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEF\110", IF_PENT|IF_MMX|IF_SM},\r |
| 3132 | {I_PXOR, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEF\110", IF_PENT|IF_MMX},\r |
| 3133 | {I_PXOR, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xEF\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 3134 | {I_PXOR, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xEF\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3135 | ITEMPLATE_END\r |
| 3136 | };\r |
| 3137 | \r |
| 3138 | static struct itemplate instrux_RCL[] = {\r |
| 3139 | {I_RCL, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\202", IF_8086},\r |
| 3140 | {I_RCL, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\202", IF_8086},\r |
| 3141 | {I_RCL, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\202\25", IF_186|IF_SB},\r |
| 3142 | {I_RCL, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\202", IF_8086},\r |
| 3143 | {I_RCL, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\202", IF_8086},\r |
| 3144 | {I_RCL, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\202\25", IF_186|IF_SB},\r |
| 3145 | {I_RCL, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\202", IF_386},\r |
| 3146 | {I_RCL, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\202", IF_386},\r |
| 3147 | {I_RCL, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\202\25", IF_386|IF_SB},\r |
| 3148 | ITEMPLATE_END\r |
| 3149 | };\r |
| 3150 | \r |
| 3151 | static struct itemplate instrux_RCPPS[] = {\r |
| 3152 | {I_RCPPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x53\110", IF_KATMAI|IF_SSE},\r |
| 3153 | {I_RCPPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x53\110", IF_KATMAI|IF_SSE},\r |
| 3154 | ITEMPLATE_END\r |
| 3155 | };\r |
| 3156 | \r |
| 3157 | static struct itemplate instrux_RCPSS[] = {\r |
| 3158 | {I_RCPSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x53\110", IF_KATMAI|IF_SSE},\r |
| 3159 | {I_RCPSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x53\110", IF_KATMAI|IF_SSE},\r |
| 3160 | ITEMPLATE_END\r |
| 3161 | };\r |
| 3162 | \r |
| 3163 | static struct itemplate instrux_RCR[] = {\r |
| 3164 | {I_RCR, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\203", IF_8086},\r |
| 3165 | {I_RCR, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\203", IF_8086},\r |
| 3166 | {I_RCR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\203\25", IF_186|IF_SB},\r |
| 3167 | {I_RCR, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\203", IF_8086},\r |
| 3168 | {I_RCR, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\203", IF_8086},\r |
| 3169 | {I_RCR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\203\25", IF_186|IF_SB},\r |
| 3170 | {I_RCR, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\203", IF_386},\r |
| 3171 | {I_RCR, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\203", IF_386},\r |
| 3172 | {I_RCR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\203\25", IF_386|IF_SB},\r |
| 3173 | ITEMPLATE_END\r |
| 3174 | };\r |
| 3175 | \r |
| 3176 | static struct itemplate instrux_RDMSR[] = {\r |
| 3177 | {I_RDMSR, 0, {0,0,0}, "\2\x0F\x32", IF_PENT|IF_PRIV},\r |
| 3178 | ITEMPLATE_END\r |
| 3179 | };\r |
| 3180 | \r |
| 3181 | static struct itemplate instrux_RDPMC[] = {\r |
| 3182 | {I_RDPMC, 0, {0,0,0}, "\2\x0F\x33", IF_P6},\r |
| 3183 | ITEMPLATE_END\r |
| 3184 | };\r |
| 3185 | \r |
| 3186 | static struct itemplate instrux_RDSHR[] = {\r |
| 3187 | {I_RDSHR, 1, {REGMEM|BITS32,0,0}, "\321\300\2\x0F\x36\200", IF_P6|IF_CYRIX|IF_SMM},\r |
| 3188 | ITEMPLATE_END\r |
| 3189 | };\r |
| 3190 | \r |
| 3191 | static struct itemplate instrux_RDTSC[] = {\r |
| 3192 | {I_RDTSC, 0, {0,0,0}, "\2\x0F\x31", IF_PENT},\r |
| 3193 | ITEMPLATE_END\r |
| 3194 | };\r |
| 3195 | \r |
| 3196 | static struct itemplate instrux_RESB[] = {\r |
| 3197 | {I_RESB, 1, {IMMEDIATE,0,0}, "\340", IF_8086},\r |
| 3198 | ITEMPLATE_END\r |
| 3199 | };\r |
| 3200 | \r |
| 3201 | static struct itemplate instrux_RESD[] = {\r |
| 3202 | ITEMPLATE_END\r |
| 3203 | };\r |
| 3204 | \r |
| 3205 | static struct itemplate instrux_RESQ[] = {\r |
| 3206 | ITEMPLATE_END\r |
| 3207 | };\r |
| 3208 | \r |
| 3209 | static struct itemplate instrux_REST[] = {\r |
| 3210 | ITEMPLATE_END\r |
| 3211 | };\r |
| 3212 | \r |
| 3213 | static struct itemplate instrux_RESW[] = {\r |
| 3214 | ITEMPLATE_END\r |
| 3215 | };\r |
| 3216 | \r |
| 3217 | static struct itemplate instrux_RET[] = {\r |
| 3218 | {I_RET, 0, {0,0,0}, "\1\xC3", IF_8086},\r |
| 3219 | {I_RET, 1, {IMMEDIATE,0,0}, "\1\xC2\30", IF_8086|IF_SW},\r |
| 3220 | ITEMPLATE_END\r |
| 3221 | };\r |
| 3222 | \r |
| 3223 | static struct itemplate instrux_RETF[] = {\r |
| 3224 | {I_RETF, 0, {0,0,0}, "\1\xCB", IF_8086},\r |
| 3225 | {I_RETF, 1, {IMMEDIATE,0,0}, "\1\xCA\30", IF_8086|IF_SW},\r |
| 3226 | ITEMPLATE_END\r |
| 3227 | };\r |
| 3228 | \r |
| 3229 | static struct itemplate instrux_RETN[] = {\r |
| 3230 | {I_RETN, 0, {0,0,0}, "\1\xC3", IF_8086},\r |
| 3231 | {I_RETN, 1, {IMMEDIATE,0,0}, "\1\xC2\30", IF_8086|IF_SW},\r |
| 3232 | ITEMPLATE_END\r |
| 3233 | };\r |
| 3234 | \r |
| 3235 | static struct itemplate instrux_ROL[] = {\r |
| 3236 | {I_ROL, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\200", IF_8086},\r |
| 3237 | {I_ROL, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\200", IF_8086},\r |
| 3238 | {I_ROL, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\200\25", IF_186|IF_SB},\r |
| 3239 | {I_ROL, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\200", IF_8086},\r |
| 3240 | {I_ROL, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\200", IF_8086},\r |
| 3241 | {I_ROL, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\200\25", IF_186|IF_SB},\r |
| 3242 | {I_ROL, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\200", IF_386},\r |
| 3243 | {I_ROL, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\200", IF_386},\r |
| 3244 | {I_ROL, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\200\25", IF_386|IF_SB},\r |
| 3245 | ITEMPLATE_END\r |
| 3246 | };\r |
| 3247 | \r |
| 3248 | static struct itemplate instrux_ROR[] = {\r |
| 3249 | {I_ROR, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\201", IF_8086},\r |
| 3250 | {I_ROR, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\201", IF_8086},\r |
| 3251 | {I_ROR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\201\25", IF_186|IF_SB},\r |
| 3252 | {I_ROR, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\201", IF_8086},\r |
| 3253 | {I_ROR, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\201", IF_8086},\r |
| 3254 | {I_ROR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\201\25", IF_186|IF_SB},\r |
| 3255 | {I_ROR, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\201", IF_386},\r |
| 3256 | {I_ROR, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\201", IF_386},\r |
| 3257 | {I_ROR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\201\25", IF_386|IF_SB},\r |
| 3258 | ITEMPLATE_END\r |
| 3259 | };\r |
| 3260 | \r |
| 3261 | static struct itemplate instrux_RSDC[] = {\r |
| 3262 | {I_RSDC, 2, {REG_SREG,MEMORY|BITS80,0}, "\301\2\x0F\x79\110", IF_486|IF_CYRIX|IF_SMM},\r |
| 3263 | ITEMPLATE_END\r |
| 3264 | };\r |
| 3265 | \r |
| 3266 | static struct itemplate instrux_RSLDT[] = {\r |
| 3267 | {I_RSLDT, 1, {MEMORY|BITS80,0,0}, "\300\2\x0F\x7B\200", IF_486|IF_CYRIX|IF_SMM},\r |
| 3268 | ITEMPLATE_END\r |
| 3269 | };\r |
| 3270 | \r |
| 3271 | static struct itemplate instrux_RSM[] = {\r |
| 3272 | {I_RSM, 0, {0,0,0}, "\2\x0F\xAA", IF_PENT|IF_SMM},\r |
| 3273 | ITEMPLATE_END\r |
| 3274 | };\r |
| 3275 | \r |
| 3276 | static struct itemplate instrux_RSQRTPS[] = {\r |
| 3277 | {I_RSQRTPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x52\110", IF_KATMAI|IF_SSE},\r |
| 3278 | {I_RSQRTPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x52\110", IF_KATMAI|IF_SSE},\r |
| 3279 | ITEMPLATE_END\r |
| 3280 | };\r |
| 3281 | \r |
| 3282 | static struct itemplate instrux_RSQRTSS[] = {\r |
| 3283 | {I_RSQRTSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x52\110", IF_KATMAI|IF_SSE},\r |
| 3284 | {I_RSQRTSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x52\110", IF_KATMAI|IF_SSE},\r |
| 3285 | ITEMPLATE_END\r |
| 3286 | };\r |
| 3287 | \r |
| 3288 | static struct itemplate instrux_RSTS[] = {\r |
| 3289 | {I_RSTS, 1, {MEMORY|BITS80,0,0}, "\300\2\x0F\x7D\200", IF_486|IF_CYRIX|IF_SMM},\r |
| 3290 | ITEMPLATE_END\r |
| 3291 | };\r |
| 3292 | \r |
| 3293 | static struct itemplate instrux_SAHF[] = {\r |
| 3294 | {I_SAHF, 0, {0,0,0}, "\1\x9E", IF_8086},\r |
| 3295 | ITEMPLATE_END\r |
| 3296 | };\r |
| 3297 | \r |
| 3298 | static struct itemplate instrux_SAL[] = {\r |
| 3299 | {I_SAL, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\204", IF_8086},\r |
| 3300 | {I_SAL, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\204", IF_8086},\r |
| 3301 | {I_SAL, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\204\25", IF_186|IF_SB},\r |
| 3302 | {I_SAL, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\204", IF_8086},\r |
| 3303 | {I_SAL, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\204", IF_8086},\r |
| 3304 | {I_SAL, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\204\25", IF_186|IF_SB},\r |
| 3305 | {I_SAL, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\204", IF_386},\r |
| 3306 | {I_SAL, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\204", IF_386},\r |
| 3307 | {I_SAL, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\204\25", IF_386|IF_SB},\r |
| 3308 | ITEMPLATE_END\r |
| 3309 | };\r |
| 3310 | \r |
| 3311 | static struct itemplate instrux_SALC[] = {\r |
| 3312 | {I_SALC, 0, {0,0,0}, "\1\xD6", IF_8086|IF_UNDOC},\r |
| 3313 | ITEMPLATE_END\r |
| 3314 | };\r |
| 3315 | \r |
| 3316 | static struct itemplate instrux_SAR[] = {\r |
| 3317 | {I_SAR, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\207", IF_8086},\r |
| 3318 | {I_SAR, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\207", IF_8086},\r |
| 3319 | {I_SAR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\207\25", IF_186|IF_SB},\r |
| 3320 | {I_SAR, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\207", IF_8086},\r |
| 3321 | {I_SAR, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\207", IF_8086},\r |
| 3322 | {I_SAR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\207\25", IF_186|IF_SB},\r |
| 3323 | {I_SAR, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\207", IF_386},\r |
| 3324 | {I_SAR, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\207", IF_386},\r |
| 3325 | {I_SAR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\207\25", IF_386|IF_SB},\r |
| 3326 | ITEMPLATE_END\r |
| 3327 | };\r |
| 3328 | \r |
| 3329 | static struct itemplate instrux_SBB[] = {\r |
| 3330 | {I_SBB, 2, {MEMORY,REG8,0}, "\300\1\x18\101", IF_8086|IF_SM},\r |
| 3331 | {I_SBB, 2, {REG8,REG8,0}, "\1\x18\101", IF_8086},\r |
| 3332 | {I_SBB, 2, {MEMORY,REG16,0}, "\320\300\1\x19\101", IF_8086|IF_SM},\r |
| 3333 | {I_SBB, 2, {REG16,REG16,0}, "\320\1\x19\101", IF_8086},\r |
| 3334 | {I_SBB, 2, {MEMORY,REG32,0}, "\321\300\1\x19\101", IF_386|IF_SM},\r |
| 3335 | {I_SBB, 2, {REG32,REG32,0}, "\321\1\x19\101", IF_386},\r |
| 3336 | {I_SBB, 2, {REG8,MEMORY,0}, "\301\1\x1A\110", IF_8086|IF_SM},\r |
| 3337 | {I_SBB, 2, {REG8,REG8,0}, "\1\x1A\110", IF_8086},\r |
| 3338 | {I_SBB, 2, {REG16,MEMORY,0}, "\320\301\1\x1B\110", IF_8086|IF_SM},\r |
| 3339 | {I_SBB, 2, {REG16,REG16,0}, "\320\1\x1B\110", IF_8086},\r |
| 3340 | {I_SBB, 2, {REG32,MEMORY,0}, "\321\301\1\x1B\110", IF_386|IF_SM},\r |
| 3341 | {I_SBB, 2, {REG32,REG32,0}, "\321\1\x1B\110", IF_386},\r |
| 3342 | {I_SBB, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\203\15", IF_8086},\r |
| 3343 | {I_SBB, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\203\15", IF_386},\r |
| 3344 | {I_SBB, 2, {REG_AL,IMMEDIATE,0}, "\1\x1C\21", IF_8086|IF_SM},\r |
| 3345 | {I_SBB, 2, {REG_AX,SBYTE,0}, "\320\1\x83\203\15", IF_8086|IF_SM},\r |
| 3346 | {I_SBB, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x1D\31", IF_8086|IF_SM},\r |
| 3347 | {I_SBB, 2, {REG_EAX,SBYTE,0}, "\321\1\x83\203\15", IF_386|IF_SM},\r |
| 3348 | {I_SBB, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x1D\41", IF_386|IF_SM},\r |
| 3349 | {I_SBB, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\203\21", IF_8086|IF_SM},\r |
| 3350 | {I_SBB, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\203\131", IF_8086|IF_SM},\r |
| 3351 | {I_SBB, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\203\141", IF_386|IF_SM},\r |
| 3352 | {I_SBB, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\203\21", IF_8086|IF_SM},\r |
| 3353 | {I_SBB, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\203\131", IF_8086|IF_SM},\r |
| 3354 | {I_SBB, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\203\141", IF_386|IF_SM},\r |
| 3355 | ITEMPLATE_END\r |
| 3356 | };\r |
| 3357 | \r |
| 3358 | static struct itemplate instrux_SCASB[] = {\r |
| 3359 | {I_SCASB, 0, {0,0,0}, "\332\1\xAE", IF_8086},\r |
| 3360 | ITEMPLATE_END\r |
| 3361 | };\r |
| 3362 | \r |
| 3363 | static struct itemplate instrux_SCASD[] = {\r |
| 3364 | {I_SCASD, 0, {0,0,0}, "\332\321\1\xAF", IF_386},\r |
| 3365 | ITEMPLATE_END\r |
| 3366 | };\r |
| 3367 | \r |
| 3368 | static struct itemplate instrux_SCASW[] = {\r |
| 3369 | {I_SCASW, 0, {0,0,0}, "\332\320\1\xAF", IF_8086},\r |
| 3370 | ITEMPLATE_END\r |
| 3371 | };\r |
| 3372 | \r |
| 3373 | static struct itemplate instrux_SFENCE[] = {\r |
| 3374 | {I_SFENCE, 0, {0,0,0}, "\3\x0F\xAE\xF8", IF_KATMAI},\r |
| 3375 | ITEMPLATE_END\r |
| 3376 | };\r |
| 3377 | \r |
| 3378 | static struct itemplate instrux_SGDT[] = {\r |
| 3379 | {I_SGDT, 1, {MEMORY,0,0}, "\300\2\x0F\x01\200", IF_286},\r |
| 3380 | ITEMPLATE_END\r |
| 3381 | };\r |
| 3382 | \r |
| 3383 | static struct itemplate instrux_SHL[] = {\r |
| 3384 | {I_SHL, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\204", IF_8086},\r |
| 3385 | {I_SHL, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\204", IF_8086},\r |
| 3386 | {I_SHL, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\204\25", IF_186|IF_SB},\r |
| 3387 | {I_SHL, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\204", IF_8086},\r |
| 3388 | {I_SHL, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\204", IF_8086},\r |
| 3389 | {I_SHL, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\204\25", IF_186|IF_SB},\r |
| 3390 | {I_SHL, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\204", IF_386},\r |
| 3391 | {I_SHL, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\204", IF_386},\r |
| 3392 | {I_SHL, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\204\25", IF_386|IF_SB},\r |
| 3393 | ITEMPLATE_END\r |
| 3394 | };\r |
| 3395 | \r |
| 3396 | static struct itemplate instrux_SHLD[] = {\r |
| 3397 | {I_SHLD, 3, {MEMORY,REG16,IMMEDIATE}, "\300\320\2\x0F\xA4\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r |
| 3398 | {I_SHLD, 3, {REG16,REG16,IMMEDIATE}, "\320\2\x0F\xA4\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r |
| 3399 | {I_SHLD, 3, {MEMORY,REG32,IMMEDIATE}, "\300\321\2\x0F\xA4\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r |
| 3400 | {I_SHLD, 3, {REG32,REG32,IMMEDIATE}, "\321\2\x0F\xA4\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r |
| 3401 | {I_SHLD, 3, {MEMORY,REG16,REG_CL}, "\300\320\2\x0F\xA5\101", IF_386|IF_SM},\r |
| 3402 | {I_SHLD, 3, {REG16,REG16,REG_CL}, "\320\2\x0F\xA5\101", IF_386},\r |
| 3403 | {I_SHLD, 3, {MEMORY,REG32,REG_CL}, "\300\321\2\x0F\xA5\101", IF_386|IF_SM},\r |
| 3404 | {I_SHLD, 3, {REG32,REG32,REG_CL}, "\321\2\x0F\xA5\101", IF_386},\r |
| 3405 | ITEMPLATE_END\r |
| 3406 | };\r |
| 3407 | \r |
| 3408 | static struct itemplate instrux_SHR[] = {\r |
| 3409 | {I_SHR, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\205", IF_8086},\r |
| 3410 | {I_SHR, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\205", IF_8086},\r |
| 3411 | {I_SHR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\205\25", IF_186|IF_SB},\r |
| 3412 | {I_SHR, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\205", IF_8086},\r |
| 3413 | {I_SHR, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\205", IF_8086},\r |
| 3414 | {I_SHR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\205\25", IF_186|IF_SB},\r |
| 3415 | {I_SHR, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\205", IF_386},\r |
| 3416 | {I_SHR, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\205", IF_386},\r |
| 3417 | {I_SHR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\205\25", IF_386|IF_SB},\r |
| 3418 | ITEMPLATE_END\r |
| 3419 | };\r |
| 3420 | \r |
| 3421 | static struct itemplate instrux_SHRD[] = {\r |
| 3422 | {I_SHRD, 3, {MEMORY,REG16,IMMEDIATE}, "\300\320\2\x0F\xAC\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r |
| 3423 | {I_SHRD, 3, {REG16,REG16,IMMEDIATE}, "\320\2\x0F\xAC\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r |
| 3424 | {I_SHRD, 3, {MEMORY,REG32,IMMEDIATE}, "\300\321\2\x0F\xAC\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r |
| 3425 | {I_SHRD, 3, {REG32,REG32,IMMEDIATE}, "\321\2\x0F\xAC\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r |
| 3426 | {I_SHRD, 3, {MEMORY,REG16,REG_CL}, "\300\320\2\x0F\xAD\101", IF_386|IF_SM},\r |
| 3427 | {I_SHRD, 3, {REG16,REG16,REG_CL}, "\320\2\x0F\xAD\101", IF_386},\r |
| 3428 | {I_SHRD, 3, {MEMORY,REG32,REG_CL}, "\300\321\2\x0F\xAD\101", IF_386|IF_SM},\r |
| 3429 | {I_SHRD, 3, {REG32,REG32,REG_CL}, "\321\2\x0F\xAD\101", IF_386},\r |
| 3430 | ITEMPLATE_END\r |
| 3431 | };\r |
| 3432 | \r |
| 3433 | static struct itemplate instrux_SHUFPD[] = {\r |
| 3434 | {I_SHUFPD, 3, {XMMREG,XMMREG,IMMEDIATE}, "\3\x66\x0F\xC6\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 3435 | {I_SHUFPD, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\3\x66\x0F\xC6\110\26", IF_WILLAMETTE|IF_SSE2|IF_SM|IF_SB|IF_AR2},\r |
| 3436 | ITEMPLATE_END\r |
| 3437 | };\r |
| 3438 | \r |
| 3439 | static struct itemplate instrux_SHUFPS[] = {\r |
| 3440 | {I_SHUFPS, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\2\x0F\xC6\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r |
| 3441 | {I_SHUFPS, 3, {XMMREG,XMMREG,IMMEDIATE}, "\2\x0F\xC6\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r |
| 3442 | ITEMPLATE_END\r |
| 3443 | };\r |
| 3444 | \r |
| 3445 | static struct itemplate instrux_SIDT[] = {\r |
| 3446 | {I_SIDT, 1, {MEMORY,0,0}, "\300\2\x0F\x01\201", IF_286},\r |
| 3447 | ITEMPLATE_END\r |
| 3448 | };\r |
| 3449 | \r |
| 3450 | static struct itemplate instrux_SLDT[] = {\r |
| 3451 | {I_SLDT, 1, {MEMORY,0,0}, "\300\1\x0F\17\200", IF_286},\r |
| 3452 | {I_SLDT, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\200", IF_286},\r |
| 3453 | {I_SLDT, 1, {REG16,0,0}, "\320\1\x0F\17\200", IF_286},\r |
| 3454 | {I_SLDT, 1, {REG32,0,0}, "\321\1\x0F\17\200", IF_386},\r |
| 3455 | ITEMPLATE_END\r |
| 3456 | };\r |
| 3457 | \r |
| 3458 | static struct itemplate instrux_SMI[] = {\r |
| 3459 | {I_SMI, 0, {0,0,0}, "\1\xF1", IF_386|IF_UNDOC},\r |
| 3460 | ITEMPLATE_END\r |
| 3461 | };\r |
| 3462 | \r |
| 3463 | static struct itemplate instrux_SMINT[] = {\r |
| 3464 | {I_SMINT, 0, {0,0,0}, "\2\x0F\x38", IF_P6|IF_CYRIX},\r |
| 3465 | ITEMPLATE_END\r |
| 3466 | };\r |
| 3467 | \r |
| 3468 | static struct itemplate instrux_SMINTOLD[] = {\r |
| 3469 | {I_SMINTOLD, 0, {0,0,0}, "\2\x0F\x7E", IF_486|IF_CYRIX},\r |
| 3470 | ITEMPLATE_END\r |
| 3471 | };\r |
| 3472 | \r |
| 3473 | static struct itemplate instrux_SMSW[] = {\r |
| 3474 | {I_SMSW, 1, {MEMORY,0,0}, "\300\2\x0F\x01\204", IF_286},\r |
| 3475 | {I_SMSW, 1, {MEMORY|BITS16,0,0}, "\300\2\x0F\x01\204", IF_286},\r |
| 3476 | {I_SMSW, 1, {REG16,0,0}, "\320\2\x0F\x01\204", IF_286},\r |
| 3477 | {I_SMSW, 1, {REG32,0,0}, "\321\2\x0F\x01\204", IF_386},\r |
| 3478 | ITEMPLATE_END\r |
| 3479 | };\r |
| 3480 | \r |
| 3481 | static struct itemplate instrux_SQRTPD[] = {\r |
| 3482 | {I_SQRTPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x51\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3483 | {I_SQRTPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x51\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 3484 | ITEMPLATE_END\r |
| 3485 | };\r |
| 3486 | \r |
| 3487 | static struct itemplate instrux_SQRTPS[] = {\r |
| 3488 | {I_SQRTPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x51\110", IF_KATMAI|IF_SSE},\r |
| 3489 | {I_SQRTPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x51\110", IF_KATMAI|IF_SSE},\r |
| 3490 | ITEMPLATE_END\r |
| 3491 | };\r |
| 3492 | \r |
| 3493 | static struct itemplate instrux_SQRTSD[] = {\r |
| 3494 | {I_SQRTSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x51\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3495 | {I_SQRTSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x51\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3496 | ITEMPLATE_END\r |
| 3497 | };\r |
| 3498 | \r |
| 3499 | static struct itemplate instrux_SQRTSS[] = {\r |
| 3500 | {I_SQRTSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x51\110", IF_KATMAI|IF_SSE},\r |
| 3501 | {I_SQRTSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x51\110", IF_KATMAI|IF_SSE},\r |
| 3502 | ITEMPLATE_END\r |
| 3503 | };\r |
| 3504 | \r |
| 3505 | static struct itemplate instrux_STC[] = {\r |
| 3506 | {I_STC, 0, {0,0,0}, "\1\xF9", IF_8086},\r |
| 3507 | ITEMPLATE_END\r |
| 3508 | };\r |
| 3509 | \r |
| 3510 | static struct itemplate instrux_STD[] = {\r |
| 3511 | {I_STD, 0, {0,0,0}, "\1\xFD", IF_8086},\r |
| 3512 | ITEMPLATE_END\r |
| 3513 | };\r |
| 3514 | \r |
| 3515 | static struct itemplate instrux_STI[] = {\r |
| 3516 | {I_STI, 0, {0,0,0}, "\1\xFB", IF_8086},\r |
| 3517 | ITEMPLATE_END\r |
| 3518 | };\r |
| 3519 | \r |
| 3520 | static struct itemplate instrux_STMXCSR[] = {\r |
| 3521 | {I_STMXCSR, 1, {MEMORY,0,0}, "\300\2\x0F\xAE\203", IF_KATMAI|IF_SSE|IF_SD},\r |
| 3522 | ITEMPLATE_END\r |
| 3523 | };\r |
| 3524 | \r |
| 3525 | static struct itemplate instrux_STOSB[] = {\r |
| 3526 | {I_STOSB, 0, {0,0,0}, "\1\xAA", IF_8086},\r |
| 3527 | ITEMPLATE_END\r |
| 3528 | };\r |
| 3529 | \r |
| 3530 | static struct itemplate instrux_STOSD[] = {\r |
| 3531 | {I_STOSD, 0, {0,0,0}, "\321\1\xAB", IF_386},\r |
| 3532 | ITEMPLATE_END\r |
| 3533 | };\r |
| 3534 | \r |
| 3535 | static struct itemplate instrux_STOSW[] = {\r |
| 3536 | {I_STOSW, 0, {0,0,0}, "\320\1\xAB", IF_8086},\r |
| 3537 | ITEMPLATE_END\r |
| 3538 | };\r |
| 3539 | \r |
| 3540 | static struct itemplate instrux_STR[] = {\r |
| 3541 | {I_STR, 1, {MEMORY,0,0}, "\300\1\x0F\17\201", IF_286|IF_PROT},\r |
| 3542 | {I_STR, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\201", IF_286|IF_PROT},\r |
| 3543 | {I_STR, 1, {REG16,0,0}, "\320\1\x0F\17\201", IF_286|IF_PROT},\r |
| 3544 | {I_STR, 1, {REG32,0,0}, "\321\1\x0F\17\201", IF_386|IF_PROT},\r |
| 3545 | ITEMPLATE_END\r |
| 3546 | };\r |
| 3547 | \r |
| 3548 | static struct itemplate instrux_SUB[] = {\r |
| 3549 | {I_SUB, 2, {MEMORY,REG8,0}, "\300\1\x28\101", IF_8086|IF_SM},\r |
| 3550 | {I_SUB, 2, {REG8,REG8,0}, "\1\x28\101", IF_8086},\r |
| 3551 | {I_SUB, 2, {MEMORY,REG16,0}, "\320\300\1\x29\101", IF_8086|IF_SM},\r |
| 3552 | {I_SUB, 2, {REG16,REG16,0}, "\320\1\x29\101", IF_8086},\r |
| 3553 | {I_SUB, 2, {MEMORY,REG32,0}, "\321\300\1\x29\101", IF_386|IF_SM},\r |
| 3554 | {I_SUB, 2, {REG32,REG32,0}, "\321\1\x29\101", IF_386},\r |
| 3555 | {I_SUB, 2, {REG8,MEMORY,0}, "\301\1\x2A\110", IF_8086|IF_SM},\r |
| 3556 | {I_SUB, 2, {REG8,REG8,0}, "\1\x2A\110", IF_8086},\r |
| 3557 | {I_SUB, 2, {REG16,MEMORY,0}, "\320\301\1\x2B\110", IF_8086|IF_SM},\r |
| 3558 | {I_SUB, 2, {REG16,REG16,0}, "\320\1\x2B\110", IF_8086},\r |
| 3559 | {I_SUB, 2, {REG32,MEMORY,0}, "\321\301\1\x2B\110", IF_386|IF_SM},\r |
| 3560 | {I_SUB, 2, {REG32,REG32,0}, "\321\1\x2B\110", IF_386},\r |
| 3561 | {I_SUB, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\205\15", IF_8086},\r |
| 3562 | {I_SUB, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\205\15", IF_386},\r |
| 3563 | {I_SUB, 2, {REG_AL,IMMEDIATE,0}, "\1\x2C\21", IF_8086|IF_SM},\r |
| 3564 | {I_SUB, 2, {REG_AX,SBYTE,0}, "\320\1\x83\205\15", IF_8086|IF_SM},\r |
| 3565 | {I_SUB, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x2D\31", IF_8086|IF_SM},\r |
| 3566 | {I_SUB, 2, {REG_EAX,SBYTE,0}, "\321\1\x83\205\15", IF_386|IF_SM},\r |
| 3567 | {I_SUB, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x2D\41", IF_386|IF_SM},\r |
| 3568 | {I_SUB, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\205\21", IF_8086|IF_SM},\r |
| 3569 | {I_SUB, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\205\131", IF_8086|IF_SM},\r |
| 3570 | {I_SUB, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\205\141", IF_386|IF_SM},\r |
| 3571 | {I_SUB, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\205\21", IF_8086|IF_SM},\r |
| 3572 | {I_SUB, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\205\131", IF_8086|IF_SM},\r |
| 3573 | {I_SUB, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\205\141", IF_386|IF_SM},\r |
| 3574 | ITEMPLATE_END\r |
| 3575 | };\r |
| 3576 | \r |
| 3577 | static struct itemplate instrux_SUBPD[] = {\r |
| 3578 | {I_SUBPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5C\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3579 | {I_SUBPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5C\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 3580 | ITEMPLATE_END\r |
| 3581 | };\r |
| 3582 | \r |
| 3583 | static struct itemplate instrux_SUBPS[] = {\r |
| 3584 | {I_SUBPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x5C\110", IF_KATMAI|IF_SSE},\r |
| 3585 | {I_SUBPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x5C\110", IF_KATMAI|IF_SSE},\r |
| 3586 | ITEMPLATE_END\r |
| 3587 | };\r |
| 3588 | \r |
| 3589 | static struct itemplate instrux_SUBSD[] = {\r |
| 3590 | {I_SUBSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x5C\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3591 | {I_SUBSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x5C\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3592 | ITEMPLATE_END\r |
| 3593 | };\r |
| 3594 | \r |
| 3595 | static struct itemplate instrux_SUBSS[] = {\r |
| 3596 | {I_SUBSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5C\110", IF_KATMAI|IF_SSE},\r |
| 3597 | {I_SUBSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5C\110", IF_KATMAI|IF_SSE},\r |
| 3598 | ITEMPLATE_END\r |
| 3599 | };\r |
| 3600 | \r |
| 3601 | static struct itemplate instrux_SVDC[] = {\r |
| 3602 | {I_SVDC, 2, {MEMORY|BITS80,REG_SREG,0}, "\300\2\x0F\x78\101", IF_486|IF_CYRIX|IF_SMM},\r |
| 3603 | ITEMPLATE_END\r |
| 3604 | };\r |
| 3605 | \r |
| 3606 | static struct itemplate instrux_SVLDT[] = {\r |
| 3607 | {I_SVLDT, 1, {MEMORY|BITS80,0,0}, "\300\2\x0F\x7A\200", IF_486|IF_CYRIX|IF_SMM},\r |
| 3608 | ITEMPLATE_END\r |
| 3609 | };\r |
| 3610 | \r |
| 3611 | static struct itemplate instrux_SVTS[] = {\r |
| 3612 | {I_SVTS, 1, {MEMORY|BITS80,0,0}, "\300\2\x0F\x7C\200", IF_486|IF_CYRIX|IF_SMM},\r |
| 3613 | ITEMPLATE_END\r |
| 3614 | };\r |
| 3615 | \r |
| 3616 | static struct itemplate instrux_SYSCALL[] = {\r |
| 3617 | {I_SYSCALL, 0, {0,0,0}, "\2\x0F\x05", IF_P6|IF_AMD},\r |
| 3618 | ITEMPLATE_END\r |
| 3619 | };\r |
| 3620 | \r |
| 3621 | static struct itemplate instrux_SYSENTER[] = {\r |
| 3622 | {I_SYSENTER, 0, {0,0,0}, "\2\x0F\x34", IF_P6},\r |
| 3623 | ITEMPLATE_END\r |
| 3624 | };\r |
| 3625 | \r |
| 3626 | static struct itemplate instrux_SYSEXIT[] = {\r |
| 3627 | {I_SYSEXIT, 0, {0,0,0}, "\2\x0F\x35", IF_P6|IF_PRIV},\r |
| 3628 | ITEMPLATE_END\r |
| 3629 | };\r |
| 3630 | \r |
| 3631 | static struct itemplate instrux_SYSRET[] = {\r |
| 3632 | {I_SYSRET, 0, {0,0,0}, "\2\x0F\x07", IF_P6|IF_PRIV|IF_AMD},\r |
| 3633 | ITEMPLATE_END\r |
| 3634 | };\r |
| 3635 | \r |
| 3636 | static struct itemplate instrux_TEST[] = {\r |
| 3637 | {I_TEST, 2, {MEMORY,REG8,0}, "\300\1\x84\101", IF_8086|IF_SM},\r |
| 3638 | {I_TEST, 2, {REG8,REG8,0}, "\1\x84\101", IF_8086},\r |
| 3639 | {I_TEST, 2, {MEMORY,REG16,0}, "\320\300\1\x85\101", IF_8086|IF_SM},\r |
| 3640 | {I_TEST, 2, {REG16,REG16,0}, "\320\1\x85\101", IF_8086},\r |
| 3641 | {I_TEST, 2, {MEMORY,REG32,0}, "\321\300\1\x85\101", IF_386|IF_SM},\r |
| 3642 | {I_TEST, 2, {REG32,REG32,0}, "\321\1\x85\101", IF_386},\r |
| 3643 | {I_TEST, 2, {REG8,MEMORY,0}, "\301\1\x84\110", IF_8086|IF_SM},\r |
| 3644 | {I_TEST, 2, {REG16,MEMORY,0}, "\320\301\1\x85\110", IF_8086|IF_SM},\r |
| 3645 | {I_TEST, 2, {REG32,MEMORY,0}, "\321\301\1\x85\110", IF_386|IF_SM},\r |
| 3646 | {I_TEST, 2, {REG_AL,IMMEDIATE,0}, "\1\xA8\21", IF_8086|IF_SM},\r |
| 3647 | {I_TEST, 2, {REG_AX,IMMEDIATE,0}, "\320\1\xA9\31", IF_8086|IF_SM},\r |
| 3648 | {I_TEST, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\xA9\41", IF_386|IF_SM},\r |
| 3649 | {I_TEST, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xF6\200\21", IF_8086|IF_SM},\r |
| 3650 | {I_TEST, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xF7\200\31", IF_8086|IF_SM},\r |
| 3651 | {I_TEST, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xF7\200\41", IF_386|IF_SM},\r |
| 3652 | {I_TEST, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\xF6\200\21", IF_8086|IF_SM},\r |
| 3653 | {I_TEST, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\1\xF7\200\31", IF_8086|IF_SM},\r |
| 3654 | {I_TEST, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\1\xF7\200\41", IF_386|IF_SM},\r |
| 3655 | ITEMPLATE_END\r |
| 3656 | };\r |
| 3657 | \r |
| 3658 | static struct itemplate instrux_UCOMISD[] = {\r |
| 3659 | {I_UCOMISD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x2E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3660 | {I_UCOMISD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x2E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3661 | ITEMPLATE_END\r |
| 3662 | };\r |
| 3663 | \r |
| 3664 | static struct itemplate instrux_UCOMISS[] = {\r |
| 3665 | {I_UCOMISS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x2E\110", IF_KATMAI|IF_SSE},\r |
| 3666 | {I_UCOMISS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x2E\110", IF_KATMAI|IF_SSE},\r |
| 3667 | ITEMPLATE_END\r |
| 3668 | };\r |
| 3669 | \r |
| 3670 | static struct itemplate instrux_UD0[] = {\r |
| 3671 | {I_UD0, 0, {0,0,0}, "\2\x0F\xFF", IF_286|IF_UNDOC},\r |
| 3672 | ITEMPLATE_END\r |
| 3673 | };\r |
| 3674 | \r |
| 3675 | static struct itemplate instrux_UD1[] = {\r |
| 3676 | {I_UD1, 0, {0,0,0}, "\2\x0F\xB9", IF_286|IF_UNDOC},\r |
| 3677 | ITEMPLATE_END\r |
| 3678 | };\r |
| 3679 | \r |
| 3680 | static struct itemplate instrux_UD2[] = {\r |
| 3681 | {I_UD2, 0, {0,0,0}, "\2\x0F\x0B", IF_286},\r |
| 3682 | ITEMPLATE_END\r |
| 3683 | };\r |
| 3684 | \r |
| 3685 | static struct itemplate instrux_UMOV[] = {\r |
| 3686 | {I_UMOV, 2, {MEMORY,REG8,0}, "\300\2\x0F\x10\101", IF_386|IF_UNDOC|IF_SM},\r |
| 3687 | {I_UMOV, 2, {REG8,REG8,0}, "\2\x0F\x10\101", IF_386|IF_UNDOC},\r |
| 3688 | {I_UMOV, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\x11\101", IF_386|IF_UNDOC|IF_SM},\r |
| 3689 | {I_UMOV, 2, {REG16,REG16,0}, "\320\2\x0F\x11\101", IF_386|IF_UNDOC},\r |
| 3690 | {I_UMOV, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\x11\101", IF_386|IF_UNDOC|IF_SM},\r |
| 3691 | {I_UMOV, 2, {REG32,REG32,0}, "\321\2\x0F\x11\101", IF_386|IF_UNDOC},\r |
| 3692 | {I_UMOV, 2, {REG8,MEMORY,0}, "\301\2\x0F\x12\110", IF_386|IF_UNDOC|IF_SM},\r |
| 3693 | {I_UMOV, 2, {REG8,REG8,0}, "\2\x0F\x12\110", IF_386|IF_UNDOC},\r |
| 3694 | {I_UMOV, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\x13\110", IF_386|IF_UNDOC|IF_SM},\r |
| 3695 | {I_UMOV, 2, {REG16,REG16,0}, "\320\2\x0F\x13\110", IF_386|IF_UNDOC},\r |
| 3696 | {I_UMOV, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\x13\110", IF_386|IF_UNDOC|IF_SM},\r |
| 3697 | {I_UMOV, 2, {REG32,REG32,0}, "\321\2\x0F\x13\110", IF_386|IF_UNDOC},\r |
| 3698 | ITEMPLATE_END\r |
| 3699 | };\r |
| 3700 | \r |
| 3701 | static struct itemplate instrux_UNPCKHPD[] = {\r |
| 3702 | {I_UNPCKHPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x15\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3703 | {I_UNPCKHPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x15\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 3704 | ITEMPLATE_END\r |
| 3705 | };\r |
| 3706 | \r |
| 3707 | static struct itemplate instrux_UNPCKHPS[] = {\r |
| 3708 | {I_UNPCKHPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x15\110", IF_KATMAI|IF_SSE},\r |
| 3709 | {I_UNPCKHPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x15\110", IF_KATMAI|IF_SSE},\r |
| 3710 | ITEMPLATE_END\r |
| 3711 | };\r |
| 3712 | \r |
| 3713 | static struct itemplate instrux_UNPCKLPD[] = {\r |
| 3714 | {I_UNPCKLPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x14\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3715 | {I_UNPCKLPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x14\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 3716 | ITEMPLATE_END\r |
| 3717 | };\r |
| 3718 | \r |
| 3719 | static struct itemplate instrux_UNPCKLPS[] = {\r |
| 3720 | {I_UNPCKLPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x14\110", IF_KATMAI|IF_SSE},\r |
| 3721 | {I_UNPCKLPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x14\110", IF_KATMAI|IF_SSE},\r |
| 3722 | ITEMPLATE_END\r |
| 3723 | };\r |
| 3724 | \r |
| 3725 | static struct itemplate instrux_VERR[] = {\r |
| 3726 | {I_VERR, 1, {MEMORY,0,0}, "\300\1\x0F\17\204", IF_286|IF_PROT},\r |
| 3727 | {I_VERR, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\204", IF_286|IF_PROT},\r |
| 3728 | {I_VERR, 1, {REG16,0,0}, "\1\x0F\17\204", IF_286|IF_PROT},\r |
| 3729 | ITEMPLATE_END\r |
| 3730 | };\r |
| 3731 | \r |
| 3732 | static struct itemplate instrux_VERW[] = {\r |
| 3733 | {I_VERW, 1, {MEMORY,0,0}, "\300\1\x0F\17\205", IF_286|IF_PROT},\r |
| 3734 | {I_VERW, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\205", IF_286|IF_PROT},\r |
| 3735 | {I_VERW, 1, {REG16,0,0}, "\1\x0F\17\205", IF_286|IF_PROT},\r |
| 3736 | ITEMPLATE_END\r |
| 3737 | };\r |
| 3738 | \r |
| 3739 | static struct itemplate instrux_WAIT[] = {\r |
| 3740 | {I_WAIT, 0, {0,0,0}, "\1\x9B", IF_8086},\r |
| 3741 | ITEMPLATE_END\r |
| 3742 | };\r |
| 3743 | \r |
| 3744 | static struct itemplate instrux_WBINVD[] = {\r |
| 3745 | {I_WBINVD, 0, {0,0,0}, "\2\x0F\x09", IF_486|IF_PRIV},\r |
| 3746 | ITEMPLATE_END\r |
| 3747 | };\r |
| 3748 | \r |
| 3749 | static struct itemplate instrux_WRMSR[] = {\r |
| 3750 | {I_WRMSR, 0, {0,0,0}, "\2\x0F\x30", IF_PENT|IF_PRIV},\r |
| 3751 | ITEMPLATE_END\r |
| 3752 | };\r |
| 3753 | \r |
| 3754 | static struct itemplate instrux_WRSHR[] = {\r |
| 3755 | {I_WRSHR, 1, {REGMEM|BITS32,0,0}, "\321\300\2\x0F\x37\200", IF_P6|IF_CYRIX|IF_SMM},\r |
| 3756 | ITEMPLATE_END\r |
| 3757 | };\r |
| 3758 | \r |
| 3759 | static struct itemplate instrux_XADD[] = {\r |
| 3760 | {I_XADD, 2, {MEMORY,REG8,0}, "\300\2\x0F\xC0\101", IF_486|IF_SM},\r |
| 3761 | {I_XADD, 2, {REG8,REG8,0}, "\2\x0F\xC0\101", IF_486},\r |
| 3762 | {I_XADD, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xC1\101", IF_486|IF_SM},\r |
| 3763 | {I_XADD, 2, {REG16,REG16,0}, "\320\2\x0F\xC1\101", IF_486},\r |
| 3764 | {I_XADD, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xC1\101", IF_486|IF_SM},\r |
| 3765 | {I_XADD, 2, {REG32,REG32,0}, "\321\2\x0F\xC1\101", IF_486},\r |
| 3766 | ITEMPLATE_END\r |
| 3767 | };\r |
| 3768 | \r |
| 3769 | static struct itemplate instrux_XBTS[] = {\r |
| 3770 | {I_XBTS, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xA6\110", IF_386|IF_SW|IF_UNDOC},\r |
| 3771 | {I_XBTS, 2, {REG16,REG16,0}, "\320\2\x0F\xA6\110", IF_386|IF_UNDOC},\r |
| 3772 | {I_XBTS, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xA6\110", IF_386|IF_SD|IF_UNDOC},\r |
| 3773 | {I_XBTS, 2, {REG32,REG32,0}, "\321\2\x0F\xA6\110", IF_386|IF_UNDOC},\r |
| 3774 | ITEMPLATE_END\r |
| 3775 | };\r |
| 3776 | \r |
| 3777 | static struct itemplate instrux_XCHG[] = {\r |
| 3778 | {I_XCHG, 2, {REG_AX,REG16,0}, "\320\11\x90", IF_8086},\r |
| 3779 | {I_XCHG, 2, {REG_EAX,REG32,0}, "\321\11\x90", IF_386},\r |
| 3780 | {I_XCHG, 2, {REG16,REG_AX,0}, "\320\10\x90", IF_8086},\r |
| 3781 | {I_XCHG, 2, {REG32,REG_EAX,0}, "\321\10\x90", IF_386},\r |
| 3782 | {I_XCHG, 2, {REG8,MEMORY,0}, "\301\1\x86\110", IF_8086|IF_SM},\r |
| 3783 | {I_XCHG, 2, {REG8,REG8,0}, "\1\x86\110", IF_8086},\r |
| 3784 | {I_XCHG, 2, {REG16,MEMORY,0}, "\320\301\1\x87\110", IF_8086|IF_SM},\r |
| 3785 | {I_XCHG, 2, {REG16,REG16,0}, "\320\1\x87\110", IF_8086},\r |
| 3786 | {I_XCHG, 2, {REG32,MEMORY,0}, "\321\301\1\x87\110", IF_386|IF_SM},\r |
| 3787 | {I_XCHG, 2, {REG32,REG32,0}, "\321\1\x87\110", IF_386},\r |
| 3788 | {I_XCHG, 2, {MEMORY,REG8,0}, "\300\1\x86\101", IF_8086|IF_SM},\r |
| 3789 | {I_XCHG, 2, {REG8,REG8,0}, "\1\x86\101", IF_8086},\r |
| 3790 | {I_XCHG, 2, {MEMORY,REG16,0}, "\320\300\1\x87\101", IF_8086|IF_SM},\r |
| 3791 | {I_XCHG, 2, {REG16,REG16,0}, "\320\1\x87\101", IF_8086},\r |
| 3792 | {I_XCHG, 2, {MEMORY,REG32,0}, "\321\300\1\x87\101", IF_386|IF_SM},\r |
| 3793 | {I_XCHG, 2, {REG32,REG32,0}, "\321\1\x87\101", IF_386},\r |
| 3794 | ITEMPLATE_END\r |
| 3795 | };\r |
| 3796 | \r |
| 3797 | static struct itemplate instrux_XLAT[] = {\r |
| 3798 | {I_XLAT, 0, {0,0,0}, "\1\xD7", IF_8086},\r |
| 3799 | ITEMPLATE_END\r |
| 3800 | };\r |
| 3801 | \r |
| 3802 | static struct itemplate instrux_XLATB[] = {\r |
| 3803 | {I_XLATB, 0, {0,0,0}, "\1\xD7", IF_8086},\r |
| 3804 | ITEMPLATE_END\r |
| 3805 | };\r |
| 3806 | \r |
| 3807 | static struct itemplate instrux_XOR[] = {\r |
| 3808 | {I_XOR, 2, {MEMORY,REG8,0}, "\300\1\x30\101", IF_8086|IF_SM},\r |
| 3809 | {I_XOR, 2, {REG8,REG8,0}, "\1\x30\101", IF_8086},\r |
| 3810 | {I_XOR, 2, {MEMORY,REG16,0}, "\320\300\1\x31\101", IF_8086|IF_SM},\r |
| 3811 | {I_XOR, 2, {REG16,REG16,0}, "\320\1\x31\101", IF_8086},\r |
| 3812 | {I_XOR, 2, {MEMORY,REG32,0}, "\321\300\1\x31\101", IF_386|IF_SM},\r |
| 3813 | {I_XOR, 2, {REG32,REG32,0}, "\321\1\x31\101", IF_386},\r |
| 3814 | {I_XOR, 2, {REG8,MEMORY,0}, "\301\1\x32\110", IF_8086|IF_SM},\r |
| 3815 | {I_XOR, 2, {REG8,REG8,0}, "\1\x32\110", IF_8086},\r |
| 3816 | {I_XOR, 2, {REG16,MEMORY,0}, "\320\301\1\x33\110", IF_8086|IF_SM},\r |
| 3817 | {I_XOR, 2, {REG16,REG16,0}, "\320\1\x33\110", IF_8086},\r |
| 3818 | {I_XOR, 2, {REG32,MEMORY,0}, "\321\301\1\x33\110", IF_386|IF_SM},\r |
| 3819 | {I_XOR, 2, {REG32,REG32,0}, "\321\1\x33\110", IF_386},\r |
| 3820 | {I_XOR, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\206\15", IF_8086},\r |
| 3821 | {I_XOR, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\206\15", IF_386},\r |
| 3822 | {I_XOR, 2, {REG_AL,IMMEDIATE,0}, "\1\x34\21", IF_8086|IF_SM},\r |
| 3823 | {I_XOR, 2, {REG_AX,SBYTE,0}, "\320\1\x83\206\15", IF_8086|IF_SM},\r |
| 3824 | {I_XOR, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x35\31", IF_8086|IF_SM},\r |
| 3825 | {I_XOR, 2, {REG_EAX,SBYTE,0}, "\321\1\x83\206\15", IF_386|IF_SM},\r |
| 3826 | {I_XOR, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x35\41", IF_386|IF_SM},\r |
| 3827 | {I_XOR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\206\21", IF_8086|IF_SM},\r |
| 3828 | {I_XOR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\206\131", IF_8086|IF_SM},\r |
| 3829 | {I_XOR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\206\141", IF_386|IF_SM},\r |
| 3830 | {I_XOR, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\206\21", IF_8086|IF_SM},\r |
| 3831 | {I_XOR, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\206\131", IF_8086|IF_SM},\r |
| 3832 | {I_XOR, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\206\141", IF_386|IF_SM},\r |
| 3833 | ITEMPLATE_END\r |
| 3834 | };\r |
| 3835 | \r |
| 3836 | static struct itemplate instrux_XORPD[] = {\r |
| 3837 | {I_XORPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x57\110", IF_WILLAMETTE|IF_SSE2},\r |
| 3838 | {I_XORPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x57\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 3839 | ITEMPLATE_END\r |
| 3840 | };\r |
| 3841 | \r |
| 3842 | static struct itemplate instrux_XORPS[] = {\r |
| 3843 | {I_XORPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x57\110", IF_KATMAI|IF_SSE},\r |
| 3844 | {I_XORPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x57\110", IF_KATMAI|IF_SSE},\r |
| 3845 | ITEMPLATE_END\r |
| 3846 | };\r |
| 3847 | \r |
| 3848 | static struct itemplate instrux_XSTORE[] = {\r |
| 3849 | {I_XSTORE, 0, {0,0,0}, "\3\x0F\xA7\xC0", IF_P6|IF_CYRIX},\r |
| 3850 | ITEMPLATE_END\r |
| 3851 | };\r |
| 3852 | \r |
| 3853 | static struct itemplate instrux_CMOVcc[] = {\r |
| 3854 | {I_CMOVcc, 2, {REG16,MEMORY,0}, "\320\301\1\x0F\330\x40\110", IF_P6|IF_SM},\r |
| 3855 | {I_CMOVcc, 2, {REG16,REG16,0}, "\320\1\x0F\330\x40\110", IF_P6},\r |
| 3856 | {I_CMOVcc, 2, {REG32,MEMORY,0}, "\321\301\1\x0F\330\x40\110", IF_P6|IF_SM},\r |
| 3857 | {I_CMOVcc, 2, {REG32,REG32,0}, "\321\1\x0F\330\x40\110", IF_P6},\r |
| 3858 | ITEMPLATE_END\r |
| 3859 | };\r |
| 3860 | \r |
| 3861 | static struct itemplate instrux_Jcc[] = {\r |
| 3862 | {I_Jcc, 1, {IMMEDIATE|NEAR,0,0}, "\322\1\x0F\330\x80\64", IF_386},\r |
| 3863 | {I_Jcc, 1, {IMMEDIATE|BITS16|NEAR,0,0}, "\320\1\x0F\330\x80\64", IF_386},\r |
| 3864 | {I_Jcc, 1, {IMMEDIATE|BITS32|NEAR,0,0}, "\321\1\x0F\330\x80\64", IF_386},\r |
| 3865 | {I_Jcc, 1, {IMMEDIATE|SHORT,0,0}, "\330\x70\50", IF_8086},\r |
| 3866 | {I_Jcc, 1, {IMMEDIATE,0,0}, "\370\330\x70\50", IF_8086},\r |
| 3867 | {I_Jcc, 1, {IMMEDIATE,0,0}, "\1\x0F\330\x80\64", IF_386},\r |
| 3868 | {I_Jcc, 1, {IMMEDIATE,0,0}, "\330\x71\373\1\xE9\64", IF_8086},\r |
| 3869 | {I_Jcc, 1, {IMMEDIATE,0,0}, "\330\x70\50", IF_8086},\r |
| 3870 | ITEMPLATE_END\r |
| 3871 | };\r |
| 3872 | \r |
| 3873 | static struct itemplate instrux_SETcc[] = {\r |
| 3874 | {I_SETcc, 1, {MEMORY,0,0}, "\300\1\x0F\330\x90\200", IF_386|IF_SB},\r |
| 3875 | {I_SETcc, 1, {REG8,0,0}, "\300\1\x0F\330\x90\200", IF_386},\r |
| 3876 | ITEMPLATE_END\r |
| 3877 | };\r |
| 3878 | \r |
| 3879 | struct itemplate *nasm_instructions[] = {\r |
| 3880 | instrux_AAA,\r |
| 3881 | instrux_AAD,\r |
| 3882 | instrux_AAM,\r |
| 3883 | instrux_AAS,\r |
| 3884 | instrux_ADC,\r |
| 3885 | instrux_ADD,\r |
| 3886 | instrux_ADDPD,\r |
| 3887 | instrux_ADDPS,\r |
| 3888 | instrux_ADDSD,\r |
| 3889 | instrux_ADDSS,\r |
| 3890 | instrux_ADDSUBPD,\r |
| 3891 | instrux_ADDSUBPS,\r |
| 3892 | instrux_AND,\r |
| 3893 | instrux_ANDNPD,\r |
| 3894 | instrux_ANDNPS,\r |
| 3895 | instrux_ANDPD,\r |
| 3896 | instrux_ANDPS,\r |
| 3897 | instrux_ARPL,\r |
| 3898 | instrux_BOUND,\r |
| 3899 | instrux_BSF,\r |
| 3900 | instrux_BSR,\r |
| 3901 | instrux_BSWAP,\r |
| 3902 | instrux_BT,\r |
| 3903 | instrux_BTC,\r |
| 3904 | instrux_BTR,\r |
| 3905 | instrux_BTS,\r |
| 3906 | instrux_CALL,\r |
| 3907 | instrux_CBW,\r |
| 3908 | instrux_CDQ,\r |
| 3909 | instrux_CLC,\r |
| 3910 | instrux_CLD,\r |
| 3911 | instrux_CLFLUSH,\r |
| 3912 | instrux_CLI,\r |
| 3913 | instrux_CLTS,\r |
| 3914 | instrux_CMC,\r |
| 3915 | instrux_CMP,\r |
| 3916 | instrux_CMPEQPD,\r |
| 3917 | instrux_CMPEQPS,\r |
| 3918 | instrux_CMPEQSD,\r |
| 3919 | instrux_CMPEQSS,\r |
| 3920 | instrux_CMPLEPD,\r |
| 3921 | instrux_CMPLEPS,\r |
| 3922 | instrux_CMPLESD,\r |
| 3923 | instrux_CMPLESS,\r |
| 3924 | instrux_CMPLTPD,\r |
| 3925 | instrux_CMPLTPS,\r |
| 3926 | instrux_CMPLTSD,\r |
| 3927 | instrux_CMPLTSS,\r |
| 3928 | instrux_CMPNEQPD,\r |
| 3929 | instrux_CMPNEQPS,\r |
| 3930 | instrux_CMPNEQSD,\r |
| 3931 | instrux_CMPNEQSS,\r |
| 3932 | instrux_CMPNLEPD,\r |
| 3933 | instrux_CMPNLEPS,\r |
| 3934 | instrux_CMPNLESD,\r |
| 3935 | instrux_CMPNLESS,\r |
| 3936 | instrux_CMPNLTPD,\r |
| 3937 | instrux_CMPNLTPS,\r |
| 3938 | instrux_CMPNLTSD,\r |
| 3939 | instrux_CMPNLTSS,\r |
| 3940 | instrux_CMPORDPD,\r |
| 3941 | instrux_CMPORDPS,\r |
| 3942 | instrux_CMPORDSD,\r |
| 3943 | instrux_CMPORDSS,\r |
| 3944 | instrux_CMPPD,\r |
| 3945 | instrux_CMPPS,\r |
| 3946 | instrux_CMPSB,\r |
| 3947 | instrux_CMPSD,\r |
| 3948 | instrux_CMPSS,\r |
| 3949 | instrux_CMPSW,\r |
| 3950 | instrux_CMPUNORDPD,\r |
| 3951 | instrux_CMPUNORDPS,\r |
| 3952 | instrux_CMPUNORDSD,\r |
| 3953 | instrux_CMPUNORDSS,\r |
| 3954 | instrux_CMPXCHG,\r |
| 3955 | instrux_CMPXCHG486,\r |
| 3956 | instrux_CMPXCHG8B,\r |
| 3957 | instrux_COMISD,\r |
| 3958 | instrux_COMISS,\r |
| 3959 | instrux_CPUID,\r |
| 3960 | instrux_CVTDQ2PD,\r |
| 3961 | instrux_CVTDQ2PS,\r |
| 3962 | instrux_CVTPD2DQ,\r |
| 3963 | instrux_CVTPD2PI,\r |
| 3964 | instrux_CVTPD2PS,\r |
| 3965 | instrux_CVTPI2PD,\r |
| 3966 | instrux_CVTPI2PS,\r |
| 3967 | instrux_CVTPS2DQ,\r |
| 3968 | instrux_CVTPS2PD,\r |
| 3969 | instrux_CVTPS2PI,\r |
| 3970 | instrux_CVTSD2SI,\r |
| 3971 | instrux_CVTSD2SS,\r |
| 3972 | instrux_CVTSI2SD,\r |
| 3973 | instrux_CVTSI2SS,\r |
| 3974 | instrux_CVTSS2SD,\r |
| 3975 | instrux_CVTSS2SI,\r |
| 3976 | instrux_CVTTPD2DQ,\r |
| 3977 | instrux_CVTTPD2PI,\r |
| 3978 | instrux_CVTTPS2DQ,\r |
| 3979 | instrux_CVTTPS2PI,\r |
| 3980 | instrux_CVTTSD2SI,\r |
| 3981 | instrux_CVTTSS2SI,\r |
| 3982 | instrux_CWD,\r |
| 3983 | instrux_CWDE,\r |
| 3984 | instrux_DAA,\r |
| 3985 | instrux_DAS,\r |
| 3986 | instrux_DB,\r |
| 3987 | instrux_DD,\r |
| 3988 | instrux_DEC,\r |
| 3989 | instrux_DIV,\r |
| 3990 | instrux_DIVPD,\r |
| 3991 | instrux_DIVPS,\r |
| 3992 | instrux_DIVSD,\r |
| 3993 | instrux_DIVSS,\r |
| 3994 | instrux_DQ,\r |
| 3995 | instrux_DT,\r |
| 3996 | instrux_DW,\r |
| 3997 | instrux_EMMS,\r |
| 3998 | instrux_ENTER,\r |
| 3999 | instrux_EQU,\r |
| 4000 | instrux_F2XM1,\r |
| 4001 | instrux_FABS,\r |
| 4002 | instrux_FADD,\r |
| 4003 | instrux_FADDP,\r |
| 4004 | instrux_FBLD,\r |
| 4005 | instrux_FBSTP,\r |
| 4006 | instrux_FCHS,\r |
| 4007 | instrux_FCLEX,\r |
| 4008 | instrux_FCMOVB,\r |
| 4009 | instrux_FCMOVBE,\r |
| 4010 | instrux_FCMOVE,\r |
| 4011 | instrux_FCMOVNB,\r |
| 4012 | instrux_FCMOVNBE,\r |
| 4013 | instrux_FCMOVNE,\r |
| 4014 | instrux_FCMOVNU,\r |
| 4015 | instrux_FCMOVU,\r |
| 4016 | instrux_FCOM,\r |
| 4017 | instrux_FCOMI,\r |
| 4018 | instrux_FCOMIP,\r |
| 4019 | instrux_FCOMP,\r |
| 4020 | instrux_FCOMPP,\r |
| 4021 | instrux_FCOS,\r |
| 4022 | instrux_FDECSTP,\r |
| 4023 | instrux_FDISI,\r |
| 4024 | instrux_FDIV,\r |
| 4025 | instrux_FDIVP,\r |
| 4026 | instrux_FDIVR,\r |
| 4027 | instrux_FDIVRP,\r |
| 4028 | instrux_FEMMS,\r |
| 4029 | instrux_FENI,\r |
| 4030 | instrux_FFREE,\r |
| 4031 | instrux_FFREEP,\r |
| 4032 | instrux_FIADD,\r |
| 4033 | instrux_FICOM,\r |
| 4034 | instrux_FICOMP,\r |
| 4035 | instrux_FIDIV,\r |
| 4036 | instrux_FIDIVR,\r |
| 4037 | instrux_FILD,\r |
| 4038 | instrux_FIMUL,\r |
| 4039 | instrux_FINCSTP,\r |
| 4040 | instrux_FINIT,\r |
| 4041 | instrux_FIST,\r |
| 4042 | instrux_FISTP,\r |
| 4043 | instrux_FISTTP,\r |
| 4044 | instrux_FISUB,\r |
| 4045 | instrux_FISUBR,\r |
| 4046 | instrux_FLD,\r |
| 4047 | instrux_FLD1,\r |
| 4048 | instrux_FLDCW,\r |
| 4049 | instrux_FLDENV,\r |
| 4050 | instrux_FLDL2E,\r |
| 4051 | instrux_FLDL2T,\r |
| 4052 | instrux_FLDLG2,\r |
| 4053 | instrux_FLDLN2,\r |
| 4054 | instrux_FLDPI,\r |
| 4055 | instrux_FLDZ,\r |
| 4056 | instrux_FMUL,\r |
| 4057 | instrux_FMULP,\r |
| 4058 | instrux_FNCLEX,\r |
| 4059 | instrux_FNDISI,\r |
| 4060 | instrux_FNENI,\r |
| 4061 | instrux_FNINIT,\r |
| 4062 | instrux_FNOP,\r |
| 4063 | instrux_FNSAVE,\r |
| 4064 | instrux_FNSTCW,\r |
| 4065 | instrux_FNSTENV,\r |
| 4066 | instrux_FNSTSW,\r |
| 4067 | instrux_FPATAN,\r |
| 4068 | instrux_FPREM,\r |
| 4069 | instrux_FPREM1,\r |
| 4070 | instrux_FPTAN,\r |
| 4071 | instrux_FRNDINT,\r |
| 4072 | instrux_FRSTOR,\r |
| 4073 | instrux_FSAVE,\r |
| 4074 | instrux_FSCALE,\r |
| 4075 | instrux_FSETPM,\r |
| 4076 | instrux_FSIN,\r |
| 4077 | instrux_FSINCOS,\r |
| 4078 | instrux_FSQRT,\r |
| 4079 | instrux_FST,\r |
| 4080 | instrux_FSTCW,\r |
| 4081 | instrux_FSTENV,\r |
| 4082 | instrux_FSTP,\r |
| 4083 | instrux_FSTSW,\r |
| 4084 | instrux_FSUB,\r |
| 4085 | instrux_FSUBP,\r |
| 4086 | instrux_FSUBR,\r |
| 4087 | instrux_FSUBRP,\r |
| 4088 | instrux_FTST,\r |
| 4089 | instrux_FUCOM,\r |
| 4090 | instrux_FUCOMI,\r |
| 4091 | instrux_FUCOMIP,\r |
| 4092 | instrux_FUCOMP,\r |
| 4093 | instrux_FUCOMPP,\r |
| 4094 | instrux_FWAIT,\r |
| 4095 | instrux_FXAM,\r |
| 4096 | instrux_FXCH,\r |
| 4097 | instrux_FXRSTOR,\r |
| 4098 | instrux_FXSAVE,\r |
| 4099 | instrux_FXTRACT,\r |
| 4100 | instrux_FYL2X,\r |
| 4101 | instrux_FYL2XP1,\r |
| 4102 | instrux_HADDPD,\r |
| 4103 | instrux_HADDPS,\r |
| 4104 | instrux_HLT,\r |
| 4105 | instrux_HSUBPD,\r |
| 4106 | instrux_HSUBPS,\r |
| 4107 | instrux_IBTS,\r |
| 4108 | instrux_ICEBP,\r |
| 4109 | instrux_IDIV,\r |
| 4110 | instrux_IMUL,\r |
| 4111 | instrux_IN,\r |
| 4112 | instrux_INC,\r |
| 4113 | instrux_INCBIN,\r |
| 4114 | instrux_INSB,\r |
| 4115 | instrux_INSD,\r |
| 4116 | instrux_INSW,\r |
| 4117 | instrux_INT,\r |
| 4118 | instrux_INT01,\r |
| 4119 | instrux_INT03,\r |
| 4120 | instrux_INT1,\r |
| 4121 | instrux_INT3,\r |
| 4122 | instrux_INTO,\r |
| 4123 | instrux_INVD,\r |
| 4124 | instrux_INVLPG,\r |
| 4125 | instrux_IRET,\r |
| 4126 | instrux_IRETD,\r |
| 4127 | instrux_IRETW,\r |
| 4128 | instrux_JCXZ,\r |
| 4129 | instrux_JECXZ,\r |
| 4130 | instrux_JMP,\r |
| 4131 | instrux_JMPE,\r |
| 4132 | instrux_LAHF,\r |
| 4133 | instrux_LAR,\r |
| 4134 | instrux_LDDQU,\r |
| 4135 | instrux_LDMXCSR,\r |
| 4136 | instrux_LDS,\r |
| 4137 | instrux_LEA,\r |
| 4138 | instrux_LEAVE,\r |
| 4139 | instrux_LES,\r |
| 4140 | instrux_LFENCE,\r |
| 4141 | instrux_LFS,\r |
| 4142 | instrux_LGDT,\r |
| 4143 | instrux_LGS,\r |
| 4144 | instrux_LIDT,\r |
| 4145 | instrux_LLDT,\r |
| 4146 | instrux_LMSW,\r |
| 4147 | instrux_LOADALL,\r |
| 4148 | instrux_LOADALL286,\r |
| 4149 | instrux_LODSB,\r |
| 4150 | instrux_LODSD,\r |
| 4151 | instrux_LODSW,\r |
| 4152 | instrux_LOOP,\r |
| 4153 | instrux_LOOPE,\r |
| 4154 | instrux_LOOPNE,\r |
| 4155 | instrux_LOOPNZ,\r |
| 4156 | instrux_LOOPZ,\r |
| 4157 | instrux_LSL,\r |
| 4158 | instrux_LSS,\r |
| 4159 | instrux_LTR,\r |
| 4160 | instrux_MASKMOVDQU,\r |
| 4161 | instrux_MASKMOVQ,\r |
| 4162 | instrux_MAXPD,\r |
| 4163 | instrux_MAXPS,\r |
| 4164 | instrux_MAXSD,\r |
| 4165 | instrux_MAXSS,\r |
| 4166 | instrux_MFENCE,\r |
| 4167 | instrux_MINPD,\r |
| 4168 | instrux_MINPS,\r |
| 4169 | instrux_MINSD,\r |
| 4170 | instrux_MINSS,\r |
| 4171 | instrux_MONITOR,\r |
| 4172 | instrux_MOV,\r |
| 4173 | instrux_MOVAPD,\r |
| 4174 | instrux_MOVAPS,\r |
| 4175 | instrux_MOVD,\r |
| 4176 | instrux_MOVDDUP,\r |
| 4177 | instrux_MOVDQ2Q,\r |
| 4178 | instrux_MOVDQA,\r |
| 4179 | instrux_MOVDQU,\r |
| 4180 | instrux_MOVHLPS,\r |
| 4181 | instrux_MOVHPD,\r |
| 4182 | instrux_MOVHPS,\r |
| 4183 | instrux_MOVLHPS,\r |
| 4184 | instrux_MOVLPD,\r |
| 4185 | instrux_MOVLPS,\r |
| 4186 | instrux_MOVMSKPD,\r |
| 4187 | instrux_MOVMSKPS,\r |
| 4188 | instrux_MOVNTDQ,\r |
| 4189 | instrux_MOVNTI,\r |
| 4190 | instrux_MOVNTPD,\r |
| 4191 | instrux_MOVNTPS,\r |
| 4192 | instrux_MOVNTQ,\r |
| 4193 | instrux_MOVQ,\r |
| 4194 | instrux_MOVQ2DQ,\r |
| 4195 | instrux_MOVSB,\r |
| 4196 | instrux_MOVSD,\r |
| 4197 | instrux_MOVSHDUP,\r |
| 4198 | instrux_MOVSLDUP,\r |
| 4199 | instrux_MOVSS,\r |
| 4200 | instrux_MOVSW,\r |
| 4201 | instrux_MOVSX,\r |
| 4202 | instrux_MOVUPD,\r |
| 4203 | instrux_MOVUPS,\r |
| 4204 | instrux_MOVZX,\r |
| 4205 | instrux_MUL,\r |
| 4206 | instrux_MULPD,\r |
| 4207 | instrux_MULPS,\r |
| 4208 | instrux_MULSD,\r |
| 4209 | instrux_MULSS,\r |
| 4210 | instrux_MWAIT,\r |
| 4211 | instrux_NEG,\r |
| 4212 | instrux_NOP,\r |
| 4213 | instrux_NOT,\r |
| 4214 | instrux_OR,\r |
| 4215 | instrux_ORPD,\r |
| 4216 | instrux_ORPS,\r |
| 4217 | instrux_OUT,\r |
| 4218 | instrux_OUTSB,\r |
| 4219 | instrux_OUTSD,\r |
| 4220 | instrux_OUTSW,\r |
| 4221 | instrux_PACKSSDW,\r |
| 4222 | instrux_PACKSSWB,\r |
| 4223 | instrux_PACKUSWB,\r |
| 4224 | instrux_PADDB,\r |
| 4225 | instrux_PADDD,\r |
| 4226 | instrux_PADDQ,\r |
| 4227 | instrux_PADDSB,\r |
| 4228 | instrux_PADDSIW,\r |
| 4229 | instrux_PADDSW,\r |
| 4230 | instrux_PADDUSB,\r |
| 4231 | instrux_PADDUSW,\r |
| 4232 | instrux_PADDW,\r |
| 4233 | instrux_PAND,\r |
| 4234 | instrux_PANDN,\r |
| 4235 | instrux_PAUSE,\r |
| 4236 | instrux_PAVEB,\r |
| 4237 | instrux_PAVGB,\r |
| 4238 | instrux_PAVGUSB,\r |
| 4239 | instrux_PAVGW,\r |
| 4240 | instrux_PCMPEQB,\r |
| 4241 | instrux_PCMPEQD,\r |
| 4242 | instrux_PCMPEQW,\r |
| 4243 | instrux_PCMPGTB,\r |
| 4244 | instrux_PCMPGTD,\r |
| 4245 | instrux_PCMPGTW,\r |
| 4246 | instrux_PDISTIB,\r |
| 4247 | instrux_PEXTRW,\r |
| 4248 | instrux_PF2ID,\r |
| 4249 | instrux_PF2IW,\r |
| 4250 | instrux_PFACC,\r |
| 4251 | instrux_PFADD,\r |
| 4252 | instrux_PFCMPEQ,\r |
| 4253 | instrux_PFCMPGE,\r |
| 4254 | instrux_PFCMPGT,\r |
| 4255 | instrux_PFMAX,\r |
| 4256 | instrux_PFMIN,\r |
| 4257 | instrux_PFMUL,\r |
| 4258 | instrux_PFNACC,\r |
| 4259 | instrux_PFPNACC,\r |
| 4260 | instrux_PFRCP,\r |
| 4261 | instrux_PFRCPIT1,\r |
| 4262 | instrux_PFRCPIT2,\r |
| 4263 | instrux_PFRSQIT1,\r |
| 4264 | instrux_PFRSQRT,\r |
| 4265 | instrux_PFSUB,\r |
| 4266 | instrux_PFSUBR,\r |
| 4267 | instrux_PI2FD,\r |
| 4268 | instrux_PI2FW,\r |
| 4269 | instrux_PINSRW,\r |
| 4270 | instrux_PMACHRIW,\r |
| 4271 | instrux_PMADDWD,\r |
| 4272 | instrux_PMAGW,\r |
| 4273 | instrux_PMAXSW,\r |
| 4274 | instrux_PMAXUB,\r |
| 4275 | instrux_PMINSW,\r |
| 4276 | instrux_PMINUB,\r |
| 4277 | instrux_PMOVMSKB,\r |
| 4278 | instrux_PMULHRIW,\r |
| 4279 | instrux_PMULHRWA,\r |
| 4280 | instrux_PMULHRWC,\r |
| 4281 | instrux_PMULHUW,\r |
| 4282 | instrux_PMULHW,\r |
| 4283 | instrux_PMULLW,\r |
| 4284 | instrux_PMULUDQ,\r |
| 4285 | instrux_PMVGEZB,\r |
| 4286 | instrux_PMVLZB,\r |
| 4287 | instrux_PMVNZB,\r |
| 4288 | instrux_PMVZB,\r |
| 4289 | instrux_POP,\r |
| 4290 | instrux_POPA,\r |
| 4291 | instrux_POPAD,\r |
| 4292 | instrux_POPAW,\r |
| 4293 | instrux_POPF,\r |
| 4294 | instrux_POPFD,\r |
| 4295 | instrux_POPFW,\r |
| 4296 | instrux_POR,\r |
| 4297 | instrux_PREFETCH,\r |
| 4298 | instrux_PREFETCHNTA,\r |
| 4299 | instrux_PREFETCHT0,\r |
| 4300 | instrux_PREFETCHT1,\r |
| 4301 | instrux_PREFETCHT2,\r |
| 4302 | instrux_PREFETCHW,\r |
| 4303 | instrux_PSADBW,\r |
| 4304 | instrux_PSHUFD,\r |
| 4305 | instrux_PSHUFHW,\r |
| 4306 | instrux_PSHUFLW,\r |
| 4307 | instrux_PSHUFW,\r |
| 4308 | instrux_PSLLD,\r |
| 4309 | instrux_PSLLDQ,\r |
| 4310 | instrux_PSLLQ,\r |
| 4311 | instrux_PSLLW,\r |
| 4312 | instrux_PSRAD,\r |
| 4313 | instrux_PSRAW,\r |
| 4314 | instrux_PSRLD,\r |
| 4315 | instrux_PSRLDQ,\r |
| 4316 | instrux_PSRLQ,\r |
| 4317 | instrux_PSRLW,\r |
| 4318 | instrux_PSUBB,\r |
| 4319 | instrux_PSUBD,\r |
| 4320 | instrux_PSUBQ,\r |
| 4321 | instrux_PSUBSB,\r |
| 4322 | instrux_PSUBSIW,\r |
| 4323 | instrux_PSUBSW,\r |
| 4324 | instrux_PSUBUSB,\r |
| 4325 | instrux_PSUBUSW,\r |
| 4326 | instrux_PSUBW,\r |
| 4327 | instrux_PSWAPD,\r |
| 4328 | instrux_PUNPCKHBW,\r |
| 4329 | instrux_PUNPCKHDQ,\r |
| 4330 | instrux_PUNPCKHQDQ,\r |
| 4331 | instrux_PUNPCKHWD,\r |
| 4332 | instrux_PUNPCKLBW,\r |
| 4333 | instrux_PUNPCKLDQ,\r |
| 4334 | instrux_PUNPCKLQDQ,\r |
| 4335 | instrux_PUNPCKLWD,\r |
| 4336 | instrux_PUSH,\r |
| 4337 | instrux_PUSHA,\r |
| 4338 | instrux_PUSHAD,\r |
| 4339 | instrux_PUSHAW,\r |
| 4340 | instrux_PUSHF,\r |
| 4341 | instrux_PUSHFD,\r |
| 4342 | instrux_PUSHFW,\r |
| 4343 | instrux_PXOR,\r |
| 4344 | instrux_RCL,\r |
| 4345 | instrux_RCPPS,\r |
| 4346 | instrux_RCPSS,\r |
| 4347 | instrux_RCR,\r |
| 4348 | instrux_RDMSR,\r |
| 4349 | instrux_RDPMC,\r |
| 4350 | instrux_RDSHR,\r |
| 4351 | instrux_RDTSC,\r |
| 4352 | instrux_RESB,\r |
| 4353 | instrux_RESD,\r |
| 4354 | instrux_RESQ,\r |
| 4355 | instrux_REST,\r |
| 4356 | instrux_RESW,\r |
| 4357 | instrux_RET,\r |
| 4358 | instrux_RETF,\r |
| 4359 | instrux_RETN,\r |
| 4360 | instrux_ROL,\r |
| 4361 | instrux_ROR,\r |
| 4362 | instrux_RSDC,\r |
| 4363 | instrux_RSLDT,\r |
| 4364 | instrux_RSM,\r |
| 4365 | instrux_RSQRTPS,\r |
| 4366 | instrux_RSQRTSS,\r |
| 4367 | instrux_RSTS,\r |
| 4368 | instrux_SAHF,\r |
| 4369 | instrux_SAL,\r |
| 4370 | instrux_SALC,\r |
| 4371 | instrux_SAR,\r |
| 4372 | instrux_SBB,\r |
| 4373 | instrux_SCASB,\r |
| 4374 | instrux_SCASD,\r |
| 4375 | instrux_SCASW,\r |
| 4376 | instrux_SFENCE,\r |
| 4377 | instrux_SGDT,\r |
| 4378 | instrux_SHL,\r |
| 4379 | instrux_SHLD,\r |
| 4380 | instrux_SHR,\r |
| 4381 | instrux_SHRD,\r |
| 4382 | instrux_SHUFPD,\r |
| 4383 | instrux_SHUFPS,\r |
| 4384 | instrux_SIDT,\r |
| 4385 | instrux_SLDT,\r |
| 4386 | instrux_SMI,\r |
| 4387 | instrux_SMINT,\r |
| 4388 | instrux_SMINTOLD,\r |
| 4389 | instrux_SMSW,\r |
| 4390 | instrux_SQRTPD,\r |
| 4391 | instrux_SQRTPS,\r |
| 4392 | instrux_SQRTSD,\r |
| 4393 | instrux_SQRTSS,\r |
| 4394 | instrux_STC,\r |
| 4395 | instrux_STD,\r |
| 4396 | instrux_STI,\r |
| 4397 | instrux_STMXCSR,\r |
| 4398 | instrux_STOSB,\r |
| 4399 | instrux_STOSD,\r |
| 4400 | instrux_STOSW,\r |
| 4401 | instrux_STR,\r |
| 4402 | instrux_SUB,\r |
| 4403 | instrux_SUBPD,\r |
| 4404 | instrux_SUBPS,\r |
| 4405 | instrux_SUBSD,\r |
| 4406 | instrux_SUBSS,\r |
| 4407 | instrux_SVDC,\r |
| 4408 | instrux_SVLDT,\r |
| 4409 | instrux_SVTS,\r |
| 4410 | instrux_SYSCALL,\r |
| 4411 | instrux_SYSENTER,\r |
| 4412 | instrux_SYSEXIT,\r |
| 4413 | instrux_SYSRET,\r |
| 4414 | instrux_TEST,\r |
| 4415 | instrux_UCOMISD,\r |
| 4416 | instrux_UCOMISS,\r |
| 4417 | instrux_UD0,\r |
| 4418 | instrux_UD1,\r |
| 4419 | instrux_UD2,\r |
| 4420 | instrux_UMOV,\r |
| 4421 | instrux_UNPCKHPD,\r |
| 4422 | instrux_UNPCKHPS,\r |
| 4423 | instrux_UNPCKLPD,\r |
| 4424 | instrux_UNPCKLPS,\r |
| 4425 | instrux_VERR,\r |
| 4426 | instrux_VERW,\r |
| 4427 | instrux_WAIT,\r |
| 4428 | instrux_WBINVD,\r |
| 4429 | instrux_WRMSR,\r |
| 4430 | instrux_WRSHR,\r |
| 4431 | instrux_XADD,\r |
| 4432 | instrux_XBTS,\r |
| 4433 | instrux_XCHG,\r |
| 4434 | instrux_XLAT,\r |
| 4435 | instrux_XLATB,\r |
| 4436 | instrux_XOR,\r |
| 4437 | instrux_XORPD,\r |
| 4438 | instrux_XORPS,\r |
| 4439 | instrux_XSTORE,\r |
| 4440 | instrux_CMOVcc,\r |
| 4441 | instrux_Jcc,\r |
| 4442 | instrux_SETcc,\r |
| 4443 | };\r |