| 1 | /* This file auto-generated from insns.dat by insns.pl - don't edit it */\r |
| 2 | \r |
| 3 | #include "nasm.h"\r |
| 4 | #include "insns.h"\r |
| 5 | \r |
| 6 | static struct itemplate instrux[] = {\r |
| 7 | {I_AAA, 0, {0,0,0}, "\1\x37", IF_8086},\r |
| 8 | {I_AAD, 0, {0,0,0}, "\2\xD5\x0A", IF_8086},\r |
| 9 | {I_AAD, 1, {IMMEDIATE,0,0}, "\1\xD5\24", IF_8086|IF_SB},\r |
| 10 | {I_AAM, 0, {0,0,0}, "\2\xD4\x0A", IF_8086},\r |
| 11 | {I_AAM, 1, {IMMEDIATE,0,0}, "\1\xD4\24", IF_8086|IF_SB},\r |
| 12 | {I_AAS, 0, {0,0,0}, "\1\x3F", IF_8086},\r |
| 13 | {I_ADC, 2, {MEMORY,REG8,0}, "\300\1\x10\101", IF_8086|IF_SM},\r |
| 14 | {I_ADC, 2, {REG8,REG8,0}, "\1\x10\101", IF_8086},\r |
| 15 | {I_ADC, 2, {MEMORY,REG16,0}, "\320\300\1\x11\101", IF_8086|IF_SM},\r |
| 16 | {I_ADC, 2, {REG16,REG16,0}, "\320\1\x11\101", IF_8086},\r |
| 17 | {I_ADC, 2, {MEMORY,REG32,0}, "\321\300\1\x11\101", IF_386|IF_SM},\r |
| 18 | {I_ADC, 2, {REG32,REG32,0}, "\321\1\x11\101", IF_386},\r |
| 19 | {I_ADC, 2, {REG8,MEMORY,0}, "\301\1\x12\110", IF_8086|IF_SM},\r |
| 20 | {I_ADC, 2, {REG8,REG8,0}, "\1\x12\110", IF_8086},\r |
| 21 | {I_ADC, 2, {REG16,MEMORY,0}, "\320\301\1\x13\110", IF_8086|IF_SM},\r |
| 22 | {I_ADC, 2, {REG16,REG16,0}, "\320\1\x13\110", IF_8086},\r |
| 23 | {I_ADC, 2, {REG32,MEMORY,0}, "\321\301\1\x13\110", IF_386|IF_SM},\r |
| 24 | {I_ADC, 2, {REG32,REG32,0}, "\321\1\x13\110", IF_386},\r |
| 25 | {I_ADC, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\202\15", IF_8086},\r |
| 26 | {I_ADC, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\202\15", IF_386},\r |
| 27 | {I_ADC, 2, {REG_AL,IMMEDIATE,0}, "\1\x14\21", IF_8086|IF_SM},\r |
| 28 | {I_ADC, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x15\31", IF_8086|IF_SM},\r |
| 29 | {I_ADC, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x15\41", IF_386|IF_SM},\r |
| 30 | {I_ADC, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\202\21", IF_8086|IF_SM},\r |
| 31 | {I_ADC, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\202\131", IF_8086|IF_SM},\r |
| 32 | {I_ADC, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\202\141", IF_386|IF_SM},\r |
| 33 | {I_ADC, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\202\21", IF_8086|IF_SM},\r |
| 34 | {I_ADC, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\202\131", IF_8086|IF_SM},\r |
| 35 | {I_ADC, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\202\141", IF_386|IF_SM},\r |
| 36 | {I_ADD, 2, {MEMORY,REG8,0}, "\300\17\101", IF_8086|IF_SM},\r |
| 37 | {I_ADD, 2, {REG8,REG8,0}, "\17\101", IF_8086},\r |
| 38 | {I_ADD, 2, {MEMORY,REG16,0}, "\320\300\1\x01\101", IF_8086|IF_SM},\r |
| 39 | {I_ADD, 2, {REG16,REG16,0}, "\320\1\x01\101", IF_8086},\r |
| 40 | {I_ADD, 2, {MEMORY,REG32,0}, "\321\300\1\x01\101", IF_386|IF_SM},\r |
| 41 | {I_ADD, 2, {REG32,REG32,0}, "\321\1\x01\101", IF_386},\r |
| 42 | {I_ADD, 2, {REG8,MEMORY,0}, "\301\1\x02\110", IF_8086|IF_SM},\r |
| 43 | {I_ADD, 2, {REG8,REG8,0}, "\1\x02\110", IF_8086},\r |
| 44 | {I_ADD, 2, {REG16,MEMORY,0}, "\320\301\1\x03\110", IF_8086|IF_SM},\r |
| 45 | {I_ADD, 2, {REG16,REG16,0}, "\320\1\x03\110", IF_8086},\r |
| 46 | {I_ADD, 2, {REG32,MEMORY,0}, "\321\301\1\x03\110", IF_386|IF_SM},\r |
| 47 | {I_ADD, 2, {REG32,REG32,0}, "\321\1\x03\110", IF_386},\r |
| 48 | {I_ADD, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\200\15", IF_8086},\r |
| 49 | {I_ADD, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\200\15", IF_386},\r |
| 50 | {I_ADD, 2, {REG_AL,IMMEDIATE,0}, "\1\x04\21", IF_8086|IF_SM},\r |
| 51 | {I_ADD, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x05\31", IF_8086|IF_SM},\r |
| 52 | {I_ADD, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x05\41", IF_386|IF_SM},\r |
| 53 | {I_ADD, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\200\21", IF_8086|IF_SM},\r |
| 54 | {I_ADD, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\200\131", IF_8086|IF_SM},\r |
| 55 | {I_ADD, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\200\141", IF_386|IF_SM},\r |
| 56 | {I_ADD, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\200\21", IF_8086|IF_SM},\r |
| 57 | {I_ADD, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\200\131", IF_8086|IF_SM},\r |
| 58 | {I_ADD, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\200\141", IF_386|IF_SM},\r |
| 59 | {I_AND, 2, {MEMORY,REG8,0}, "\300\1\x20\101", IF_8086|IF_SM},\r |
| 60 | {I_AND, 2, {REG8,REG8,0}, "\1\x20\101", IF_8086},\r |
| 61 | {I_AND, 2, {MEMORY,REG16,0}, "\320\300\1\x21\101", IF_8086|IF_SM},\r |
| 62 | {I_AND, 2, {REG16,REG16,0}, "\320\1\x21\101", IF_8086},\r |
| 63 | {I_AND, 2, {MEMORY,REG32,0}, "\321\300\1\x21\101", IF_386|IF_SM},\r |
| 64 | {I_AND, 2, {REG32,REG32,0}, "\321\1\x21\101", IF_386},\r |
| 65 | {I_AND, 2, {REG8,MEMORY,0}, "\301\1\x22\110", IF_8086|IF_SM},\r |
| 66 | {I_AND, 2, {REG8,REG8,0}, "\1\x22\110", IF_8086},\r |
| 67 | {I_AND, 2, {REG16,MEMORY,0}, "\320\301\1\x23\110", IF_8086|IF_SM},\r |
| 68 | {I_AND, 2, {REG16,REG16,0}, "\320\1\x23\110", IF_8086},\r |
| 69 | {I_AND, 2, {REG32,MEMORY,0}, "\321\301\1\x23\110", IF_386|IF_SM},\r |
| 70 | {I_AND, 2, {REG32,REG32,0}, "\321\1\x23\110", IF_386},\r |
| 71 | {I_AND, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\204\15", IF_8086},\r |
| 72 | {I_AND, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\204\15", IF_386},\r |
| 73 | {I_AND, 2, {REG_AL,IMMEDIATE,0}, "\1\x24\21", IF_8086|IF_SM},\r |
| 74 | {I_AND, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x25\31", IF_8086|IF_SM},\r |
| 75 | {I_AND, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x25\41", IF_386|IF_SM},\r |
| 76 | {I_AND, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\204\21", IF_8086|IF_SM},\r |
| 77 | {I_AND, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\204\131", IF_8086|IF_SM},\r |
| 78 | {I_AND, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\204\141", IF_386|IF_SM},\r |
| 79 | {I_AND, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\204\21", IF_8086|IF_SM},\r |
| 80 | {I_AND, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\204\131", IF_8086|IF_SM},\r |
| 81 | {I_AND, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\204\141", IF_386|IF_SM},\r |
| 82 | {I_ARPL, 2, {MEMORY,REG16,0}, "\300\1\x63\101", IF_286|IF_PROT|IF_SM},\r |
| 83 | {I_ARPL, 2, {REG16,REG16,0}, "\1\x63\101", IF_286|IF_PROT},\r |
| 84 | {I_BOUND, 2, {REG16,MEMORY,0}, "\320\301\1\x62\110", IF_186},\r |
| 85 | {I_BOUND, 2, {REG32,MEMORY,0}, "\321\301\1\x62\110", IF_386},\r |
| 86 | {I_BSF, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xBC\110", IF_386|IF_SM},\r |
| 87 | {I_BSF, 2, {REG16,REG16,0}, "\320\2\x0F\xBC\110", IF_386},\r |
| 88 | {I_BSF, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xBC\110", IF_386|IF_SM},\r |
| 89 | {I_BSF, 2, {REG32,REG32,0}, "\321\2\x0F\xBC\110", IF_386},\r |
| 90 | {I_BSR, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xBD\110", IF_386|IF_SM},\r |
| 91 | {I_BSR, 2, {REG16,REG16,0}, "\320\2\x0F\xBD\110", IF_386},\r |
| 92 | {I_BSR, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xBD\110", IF_386|IF_SM},\r |
| 93 | {I_BSR, 2, {REG32,REG32,0}, "\321\2\x0F\xBD\110", IF_386},\r |
| 94 | {I_BSWAP, 1, {REG32,0,0}, "\321\1\x0F\10\xC8", IF_486},\r |
| 95 | {I_BT, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xA3\101", IF_386|IF_SM},\r |
| 96 | {I_BT, 2, {REG16,REG16,0}, "\320\2\x0F\xA3\101", IF_386},\r |
| 97 | {I_BT, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xA3\101", IF_386|IF_SM},\r |
| 98 | {I_BT, 2, {REG32,REG32,0}, "\321\2\x0F\xA3\101", IF_386},\r |
| 99 | {I_BT, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\2\x0F\xBA\204\25", IF_386|IF_SB},\r |
| 100 | {I_BT, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\2\x0F\xBA\204\25", IF_386|IF_SB},\r |
| 101 | {I_BTC, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xBB\101", IF_386|IF_SM},\r |
| 102 | {I_BTC, 2, {REG16,REG16,0}, "\320\2\x0F\xBB\101", IF_386},\r |
| 103 | {I_BTC, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xBB\101", IF_386|IF_SM},\r |
| 104 | {I_BTC, 2, {REG32,REG32,0}, "\321\2\x0F\xBB\101", IF_386},\r |
| 105 | {I_BTC, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\2\x0F\xBA\207\25", IF_386|IF_SB},\r |
| 106 | {I_BTC, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\2\x0F\xBA\207\25", IF_386|IF_SB},\r |
| 107 | {I_BTR, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xB3\101", IF_386|IF_SM},\r |
| 108 | {I_BTR, 2, {REG16,REG16,0}, "\320\2\x0F\xB3\101", IF_386},\r |
| 109 | {I_BTR, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xB3\101", IF_386|IF_SM},\r |
| 110 | {I_BTR, 2, {REG32,REG32,0}, "\321\2\x0F\xB3\101", IF_386},\r |
| 111 | {I_BTR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\2\x0F\xBA\206\25", IF_386|IF_SB},\r |
| 112 | {I_BTR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\2\x0F\xBA\206\25", IF_386|IF_SB},\r |
| 113 | {I_BTS, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xAB\101", IF_386|IF_SM},\r |
| 114 | {I_BTS, 2, {REG16,REG16,0}, "\320\2\x0F\xAB\101", IF_386},\r |
| 115 | {I_BTS, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xAB\101", IF_386|IF_SM},\r |
| 116 | {I_BTS, 2, {REG32,REG32,0}, "\321\2\x0F\xAB\101", IF_386},\r |
| 117 | {I_BTS, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\2\x0F\xBA\205\25", IF_386|IF_SB},\r |
| 118 | {I_BTS, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\2\x0F\xBA\205\25", IF_386|IF_SB},\r |
| 119 | {I_CALL, 1, {IMMEDIATE,0,0}, "\322\1\xE8\64", IF_8086},\r |
| 120 | {I_CALL, 1, {IMMEDIATE|NEAR,0,0}, "\322\1\xE8\64", IF_8086},\r |
| 121 | {I_CALL, 1, {IMMEDIATE|BITS16,0,0}, "\320\1\xE8\64", IF_8086},\r |
| 122 | {I_CALL, 1, {IMMEDIATE|BITS16|NEAR,0,0}, "\320\1\xE8\64", IF_8086},\r |
| 123 | {I_CALL, 1, {IMMEDIATE|BITS32,0,0}, "\321\1\xE8\64", IF_386},\r |
| 124 | {I_CALL, 1, {IMMEDIATE|BITS32|NEAR,0,0}, "\321\1\xE8\64", IF_386},\r |
| 125 | {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE,0}, "\322\1\x9A\35\30", IF_8086},\r |
| 126 | {I_CALL, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0}, "\320\1\x9A\31\30", IF_8086},\r |
| 127 | {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0}, "\320\1\x9A\31\30", IF_8086},\r |
| 128 | {I_CALL, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0}, "\321\1\x9A\41\30", IF_386},\r |
| 129 | {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0}, "\321\1\x9A\41\30", IF_386},\r |
| 130 | {I_CALL, 1, {MEMORY|FAR,0,0}, "\322\300\1\xFF\203", IF_8086},\r |
| 131 | {I_CALL, 1, {MEMORY|BITS16|FAR,0,0}, "\320\300\1\xFF\203", IF_8086},\r |
| 132 | {I_CALL, 1, {MEMORY|BITS32|FAR,0,0}, "\321\300\1\xFF\203", IF_386},\r |
| 133 | {I_CALL, 1, {MEMORY|NEAR,0,0}, "\322\300\1\xFF\202", IF_8086},\r |
| 134 | {I_CALL, 1, {MEMORY|BITS16|NEAR,0,0}, "\320\300\1\xFF\202", IF_8086},\r |
| 135 | {I_CALL, 1, {MEMORY|BITS32|NEAR,0,0}, "\321\300\1\xFF\202", IF_386},\r |
| 136 | {I_CALL, 1, {REG16,0,0}, "\320\300\1\xFF\202", IF_8086},\r |
| 137 | {I_CALL, 1, {REG32,0,0}, "\321\300\1\xFF\202", IF_386},\r |
| 138 | {I_CALL, 1, {MEMORY,0,0}, "\322\300\1\xFF\202", IF_8086},\r |
| 139 | {I_CALL, 1, {MEMORY|BITS16,0,0}, "\320\300\1\xFF\202", IF_8086},\r |
| 140 | {I_CALL, 1, {MEMORY|BITS32,0,0}, "\321\300\1\xFF\202", IF_386},\r |
| 141 | {I_CBW, 0, {0,0,0}, "\320\1\x98", IF_8086},\r |
| 142 | {I_CDQ, 0, {0,0,0}, "\321\1\x99", IF_386},\r |
| 143 | {I_CLC, 0, {0,0,0}, "\1\xF8", IF_8086},\r |
| 144 | {I_CLD, 0, {0,0,0}, "\1\xFC", IF_8086},\r |
| 145 | {I_CLI, 0, {0,0,0}, "\1\xFA", IF_8086},\r |
| 146 | {I_CLTS, 0, {0,0,0}, "\2\x0F\x06", IF_286|IF_PRIV},\r |
| 147 | {I_CMC, 0, {0,0,0}, "\1\xF5", IF_8086},\r |
| 148 | {I_CMP, 2, {MEMORY,REG8,0}, "\300\1\x38\101", IF_8086|IF_SM},\r |
| 149 | {I_CMP, 2, {REG8,REG8,0}, "\1\x38\101", IF_8086},\r |
| 150 | {I_CMP, 2, {MEMORY,REG16,0}, "\320\300\1\x39\101", IF_8086|IF_SM},\r |
| 151 | {I_CMP, 2, {REG16,REG16,0}, "\320\1\x39\101", IF_8086},\r |
| 152 | {I_CMP, 2, {MEMORY,REG32,0}, "\321\300\1\x39\101", IF_386|IF_SM},\r |
| 153 | {I_CMP, 2, {REG32,REG32,0}, "\321\1\x39\101", IF_386},\r |
| 154 | {I_CMP, 2, {REG8,MEMORY,0}, "\301\1\x3A\110", IF_8086|IF_SM},\r |
| 155 | {I_CMP, 2, {REG8,REG8,0}, "\1\x3A\110", IF_8086},\r |
| 156 | {I_CMP, 2, {REG16,MEMORY,0}, "\320\301\1\x3B\110", IF_8086|IF_SM},\r |
| 157 | {I_CMP, 2, {REG16,REG16,0}, "\320\1\x3B\110", IF_8086},\r |
| 158 | {I_CMP, 2, {REG32,MEMORY,0}, "\321\301\1\x3B\110", IF_386|IF_SM},\r |
| 159 | {I_CMP, 2, {REG32,REG32,0}, "\321\1\x3B\110", IF_386},\r |
| 160 | {I_CMP, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\207\15", IF_8086},\r |
| 161 | {I_CMP, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\207\15", IF_386},\r |
| 162 | {I_CMP, 2, {REG_AL,IMMEDIATE,0}, "\1\x3C\21", IF_8086|IF_SM},\r |
| 163 | {I_CMP, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x3D\31", IF_8086|IF_SM},\r |
| 164 | {I_CMP, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x3D\41", IF_386|IF_SM},\r |
| 165 | {I_CMP, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\207\21", IF_8086|IF_SM},\r |
| 166 | {I_CMP, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\207\131", IF_8086|IF_SM},\r |
| 167 | {I_CMP, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\207\141", IF_386|IF_SM},\r |
| 168 | {I_CMP, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\207\21", IF_8086|IF_SM},\r |
| 169 | {I_CMP, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\207\131", IF_8086|IF_SM},\r |
| 170 | {I_CMP, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\207\141", IF_386|IF_SM},\r |
| 171 | {I_CMPSB, 0, {0,0,0}, "\332\1\xA6", IF_8086},\r |
| 172 | {I_CMPSD, 0, {0,0,0}, "\332\321\1\xA7", IF_386},\r |
| 173 | {I_CMPSW, 0, {0,0,0}, "\332\320\1\xA7", IF_8086},\r |
| 174 | {I_CMPXCHG, 2, {MEMORY,REG8,0}, "\300\2\x0F\xB0\101", IF_PENT|IF_SM},\r |
| 175 | {I_CMPXCHG, 2, {REG8,REG8,0}, "\2\x0F\xB0\101", IF_PENT},\r |
| 176 | {I_CMPXCHG, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xB1\101", IF_PENT|IF_SM},\r |
| 177 | {I_CMPXCHG, 2, {REG16,REG16,0}, "\320\2\x0F\xB1\101", IF_PENT},\r |
| 178 | {I_CMPXCHG, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xB1\101", IF_PENT|IF_SM},\r |
| 179 | {I_CMPXCHG, 2, {REG32,REG32,0}, "\321\2\x0F\xB1\101", IF_PENT},\r |
| 180 | {I_CMPXCHG486, 2, {MEMORY,REG8,0}, "\300\2\x0F\xA6\101", IF_486|IF_SM|IF_UNDOC},\r |
| 181 | {I_CMPXCHG486, 2, {REG8,REG8,0}, "\2\x0F\xA6\101", IF_486|IF_UNDOC},\r |
| 182 | {I_CMPXCHG486, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xA7\101", IF_486|IF_SM|IF_UNDOC},\r |
| 183 | {I_CMPXCHG486, 2, {REG16,REG16,0}, "\320\2\x0F\xA7\101", IF_486|IF_UNDOC},\r |
| 184 | {I_CMPXCHG486, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xA7\101", IF_486|IF_SM|IF_UNDOC},\r |
| 185 | {I_CMPXCHG486, 2, {REG32,REG32,0}, "\321\2\x0F\xA7\101", IF_486|IF_UNDOC},\r |
| 186 | {I_CMPXCHG8B, 1, {MEMORY,0,0}, "\300\2\x0F\xC7\201", IF_PENT},\r |
| 187 | {I_CPUID, 0, {0,0,0}, "\2\x0F\xA2", IF_PENT},\r |
| 188 | {I_CWD, 0, {0,0,0}, "\320\1\x99", IF_8086},\r |
| 189 | {I_CWDE, 0, {0,0,0}, "\321\1\x98", IF_386},\r |
| 190 | {I_DAA, 0, {0,0,0}, "\1\x27", IF_8086},\r |
| 191 | {I_DAS, 0, {0,0,0}, "\1\x2F", IF_8086},\r |
| 192 | {I_DEC, 1, {REG16,0,0}, "\320\10\x48", IF_8086},\r |
| 193 | {I_DEC, 1, {REG32,0,0}, "\321\10\x48", IF_386},\r |
| 194 | {I_DEC, 1, {REGMEM|BITS8,0,0}, "\300\1\xFE\201", IF_8086},\r |
| 195 | {I_DEC, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xFF\201", IF_8086},\r |
| 196 | {I_DEC, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xFF\201", IF_386},\r |
| 197 | {I_DIV, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\206", IF_8086},\r |
| 198 | {I_DIV, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\206", IF_8086},\r |
| 199 | {I_DIV, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\206", IF_386},\r |
| 200 | {I_EMMS, 0, {0,0,0}, "\2\x0F\x77", IF_PENT|IF_MMX},\r |
| 201 | {I_ENTER, 2, {IMMEDIATE,IMMEDIATE,0}, "\1\xC8\30\25", IF_186},\r |
| 202 | {I_EQU, 1, {IMMEDIATE,0,0}, "\0", IF_8086},\r |
| 203 | {I_EQU, 2, {IMMEDIATE|COLON,IMMEDIATE,0}, "\0", IF_8086},\r |
| 204 | {I_F2XM1, 0, {0,0,0}, "\2\xD9\xF0", IF_8086|IF_FPU},\r |
| 205 | {I_FABS, 0, {0,0,0}, "\2\xD9\xE1", IF_8086|IF_FPU},\r |
| 206 | {I_FADD, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\200", IF_8086|IF_FPU},\r |
| 207 | {I_FADD, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\200", IF_8086|IF_FPU},\r |
| 208 | {I_FADD, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xC0", IF_8086|IF_FPU},\r |
| 209 | {I_FADD, 1, {FPUREG,0,0}, "\1\xD8\10\xC0", IF_8086|IF_FPU},\r |
| 210 | {I_FADD, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xC0", IF_8086|IF_FPU},\r |
| 211 | {I_FADD, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xC0", IF_8086|IF_FPU},\r |
| 212 | {I_FADDP, 1, {FPUREG,0,0}, "\1\xDE\10\xC0", IF_8086|IF_FPU},\r |
| 213 | {I_FADDP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xC0", IF_8086|IF_FPU},\r |
| 214 | {I_FBLD, 1, {MEMORY|BITS80,0,0}, "\300\1\xDF\204", IF_8086|IF_FPU},\r |
| 215 | {I_FBLD, 1, {MEMORY,0,0}, "\300\1\xDF\204", IF_8086|IF_FPU},\r |
| 216 | {I_FBSTP, 1, {MEMORY|BITS80,0,0}, "\300\1\xDF\206", IF_8086|IF_FPU},\r |
| 217 | {I_FBSTP, 1, {MEMORY,0,0}, "\300\1\xDF\206", IF_8086|IF_FPU},\r |
| 218 | {I_FCHS, 0, {0,0,0}, "\2\xD9\xE0", IF_8086|IF_FPU},\r |
| 219 | {I_FCLEX, 0, {0,0,0}, "\3\x9B\xDB\xE2", IF_8086|IF_FPU},\r |
| 220 | {I_FCMOVB, 1, {FPUREG,0,0}, "\1\xDA\10\xC0", IF_P6|IF_FPU},\r |
| 221 | {I_FCMOVB, 2, {FPU0,FPUREG,0}, "\1\xDA\11\xC0", IF_P6|IF_FPU},\r |
| 222 | {I_FCMOVBE, 1, {FPUREG,0,0}, "\1\xDA\10\xD0", IF_P6|IF_FPU},\r |
| 223 | {I_FCMOVBE, 2, {FPU0,FPUREG,0}, "\1\xDA\11\xD0", IF_P6|IF_FPU},\r |
| 224 | {I_FCMOVE, 1, {FPUREG,0,0}, "\1\xDA\10\xC8", IF_P6|IF_FPU},\r |
| 225 | {I_FCMOVE, 2, {FPU0,FPUREG,0}, "\1\xDA\11\xC8", IF_P6|IF_FPU},\r |
| 226 | {I_FCMOVNB, 1, {FPUREG,0,0}, "\1\xDB\10\xC0", IF_P6|IF_FPU},\r |
| 227 | {I_FCMOVNB, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xC0", IF_P6|IF_FPU},\r |
| 228 | {I_FCMOVNBE, 1, {FPUREG,0,0}, "\1\xDB\10\xD0", IF_P6|IF_FPU},\r |
| 229 | {I_FCMOVNBE, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xD0", IF_P6|IF_FPU},\r |
| 230 | {I_FCMOVNE, 1, {FPUREG,0,0}, "\1\xDB\10\xC8", IF_P6|IF_FPU},\r |
| 231 | {I_FCMOVNE, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xC8", IF_P6|IF_FPU},\r |
| 232 | {I_FCMOVNU, 1, {FPUREG,0,0}, "\1\xDB\10\xD8", IF_P6|IF_FPU},\r |
| 233 | {I_FCMOVNU, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xD8", IF_P6|IF_FPU},\r |
| 234 | {I_FCMOVU, 1, {FPUREG,0,0}, "\1\xDA\10\xD8", IF_P6|IF_FPU},\r |
| 235 | {I_FCMOVU, 2, {FPU0,FPUREG,0}, "\1\xDA\11\xD8", IF_P6|IF_FPU},\r |
| 236 | {I_FCOM, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\202", IF_8086|IF_FPU},\r |
| 237 | {I_FCOM, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\202", IF_8086|IF_FPU},\r |
| 238 | {I_FCOM, 1, {FPUREG,0,0}, "\1\xD8\10\xD0", IF_8086|IF_FPU},\r |
| 239 | {I_FCOM, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xD0", IF_8086|IF_FPU},\r |
| 240 | {I_FCOMI, 1, {FPUREG,0,0}, "\1\xDB\10\xF0", IF_P6|IF_FPU},\r |
| 241 | {I_FCOMI, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xF0", IF_P6|IF_FPU},\r |
| 242 | {I_FCOMIP, 1, {FPUREG,0,0}, "\1\xDF\10\xF0", IF_P6|IF_FPU},\r |
| 243 | {I_FCOMIP, 2, {FPU0,FPUREG,0}, "\1\xDF\11\xF0", IF_P6|IF_FPU},\r |
| 244 | {I_FCOMP, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\203", IF_8086|IF_FPU},\r |
| 245 | {I_FCOMP, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\203", IF_8086|IF_FPU},\r |
| 246 | {I_FCOMP, 1, {FPUREG,0,0}, "\1\xD8\10\xD8", IF_8086|IF_FPU},\r |
| 247 | {I_FCOMP, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xD8", IF_8086|IF_FPU},\r |
| 248 | {I_FCOMPP, 0, {0,0,0}, "\2\xDE\xD9", IF_8086|IF_FPU},\r |
| 249 | {I_FCOS, 0, {0,0,0}, "\2\xD9\xFF", IF_386|IF_FPU},\r |
| 250 | {I_FDECSTP, 0, {0,0,0}, "\2\xD9\xF6", IF_8086|IF_FPU},\r |
| 251 | {I_FDISI, 0, {0,0,0}, "\3\x9B\xDB\xE1", IF_8086|IF_FPU},\r |
| 252 | {I_FDIV, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\206", IF_8086|IF_FPU},\r |
| 253 | {I_FDIV, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\206", IF_8086|IF_FPU},\r |
| 254 | {I_FDIV, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xF8", IF_8086|IF_FPU},\r |
| 255 | {I_FDIV, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xF8", IF_8086|IF_FPU},\r |
| 256 | {I_FDIV, 1, {FPUREG,0,0}, "\1\xD8\10\xF0", IF_8086|IF_FPU},\r |
| 257 | {I_FDIV, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xF0", IF_8086|IF_FPU},\r |
| 258 | {I_FDIVP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xF8", IF_8086|IF_FPU},\r |
| 259 | {I_FDIVP, 1, {FPUREG,0,0}, "\1\xDE\10\xF8", IF_8086|IF_FPU},\r |
| 260 | {I_FDIVR, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\207", IF_8086|IF_FPU},\r |
| 261 | {I_FDIVR, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\207", IF_8086|IF_FPU},\r |
| 262 | {I_FDIVR, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xF0", IF_8086|IF_FPU},\r |
| 263 | {I_FDIVR, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xF0", IF_8086|IF_FPU},\r |
| 264 | {I_FDIVR, 1, {FPUREG,0,0}, "\1\xD8\10\xF8", IF_8086|IF_FPU},\r |
| 265 | {I_FDIVR, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xF8", IF_8086|IF_FPU},\r |
| 266 | {I_FDIVRP, 1, {FPUREG,0,0}, "\1\xDE\10\xF0", IF_8086|IF_FPU},\r |
| 267 | {I_FDIVRP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xF0", IF_8086|IF_FPU},\r |
| 268 | {I_FEMMS, 0, {0,0,0}, "\2\x0F\x0E", IF_PENT|IF_3DNOW},\r |
| 269 | {I_FENI, 0, {0,0,0}, "\3\x9B\xDB\xE0", IF_8086|IF_FPU},\r |
| 270 | {I_FFREE, 1, {FPUREG,0,0}, "\1\xDD\10\xC0", IF_8086|IF_FPU},\r |
| 271 | {I_FFREEP, 1, {FPUREG,0,0}, "\1\xDF\10\xC0", IF_286|IF_FPU|IF_UNDOC},\r |
| 272 | {I_FIADD, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\200", IF_8086|IF_FPU},\r |
| 273 | {I_FIADD, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\200", IF_8086|IF_FPU},\r |
| 274 | {I_FICOM, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\202", IF_8086|IF_FPU},\r |
| 275 | {I_FICOM, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\202", IF_8086|IF_FPU},\r |
| 276 | {I_FICOMP, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\203", IF_8086|IF_FPU},\r |
| 277 | {I_FICOMP, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\203", IF_8086|IF_FPU},\r |
| 278 | {I_FIDIV, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\206", IF_8086|IF_FPU},\r |
| 279 | {I_FIDIV, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\206", IF_8086|IF_FPU},\r |
| 280 | {I_FIDIVR, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\207", IF_8086|IF_FPU},\r |
| 281 | {I_FIDIVR, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\207", IF_8086|IF_FPU},\r |
| 282 | {I_FILD, 1, {MEMORY|BITS32,0,0}, "\300\1\xDB\200", IF_8086|IF_FPU},\r |
| 283 | {I_FILD, 1, {MEMORY|BITS16,0,0}, "\300\1\xDF\200", IF_8086|IF_FPU},\r |
| 284 | {I_FILD, 1, {MEMORY|BITS64,0,0}, "\300\1\xDF\205", IF_8086|IF_FPU},\r |
| 285 | {I_FIMUL, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\201", IF_8086|IF_FPU},\r |
| 286 | {I_FIMUL, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\201", IF_8086|IF_FPU},\r |
| 287 | {I_FINCSTP, 0, {0,0,0}, "\2\xD9\xF7", IF_8086|IF_FPU},\r |
| 288 | {I_FINIT, 0, {0,0,0}, "\3\x9B\xDB\xE3", IF_8086|IF_FPU},\r |
| 289 | {I_FIST, 1, {MEMORY|BITS32,0,0}, "\300\1\xDB\202", IF_8086|IF_FPU},\r |
| 290 | {I_FIST, 1, {MEMORY|BITS16,0,0}, "\300\1\xDF\202", IF_8086|IF_FPU},\r |
| 291 | {I_FISTP, 1, {MEMORY|BITS32,0,0}, "\300\1\xDB\203", IF_8086|IF_FPU},\r |
| 292 | {I_FISTP, 1, {MEMORY|BITS16,0,0}, "\300\1\xDF\203", IF_8086|IF_FPU},\r |
| 293 | {I_FISTP, 1, {MEMORY|BITS64,0,0}, "\300\1\xDF\207", IF_8086|IF_FPU},\r |
| 294 | {I_FISTTP, 1, {MEMORY|BITS32,0,0}, "\300\1\xDD\201", IF_PRESCOTT|IF_FPU},\r |
| 295 | {I_FISTTP, 1, {MEMORY|BITS16,0,0}, "\300\1\xDB\201", IF_PRESCOTT|IF_FPU},\r |
| 296 | {I_FISTTP, 1, {MEMORY|BITS64,0,0}, "\300\1\xDF\201", IF_PRESCOTT|IF_FPU},\r |
| 297 | {I_FISUB, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\204", IF_8086|IF_FPU},\r |
| 298 | {I_FISUB, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\204", IF_8086|IF_FPU},\r |
| 299 | {I_FISUBR, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\205", IF_8086|IF_FPU},\r |
| 300 | {I_FISUBR, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\205", IF_8086|IF_FPU},\r |
| 301 | {I_FLD, 1, {MEMORY|BITS32,0,0}, "\300\1\xD9\200", IF_8086|IF_FPU},\r |
| 302 | {I_FLD, 1, {MEMORY|BITS64,0,0}, "\300\1\xDD\200", IF_8086|IF_FPU},\r |
| 303 | {I_FLD, 1, {MEMORY|BITS80,0,0}, "\300\1\xDB\205", IF_8086|IF_FPU},\r |
| 304 | {I_FLD, 1, {FPUREG,0,0}, "\1\xD9\10\xC0", IF_8086|IF_FPU},\r |
| 305 | {I_FLD1, 0, {0,0,0}, "\2\xD9\xE8", IF_8086|IF_FPU},\r |
| 306 | {I_FLDCW, 1, {MEMORY,0,0}, "\300\1\xD9\205", IF_8086|IF_FPU|IF_SW},\r |
| 307 | {I_FLDENV, 1, {MEMORY,0,0}, "\300\1\xD9\204", IF_8086|IF_FPU},\r |
| 308 | {I_FLDL2E, 0, {0,0,0}, "\2\xD9\xEA", IF_8086|IF_FPU},\r |
| 309 | {I_FLDL2T, 0, {0,0,0}, "\2\xD9\xE9", IF_8086|IF_FPU},\r |
| 310 | {I_FLDLG2, 0, {0,0,0}, "\2\xD9\xEC", IF_8086|IF_FPU},\r |
| 311 | {I_FLDLN2, 0, {0,0,0}, "\2\xD9\xED", IF_8086|IF_FPU},\r |
| 312 | {I_FLDPI, 0, {0,0,0}, "\2\xD9\xEB", IF_8086|IF_FPU},\r |
| 313 | {I_FLDZ, 0, {0,0,0}, "\2\xD9\xEE", IF_8086|IF_FPU},\r |
| 314 | {I_FMUL, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\201", IF_8086|IF_FPU},\r |
| 315 | {I_FMUL, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\201", IF_8086|IF_FPU},\r |
| 316 | {I_FMUL, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xC8", IF_8086|IF_FPU},\r |
| 317 | {I_FMUL, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xC8", IF_8086|IF_FPU},\r |
| 318 | {I_FMUL, 1, {FPUREG,0,0}, "\1\xD8\10\xC8", IF_8086|IF_FPU},\r |
| 319 | {I_FMUL, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xC8", IF_8086|IF_FPU},\r |
| 320 | {I_FMULP, 1, {FPUREG,0,0}, "\1\xDE\10\xC8", IF_8086|IF_FPU},\r |
| 321 | {I_FMULP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xC8", IF_8086|IF_FPU},\r |
| 322 | {I_FNCLEX, 0, {0,0,0}, "\2\xDB\xE2", IF_8086|IF_FPU},\r |
| 323 | {I_FNDISI, 0, {0,0,0}, "\2\xDB\xE1", IF_8086|IF_FPU},\r |
| 324 | {I_FNENI, 0, {0,0,0}, "\2\xDB\xE0", IF_8086|IF_FPU},\r |
| 325 | {I_FNINIT, 0, {0,0,0}, "\2\xDB\xE3", IF_8086|IF_FPU},\r |
| 326 | {I_FNOP, 0, {0,0,0}, "\2\xD9\xD0", IF_8086|IF_FPU},\r |
| 327 | {I_FNSAVE, 1, {MEMORY,0,0}, "\300\1\xDD\206", IF_8086|IF_FPU},\r |
| 328 | {I_FNSTCW, 1, {MEMORY,0,0}, "\300\1\xD9\207", IF_8086|IF_FPU|IF_SW},\r |
| 329 | {I_FNSTENV, 1, {MEMORY,0,0}, "\300\1\xD9\206", IF_8086|IF_FPU},\r |
| 330 | {I_FNSTSW, 1, {MEMORY,0,0}, "\300\1\xDD\207", IF_8086|IF_FPU|IF_SW},\r |
| 331 | {I_FNSTSW, 1, {REG_AX,0,0}, "\2\xDF\xE0", IF_286|IF_FPU},\r |
| 332 | {I_FPATAN, 0, {0,0,0}, "\2\xD9\xF3", IF_8086|IF_FPU},\r |
| 333 | {I_FPREM, 0, {0,0,0}, "\2\xD9\xF8", IF_8086|IF_FPU},\r |
| 334 | {I_FPREM1, 0, {0,0,0}, "\2\xD9\xF5", IF_386|IF_FPU},\r |
| 335 | {I_FPTAN, 0, {0,0,0}, "\2\xD9\xF2", IF_8086|IF_FPU},\r |
| 336 | {I_FRNDINT, 0, {0,0,0}, "\2\xD9\xFC", IF_8086|IF_FPU},\r |
| 337 | {I_FRSTOR, 1, {MEMORY,0,0}, "\300\1\xDD\204", IF_8086|IF_FPU},\r |
| 338 | {I_FSAVE, 1, {MEMORY,0,0}, "\300\2\x9B\xDD\206", IF_8086|IF_FPU},\r |
| 339 | {I_FSCALE, 0, {0,0,0}, "\2\xD9\xFD", IF_8086|IF_FPU},\r |
| 340 | {I_FSETPM, 0, {0,0,0}, "\2\xDB\xE4", IF_286|IF_FPU},\r |
| 341 | {I_FSIN, 0, {0,0,0}, "\2\xD9\xFE", IF_386|IF_FPU},\r |
| 342 | {I_FSINCOS, 0, {0,0,0}, "\2\xD9\xFB", IF_386|IF_FPU},\r |
| 343 | {I_FSQRT, 0, {0,0,0}, "\2\xD9\xFA", IF_8086|IF_FPU},\r |
| 344 | {I_FST, 1, {MEMORY|BITS32,0,0}, "\300\1\xD9\202", IF_8086|IF_FPU},\r |
| 345 | {I_FST, 1, {MEMORY|BITS64,0,0}, "\300\1\xDD\202", IF_8086|IF_FPU},\r |
| 346 | {I_FST, 1, {FPUREG,0,0}, "\1\xDD\10\xD0", IF_8086|IF_FPU},\r |
| 347 | {I_FSTCW, 1, {MEMORY,0,0}, "\300\2\x9B\xD9\207", IF_8086|IF_FPU|IF_SW},\r |
| 348 | {I_FSTENV, 1, {MEMORY,0,0}, "\300\2\x9B\xD9\206", IF_8086|IF_FPU},\r |
| 349 | {I_FSTP, 1, {MEMORY|BITS32,0,0}, "\300\1\xD9\203", IF_8086|IF_FPU},\r |
| 350 | {I_FSTP, 1, {MEMORY|BITS64,0,0}, "\300\1\xDD\203", IF_8086|IF_FPU},\r |
| 351 | {I_FSTP, 1, {MEMORY|BITS80,0,0}, "\300\1\xDB\207", IF_8086|IF_FPU},\r |
| 352 | {I_FSTP, 1, {FPUREG,0,0}, "\1\xDD\10\xD8", IF_8086|IF_FPU},\r |
| 353 | {I_FSTSW, 1, {MEMORY,0,0}, "\300\2\x9B\xDD\207", IF_8086|IF_FPU|IF_SW},\r |
| 354 | {I_FSTSW, 1, {REG_AX,0,0}, "\3\x9B\xDF\xE0", IF_286|IF_FPU},\r |
| 355 | {I_FSUB, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\204", IF_8086|IF_FPU},\r |
| 356 | {I_FSUB, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\204", IF_8086|IF_FPU},\r |
| 357 | {I_FSUB, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xE8", IF_8086|IF_FPU},\r |
| 358 | {I_FSUB, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xE8", IF_8086|IF_FPU},\r |
| 359 | {I_FSUB, 1, {FPUREG,0,0}, "\1\xD8\10\xE0", IF_8086|IF_FPU},\r |
| 360 | {I_FSUB, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xE0", IF_8086|IF_FPU},\r |
| 361 | {I_FSUBP, 1, {FPUREG,0,0}, "\1\xDE\10\xE8", IF_8086|IF_FPU},\r |
| 362 | {I_FSUBP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xE8", IF_8086|IF_FPU},\r |
| 363 | {I_FSUBR, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\205", IF_8086|IF_FPU},\r |
| 364 | {I_FSUBR, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\205", IF_8086|IF_FPU},\r |
| 365 | {I_FSUBR, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xE0", IF_8086|IF_FPU},\r |
| 366 | {I_FSUBR, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xE0", IF_8086|IF_FPU},\r |
| 367 | {I_FSUBR, 1, {FPUREG,0,0}, "\1\xD8\10\xE8", IF_8086|IF_FPU},\r |
| 368 | {I_FSUBR, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xE8", IF_8086|IF_FPU},\r |
| 369 | {I_FSUBRP, 1, {FPUREG,0,0}, "\1\xDE\10\xE0", IF_8086|IF_FPU},\r |
| 370 | {I_FSUBRP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xE0", IF_8086|IF_FPU},\r |
| 371 | {I_FTST, 0, {0,0,0}, "\2\xD9\xE4", IF_8086|IF_FPU},\r |
| 372 | {I_FUCOM, 1, {FPUREG,0,0}, "\1\xDD\10\xE0", IF_386|IF_FPU},\r |
| 373 | {I_FUCOM, 2, {FPU0,FPUREG,0}, "\1\xDD\11\xE0", IF_386|IF_FPU},\r |
| 374 | {I_FUCOMI, 1, {FPUREG,0,0}, "\1\xDB\10\xE8", IF_P6|IF_FPU},\r |
| 375 | {I_FUCOMI, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xE8", IF_P6|IF_FPU},\r |
| 376 | {I_FUCOMIP, 1, {FPUREG,0,0}, "\1\xDF\10\xE8", IF_P6|IF_FPU},\r |
| 377 | {I_FUCOMIP, 2, {FPU0,FPUREG,0}, "\1\xDF\11\xE8", IF_P6|IF_FPU},\r |
| 378 | {I_FUCOMP, 1, {FPUREG,0,0}, "\1\xDD\10\xE8", IF_386|IF_FPU},\r |
| 379 | {I_FUCOMP, 2, {FPU0,FPUREG,0}, "\1\xDD\11\xE8", IF_386|IF_FPU},\r |
| 380 | {I_FUCOMPP, 0, {0,0,0}, "\2\xDA\xE9", IF_386|IF_FPU},\r |
| 381 | {I_FXAM, 0, {0,0,0}, "\2\xD9\xE5", IF_8086|IF_FPU},\r |
| 382 | {I_FXCH, 0, {0,0,0}, "\2\xD9\xC9", IF_8086|IF_FPU},\r |
| 383 | {I_FXCH, 1, {FPUREG,0,0}, "\1\xD9\10\xC8", IF_8086|IF_FPU},\r |
| 384 | {I_FXCH, 2, {FPUREG,FPU0,0}, "\1\xD9\10\xC8", IF_8086|IF_FPU},\r |
| 385 | {I_FXCH, 2, {FPU0,FPUREG,0}, "\1\xD9\11\xC8", IF_8086|IF_FPU},\r |
| 386 | {I_FXTRACT, 0, {0,0,0}, "\2\xD9\xF4", IF_8086|IF_FPU},\r |
| 387 | {I_FYL2X, 0, {0,0,0}, "\2\xD9\xF1", IF_8086|IF_FPU},\r |
| 388 | {I_FYL2XP1, 0, {0,0,0}, "\2\xD9\xF9", IF_8086|IF_FPU},\r |
| 389 | {I_HLT, 0, {0,0,0}, "\1\xF4", IF_8086|IF_PRIV},\r |
| 390 | {I_IDIV, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\207", IF_8086},\r |
| 391 | {I_IDIV, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\207", IF_8086},\r |
| 392 | {I_IDIV, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\207", IF_386},\r |
| 393 | {I_IMUL, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\205", IF_8086},\r |
| 394 | {I_IMUL, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\205", IF_8086},\r |
| 395 | {I_IMUL, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\205", IF_386},\r |
| 396 | {I_IMUL, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xAF\110", IF_386|IF_SM},\r |
| 397 | {I_IMUL, 2, {REG16,REG16,0}, "\320\2\x0F\xAF\110", IF_386},\r |
| 398 | {I_IMUL, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xAF\110", IF_386|IF_SM},\r |
| 399 | {I_IMUL, 2, {REG32,REG32,0}, "\321\2\x0F\xAF\110", IF_386},\r |
| 400 | {I_IMUL, 3, {REG16,MEMORY,IMMEDIATE|BITS8}, "\320\301\1\x6B\110\16", IF_186|IF_SM},\r |
| 401 | {I_IMUL, 3, {REG16,MEMORY,IMMEDIATE|BITS16}, "\320\301\1\x69\110\32", IF_186|IF_SM},\r |
| 402 | {I_IMUL, 3, {REG16,REG16,IMMEDIATE|BITS8}, "\320\1\x6B\110\16", IF_186},\r |
| 403 | {I_IMUL, 3, {REG16,REG16,IMMEDIATE|BITS16}, "\320\1\x69\110\32", IF_186},\r |
| 404 | {I_IMUL, 3, {REG32,MEMORY,IMMEDIATE|BITS8}, "\321\301\1\x6B\110\16", IF_386|IF_SM},\r |
| 405 | {I_IMUL, 3, {REG32,MEMORY,IMMEDIATE|BITS32}, "\321\301\1\x69\110\42", IF_386|IF_SM},\r |
| 406 | {I_IMUL, 3, {REG32,REG32,IMMEDIATE|BITS8}, "\321\1\x6B\110\16", IF_386},\r |
| 407 | {I_IMUL, 3, {REG32,REG32,IMMEDIATE|BITS32}, "\321\1\x69\110\42", IF_386},\r |
| 408 | {I_IMUL, 2, {REG16,IMMEDIATE|BITS8,0}, "\320\1\x6B\100\15", IF_186},\r |
| 409 | {I_IMUL, 2, {REG16,IMMEDIATE|BITS16,0}, "\320\1\x69\100\31", IF_186},\r |
| 410 | {I_IMUL, 2, {REG32,IMMEDIATE|BITS8,0}, "\321\1\x6B\100\15", IF_386},\r |
| 411 | {I_IMUL, 2, {REG32,IMMEDIATE|BITS32,0}, "\321\1\x69\100\41", IF_386},\r |
| 412 | {I_IN, 2, {REG_AL,IMMEDIATE,0}, "\1\xE4\25", IF_8086|IF_SB},\r |
| 413 | {I_IN, 2, {REG_AX,IMMEDIATE,0}, "\320\1\xE5\25", IF_8086|IF_SB},\r |
| 414 | {I_IN, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\xE5\25", IF_386|IF_SB},\r |
| 415 | {I_IN, 2, {REG_AL,REG_DX,0}, "\1\xEC", IF_8086},\r |
| 416 | {I_IN, 2, {REG_AX,REG_DX,0}, "\320\1\xED", IF_8086},\r |
| 417 | {I_IN, 2, {REG_EAX,REG_DX,0}, "\321\1\xED", IF_386},\r |
| 418 | {I_INC, 1, {REG16,0,0}, "\320\10\x40", IF_8086},\r |
| 419 | {I_INC, 1, {REG32,0,0}, "\321\10\x40", IF_386},\r |
| 420 | {I_INC, 1, {REGMEM|BITS8,0,0}, "\300\1\xFE\200", IF_8086},\r |
| 421 | {I_INC, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xFF\200", IF_8086},\r |
| 422 | {I_INC, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xFF\200", IF_386},\r |
| 423 | {I_INSB, 0, {0,0,0}, "\1\x6C", IF_186},\r |
| 424 | {I_INSD, 0, {0,0,0}, "\321\1\x6D", IF_386},\r |
| 425 | {I_INSW, 0, {0,0,0}, "\320\1\x6D", IF_186},\r |
| 426 | {I_INT, 1, {IMMEDIATE,0,0}, "\1\xCD\24", IF_8086|IF_SB},\r |
| 427 | {I_INT1, 0, {0,0,0}, "\1\xF1", IF_386},\r |
| 428 | {I_INT3, 0, {0,0,0}, "\1\xCC", IF_8086},\r |
| 429 | {I_INTO, 0, {0,0,0}, "\1\xCE", IF_8086},\r |
| 430 | {I_INVD, 0, {0,0,0}, "\2\x0F\x08", IF_486|IF_PRIV},\r |
| 431 | {I_INVLPG, 1, {MEMORY,0,0}, "\300\2\x0F\x01\207", IF_486|IF_PRIV},\r |
| 432 | {I_IRET, 0, {0,0,0}, "\322\1\xCF", IF_8086},\r |
| 433 | {I_IRETD, 0, {0,0,0}, "\321\1\xCF", IF_386},\r |
| 434 | {I_IRETW, 0, {0,0,0}, "\320\1\xCF", IF_8086},\r |
| 435 | {I_JCXZ, 1, {IMMEDIATE,0,0}, "\310\1\xE3\50", IF_8086},\r |
| 436 | {I_JECXZ, 1, {IMMEDIATE,0,0}, "\311\1\xE3\50", IF_386},\r |
| 437 | {I_JMP, 1, {IMMEDIATE|SHORT,0,0}, "\1\xEB\50", IF_8086},\r |
| 438 | {I_JMP, 1, {IMMEDIATE,0,0}, "\322\1\xE9\64", IF_8086},\r |
| 439 | {I_JMP, 1, {IMMEDIATE|BITS16,0,0}, "\320\1\xE9\64", IF_8086},\r |
| 440 | {I_JMP, 1, {IMMEDIATE|BITS32,0,0}, "\321\1\xE9\64", IF_386},\r |
| 441 | {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE,0}, "\322\1\xEA\35\30", IF_8086},\r |
| 442 | {I_JMP, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0}, "\320\1\xEA\31\30", IF_8086},\r |
| 443 | {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0}, "\320\1\xEA\31\30", IF_8086},\r |
| 444 | {I_JMP, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0}, "\321\1\xEA\41\30", IF_386},\r |
| 445 | {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0}, "\321\1\xEA\41\30", IF_386},\r |
| 446 | {I_JMP, 1, {MEMORY|FAR,0,0}, "\322\300\1\xFF\205", IF_8086},\r |
| 447 | {I_JMP, 1, {MEMORY|BITS16|FAR,0,0}, "\320\300\1\xFF\205", IF_8086},\r |
| 448 | {I_JMP, 1, {MEMORY|BITS32|FAR,0,0}, "\321\300\1\xFF\205", IF_386},\r |
| 449 | {I_JMP, 1, {MEMORY|NEAR,0,0}, "\322\300\1\xFF\204", IF_8086},\r |
| 450 | {I_JMP, 1, {MEMORY|BITS16|NEAR,0,0}, "\320\300\1\xFF\204", IF_8086},\r |
| 451 | {I_JMP, 1, {MEMORY|BITS32|NEAR,0,0}, "\321\300\1\xFF\204", IF_386},\r |
| 452 | {I_JMP, 1, {REG16,0,0}, "\320\300\1\xFF\204", IF_8086},\r |
| 453 | {I_JMP, 1, {REG32,0,0}, "\321\300\1\xFF\204", IF_386},\r |
| 454 | {I_JMP, 1, {MEMORY,0,0}, "\322\300\1\xFF\204", IF_8086},\r |
| 455 | {I_JMP, 1, {MEMORY|BITS16,0,0}, "\320\300\1\xFF\204", IF_8086},\r |
| 456 | {I_JMP, 1, {MEMORY|BITS32,0,0}, "\321\300\1\xFF\204", IF_386},\r |
| 457 | {I_JMPE, 1, {IMMEDIATE,0,0}, "\322\2\x0F\xB8\64", IF_IA64},\r |
| 458 | {I_JMPE, 1, {IMMEDIATE|BITS16,0,0}, "\320\2\x0F\xB8\64", IF_IA64},\r |
| 459 | {I_JMPE, 1, {IMMEDIATE|BITS32,0,0}, "\321\2\x0F\xB8\64", IF_IA64},\r |
| 460 | {I_JMPE, 1, {REGMEM|BITS16,0,0}, "\320\2\x0F\x00\206", IF_IA64},\r |
| 461 | {I_JMPE, 1, {REGMEM|BITS32,0,0}, "\321\2\x0F\x00\206", IF_IA64},\r |
| 462 | {I_LAHF, 0, {0,0,0}, "\1\x9F", IF_8086},\r |
| 463 | {I_LAR, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\x02\110", IF_286|IF_PROT|IF_SM},\r |
| 464 | {I_LAR, 2, {REG16,REG16,0}, "\320\2\x0F\x02\110", IF_286|IF_PROT},\r |
| 465 | {I_LAR, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\x02\110", IF_386|IF_PROT|IF_SM},\r |
| 466 | {I_LAR, 2, {REG32,REG32,0}, "\321\2\x0F\x02\110", IF_386|IF_PROT},\r |
| 467 | {I_LDS, 2, {REG16,MEMORY,0}, "\320\301\1\xC5\110", IF_8086},\r |
| 468 | {I_LDS, 2, {REG32,MEMORY,0}, "\321\301\1\xC5\110", IF_386},\r |
| 469 | {I_LEA, 2, {REG16,MEMORY,0}, "\320\301\1\x8D\110", IF_8086},\r |
| 470 | {I_LEA, 2, {REG32,MEMORY,0}, "\321\301\1\x8D\110", IF_386},\r |
| 471 | {I_LEAVE, 0, {0,0,0}, "\1\xC9", IF_186},\r |
| 472 | {I_LES, 2, {REG16,MEMORY,0}, "\320\301\1\xC4\110", IF_8086},\r |
| 473 | {I_LES, 2, {REG32,MEMORY,0}, "\321\301\1\xC4\110", IF_386},\r |
| 474 | {I_LFS, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xB4\110", IF_386},\r |
| 475 | {I_LFS, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xB4\110", IF_386},\r |
| 476 | {I_LGDT, 1, {MEMORY,0,0}, "\300\2\x0F\x01\202", IF_286|IF_PRIV},\r |
| 477 | {I_LGS, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xB5\110", IF_386},\r |
| 478 | {I_LGS, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xB5\110", IF_386},\r |
| 479 | {I_LIDT, 1, {MEMORY,0,0}, "\300\2\x0F\x01\203", IF_286|IF_PRIV},\r |
| 480 | {I_LLDT, 1, {MEMORY,0,0}, "\300\1\x0F\17\202", IF_286|IF_PROT|IF_PRIV},\r |
| 481 | {I_LLDT, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\202", IF_286|IF_PROT|IF_PRIV},\r |
| 482 | {I_LLDT, 1, {REG16,0,0}, "\1\x0F\17\202", IF_286|IF_PROT|IF_PRIV},\r |
| 483 | {I_LMSW, 1, {MEMORY,0,0}, "\300\2\x0F\x01\206", IF_286|IF_PRIV},\r |
| 484 | {I_LMSW, 1, {MEMORY|BITS16,0,0}, "\300\2\x0F\x01\206", IF_286|IF_PRIV},\r |
| 485 | {I_LMSW, 1, {REG16,0,0}, "\2\x0F\x01\206", IF_286|IF_PRIV},\r |
| 486 | {I_LOADALL, 0, {0,0,0}, "\2\x0F\x07", IF_386|IF_UNDOC},\r |
| 487 | {I_LOADALL286, 0, {0,0,0}, "\2\x0F\x05", IF_286|IF_UNDOC},\r |
| 488 | {I_LODSB, 0, {0,0,0}, "\1\xAC", IF_8086},\r |
| 489 | {I_LODSD, 0, {0,0,0}, "\321\1\xAD", IF_386},\r |
| 490 | {I_LODSW, 0, {0,0,0}, "\320\1\xAD", IF_8086},\r |
| 491 | {I_LOOP, 1, {IMMEDIATE,0,0}, "\312\1\xE2\50", IF_8086},\r |
| 492 | {I_LOOP, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE2\50", IF_8086},\r |
| 493 | {I_LOOP, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE2\50", IF_386},\r |
| 494 | {I_LOOPE, 1, {IMMEDIATE,0,0}, "\312\1\xE1\50", IF_8086},\r |
| 495 | {I_LOOPE, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE1\50", IF_8086},\r |
| 496 | {I_LOOPE, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE1\50", IF_386},\r |
| 497 | {I_LOOPNE, 1, {IMMEDIATE,0,0}, "\312\1\xE0\50", IF_8086},\r |
| 498 | {I_LOOPNE, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE0\50", IF_8086},\r |
| 499 | {I_LOOPNE, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE0\50", IF_386},\r |
| 500 | {I_LOOPNZ, 1, {IMMEDIATE,0,0}, "\312\1\xE0\50", IF_8086},\r |
| 501 | {I_LOOPNZ, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE0\50", IF_8086},\r |
| 502 | {I_LOOPNZ, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE0\50", IF_386},\r |
| 503 | {I_LOOPZ, 1, {IMMEDIATE,0,0}, "\312\1\xE1\50", IF_8086},\r |
| 504 | {I_LOOPZ, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE1\50", IF_8086},\r |
| 505 | {I_LOOPZ, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE1\50", IF_386},\r |
| 506 | {I_LSL, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\x03\110", IF_286|IF_PROT|IF_SM},\r |
| 507 | {I_LSL, 2, {REG16,REG16,0}, "\320\2\x0F\x03\110", IF_286|IF_PROT},\r |
| 508 | {I_LSL, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\x03\110", IF_386|IF_PROT|IF_SM},\r |
| 509 | {I_LSL, 2, {REG32,REG32,0}, "\321\2\x0F\x03\110", IF_386|IF_PROT},\r |
| 510 | {I_LSS, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xB2\110", IF_386},\r |
| 511 | {I_LSS, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xB2\110", IF_386},\r |
| 512 | {I_LTR, 1, {MEMORY,0,0}, "\300\1\x0F\17\203", IF_286|IF_PROT|IF_PRIV},\r |
| 513 | {I_LTR, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\203", IF_286|IF_PROT|IF_PRIV},\r |
| 514 | {I_LTR, 1, {REG16,0,0}, "\1\x0F\17\203", IF_286|IF_PROT|IF_PRIV},\r |
| 515 | {I_MONITOR, 0, {0,0,0}, "\3\x0F\x01\xC8", IF_PRESCOTT},\r |
| 516 | {I_MOV, 2, {MEMORY,REG_SREG,0}, "\300\1\x8C\101", IF_8086|IF_SM},\r |
| 517 | {I_MOV, 2, {REG16,REG_SREG,0}, "\320\1\x8C\101", IF_8086},\r |
| 518 | {I_MOV, 2, {REG32,REG_SREG,0}, "\321\1\x8C\101", IF_386},\r |
| 519 | {I_MOV, 2, {REG_SREG,MEMORY,0}, "\301\1\x8E\110", IF_8086|IF_SM},\r |
| 520 | {I_MOV, 2, {REG_SREG,REG16,0}, "\1\x8E\110", IF_8086},\r |
| 521 | {I_MOV, 2, {REG_SREG,REG32,0}, "\1\x8E\110", IF_386},\r |
| 522 | {I_MOV, 2, {REG_AL,MEM_OFFS,0}, "\301\1\xA0\45", IF_8086|IF_SM},\r |
| 523 | {I_MOV, 2, {REG_AX,MEM_OFFS,0}, "\301\320\1\xA1\45", IF_8086|IF_SM},\r |
| 524 | {I_MOV, 2, {REG_EAX,MEM_OFFS,0}, "\301\321\1\xA1\45", IF_386|IF_SM},\r |
| 525 | {I_MOV, 2, {MEM_OFFS,REG_AL,0}, "\300\1\xA2\44", IF_8086|IF_SM},\r |
| 526 | {I_MOV, 2, {MEM_OFFS,REG_AX,0}, "\300\320\1\xA3\44", IF_8086|IF_SM},\r |
| 527 | {I_MOV, 2, {MEM_OFFS,REG_EAX,0}, "\300\321\1\xA3\44", IF_386|IF_SM},\r |
| 528 | {I_MOV, 2, {REG32,REG_CREG,0}, "\2\x0F\x20\101", IF_386|IF_PRIV},\r |
| 529 | {I_MOV, 2, {REG32,REG_DREG,0}, "\2\x0F\x21\101", IF_386|IF_PRIV},\r |
| 530 | {I_MOV, 2, {REG32,REG_TREG,0}, "\2\x0F\x24\101", IF_386|IF_PRIV},\r |
| 531 | {I_MOV, 2, {REG_CREG,REG32,0}, "\2\x0F\x22\110", IF_386|IF_PRIV},\r |
| 532 | {I_MOV, 2, {REG_DREG,REG32,0}, "\2\x0F\x23\110", IF_386|IF_PRIV},\r |
| 533 | {I_MOV, 2, {REG_TREG,REG32,0}, "\2\x0F\x26\110", IF_386|IF_PRIV},\r |
| 534 | {I_MOV, 2, {MEMORY,REG8,0}, "\300\1\x88\101", IF_8086|IF_SM},\r |
| 535 | {I_MOV, 2, {REG8,REG8,0}, "\1\x88\101", IF_8086},\r |
| 536 | {I_MOV, 2, {MEMORY,REG16,0}, "\320\300\1\x89\101", IF_8086|IF_SM},\r |
| 537 | {I_MOV, 2, {REG16,REG16,0}, "\320\1\x89\101", IF_8086},\r |
| 538 | {I_MOV, 2, {MEMORY,REG32,0}, "\321\300\1\x89\101", IF_386|IF_SM},\r |
| 539 | {I_MOV, 2, {REG32,REG32,0}, "\321\1\x89\101", IF_386},\r |
| 540 | {I_MOV, 2, {REG8,MEMORY,0}, "\301\1\x8A\110", IF_8086|IF_SM},\r |
| 541 | {I_MOV, 2, {REG8,REG8,0}, "\1\x8A\110", IF_8086},\r |
| 542 | {I_MOV, 2, {REG16,MEMORY,0}, "\320\301\1\x8B\110", IF_8086|IF_SM},\r |
| 543 | {I_MOV, 2, {REG16,REG16,0}, "\320\1\x8B\110", IF_8086},\r |
| 544 | {I_MOV, 2, {REG32,MEMORY,0}, "\321\301\1\x8B\110", IF_386|IF_SM},\r |
| 545 | {I_MOV, 2, {REG32,REG32,0}, "\321\1\x8B\110", IF_386},\r |
| 546 | {I_MOV, 2, {REG8,IMMEDIATE,0}, "\10\xB0\21", IF_8086|IF_SM},\r |
| 547 | {I_MOV, 2, {REG16,IMMEDIATE,0}, "\320\10\xB8\31", IF_8086|IF_SM},\r |
| 548 | {I_MOV, 2, {REG32,IMMEDIATE,0}, "\321\10\xB8\41", IF_386|IF_SM},\r |
| 549 | {I_MOV, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC6\200\21", IF_8086|IF_SM},\r |
| 550 | {I_MOV, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC7\200\31", IF_8086|IF_SM},\r |
| 551 | {I_MOV, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC7\200\41", IF_386|IF_SM},\r |
| 552 | {I_MOV, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\xC6\200\21", IF_8086|IF_SM},\r |
| 553 | {I_MOV, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\1\xC7\200\31", IF_8086|IF_SM},\r |
| 554 | {I_MOV, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\1\xC7\200\41", IF_386|IF_SM},\r |
| 555 | {I_MOVD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x6E\110", IF_PENT|IF_MMX|IF_SD},\r |
| 556 | {I_MOVD, 2, {MMXREG,REG32,0}, "\2\x0F\x6E\110", IF_PENT|IF_MMX},\r |
| 557 | {I_MOVD, 2, {MEMORY,MMXREG,0}, "\300\2\x0F\x7E\101", IF_PENT|IF_MMX|IF_SD},\r |
| 558 | {I_MOVD, 2, {REG32,MMXREG,0}, "\2\x0F\x7E\101", IF_PENT|IF_MMX},\r |
| 559 | {I_MOVQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x6F\110", IF_PENT|IF_MMX|IF_SM},\r |
| 560 | {I_MOVQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x6F\110", IF_PENT|IF_MMX},\r |
| 561 | {I_MOVQ, 2, {MEMORY,MMXREG,0}, "\300\2\x0F\x7F\101", IF_PENT|IF_MMX|IF_SM},\r |
| 562 | {I_MOVQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x7F\101", IF_PENT|IF_MMX},\r |
| 563 | {I_MOVSB, 0, {0,0,0}, "\1\xA4", IF_8086},\r |
| 564 | {I_MOVSD, 0, {0,0,0}, "\321\1\xA5", IF_386},\r |
| 565 | {I_MOVSW, 0, {0,0,0}, "\320\1\xA5", IF_8086},\r |
| 566 | {I_MOVSX, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xBE\110", IF_386|IF_SB},\r |
| 567 | {I_MOVSX, 2, {REG16,REG8,0}, "\320\2\x0F\xBE\110", IF_386},\r |
| 568 | {I_MOVSX, 2, {REG32,REGMEM|BITS8,0}, "\321\301\2\x0F\xBE\110", IF_386},\r |
| 569 | {I_MOVSX, 2, {REG32,REGMEM|BITS16,0}, "\321\301\2\x0F\xBF\110", IF_386},\r |
| 570 | {I_MOVZX, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xB6\110", IF_386|IF_SB},\r |
| 571 | {I_MOVZX, 2, {REG16,REG8,0}, "\320\2\x0F\xB6\110", IF_386},\r |
| 572 | {I_MOVZX, 2, {REG32,REGMEM|BITS8,0}, "\321\301\2\x0F\xB6\110", IF_386},\r |
| 573 | {I_MOVZX, 2, {REG32,REGMEM|BITS16,0}, "\321\301\2\x0F\xB7\110", IF_386},\r |
| 574 | {I_MUL, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\204", IF_8086},\r |
| 575 | {I_MUL, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\204", IF_8086},\r |
| 576 | {I_MUL, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\204", IF_386},\r |
| 577 | {I_MWAIT, 0, {0,0,0}, "\3\x0F\x01\xC9", IF_PRESCOTT},\r |
| 578 | {I_NEG, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\203", IF_8086},\r |
| 579 | {I_NEG, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\203", IF_8086},\r |
| 580 | {I_NEG, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\203", IF_386},\r |
| 581 | {I_NOP, 0, {0,0,0}, "\1\x90", IF_8086},\r |
| 582 | {I_NOT, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\202", IF_8086},\r |
| 583 | {I_NOT, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\202", IF_8086},\r |
| 584 | {I_NOT, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\202", IF_386},\r |
| 585 | {I_OR, 2, {MEMORY,REG8,0}, "\300\1\x08\101", IF_8086|IF_SM},\r |
| 586 | {I_OR, 2, {REG8,REG8,0}, "\1\x08\101", IF_8086},\r |
| 587 | {I_OR, 2, {MEMORY,REG16,0}, "\320\300\1\x09\101", IF_8086|IF_SM},\r |
| 588 | {I_OR, 2, {REG16,REG16,0}, "\320\1\x09\101", IF_8086},\r |
| 589 | {I_OR, 2, {MEMORY,REG32,0}, "\321\300\1\x09\101", IF_386|IF_SM},\r |
| 590 | {I_OR, 2, {REG32,REG32,0}, "\321\1\x09\101", IF_386},\r |
| 591 | {I_OR, 2, {REG8,MEMORY,0}, "\301\1\x0A\110", IF_8086|IF_SM},\r |
| 592 | {I_OR, 2, {REG8,REG8,0}, "\1\x0A\110", IF_8086},\r |
| 593 | {I_OR, 2, {REG16,MEMORY,0}, "\320\301\1\x0B\110", IF_8086|IF_SM},\r |
| 594 | {I_OR, 2, {REG16,REG16,0}, "\320\1\x0B\110", IF_8086},\r |
| 595 | {I_OR, 2, {REG32,MEMORY,0}, "\321\301\1\x0B\110", IF_386|IF_SM},\r |
| 596 | {I_OR, 2, {REG32,REG32,0}, "\321\1\x0B\110", IF_386},\r |
| 597 | {I_OR, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\201\15", IF_8086},\r |
| 598 | {I_OR, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\201\15", IF_386},\r |
| 599 | {I_OR, 2, {REG_AL,IMMEDIATE,0}, "\1\x0C\21", IF_8086|IF_SM},\r |
| 600 | {I_OR, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x0D\31", IF_8086|IF_SM},\r |
| 601 | {I_OR, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x0D\41", IF_386|IF_SM},\r |
| 602 | {I_OR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\201\21", IF_8086|IF_SM},\r |
| 603 | {I_OR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\201\131", IF_8086|IF_SM},\r |
| 604 | {I_OR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\201\141", IF_386|IF_SM},\r |
| 605 | {I_OR, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\201\21", IF_8086|IF_SM},\r |
| 606 | {I_OR, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\201\131", IF_8086|IF_SM},\r |
| 607 | {I_OR, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\201\141", IF_386|IF_SM},\r |
| 608 | {I_OUT, 2, {IMMEDIATE,REG_AL,0}, "\1\xE6\24", IF_8086|IF_SB},\r |
| 609 | {I_OUT, 2, {IMMEDIATE,REG_AX,0}, "\320\1\xE7\24", IF_8086|IF_SB},\r |
| 610 | {I_OUT, 2, {IMMEDIATE,REG_EAX,0}, "\321\1\xE7\24", IF_386|IF_SB},\r |
| 611 | {I_OUT, 2, {REG_DX,REG_AL,0}, "\1\xEE", IF_8086},\r |
| 612 | {I_OUT, 2, {REG_DX,REG_AX,0}, "\320\1\xEF", IF_8086},\r |
| 613 | {I_OUT, 2, {REG_DX,REG_EAX,0}, "\321\1\xEF", IF_386},\r |
| 614 | {I_OUTSB, 0, {0,0,0}, "\1\x6E", IF_186},\r |
| 615 | {I_OUTSD, 0, {0,0,0}, "\321\1\x6F", IF_386},\r |
| 616 | {I_OUTSW, 0, {0,0,0}, "\320\1\x6F", IF_186},\r |
| 617 | {I_PACKSSDW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x6B\110", IF_PENT|IF_MMX|IF_SM},\r |
| 618 | {I_PACKSSDW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x6B\110", IF_PENT|IF_MMX},\r |
| 619 | {I_PACKSSWB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x63\110", IF_PENT|IF_MMX|IF_SM},\r |
| 620 | {I_PACKSSWB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x63\110", IF_PENT|IF_MMX},\r |
| 621 | {I_PACKUSWB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x67\110", IF_PENT|IF_MMX|IF_SM},\r |
| 622 | {I_PACKUSWB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x67\110", IF_PENT|IF_MMX},\r |
| 623 | {I_PADDB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFC\110", IF_PENT|IF_MMX|IF_SM},\r |
| 624 | {I_PADDB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFC\110", IF_PENT|IF_MMX},\r |
| 625 | {I_PADDD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFE\110", IF_PENT|IF_MMX|IF_SM},\r |
| 626 | {I_PADDD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFE\110", IF_PENT|IF_MMX},\r |
| 627 | {I_PADDSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEC\110", IF_PENT|IF_MMX|IF_SM},\r |
| 628 | {I_PADDSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEC\110", IF_PENT|IF_MMX},\r |
| 629 | {I_PADDSIW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x51\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 630 | {I_PADDSIW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x51\110", IF_PENT|IF_MMX|IF_CYRIX},\r |
| 631 | {I_PADDSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xED\110", IF_PENT|IF_MMX|IF_SM},\r |
| 632 | {I_PADDSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xED\110", IF_PENT|IF_MMX},\r |
| 633 | {I_PADDUSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDC\110", IF_PENT|IF_MMX|IF_SM},\r |
| 634 | {I_PADDUSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDC\110", IF_PENT|IF_MMX},\r |
| 635 | {I_PADDUSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDD\110", IF_PENT|IF_MMX|IF_SM},\r |
| 636 | {I_PADDUSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDD\110", IF_PENT|IF_MMX},\r |
| 637 | {I_PADDW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFD\110", IF_PENT|IF_MMX|IF_SM},\r |
| 638 | {I_PADDW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFD\110", IF_PENT|IF_MMX},\r |
| 639 | {I_PAND, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDB\110", IF_PENT|IF_MMX|IF_SM},\r |
| 640 | {I_PAND, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDB\110", IF_PENT|IF_MMX},\r |
| 641 | {I_PANDN, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDF\110", IF_PENT|IF_MMX|IF_SM},\r |
| 642 | {I_PANDN, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDF\110", IF_PENT|IF_MMX},\r |
| 643 | {I_PAVEB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x50\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 644 | {I_PAVEB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x50\110", IF_PENT|IF_MMX|IF_CYRIX},\r |
| 645 | {I_PAVGUSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xBF", IF_PENT|IF_3DNOW|IF_SM},\r |
| 646 | {I_PAVGUSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xBF", IF_PENT|IF_3DNOW},\r |
| 647 | {I_PCMPEQB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x74\110", IF_PENT|IF_MMX|IF_SM},\r |
| 648 | {I_PCMPEQB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x74\110", IF_PENT|IF_MMX},\r |
| 649 | {I_PCMPEQD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x76\110", IF_PENT|IF_MMX|IF_SM},\r |
| 650 | {I_PCMPEQD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x76\110", IF_PENT|IF_MMX},\r |
| 651 | {I_PCMPEQW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x75\110", IF_PENT|IF_MMX|IF_SM},\r |
| 652 | {I_PCMPEQW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x75\110", IF_PENT|IF_MMX},\r |
| 653 | {I_PCMPGTB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x64\110", IF_PENT|IF_MMX|IF_SM},\r |
| 654 | {I_PCMPGTB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x64\110", IF_PENT|IF_MMX},\r |
| 655 | {I_PCMPGTD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x66\110", IF_PENT|IF_MMX|IF_SM},\r |
| 656 | {I_PCMPGTD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x66\110", IF_PENT|IF_MMX},\r |
| 657 | {I_PCMPGTW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x65\110", IF_PENT|IF_MMX|IF_SM},\r |
| 658 | {I_PCMPGTW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x65\110", IF_PENT|IF_MMX},\r |
| 659 | {I_PDISTIB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x54\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 660 | {I_PF2ID, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x1D", IF_PENT|IF_3DNOW|IF_SM},\r |
| 661 | {I_PF2ID, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x1D", IF_PENT|IF_3DNOW},\r |
| 662 | {I_PFACC, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xAE", IF_PENT|IF_3DNOW|IF_SM},\r |
| 663 | {I_PFACC, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xAE", IF_PENT|IF_3DNOW},\r |
| 664 | {I_PFADD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x9E", IF_PENT|IF_3DNOW|IF_SM},\r |
| 665 | {I_PFADD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x9E", IF_PENT|IF_3DNOW},\r |
| 666 | {I_PFCMPEQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xB0", IF_PENT|IF_3DNOW|IF_SM},\r |
| 667 | {I_PFCMPEQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xB0", IF_PENT|IF_3DNOW},\r |
| 668 | {I_PFCMPGE, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x90", IF_PENT|IF_3DNOW|IF_SM},\r |
| 669 | {I_PFCMPGE, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x90", IF_PENT|IF_3DNOW},\r |
| 670 | {I_PFCMPGT, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xA0", IF_PENT|IF_3DNOW|IF_SM},\r |
| 671 | {I_PFCMPGT, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xA0", IF_PENT|IF_3DNOW},\r |
| 672 | {I_PFMAX, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xA4", IF_PENT|IF_3DNOW|IF_SM},\r |
| 673 | {I_PFMAX, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xA4", IF_PENT|IF_3DNOW},\r |
| 674 | {I_PFMIN, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x94", IF_PENT|IF_3DNOW|IF_SM},\r |
| 675 | {I_PFMIN, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x94", IF_PENT|IF_3DNOW},\r |
| 676 | {I_PFMUL, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xB4", IF_PENT|IF_3DNOW|IF_SM},\r |
| 677 | {I_PFMUL, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xB4", IF_PENT|IF_3DNOW},\r |
| 678 | {I_PFRCP, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x96", IF_PENT|IF_3DNOW|IF_SM},\r |
| 679 | {I_PFRCP, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x96", IF_PENT|IF_3DNOW},\r |
| 680 | {I_PFRCPIT1, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xA6", IF_PENT|IF_3DNOW|IF_SM},\r |
| 681 | {I_PFRCPIT1, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xA6", IF_PENT|IF_3DNOW},\r |
| 682 | {I_PFRCPIT2, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xB6", IF_PENT|IF_3DNOW|IF_SM},\r |
| 683 | {I_PFRCPIT2, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xB6", IF_PENT|IF_3DNOW},\r |
| 684 | {I_PFRSQIT1, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xA7", IF_PENT|IF_3DNOW|IF_SM},\r |
| 685 | {I_PFRSQIT1, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xA7", IF_PENT|IF_3DNOW},\r |
| 686 | {I_PFRSQRT, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x97", IF_PENT|IF_3DNOW|IF_SM},\r |
| 687 | {I_PFRSQRT, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x97", IF_PENT|IF_3DNOW},\r |
| 688 | {I_PFSUB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x9A", IF_PENT|IF_3DNOW|IF_SM},\r |
| 689 | {I_PFSUB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x9A", IF_PENT|IF_3DNOW},\r |
| 690 | {I_PFSUBR, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xAA", IF_PENT|IF_3DNOW|IF_SM},\r |
| 691 | {I_PFSUBR, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xAA", IF_PENT|IF_3DNOW},\r |
| 692 | {I_PI2FD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x0D", IF_PENT|IF_3DNOW|IF_SM},\r |
| 693 | {I_PI2FD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x0D", IF_PENT|IF_3DNOW},\r |
| 694 | {I_PMACHRIW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5E\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 695 | {I_PMADDWD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF5\110", IF_PENT|IF_MMX|IF_SM},\r |
| 696 | {I_PMADDWD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF5\110", IF_PENT|IF_MMX},\r |
| 697 | {I_PMAGW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x52\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 698 | {I_PMAGW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x52\110", IF_PENT|IF_MMX|IF_CYRIX},\r |
| 699 | {I_PMULHRIW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5D\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 700 | {I_PMULHRIW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x5D\110", IF_PENT|IF_MMX|IF_CYRIX},\r |
| 701 | {I_PMULHRWA, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\1\xB7", IF_PENT|IF_3DNOW|IF_SM},\r |
| 702 | {I_PMULHRWA, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\1\xB7", IF_PENT|IF_3DNOW},\r |
| 703 | {I_PMULHRWC, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x59\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 704 | {I_PMULHRWC, 2, {MMXREG,MMXREG,0}, "\2\x0F\x59\110", IF_PENT|IF_MMX|IF_CYRIX},\r |
| 705 | {I_PMULHW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE5\110", IF_PENT|IF_MMX|IF_SM},\r |
| 706 | {I_PMULHW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE5\110", IF_PENT|IF_MMX},\r |
| 707 | {I_PMULLW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD5\110", IF_PENT|IF_MMX|IF_SM},\r |
| 708 | {I_PMULLW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD5\110", IF_PENT|IF_MMX},\r |
| 709 | {I_PMVGEZB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5C\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 710 | {I_PMVLZB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5B\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 711 | {I_PMVNZB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5A\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 712 | {I_PMVZB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x58\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 713 | {I_POP, 1, {REG16,0,0}, "\320\10\x58", IF_8086},\r |
| 714 | {I_POP, 1, {REG32,0,0}, "\321\10\x58", IF_386},\r |
| 715 | {I_POP, 1, {REGMEM|BITS16,0,0}, "\320\300\1\x8F\200", IF_8086},\r |
| 716 | {I_POP, 1, {REGMEM|BITS32,0,0}, "\321\300\1\x8F\200", IF_386},\r |
| 717 | {I_POP, 1, {REG_DESS,0,0}, "\4", IF_8086},\r |
| 718 | {I_POP, 1, {REG_FSGS,0,0}, "\1\x0F\5", IF_386},\r |
| 719 | {I_POPA, 0, {0,0,0}, "\322\1\x61", IF_186},\r |
| 720 | {I_POPAD, 0, {0,0,0}, "\321\1\x61", IF_386},\r |
| 721 | {I_POPAW, 0, {0,0,0}, "\320\1\x61", IF_186},\r |
| 722 | {I_POPF, 0, {0,0,0}, "\322\1\x9D", IF_8086},\r |
| 723 | {I_POPFD, 0, {0,0,0}, "\321\1\x9D", IF_386},\r |
| 724 | {I_POPFW, 0, {0,0,0}, "\320\1\x9D", IF_8086},\r |
| 725 | {I_POR, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEB\110", IF_PENT|IF_MMX|IF_SM},\r |
| 726 | {I_POR, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEB\110", IF_PENT|IF_MMX},\r |
| 727 | {I_PREFETCH, 1, {MEMORY,0,0}, "\2\x0F\x0D\200", IF_PENT|IF_3DNOW|IF_SM},\r |
| 728 | {I_PREFETCHW, 1, {MEMORY,0,0}, "\2\x0F\x0D\201", IF_PENT|IF_3DNOW|IF_SM},\r |
| 729 | {I_PSLLD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF2\110", IF_PENT|IF_MMX|IF_SM},\r |
| 730 | {I_PSLLD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF2\110", IF_PENT|IF_MMX},\r |
| 731 | {I_PSLLD, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x72\206\25", IF_PENT|IF_MMX},\r |
| 732 | {I_PSLLQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF3\110", IF_PENT|IF_MMX|IF_SM},\r |
| 733 | {I_PSLLQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF3\110", IF_PENT|IF_MMX},\r |
| 734 | {I_PSLLQ, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x73\206\25", IF_PENT|IF_MMX},\r |
| 735 | {I_PSLLW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF1\110", IF_PENT|IF_MMX|IF_SM},\r |
| 736 | {I_PSLLW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF1\110", IF_PENT|IF_MMX},\r |
| 737 | {I_PSLLW, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x71\206\25", IF_PENT|IF_MMX},\r |
| 738 | {I_PSRAD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE2\110", IF_PENT|IF_MMX|IF_SM},\r |
| 739 | {I_PSRAD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE2\110", IF_PENT|IF_MMX},\r |
| 740 | {I_PSRAD, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x72\204\25", IF_PENT|IF_MMX},\r |
| 741 | {I_PSRAW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE1\110", IF_PENT|IF_MMX|IF_SM},\r |
| 742 | {I_PSRAW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE1\110", IF_PENT|IF_MMX},\r |
| 743 | {I_PSRAW, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x71\204\25", IF_PENT|IF_MMX},\r |
| 744 | {I_PSRLD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD2\110", IF_PENT|IF_MMX|IF_SM},\r |
| 745 | {I_PSRLD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD2\110", IF_PENT|IF_MMX},\r |
| 746 | {I_PSRLD, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x72\202\25", IF_PENT|IF_MMX},\r |
| 747 | {I_PSRLQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD3\110", IF_PENT|IF_MMX|IF_SM},\r |
| 748 | {I_PSRLQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD3\110", IF_PENT|IF_MMX},\r |
| 749 | {I_PSRLQ, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x73\202\25", IF_PENT|IF_MMX},\r |
| 750 | {I_PSRLW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD1\110", IF_PENT|IF_MMX|IF_SM},\r |
| 751 | {I_PSRLW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD1\110", IF_PENT|IF_MMX},\r |
| 752 | {I_PSRLW, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x71\202\25", IF_PENT|IF_MMX},\r |
| 753 | {I_PSUBB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF8\110", IF_PENT|IF_MMX|IF_SM},\r |
| 754 | {I_PSUBB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF8\110", IF_PENT|IF_MMX},\r |
| 755 | {I_PSUBD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFA\110", IF_PENT|IF_MMX|IF_SM},\r |
| 756 | {I_PSUBD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFA\110", IF_PENT|IF_MMX},\r |
| 757 | {I_PSUBSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE8\110", IF_PENT|IF_MMX|IF_SM},\r |
| 758 | {I_PSUBSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE8\110", IF_PENT|IF_MMX},\r |
| 759 | {I_PSUBSIW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x55\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r |
| 760 | {I_PSUBSIW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x55\110", IF_PENT|IF_MMX|IF_CYRIX},\r |
| 761 | {I_PSUBSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE9\110", IF_PENT|IF_MMX|IF_SM},\r |
| 762 | {I_PSUBSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE9\110", IF_PENT|IF_MMX},\r |
| 763 | {I_PSUBUSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD8\110", IF_PENT|IF_MMX|IF_SM},\r |
| 764 | {I_PSUBUSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD8\110", IF_PENT|IF_MMX},\r |
| 765 | {I_PSUBUSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD9\110", IF_PENT|IF_MMX|IF_SM},\r |
| 766 | {I_PSUBUSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD9\110", IF_PENT|IF_MMX},\r |
| 767 | {I_PSUBW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF9\110", IF_PENT|IF_MMX|IF_SM},\r |
| 768 | {I_PSUBW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF9\110", IF_PENT|IF_MMX},\r |
| 769 | {I_PUNPCKHBW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x68\110", IF_PENT|IF_MMX|IF_SM},\r |
| 770 | {I_PUNPCKHBW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x68\110", IF_PENT|IF_MMX},\r |
| 771 | {I_PUNPCKHDQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x6A\110", IF_PENT|IF_MMX|IF_SM},\r |
| 772 | {I_PUNPCKHDQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x6A\110", IF_PENT|IF_MMX},\r |
| 773 | {I_PUNPCKHWD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x69\110", IF_PENT|IF_MMX|IF_SM},\r |
| 774 | {I_PUNPCKHWD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x69\110", IF_PENT|IF_MMX},\r |
| 775 | {I_PUNPCKLBW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x60\110", IF_PENT|IF_MMX|IF_SM},\r |
| 776 | {I_PUNPCKLBW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x60\110", IF_PENT|IF_MMX},\r |
| 777 | {I_PUNPCKLDQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x62\110", IF_PENT|IF_MMX|IF_SM},\r |
| 778 | {I_PUNPCKLDQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x62\110", IF_PENT|IF_MMX},\r |
| 779 | {I_PUNPCKLWD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x61\110", IF_PENT|IF_MMX|IF_SM},\r |
| 780 | {I_PUNPCKLWD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x61\110", IF_PENT|IF_MMX},\r |
| 781 | {I_PUSH, 1, {REG16,0,0}, "\320\10\x50", IF_8086},\r |
| 782 | {I_PUSH, 1, {REG32,0,0}, "\321\10\x50", IF_386},\r |
| 783 | {I_PUSH, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xFF\206", IF_8086},\r |
| 784 | {I_PUSH, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xFF\206", IF_386},\r |
| 785 | {I_PUSH, 1, {REG_CS,0,0}, "\6", IF_8086},\r |
| 786 | {I_PUSH, 1, {REG_DESS,0,0}, "\6", IF_8086},\r |
| 787 | {I_PUSH, 1, {REG_FSGS,0,0}, "\1\x0F\7", IF_386},\r |
| 788 | {I_PUSH, 1, {IMMEDIATE|BITS8,0,0}, "\1\x6A\14", IF_186},\r |
| 789 | {I_PUSH, 1, {IMMEDIATE|BITS16,0,0}, "\320\133\1\x68\130", IF_186},\r |
| 790 | {I_PUSH, 1, {IMMEDIATE|BITS32,0,0}, "\321\143\1\x68\140", IF_386},\r |
| 791 | {I_PUSH, 1, {IMMEDIATE,0,0}, "\1\x68\34", IF_186},\r |
| 792 | {I_PUSHA, 0, {0,0,0}, "\322\1\x60", IF_186},\r |
| 793 | {I_PUSHAD, 0, {0,0,0}, "\321\1\x60", IF_386},\r |
| 794 | {I_PUSHAW, 0, {0,0,0}, "\320\1\x60", IF_186},\r |
| 795 | {I_PUSHF, 0, {0,0,0}, "\322\1\x9C", IF_8086},\r |
| 796 | {I_PUSHFD, 0, {0,0,0}, "\321\1\x9C", IF_386},\r |
| 797 | {I_PUSHFW, 0, {0,0,0}, "\320\1\x9C", IF_8086},\r |
| 798 | {I_PXOR, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEF\110", IF_PENT|IF_MMX|IF_SM},\r |
| 799 | {I_PXOR, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEF\110", IF_PENT|IF_MMX},\r |
| 800 | {I_RCL, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\202", IF_8086},\r |
| 801 | {I_RCL, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\202", IF_8086},\r |
| 802 | {I_RCL, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\202\25", IF_186|IF_SB},\r |
| 803 | {I_RCL, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\202", IF_8086},\r |
| 804 | {I_RCL, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\202", IF_8086},\r |
| 805 | {I_RCL, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\202\25", IF_186|IF_SB},\r |
| 806 | {I_RCL, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\202", IF_386},\r |
| 807 | {I_RCL, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\202", IF_386},\r |
| 808 | {I_RCL, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\202\25", IF_386|IF_SB},\r |
| 809 | {I_RCR, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\203", IF_8086},\r |
| 810 | {I_RCR, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\203", IF_8086},\r |
| 811 | {I_RCR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\203\25", IF_186|IF_SB},\r |
| 812 | {I_RCR, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\203", IF_8086},\r |
| 813 | {I_RCR, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\203", IF_8086},\r |
| 814 | {I_RCR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\203\25", IF_186|IF_SB},\r |
| 815 | {I_RCR, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\203", IF_386},\r |
| 816 | {I_RCR, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\203", IF_386},\r |
| 817 | {I_RCR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\203\25", IF_386|IF_SB},\r |
| 818 | {I_RDSHR, 1, {REGMEM|BITS32,0,0}, "\321\300\2\x0F\x36\200", IF_P6|IF_CYRIX|IF_SMM},\r |
| 819 | {I_RDMSR, 0, {0,0,0}, "\2\x0F\x32", IF_PENT|IF_PRIV},\r |
| 820 | {I_RDPMC, 0, {0,0,0}, "\2\x0F\x33", IF_P6},\r |
| 821 | {I_RDTSC, 0, {0,0,0}, "\2\x0F\x31", IF_PENT},\r |
| 822 | {I_RESB, 1, {IMMEDIATE,0,0}, "\340", IF_8086},\r |
| 823 | {I_RET, 0, {0,0,0}, "\1\xC3", IF_8086},\r |
| 824 | {I_RET, 1, {IMMEDIATE,0,0}, "\1\xC2\30", IF_8086|IF_SW},\r |
| 825 | {I_RETF, 0, {0,0,0}, "\1\xCB", IF_8086},\r |
| 826 | {I_RETF, 1, {IMMEDIATE,0,0}, "\1\xCA\30", IF_8086|IF_SW},\r |
| 827 | {I_RETN, 0, {0,0,0}, "\1\xC3", IF_8086},\r |
| 828 | {I_RETN, 1, {IMMEDIATE,0,0}, "\1\xC2\30", IF_8086|IF_SW},\r |
| 829 | {I_ROL, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\200", IF_8086},\r |
| 830 | {I_ROL, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\200", IF_8086},\r |
| 831 | {I_ROL, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\200\25", IF_186|IF_SB},\r |
| 832 | {I_ROL, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\200", IF_8086},\r |
| 833 | {I_ROL, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\200", IF_8086},\r |
| 834 | {I_ROL, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\200\25", IF_186|IF_SB},\r |
| 835 | {I_ROL, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\200", IF_386},\r |
| 836 | {I_ROL, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\200", IF_386},\r |
| 837 | {I_ROL, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\200\25", IF_386|IF_SB},\r |
| 838 | {I_ROR, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\201", IF_8086},\r |
| 839 | {I_ROR, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\201", IF_8086},\r |
| 840 | {I_ROR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\201\25", IF_186|IF_SB},\r |
| 841 | {I_ROR, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\201", IF_8086},\r |
| 842 | {I_ROR, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\201", IF_8086},\r |
| 843 | {I_ROR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\201\25", IF_186|IF_SB},\r |
| 844 | {I_ROR, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\201", IF_386},\r |
| 845 | {I_ROR, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\201", IF_386},\r |
| 846 | {I_ROR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\201\25", IF_386|IF_SB},\r |
| 847 | {I_RSDC, 2, {REG_SREG,MEMORY|BITS80,0}, "\301\2\x0F\x79\110", IF_486|IF_CYRIX|IF_SMM},\r |
| 848 | {I_RSLDT, 1, {MEMORY|BITS80,0,0}, "\300\2\x0F\x7B\200", IF_486|IF_CYRIX|IF_SMM},\r |
| 849 | {I_RSM, 0, {0,0,0}, "\2\x0F\xAA", IF_PENT|IF_SMM},\r |
| 850 | {I_RSTS, 1, {MEMORY|BITS80,0,0}, "\300\2\x0F\x7D\200", IF_486|IF_CYRIX|IF_SMM},\r |
| 851 | {I_SAHF, 0, {0,0,0}, "\1\x9E", IF_8086},\r |
| 852 | {I_SALC, 0, {0,0,0}, "\1\xD6", IF_8086|IF_UNDOC},\r |
| 853 | {I_SAR, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\207", IF_8086},\r |
| 854 | {I_SAR, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\207", IF_8086},\r |
| 855 | {I_SAR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\207\25", IF_186|IF_SB},\r |
| 856 | {I_SAR, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\207", IF_8086},\r |
| 857 | {I_SAR, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\207", IF_8086},\r |
| 858 | {I_SAR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\207\25", IF_186|IF_SB},\r |
| 859 | {I_SAR, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\207", IF_386},\r |
| 860 | {I_SAR, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\207", IF_386},\r |
| 861 | {I_SAR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\207\25", IF_386|IF_SB},\r |
| 862 | {I_SBB, 2, {MEMORY,REG8,0}, "\300\1\x18\101", IF_8086|IF_SM},\r |
| 863 | {I_SBB, 2, {REG8,REG8,0}, "\1\x18\101", IF_8086},\r |
| 864 | {I_SBB, 2, {MEMORY,REG16,0}, "\320\300\1\x19\101", IF_8086|IF_SM},\r |
| 865 | {I_SBB, 2, {REG16,REG16,0}, "\320\1\x19\101", IF_8086},\r |
| 866 | {I_SBB, 2, {MEMORY,REG32,0}, "\321\300\1\x19\101", IF_386|IF_SM},\r |
| 867 | {I_SBB, 2, {REG32,REG32,0}, "\321\1\x19\101", IF_386},\r |
| 868 | {I_SBB, 2, {REG8,MEMORY,0}, "\301\1\x1A\110", IF_8086|IF_SM},\r |
| 869 | {I_SBB, 2, {REG8,REG8,0}, "\1\x1A\110", IF_8086},\r |
| 870 | {I_SBB, 2, {REG16,MEMORY,0}, "\320\301\1\x1B\110", IF_8086|IF_SM},\r |
| 871 | {I_SBB, 2, {REG16,REG16,0}, "\320\1\x1B\110", IF_8086},\r |
| 872 | {I_SBB, 2, {REG32,MEMORY,0}, "\321\301\1\x1B\110", IF_386|IF_SM},\r |
| 873 | {I_SBB, 2, {REG32,REG32,0}, "\321\1\x1B\110", IF_386},\r |
| 874 | {I_SBB, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\203\15", IF_8086},\r |
| 875 | {I_SBB, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\203\15", IF_386},\r |
| 876 | {I_SBB, 2, {REG_AL,IMMEDIATE,0}, "\1\x1C\21", IF_8086|IF_SM},\r |
| 877 | {I_SBB, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x1D\31", IF_8086|IF_SM},\r |
| 878 | {I_SBB, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x1D\41", IF_386|IF_SM},\r |
| 879 | {I_SBB, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\203\21", IF_8086|IF_SM},\r |
| 880 | {I_SBB, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\203\131", IF_8086|IF_SM},\r |
| 881 | {I_SBB, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\203\141", IF_386|IF_SM},\r |
| 882 | {I_SBB, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\203\21", IF_8086|IF_SM},\r |
| 883 | {I_SBB, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\203\131", IF_8086|IF_SM},\r |
| 884 | {I_SBB, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\203\141", IF_386|IF_SM},\r |
| 885 | {I_SCASB, 0, {0,0,0}, "\332\1\xAE", IF_8086},\r |
| 886 | {I_SCASD, 0, {0,0,0}, "\332\321\1\xAF", IF_386},\r |
| 887 | {I_SCASW, 0, {0,0,0}, "\332\320\1\xAF", IF_8086},\r |
| 888 | {I_SGDT, 1, {MEMORY,0,0}, "\300\2\x0F\x01\200", IF_286},\r |
| 889 | {I_SHL, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\204", IF_8086},\r |
| 890 | {I_SHL, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\204", IF_8086},\r |
| 891 | {I_SHL, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\204\25", IF_186|IF_SB},\r |
| 892 | {I_SHL, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\204", IF_8086},\r |
| 893 | {I_SHL, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\204", IF_8086},\r |
| 894 | {I_SHL, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\204\25", IF_186|IF_SB},\r |
| 895 | {I_SHL, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\204", IF_386},\r |
| 896 | {I_SHL, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\204", IF_386},\r |
| 897 | {I_SHL, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\204\25", IF_386|IF_SB},\r |
| 898 | {I_SHLD, 3, {MEMORY,REG16,IMMEDIATE}, "\300\320\2\x0F\xA4\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r |
| 899 | {I_SHLD, 3, {REG16,REG16,IMMEDIATE}, "\320\2\x0F\xA4\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r |
| 900 | {I_SHLD, 3, {MEMORY,REG32,IMMEDIATE}, "\300\321\2\x0F\xA4\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r |
| 901 | {I_SHLD, 3, {REG32,REG32,IMMEDIATE}, "\321\2\x0F\xA4\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r |
| 902 | {I_SHLD, 3, {MEMORY,REG16,REG_CL}, "\300\320\2\x0F\xA5\101", IF_386|IF_SM},\r |
| 903 | {I_SHLD, 3, {REG16,REG16,REG_CL}, "\320\2\x0F\xA5\101", IF_386},\r |
| 904 | {I_SHLD, 3, {MEMORY,REG32,REG_CL}, "\300\321\2\x0F\xA5\101", IF_386|IF_SM},\r |
| 905 | {I_SHLD, 3, {REG32,REG32,REG_CL}, "\321\2\x0F\xA5\101", IF_386},\r |
| 906 | {I_SHR, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\205", IF_8086},\r |
| 907 | {I_SHR, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\205", IF_8086},\r |
| 908 | {I_SHR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\205\25", IF_186|IF_SB},\r |
| 909 | {I_SHR, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\205", IF_8086},\r |
| 910 | {I_SHR, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\205", IF_8086},\r |
| 911 | {I_SHR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\205\25", IF_186|IF_SB},\r |
| 912 | {I_SHR, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\205", IF_386},\r |
| 913 | {I_SHR, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\205", IF_386},\r |
| 914 | {I_SHR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\205\25", IF_386|IF_SB},\r |
| 915 | {I_SHRD, 3, {MEMORY,REG16,IMMEDIATE}, "\300\320\2\x0F\xAC\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r |
| 916 | {I_SHRD, 3, {REG16,REG16,IMMEDIATE}, "\320\2\x0F\xAC\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r |
| 917 | {I_SHRD, 3, {MEMORY,REG32,IMMEDIATE}, "\300\321\2\x0F\xAC\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r |
| 918 | {I_SHRD, 3, {REG32,REG32,IMMEDIATE}, "\321\2\x0F\xAC\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r |
| 919 | {I_SHRD, 3, {MEMORY,REG16,REG_CL}, "\300\320\2\x0F\xAD\101", IF_386|IF_SM},\r |
| 920 | {I_SHRD, 3, {REG16,REG16,REG_CL}, "\320\2\x0F\xAD\101", IF_386},\r |
| 921 | {I_SHRD, 3, {MEMORY,REG32,REG_CL}, "\300\321\2\x0F\xAD\101", IF_386|IF_SM},\r |
| 922 | {I_SHRD, 3, {REG32,REG32,REG_CL}, "\321\2\x0F\xAD\101", IF_386},\r |
| 923 | {I_SIDT, 1, {MEMORY,0,0}, "\300\2\x0F\x01\201", IF_286},\r |
| 924 | {I_SLDT, 1, {MEMORY,0,0}, "\300\1\x0F\17\200", IF_286},\r |
| 925 | {I_SLDT, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\200", IF_286},\r |
| 926 | {I_SLDT, 1, {REG16,0,0}, "\320\1\x0F\17\200", IF_286},\r |
| 927 | {I_SLDT, 1, {REG32,0,0}, "\321\1\x0F\17\200", IF_386},\r |
| 928 | {I_SMI, 0, {0,0,0}, "\1\xF1", IF_386|IF_UNDOC},\r |
| 929 | {I_SMINT, 0, {0,0,0}, "\2\x0F\x38", IF_P6|IF_CYRIX},\r |
| 930 | {I_SMSW, 1, {MEMORY,0,0}, "\300\2\x0F\x01\204", IF_286},\r |
| 931 | {I_SMSW, 1, {MEMORY|BITS16,0,0}, "\300\2\x0F\x01\204", IF_286},\r |
| 932 | {I_SMSW, 1, {REG16,0,0}, "\320\2\x0F\x01\204", IF_286},\r |
| 933 | {I_SMSW, 1, {REG32,0,0}, "\321\2\x0F\x01\204", IF_386},\r |
| 934 | {I_STC, 0, {0,0,0}, "\1\xF9", IF_8086},\r |
| 935 | {I_STD, 0, {0,0,0}, "\1\xFD", IF_8086},\r |
| 936 | {I_STI, 0, {0,0,0}, "\1\xFB", IF_8086},\r |
| 937 | {I_STOSB, 0, {0,0,0}, "\1\xAA", IF_8086},\r |
| 938 | {I_STOSD, 0, {0,0,0}, "\321\1\xAB", IF_386},\r |
| 939 | {I_STOSW, 0, {0,0,0}, "\320\1\xAB", IF_8086},\r |
| 940 | {I_STR, 1, {MEMORY,0,0}, "\300\1\x0F\17\201", IF_286|IF_PROT},\r |
| 941 | {I_STR, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\201", IF_286|IF_PROT},\r |
| 942 | {I_STR, 1, {REG16,0,0}, "\320\1\x0F\17\201", IF_286|IF_PROT},\r |
| 943 | {I_STR, 1, {REG32,0,0}, "\321\1\x0F\17\201", IF_386|IF_PROT},\r |
| 944 | {I_SUB, 2, {MEMORY,REG8,0}, "\300\1\x28\101", IF_8086|IF_SM},\r |
| 945 | {I_SUB, 2, {REG8,REG8,0}, "\1\x28\101", IF_8086},\r |
| 946 | {I_SUB, 2, {MEMORY,REG16,0}, "\320\300\1\x29\101", IF_8086|IF_SM},\r |
| 947 | {I_SUB, 2, {REG16,REG16,0}, "\320\1\x29\101", IF_8086},\r |
| 948 | {I_SUB, 2, {MEMORY,REG32,0}, "\321\300\1\x29\101", IF_386|IF_SM},\r |
| 949 | {I_SUB, 2, {REG32,REG32,0}, "\321\1\x29\101", IF_386},\r |
| 950 | {I_SUB, 2, {REG8,MEMORY,0}, "\301\1\x2A\110", IF_8086|IF_SM},\r |
| 951 | {I_SUB, 2, {REG8,REG8,0}, "\1\x2A\110", IF_8086},\r |
| 952 | {I_SUB, 2, {REG16,MEMORY,0}, "\320\301\1\x2B\110", IF_8086|IF_SM},\r |
| 953 | {I_SUB, 2, {REG16,REG16,0}, "\320\1\x2B\110", IF_8086},\r |
| 954 | {I_SUB, 2, {REG32,MEMORY,0}, "\321\301\1\x2B\110", IF_386|IF_SM},\r |
| 955 | {I_SUB, 2, {REG32,REG32,0}, "\321\1\x2B\110", IF_386},\r |
| 956 | {I_SUB, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\205\15", IF_8086},\r |
| 957 | {I_SUB, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\205\15", IF_386},\r |
| 958 | {I_SUB, 2, {REG_AL,IMMEDIATE,0}, "\1\x2C\21", IF_8086|IF_SM},\r |
| 959 | {I_SUB, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x2D\31", IF_8086|IF_SM},\r |
| 960 | {I_SUB, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x2D\41", IF_386|IF_SM},\r |
| 961 | {I_SUB, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\205\21", IF_8086|IF_SM},\r |
| 962 | {I_SUB, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\205\131", IF_8086|IF_SM},\r |
| 963 | {I_SUB, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\205\141", IF_386|IF_SM},\r |
| 964 | {I_SUB, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\205\21", IF_8086|IF_SM},\r |
| 965 | {I_SUB, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\205\131", IF_8086|IF_SM},\r |
| 966 | {I_SUB, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\205\141", IF_386|IF_SM},\r |
| 967 | {I_SVDC, 2, {MEMORY|BITS80,REG_SREG,0}, "\300\2\x0F\x78\101", IF_486|IF_CYRIX|IF_SMM},\r |
| 968 | {I_SVLDT, 1, {MEMORY|BITS80,0,0}, "\300\2\x0F\x7A\200", IF_486|IF_CYRIX|IF_SMM},\r |
| 969 | {I_SVTS, 1, {MEMORY|BITS80,0,0}, "\300\2\x0F\x7C\200", IF_486|IF_CYRIX|IF_SMM},\r |
| 970 | {I_SYSCALL, 0, {0,0,0}, "\2\x0F\x05", IF_P6|IF_AMD},\r |
| 971 | {I_SYSENTER, 0, {0,0,0}, "\2\x0F\x34", IF_P6},\r |
| 972 | {I_SYSEXIT, 0, {0,0,0}, "\2\x0F\x35", IF_P6|IF_PRIV},\r |
| 973 | {I_SYSRET, 0, {0,0,0}, "\2\x0F\x07", IF_P6|IF_PRIV|IF_AMD},\r |
| 974 | {I_TEST, 2, {MEMORY,REG8,0}, "\300\1\x84\101", IF_8086|IF_SM},\r |
| 975 | {I_TEST, 2, {REG8,REG8,0}, "\1\x84\101", IF_8086},\r |
| 976 | {I_TEST, 2, {MEMORY,REG16,0}, "\320\300\1\x85\101", IF_8086|IF_SM},\r |
| 977 | {I_TEST, 2, {REG16,REG16,0}, "\320\1\x85\101", IF_8086},\r |
| 978 | {I_TEST, 2, {MEMORY,REG32,0}, "\321\300\1\x85\101", IF_386|IF_SM},\r |
| 979 | {I_TEST, 2, {REG32,REG32,0}, "\321\1\x85\101", IF_386},\r |
| 980 | {I_TEST, 2, {REG8,MEMORY,0}, "\301\1\x84\110", IF_8086|IF_SM},\r |
| 981 | {I_TEST, 2, {REG16,MEMORY,0}, "\320\301\1\x85\110", IF_8086|IF_SM},\r |
| 982 | {I_TEST, 2, {REG32,MEMORY,0}, "\321\301\1\x85\110", IF_386|IF_SM},\r |
| 983 | {I_TEST, 2, {REG_AL,IMMEDIATE,0}, "\1\xA8\21", IF_8086|IF_SM},\r |
| 984 | {I_TEST, 2, {REG_AX,IMMEDIATE,0}, "\320\1\xA9\31", IF_8086|IF_SM},\r |
| 985 | {I_TEST, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\xA9\41", IF_386|IF_SM},\r |
| 986 | {I_TEST, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xF6\200\21", IF_8086|IF_SM},\r |
| 987 | {I_TEST, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xF7\200\31", IF_8086|IF_SM},\r |
| 988 | {I_TEST, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xF7\200\41", IF_386|IF_SM},\r |
| 989 | {I_TEST, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\xF6\200\21", IF_8086|IF_SM},\r |
| 990 | {I_TEST, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\1\xF7\200\31", IF_8086|IF_SM},\r |
| 991 | {I_TEST, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\1\xF7\200\41", IF_386|IF_SM},\r |
| 992 | {I_UD0, 0, {0,0,0}, "\2\x0F\xFF", IF_286|IF_UNDOC},\r |
| 993 | {I_UD1, 0, {0,0,0}, "\2\x0F\xB9", IF_286|IF_UNDOC},\r |
| 994 | {I_UD2, 0, {0,0,0}, "\2\x0F\x0B", IF_286},\r |
| 995 | {I_UMOV, 2, {MEMORY,REG8,0}, "\300\2\x0F\x10\101", IF_386|IF_UNDOC|IF_SM},\r |
| 996 | {I_UMOV, 2, {REG8,REG8,0}, "\2\x0F\x10\101", IF_386|IF_UNDOC},\r |
| 997 | {I_UMOV, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\x11\101", IF_386|IF_UNDOC|IF_SM},\r |
| 998 | {I_UMOV, 2, {REG16,REG16,0}, "\320\2\x0F\x11\101", IF_386|IF_UNDOC},\r |
| 999 | {I_UMOV, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\x11\101", IF_386|IF_UNDOC|IF_SM},\r |
| 1000 | {I_UMOV, 2, {REG32,REG32,0}, "\321\2\x0F\x11\101", IF_386|IF_UNDOC},\r |
| 1001 | {I_UMOV, 2, {REG8,MEMORY,0}, "\301\2\x0F\x12\110", IF_386|IF_UNDOC|IF_SM},\r |
| 1002 | {I_UMOV, 2, {REG8,REG8,0}, "\2\x0F\x12\110", IF_386|IF_UNDOC},\r |
| 1003 | {I_UMOV, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\x13\110", IF_386|IF_UNDOC|IF_SM},\r |
| 1004 | {I_UMOV, 2, {REG16,REG16,0}, "\320\2\x0F\x13\110", IF_386|IF_UNDOC},\r |
| 1005 | {I_UMOV, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\x13\110", IF_386|IF_UNDOC|IF_SM},\r |
| 1006 | {I_UMOV, 2, {REG32,REG32,0}, "\321\2\x0F\x13\110", IF_386|IF_UNDOC},\r |
| 1007 | {I_VERR, 1, {MEMORY,0,0}, "\300\1\x0F\17\204", IF_286|IF_PROT},\r |
| 1008 | {I_VERR, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\204", IF_286|IF_PROT},\r |
| 1009 | {I_VERR, 1, {REG16,0,0}, "\1\x0F\17\204", IF_286|IF_PROT},\r |
| 1010 | {I_VERW, 1, {MEMORY,0,0}, "\300\1\x0F\17\205", IF_286|IF_PROT},\r |
| 1011 | {I_VERW, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\205", IF_286|IF_PROT},\r |
| 1012 | {I_VERW, 1, {REG16,0,0}, "\1\x0F\17\205", IF_286|IF_PROT},\r |
| 1013 | {I_WAIT, 0, {0,0,0}, "\1\x9B", IF_8086},\r |
| 1014 | {I_FWAIT, 0, {0,0,0}, "\1\x9B", IF_8086},\r |
| 1015 | {I_WBINVD, 0, {0,0,0}, "\2\x0F\x09", IF_486|IF_PRIV},\r |
| 1016 | {I_WRSHR, 1, {REGMEM|BITS32,0,0}, "\321\300\2\x0F\x37\200", IF_P6|IF_CYRIX|IF_SMM},\r |
| 1017 | {I_WRMSR, 0, {0,0,0}, "\2\x0F\x30", IF_PENT|IF_PRIV},\r |
| 1018 | {I_XADD, 2, {MEMORY,REG8,0}, "\300\2\x0F\xC0\101", IF_486|IF_SM},\r |
| 1019 | {I_XADD, 2, {REG8,REG8,0}, "\2\x0F\xC0\101", IF_486},\r |
| 1020 | {I_XADD, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xC1\101", IF_486|IF_SM},\r |
| 1021 | {I_XADD, 2, {REG16,REG16,0}, "\320\2\x0F\xC1\101", IF_486},\r |
| 1022 | {I_XADD, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xC1\101", IF_486|IF_SM},\r |
| 1023 | {I_XADD, 2, {REG32,REG32,0}, "\321\2\x0F\xC1\101", IF_486},\r |
| 1024 | {I_XCHG, 2, {REG_AX,REG16,0}, "\320\11\x90", IF_8086},\r |
| 1025 | {I_XCHG, 2, {REG_EAX,REG32,0}, "\321\11\x90", IF_386},\r |
| 1026 | {I_XCHG, 2, {REG16,REG_AX,0}, "\320\10\x90", IF_8086},\r |
| 1027 | {I_XCHG, 2, {REG32,REG_EAX,0}, "\321\10\x90", IF_386},\r |
| 1028 | {I_XCHG, 2, {REG8,MEMORY,0}, "\301\1\x86\110", IF_8086|IF_SM},\r |
| 1029 | {I_XCHG, 2, {REG8,REG8,0}, "\1\x86\110", IF_8086},\r |
| 1030 | {I_XCHG, 2, {REG16,MEMORY,0}, "\320\301\1\x87\110", IF_8086|IF_SM},\r |
| 1031 | {I_XCHG, 2, {REG16,REG16,0}, "\320\1\x87\110", IF_8086},\r |
| 1032 | {I_XCHG, 2, {REG32,MEMORY,0}, "\321\301\1\x87\110", IF_386|IF_SM},\r |
| 1033 | {I_XCHG, 2, {REG32,REG32,0}, "\321\1\x87\110", IF_386},\r |
| 1034 | {I_XCHG, 2, {MEMORY,REG8,0}, "\300\1\x86\101", IF_8086|IF_SM},\r |
| 1035 | {I_XCHG, 2, {REG8,REG8,0}, "\1\x86\101", IF_8086},\r |
| 1036 | {I_XCHG, 2, {MEMORY,REG16,0}, "\320\300\1\x87\101", IF_8086|IF_SM},\r |
| 1037 | {I_XCHG, 2, {REG16,REG16,0}, "\320\1\x87\101", IF_8086},\r |
| 1038 | {I_XCHG, 2, {MEMORY,REG32,0}, "\321\300\1\x87\101", IF_386|IF_SM},\r |
| 1039 | {I_XCHG, 2, {REG32,REG32,0}, "\321\1\x87\101", IF_386},\r |
| 1040 | {I_XLATB, 0, {0,0,0}, "\1\xD7", IF_8086},\r |
| 1041 | {I_XLAT, 0, {0,0,0}, "\1\xD7", IF_8086},\r |
| 1042 | {I_XOR, 2, {MEMORY,REG8,0}, "\300\1\x30\101", IF_8086|IF_SM},\r |
| 1043 | {I_XOR, 2, {REG8,REG8,0}, "\1\x30\101", IF_8086},\r |
| 1044 | {I_XOR, 2, {MEMORY,REG16,0}, "\320\300\1\x31\101", IF_8086|IF_SM},\r |
| 1045 | {I_XOR, 2, {REG16,REG16,0}, "\320\1\x31\101", IF_8086},\r |
| 1046 | {I_XOR, 2, {MEMORY,REG32,0}, "\321\300\1\x31\101", IF_386|IF_SM},\r |
| 1047 | {I_XOR, 2, {REG32,REG32,0}, "\321\1\x31\101", IF_386},\r |
| 1048 | {I_XOR, 2, {REG8,MEMORY,0}, "\301\1\x32\110", IF_8086|IF_SM},\r |
| 1049 | {I_XOR, 2, {REG8,REG8,0}, "\1\x32\110", IF_8086},\r |
| 1050 | {I_XOR, 2, {REG16,MEMORY,0}, "\320\301\1\x33\110", IF_8086|IF_SM},\r |
| 1051 | {I_XOR, 2, {REG16,REG16,0}, "\320\1\x33\110", IF_8086},\r |
| 1052 | {I_XOR, 2, {REG32,MEMORY,0}, "\321\301\1\x33\110", IF_386|IF_SM},\r |
| 1053 | {I_XOR, 2, {REG32,REG32,0}, "\321\1\x33\110", IF_386},\r |
| 1054 | {I_XOR, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\206\15", IF_8086},\r |
| 1055 | {I_XOR, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\206\15", IF_386},\r |
| 1056 | {I_XOR, 2, {REG_AL,IMMEDIATE,0}, "\1\x34\21", IF_8086|IF_SM},\r |
| 1057 | {I_XOR, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x35\31", IF_8086|IF_SM},\r |
| 1058 | {I_XOR, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x35\41", IF_386|IF_SM},\r |
| 1059 | {I_XOR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\206\21", IF_8086|IF_SM},\r |
| 1060 | {I_XOR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\206\131", IF_8086|IF_SM},\r |
| 1061 | {I_XOR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\206\141", IF_386|IF_SM},\r |
| 1062 | {I_XOR, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\206\21", IF_8086|IF_SM},\r |
| 1063 | {I_XOR, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\206\131", IF_8086|IF_SM},\r |
| 1064 | {I_XOR, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\206\141", IF_386|IF_SM},\r |
| 1065 | {I_XSTORE, 0, {0,0,0}, "\3\x0F\xA7\xC0", IF_P6|IF_CYRIX},\r |
| 1066 | {I_CMOVcc, 2, {REG16,MEMORY,0}, "\320\301\1\x0F\330\x40\110", IF_P6|IF_SM},\r |
| 1067 | {I_CMOVcc, 2, {REG16,REG16,0}, "\320\1\x0F\330\x40\110", IF_P6},\r |
| 1068 | {I_CMOVcc, 2, {REG32,MEMORY,0}, "\321\301\1\x0F\330\x40\110", IF_P6|IF_SM},\r |
| 1069 | {I_CMOVcc, 2, {REG32,REG32,0}, "\321\1\x0F\330\x40\110", IF_P6},\r |
| 1070 | {I_Jcc, 1, {IMMEDIATE|NEAR,0,0}, "\322\1\x0F\330\x80\64", IF_386},\r |
| 1071 | {I_Jcc, 1, {IMMEDIATE|BITS16|NEAR,0,0}, "\320\1\x0F\330\x80\64", IF_386},\r |
| 1072 | {I_Jcc, 1, {IMMEDIATE|BITS32|NEAR,0,0}, "\321\1\x0F\330\x80\64", IF_386},\r |
| 1073 | {I_Jcc, 1, {IMMEDIATE,0,0}, "\330\x70\50", IF_8086},\r |
| 1074 | {I_SETcc, 1, {MEMORY,0,0}, "\300\1\x0F\330\x90\200", IF_386|IF_SB},\r |
| 1075 | {I_SETcc, 1, {REG8,0,0}, "\300\1\x0F\330\x90\200", IF_386},\r |
| 1076 | {I_ADDPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x58\110", IF_KATMAI|IF_SSE},\r |
| 1077 | {I_ADDPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x58\110", IF_KATMAI|IF_SSE},\r |
| 1078 | {I_ADDSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x58\110", IF_KATMAI|IF_SSE},\r |
| 1079 | {I_ADDSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x58\110", IF_KATMAI|IF_SSE},\r |
| 1080 | {I_ANDNPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x55\110", IF_KATMAI|IF_SSE},\r |
| 1081 | {I_ANDNPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x55\110", IF_KATMAI|IF_SSE},\r |
| 1082 | {I_ANDPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x54\110", IF_KATMAI|IF_SSE},\r |
| 1083 | {I_ANDPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x54\110", IF_KATMAI|IF_SSE},\r |
| 1084 | {I_CMPEQPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x00", IF_KATMAI|IF_SSE},\r |
| 1085 | {I_CMPEQPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x00", IF_KATMAI|IF_SSE},\r |
| 1086 | {I_CMPEQSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x00", IF_KATMAI|IF_SSE},\r |
| 1087 | {I_CMPEQSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x00", IF_KATMAI|IF_SSE},\r |
| 1088 | {I_CMPLEPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x02", IF_KATMAI|IF_SSE},\r |
| 1089 | {I_CMPLEPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x02", IF_KATMAI|IF_SSE},\r |
| 1090 | {I_CMPLESS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x02", IF_KATMAI|IF_SSE},\r |
| 1091 | {I_CMPLESS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x02", IF_KATMAI|IF_SSE},\r |
| 1092 | {I_CMPLTPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x01", IF_KATMAI|IF_SSE},\r |
| 1093 | {I_CMPLTPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x01", IF_KATMAI|IF_SSE},\r |
| 1094 | {I_CMPLTSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x01", IF_KATMAI|IF_SSE},\r |
| 1095 | {I_CMPLTSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x01", IF_KATMAI|IF_SSE},\r |
| 1096 | {I_CMPNEQPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x04", IF_KATMAI|IF_SSE},\r |
| 1097 | {I_CMPNEQPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x04", IF_KATMAI|IF_SSE},\r |
| 1098 | {I_CMPNEQSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x04", IF_KATMAI|IF_SSE},\r |
| 1099 | {I_CMPNEQSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x04", IF_KATMAI|IF_SSE},\r |
| 1100 | {I_CMPNLEPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x06", IF_KATMAI|IF_SSE},\r |
| 1101 | {I_CMPNLEPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x06", IF_KATMAI|IF_SSE},\r |
| 1102 | {I_CMPNLESS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x06", IF_KATMAI|IF_SSE},\r |
| 1103 | {I_CMPNLESS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x06", IF_KATMAI|IF_SSE},\r |
| 1104 | {I_CMPNLTPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x05", IF_KATMAI|IF_SSE},\r |
| 1105 | {I_CMPNLTPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x05", IF_KATMAI|IF_SSE},\r |
| 1106 | {I_CMPNLTSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x05", IF_KATMAI|IF_SSE},\r |
| 1107 | {I_CMPNLTSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x05", IF_KATMAI|IF_SSE},\r |
| 1108 | {I_CMPORDPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x07", IF_KATMAI|IF_SSE},\r |
| 1109 | {I_CMPORDPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x07", IF_KATMAI|IF_SSE},\r |
| 1110 | {I_CMPORDSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x07", IF_KATMAI|IF_SSE},\r |
| 1111 | {I_CMPORDSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x07", IF_KATMAI|IF_SSE},\r |
| 1112 | {I_CMPUNORDPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x03", IF_KATMAI|IF_SSE},\r |
| 1113 | {I_CMPUNORDPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x03", IF_KATMAI|IF_SSE},\r |
| 1114 | {I_CMPUNORDSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x03", IF_KATMAI|IF_SSE},\r |
| 1115 | {I_CMPUNORDSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x03", IF_KATMAI|IF_SSE},\r |
| 1116 | {I_CMPPS, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\331\2\x0F\xC2\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r |
| 1117 | {I_CMPPS, 3, {XMMREG,XMMREG,IMMEDIATE}, "\331\2\x0F\xC2\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r |
| 1118 | {I_CMPSS, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\333\2\x0F\xC2\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r |
| 1119 | {I_CMPSS, 3, {XMMREG,XMMREG,IMMEDIATE}, "\333\2\x0F\xC2\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r |
| 1120 | {I_COMISS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x2F\110", IF_KATMAI|IF_SSE},\r |
| 1121 | {I_COMISS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x2F\110", IF_KATMAI|IF_SSE},\r |
| 1122 | {I_CVTPI2PS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x2A\110", IF_KATMAI|IF_SSE|IF_MMX},\r |
| 1123 | {I_CVTPI2PS, 2, {XMMREG,MMXREG,0}, "\331\2\x0F\x2A\110", IF_KATMAI|IF_SSE|IF_MMX},\r |
| 1124 | {I_CVTPS2PI, 2, {MMXREG,MEMORY,0}, "\301\331\2\x0F\x2D\110", IF_KATMAI|IF_SSE|IF_MMX},\r |
| 1125 | {I_CVTPS2PI, 2, {MMXREG,XMMREG,0}, "\331\2\x0F\x2D\110", IF_KATMAI|IF_SSE|IF_MMX},\r |
| 1126 | {I_CVTSI2SS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x2A\110", IF_KATMAI|IF_SSE|IF_SD|IF_AR1},\r |
| 1127 | {I_CVTSI2SS, 2, {XMMREG,REG32,0}, "\333\2\x0F\x2A\110", IF_KATMAI|IF_SSE},\r |
| 1128 | {I_CVTSS2SI, 2, {REG32,MEMORY,0}, "\301\333\2\x0F\x2D\110", IF_KATMAI|IF_SSE},\r |
| 1129 | {I_CVTSS2SI, 2, {REG32,XMMREG,0}, "\333\2\x0F\x2D\110", IF_KATMAI|IF_SSE},\r |
| 1130 | {I_CVTTPS2PI, 2, {MMXREG,MEMORY,0}, "\301\331\2\x0F\x2C\110", IF_KATMAI|IF_SSE|IF_MMX},\r |
| 1131 | {I_CVTTPS2PI, 2, {MMXREG,XMMREG,0}, "\331\2\x0F\x2C\110", IF_KATMAI|IF_SSE|IF_MMX},\r |
| 1132 | {I_CVTTSS2SI, 2, {REG32,MEMORY,0}, "\301\333\2\x0F\x2C\110", IF_KATMAI|IF_SSE},\r |
| 1133 | {I_CVTTSS2SI, 2, {REG32,XMMREG,0}, "\333\2\x0F\x2C\110", IF_KATMAI|IF_SSE},\r |
| 1134 | {I_DIVPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x5E\110", IF_KATMAI|IF_SSE},\r |
| 1135 | {I_DIVPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x5E\110", IF_KATMAI|IF_SSE},\r |
| 1136 | {I_DIVSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5E\110", IF_KATMAI|IF_SSE},\r |
| 1137 | {I_DIVSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5E\110", IF_KATMAI|IF_SSE},\r |
| 1138 | {I_LDMXCSR, 1, {MEMORY,0,0}, "\300\2\x0F\xAE\202", IF_KATMAI|IF_SSE|IF_SD},\r |
| 1139 | {I_MAXPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x5F\110", IF_KATMAI|IF_SSE},\r |
| 1140 | {I_MAXPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x5F\110", IF_KATMAI|IF_SSE},\r |
| 1141 | {I_MAXSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5F\110", IF_KATMAI|IF_SSE},\r |
| 1142 | {I_MAXSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5F\110", IF_KATMAI|IF_SSE},\r |
| 1143 | {I_MINPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x5D\110", IF_KATMAI|IF_SSE},\r |
| 1144 | {I_MINPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x5D\110", IF_KATMAI|IF_SSE},\r |
| 1145 | {I_MINSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5D\110", IF_KATMAI|IF_SSE},\r |
| 1146 | {I_MINSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5D\110", IF_KATMAI|IF_SSE},\r |
| 1147 | {I_MOVAPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x28\110", IF_KATMAI|IF_SSE},\r |
| 1148 | {I_MOVAPS, 2, {MEMORY,XMMREG,0}, "\300\2\x0F\x29\101", IF_KATMAI|IF_SSE},\r |
| 1149 | {I_MOVAPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x28\110", IF_KATMAI|IF_SSE},\r |
| 1150 | {I_MOVAPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x29\101", IF_KATMAI|IF_SSE},\r |
| 1151 | {I_MOVHPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x16\110", IF_KATMAI|IF_SSE},\r |
| 1152 | {I_MOVHPS, 2, {MEMORY,XMMREG,0}, "\300\2\x0F\x17\101", IF_KATMAI|IF_SSE},\r |
| 1153 | {I_MOVLHPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x16\110", IF_KATMAI|IF_SSE},\r |
| 1154 | {I_MOVLPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x12\110", IF_KATMAI|IF_SSE},\r |
| 1155 | {I_MOVLPS, 2, {MEMORY,XMMREG,0}, "\300\2\x0F\x13\101", IF_KATMAI|IF_SSE},\r |
| 1156 | {I_MOVHLPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x12\110", IF_KATMAI|IF_SSE},\r |
| 1157 | {I_MOVMSKPS, 2, {REG32,XMMREG,0}, "\2\x0F\x50\110", IF_KATMAI|IF_SSE},\r |
| 1158 | {I_MOVNTPS, 2, {MEMORY,XMMREG,0}, "\300\2\x0F\x2B\101", IF_KATMAI|IF_SSE},\r |
| 1159 | {I_MOVSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x10\110", IF_KATMAI|IF_SSE},\r |
| 1160 | {I_MOVSS, 2, {MEMORY,XMMREG,0}, "\300\333\2\x0F\x11\101", IF_KATMAI|IF_SSE},\r |
| 1161 | {I_MOVSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x10\110", IF_KATMAI|IF_SSE},\r |
| 1162 | {I_MOVSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x11\101", IF_KATMAI|IF_SSE},\r |
| 1163 | {I_MOVUPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x10\110", IF_KATMAI|IF_SSE},\r |
| 1164 | {I_MOVUPS, 2, {MEMORY,XMMREG,0}, "\300\331\2\x0F\x11\101", IF_KATMAI|IF_SSE},\r |
| 1165 | {I_MOVUPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x10\110", IF_KATMAI|IF_SSE},\r |
| 1166 | {I_MOVUPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x11\101", IF_KATMAI|IF_SSE},\r |
| 1167 | {I_MULPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x59\110", IF_KATMAI|IF_SSE},\r |
| 1168 | {I_MULPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x59\110", IF_KATMAI|IF_SSE},\r |
| 1169 | {I_MULSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x59\110", IF_KATMAI|IF_SSE},\r |
| 1170 | {I_MULSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x59\110", IF_KATMAI|IF_SSE},\r |
| 1171 | {I_ORPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x56\110", IF_KATMAI|IF_SSE},\r |
| 1172 | {I_ORPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x56\110", IF_KATMAI|IF_SSE},\r |
| 1173 | {I_RCPPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x53\110", IF_KATMAI|IF_SSE},\r |
| 1174 | {I_RCPPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x53\110", IF_KATMAI|IF_SSE},\r |
| 1175 | {I_RCPSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x53\110", IF_KATMAI|IF_SSE},\r |
| 1176 | {I_RCPSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x53\110", IF_KATMAI|IF_SSE},\r |
| 1177 | {I_RSQRTPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x52\110", IF_KATMAI|IF_SSE},\r |
| 1178 | {I_RSQRTPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x52\110", IF_KATMAI|IF_SSE},\r |
| 1179 | {I_RSQRTSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x52\110", IF_KATMAI|IF_SSE},\r |
| 1180 | {I_RSQRTSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x52\110", IF_KATMAI|IF_SSE},\r |
| 1181 | {I_SHUFPS, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\2\x0F\xC6\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r |
| 1182 | {I_SHUFPS, 3, {XMMREG,XMMREG,IMMEDIATE}, "\2\x0F\xC6\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r |
| 1183 | {I_SQRTPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x51\110", IF_KATMAI|IF_SSE},\r |
| 1184 | {I_SQRTPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x51\110", IF_KATMAI|IF_SSE},\r |
| 1185 | {I_SQRTSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x51\110", IF_KATMAI|IF_SSE},\r |
| 1186 | {I_SQRTSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x51\110", IF_KATMAI|IF_SSE},\r |
| 1187 | {I_STMXCSR, 1, {MEMORY,0,0}, "\300\2\x0F\xAE\203", IF_KATMAI|IF_SSE|IF_SD},\r |
| 1188 | {I_SUBPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x5C\110", IF_KATMAI|IF_SSE},\r |
| 1189 | {I_SUBPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x5C\110", IF_KATMAI|IF_SSE},\r |
| 1190 | {I_SUBSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5C\110", IF_KATMAI|IF_SSE},\r |
| 1191 | {I_SUBSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5C\110", IF_KATMAI|IF_SSE},\r |
| 1192 | {I_UCOMISS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x2E\110", IF_KATMAI|IF_SSE},\r |
| 1193 | {I_UCOMISS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x2E\110", IF_KATMAI|IF_SSE},\r |
| 1194 | {I_UNPCKHPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x15\110", IF_KATMAI|IF_SSE},\r |
| 1195 | {I_UNPCKHPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x15\110", IF_KATMAI|IF_SSE},\r |
| 1196 | {I_UNPCKLPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x14\110", IF_KATMAI|IF_SSE},\r |
| 1197 | {I_UNPCKLPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x14\110", IF_KATMAI|IF_SSE},\r |
| 1198 | {I_XORPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x57\110", IF_KATMAI|IF_SSE},\r |
| 1199 | {I_XORPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x57\110", IF_KATMAI|IF_SSE},\r |
| 1200 | {I_FXRSTOR, 1, {MEMORY,0,0}, "\300\2\x0F\xAE\201", IF_P6|IF_SSE|IF_FPU},\r |
| 1201 | {I_FXSAVE, 1, {MEMORY,0,0}, "\300\2\x0F\xAE\200", IF_P6|IF_SSE|IF_FPU},\r |
| 1202 | {I_PREFETCHNTA, 1, {MEMORY,0,0}, "\300\2\x0F\x18\200", IF_KATMAI},\r |
| 1203 | {I_PREFETCHT0, 1, {MEMORY,0,0}, "\300\2\x0F\x18\201", IF_KATMAI},\r |
| 1204 | {I_PREFETCHT1, 1, {MEMORY,0,0}, "\300\2\x0F\x18\202", IF_KATMAI},\r |
| 1205 | {I_PREFETCHT2, 1, {MEMORY,0,0}, "\300\2\x0F\x18\203", IF_KATMAI},\r |
| 1206 | {I_SFENCE, 0, {0,0,0}, "\3\x0F\xAE\xF8", IF_KATMAI},\r |
| 1207 | {I_MASKMOVQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF7\110", IF_KATMAI|IF_MMX},\r |
| 1208 | {I_MOVNTQ, 2, {MEMORY,MMXREG,0}, "\300\2\x0F\xE7\101", IF_KATMAI|IF_MMX|IF_SM},\r |
| 1209 | {I_PAVGB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE0\110", IF_KATMAI|IF_MMX},\r |
| 1210 | {I_PAVGB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE0\110", IF_KATMAI|IF_MMX|IF_SM},\r |
| 1211 | {I_PAVGW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE3\110", IF_KATMAI|IF_MMX},\r |
| 1212 | {I_PAVGW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE3\110", IF_KATMAI|IF_MMX|IF_SM},\r |
| 1213 | {I_PEXTRW, 3, {REG32,MMXREG,IMMEDIATE}, "\2\x0F\xC5\110\26", IF_KATMAI|IF_MMX|IF_SB|IF_AR2},\r |
| 1214 | {I_PINSRW, 3, {MMXREG,REG16,IMMEDIATE}, "\2\x0F\xC4\110\26", IF_KATMAI|IF_MMX|IF_SB|IF_AR2},\r |
| 1215 | {I_PINSRW, 3, {MMXREG,MEMORY,IMMEDIATE}, "\301\2\x0F\xC4\110\26", IF_KATMAI|IF_MMX|IF_SB|IF_AR2},\r |
| 1216 | {I_PMAXSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEE\110", IF_KATMAI|IF_MMX},\r |
| 1217 | {I_PMAXSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEE\110", IF_KATMAI|IF_MMX|IF_SM},\r |
| 1218 | {I_PMAXUB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDE\110", IF_KATMAI|IF_MMX},\r |
| 1219 | {I_PMAXUB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDE\110", IF_KATMAI|IF_MMX|IF_SM},\r |
| 1220 | {I_PMINSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEA\110", IF_KATMAI|IF_MMX},\r |
| 1221 | {I_PMINSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEA\110", IF_KATMAI|IF_MMX|IF_SM},\r |
| 1222 | {I_PMINUB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDA\110", IF_KATMAI|IF_MMX},\r |
| 1223 | {I_PMINUB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDA\110", IF_KATMAI|IF_MMX|IF_SM},\r |
| 1224 | {I_PMOVMSKB, 2, {REG32,MMXREG,0}, "\2\x0F\xD7\110", IF_KATMAI|IF_MMX},\r |
| 1225 | {I_PMULHUW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE4\110", IF_KATMAI|IF_MMX},\r |
| 1226 | {I_PMULHUW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE4\110", IF_KATMAI|IF_MMX|IF_SM},\r |
| 1227 | {I_PSADBW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF6\110", IF_KATMAI|IF_MMX},\r |
| 1228 | {I_PSADBW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF6\110", IF_KATMAI|IF_MMX|IF_SM},\r |
| 1229 | {I_PSHUFW, 3, {MMXREG,MMXREG,IMMEDIATE}, "\2\x0F\x70\110\22", IF_KATMAI|IF_MMX|IF_SB|IF_AR2},\r |
| 1230 | {I_PSHUFW, 3, {MMXREG,MEMORY,IMMEDIATE}, "\301\2\x0F\x70\110\22", IF_KATMAI|IF_MMX|IF_SM2|IF_SB|IF_AR2},\r |
| 1231 | {I_PF2IW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x1C", IF_PENT|IF_3DNOW|IF_SM},\r |
| 1232 | {I_PF2IW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x1C", IF_PENT|IF_3DNOW},\r |
| 1233 | {I_PFNACC, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x8A", IF_PENT|IF_3DNOW|IF_SM},\r |
| 1234 | {I_PFNACC, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x8A", IF_PENT|IF_3DNOW},\r |
| 1235 | {I_PFPNACC, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x8E", IF_PENT|IF_3DNOW|IF_SM},\r |
| 1236 | {I_PFPNACC, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x8E", IF_PENT|IF_3DNOW},\r |
| 1237 | {I_PI2FW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x0C", IF_PENT|IF_3DNOW|IF_SM},\r |
| 1238 | {I_PI2FW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x0C", IF_PENT|IF_3DNOW},\r |
| 1239 | {I_PSWAPD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xBB", IF_PENT|IF_3DNOW|IF_SM},\r |
| 1240 | {I_PSWAPD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xBB", IF_PENT|IF_3DNOW},\r |
| 1241 | {I_MASKMOVDQU, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF7\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1242 | {I_CLFLUSH, 1, {MEMORY,0,0}, "\300\2\x0F\xAE\207", IF_WILLAMETTE|IF_SSE2},\r |
| 1243 | {I_MOVNTDQ, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\xE7\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1244 | {I_MOVNTI, 2, {MEMORY,REG32,0}, "\300\2\x0F\xC3\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1245 | {I_MOVNTPD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x2B\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1246 | {I_PAUSE, 0, {0,0,0}, "\333\1\x90", IF_WILLAMETTE|IF_SSE2},\r |
| 1247 | {I_LFENCE, 0, {0,0,0}, "\3\x0F\xAE\xE8", IF_WILLAMETTE|IF_SSE2},\r |
| 1248 | {I_MFENCE, 0, {0,0,0}, "\3\x0F\xAE\xF0", IF_WILLAMETTE|IF_SSE2},\r |
| 1249 | {I_MOVD, 2, {XMMREG,REG32,0}, "\3\x66\x0F\x6E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1250 | {I_MOVD, 2, {REG32,XMMREG,0}, "\3\x66\x0F\x7E\101", IF_WILLAMETTE|IF_SSE2},\r |
| 1251 | {I_MOVD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x7E\101", IF_WILLAMETTE|IF_SSE2},\r |
| 1252 | {I_MOVD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1253 | {I_MOVDQA, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x6F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1254 | {I_MOVDQA, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x7F\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1255 | {I_MOVDQA, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6F\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1256 | {I_MOVDQA, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x7F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1257 | {I_MOVDQU, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x6F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1258 | {I_MOVDQU, 2, {MEMORY,XMMREG,0}, "\333\300\2\x0F\x7F\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1259 | {I_MOVDQU, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x6F\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1260 | {I_MOVDQU, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x7F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1261 | {I_MOVDQ2Q, 2, {MMXREG,XMMREG,0}, "\3\xF2\x0F\xD6\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1262 | {I_MOVQ, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x7E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1263 | {I_MOVQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD6\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1264 | {I_MOVQ, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\xD6\101", IF_WILLAMETTE|IF_SSE2},\r |
| 1265 | {I_MOVQ, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x7E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1266 | {I_MOVQ2DQ, 2, {XMMREG,MMXREG,0}, "\333\2\x0F\xD6\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1267 | {I_PACKSSWB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x63\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1268 | {I_PACKSSWB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x63\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1269 | {I_PACKSSDW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x6B\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1270 | {I_PACKSSDW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6B\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1271 | {I_PACKUSWB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x67\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1272 | {I_PACKUSWB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x67\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1273 | {I_PADDB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xFC\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1274 | {I_PADDB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xFC\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1275 | {I_PADDW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xFD\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1276 | {I_PADDW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xFD\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1277 | {I_PADDD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xFE\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1278 | {I_PADDD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xFE\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1279 | {I_PADDQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD4\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1280 | {I_PADDQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD4\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1281 | {I_PADDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD4\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1282 | {I_PADDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD4\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1283 | {I_PADDSB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xEC\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1284 | {I_PADDSB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xEC\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1285 | {I_PADDSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xED\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1286 | {I_PADDSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xED\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1287 | {I_PADDUSB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDC\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1288 | {I_PADDUSB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDC\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1289 | {I_PADDUSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDD\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1290 | {I_PADDUSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDD\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1291 | {I_PAND, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDB\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1292 | {I_PAND, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDB\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1293 | {I_PANDN, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDF\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1294 | {I_PANDN, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDF\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1295 | {I_PAVGB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE0\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1296 | {I_PAVGB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE0\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1297 | {I_PAVGW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE3\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1298 | {I_PAVGW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE3\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1299 | {I_PCMPEQB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x74\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1300 | {I_PCMPEQB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x74\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1301 | {I_PCMPEQW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x75\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1302 | {I_PCMPEQW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x75\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1303 | {I_PCMPEQD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x76\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1304 | {I_PCMPEQD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x76\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1305 | {I_PCMPGTB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x64\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1306 | {I_PCMPGTB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x64\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1307 | {I_PCMPGTW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x65\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1308 | {I_PCMPGTW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x65\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1309 | {I_PCMPGTD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x66\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1310 | {I_PCMPGTD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x66\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1311 | {I_PEXTRW, 3, {REG32,XMMREG,IMMEDIATE}, "\3\x66\x0F\xC5\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 1312 | {I_PINSRW, 3, {XMMREG,REG16,IMMEDIATE}, "\3\x66\x0F\xC4\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 1313 | {I_PINSRW, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\3\x66\x0F\xC4\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 1314 | {I_PMADDWD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF5\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1315 | {I_PMADDWD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF5\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1316 | {I_PMAXSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xEE\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1317 | {I_PMAXSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xEE\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1318 | {I_PMAXUB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDE\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1319 | {I_PMAXUB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDE\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1320 | {I_PMINSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xEA\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1321 | {I_PMINSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xEA\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1322 | {I_PMINUB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDA\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1323 | {I_PMINUB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDA\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1324 | {I_PMOVMSKB, 2, {REG32,XMMREG,0}, "\3\x66\x0F\xD7\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1325 | {I_PMULHUW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE4\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1326 | {I_PMULHUW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE4\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1327 | {I_PMULHW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE5\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1328 | {I_PMULHW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE5\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1329 | {I_PMULLW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD5\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1330 | {I_PMULLW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD5\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1331 | {I_PMULUDQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF4\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1332 | {I_PMULUDQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF4\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1333 | {I_PMULUDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF4\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1334 | {I_PMULUDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF4\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1335 | {I_POR, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xEB\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1336 | {I_POR, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xEB\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1337 | {I_PSADBW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF6\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1338 | {I_PSADBW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF6\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1339 | {I_PSHUFD, 3, {XMMREG,XMMREG,IMMEDIATE}, "\3\x66\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 1340 | {I_PSHUFD, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\3\x66\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},\r |
| 1341 | {I_PSHUFHW, 3, {XMMREG,XMMREG,IMMEDIATE}, "\333\2\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 1342 | {I_PSHUFHW, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\333\2\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},\r |
| 1343 | {I_PSHUFLW, 3, {XMMREG,XMMREG,IMMEDIATE}, "\3\xF2\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 1344 | {I_PSHUFLW, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\3\xF2\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},\r |
| 1345 | {I_PSLLDQ, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x73\207\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 1346 | {I_PSLLW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF1\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1347 | {I_PSLLW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF1\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1348 | {I_PSLLW, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x71\206\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 1349 | {I_PSLLD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF2\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1350 | {I_PSLLD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF2\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1351 | {I_PSLLD, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x72\206\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 1352 | {I_PSLLQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF3\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1353 | {I_PSLLQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF3\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1354 | {I_PSLLQ, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x73\206\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 1355 | {I_PSRAW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE1\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1356 | {I_PSRAW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE1\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1357 | {I_PSRAW, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x71\204\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 1358 | {I_PSRAD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE2\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1359 | {I_PSRAD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE2\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1360 | {I_PSRAD, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x72\204\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 1361 | {I_PSRLDQ, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x73\203\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 1362 | {I_PSRLW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD1\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1363 | {I_PSRLW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD1\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1364 | {I_PSRLW, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x71\202\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 1365 | {I_PSRLD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD2\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1366 | {I_PSRLD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD2\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1367 | {I_PSRLD, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x72\202\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 1368 | {I_PSRLQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD3\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1369 | {I_PSRLQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD3\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1370 | {I_PSRLQ, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x73\202\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r |
| 1371 | {I_PSUBB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF8\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1372 | {I_PSUBB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF8\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1373 | {I_PSUBW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF9\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1374 | {I_PSUBW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF9\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1375 | {I_PSUBD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xFA\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1376 | {I_PSUBD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xFA\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1377 | {I_PSUBQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFB\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1378 | {I_PSUBQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFB\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1379 | {I_PSUBQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xFB\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1380 | {I_PSUBQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xFB\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1381 | {I_PSUBSB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE8\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1382 | {I_PSUBSB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE8\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1383 | {I_PSUBSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE9\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1384 | {I_PSUBSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE9\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1385 | {I_PSUBUSB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD8\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1386 | {I_PSUBUSB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD8\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1387 | {I_PSUBUSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD9\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1388 | {I_PSUBUSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD9\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1389 | {I_PUNPCKHBW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x68\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1390 | {I_PUNPCKHBW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x68\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1391 | {I_PUNPCKHWD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x69\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1392 | {I_PUNPCKHWD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x69\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1393 | {I_PUNPCKHDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6A\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1394 | {I_PUNPCKHDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x6A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1395 | {I_PUNPCKHQDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x6D\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1396 | {I_PUNPCKHQDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6D\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1397 | {I_PUNPCKLBW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x60\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1398 | {I_PUNPCKLBW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x60\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1399 | {I_PUNPCKLWD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x61\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1400 | {I_PUNPCKLWD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x61\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1401 | {I_PUNPCKLDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x62\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1402 | {I_PUNPCKLDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x62\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1403 | {I_PUNPCKLQDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x6C\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1404 | {I_PUNPCKLQDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6C\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1405 | {I_PXOR, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xEF\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1406 | {I_PXOR, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xEF\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1407 | {I_ADDPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\x58\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1408 | {I_ADDPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\x58\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1409 | {I_ADDSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\x58\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1410 | {I_ADDSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\x58\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1411 | {I_ANDNPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\x55\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1412 | {I_ANDNPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\x55\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1413 | {I_ANDPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\x54\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1414 | {I_ANDPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\x54\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1415 | {I_CMPEQPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x00", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1416 | {I_CMPEQPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x00", IF_WILLAMETTE|IF_SSE2},\r |
| 1417 | {I_CMPEQSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x00", IF_WILLAMETTE|IF_SSE2},\r |
| 1418 | {I_CMPEQSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x00", IF_WILLAMETTE|IF_SSE2},\r |
| 1419 | {I_CMPLEPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x02", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1420 | {I_CMPLEPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x02", IF_WILLAMETTE|IF_SSE2},\r |
| 1421 | {I_CMPLESD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x02", IF_WILLAMETTE|IF_SSE2},\r |
| 1422 | {I_CMPLESD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x02", IF_WILLAMETTE|IF_SSE2},\r |
| 1423 | {I_CMPLTPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x01", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1424 | {I_CMPLTPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x01", IF_WILLAMETTE|IF_SSE2},\r |
| 1425 | {I_CMPLTSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x01", IF_WILLAMETTE|IF_SSE2},\r |
| 1426 | {I_CMPLTSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x01", IF_WILLAMETTE|IF_SSE2},\r |
| 1427 | {I_CMPNEQPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x04", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1428 | {I_CMPNEQPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x04", IF_WILLAMETTE|IF_SSE2},\r |
| 1429 | {I_CMPNEQSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x04", IF_WILLAMETTE|IF_SSE2},\r |
| 1430 | {I_CMPNEQSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x04", IF_WILLAMETTE|IF_SSE2},\r |
| 1431 | {I_CMPNLEPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x06", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1432 | {I_CMPNLEPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x06", IF_WILLAMETTE|IF_SSE2},\r |
| 1433 | {I_CMPNLESD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x06", IF_WILLAMETTE|IF_SSE2},\r |
| 1434 | {I_CMPNLESD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x06", IF_WILLAMETTE|IF_SSE2},\r |
| 1435 | {I_CMPNLTPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x05", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1436 | {I_CMPNLTPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x05", IF_WILLAMETTE|IF_SSE2},\r |
| 1437 | {I_CMPNLTSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x05", IF_WILLAMETTE|IF_SSE2},\r |
| 1438 | {I_CMPNLTSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x05", IF_WILLAMETTE|IF_SSE2},\r |
| 1439 | {I_CMPORDPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x07", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1440 | {I_CMPORDPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x07", IF_WILLAMETTE|IF_SSE2},\r |
| 1441 | {I_CMPORDSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x07", IF_WILLAMETTE|IF_SSE2},\r |
| 1442 | {I_CMPORDSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x07", IF_WILLAMETTE|IF_SSE2},\r |
| 1443 | {I_CMPUNORDPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x03", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1444 | {I_CMPUNORDPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x03", IF_WILLAMETTE|IF_SSE2},\r |
| 1445 | {I_CMPUNORDSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x03", IF_WILLAMETTE|IF_SSE2},\r |
| 1446 | {I_CMPUNORDSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x03", IF_WILLAMETTE|IF_SSE2},\r |
| 1447 | {I_CMPPD, 3, {XMMREG,XMMREG,IMMEDIATE}, "\331\3\x66\x0F\xC2\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 1448 | {I_CMPPD, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\331\3\x66\x0F\xC2\110\26", IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},\r |
| 1449 | {I_CMPSD, 3, {XMMREG,XMMREG,IMMEDIATE}, "\331\3\xF2\x0F\xC2\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 1450 | {I_CMPSD, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\331\3\xF2\x0F\xC2\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 1451 | {I_COMISD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\x2F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1452 | {I_COMISD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\x2F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1453 | {I_CVTDQ2PD, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1454 | {I_CVTDQ2PD, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1455 | {I_CVTDQ2PS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1456 | {I_CVTDQ2PS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1457 | {I_CVTPD2DQ, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1458 | {I_CVTPD2DQ, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1459 | {I_CVTPD2PI, 2, {MMXREG,XMMREG,0}, "\3\x66\x0F\x2D\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1460 | {I_CVTPD2PI, 2, {MMXREG,MEMORY,0}, "\301\3\x66\x0F\x2D\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1461 | {I_CVTPD2PS, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1462 | {I_CVTPD2PS, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1463 | {I_CVTPI2PD, 2, {XMMREG,MMXREG,0}, "\3\x66\x0F\x2A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1464 | {I_CVTPI2PD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x2A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1465 | {I_CVTPS2DQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1466 | {I_CVTPS2DQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1467 | {I_CVTPS2PD, 2, {XMMREG,XMMREG,0}, "\2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1468 | {I_CVTPS2PD, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1469 | {I_CVTSD2SI, 2, {REG32,XMMREG,0}, "\3\xF2\x0F\x2D\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1470 | {I_CVTSD2SI, 2, {REG32,MEMORY,0}, "\301\3\xF2\x0F\x2D\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1471 | {I_CVTSD2SS, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1472 | {I_CVTSD2SS, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1473 | {I_CVTSI2SD, 2, {XMMREG,REG32,0}, "\3\xF2\x0F\x2A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1474 | {I_CVTSI2SD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x2A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1475 | {I_CVTSS2SD, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1476 | {I_CVTSS2SD, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1477 | {I_CVTTPD2PI, 2, {MMXREG,XMMREG,0}, "\3\x66\x0F\x2C\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1478 | {I_CVTTPD2PI, 2, {MMXREG,MEMORY,0}, "\301\3\x66\x0F\x2C\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1479 | {I_CVTTPD2DQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1480 | {I_CVTTPD2DQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1481 | {I_CVTTPS2DQ, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1482 | {I_CVTTPS2DQ, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1483 | {I_CVTTSD2SI, 2, {REG32,XMMREG,0}, "\3\xF2\x0F\x2C\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1484 | {I_CVTTSD2SI, 2, {REG32,MEMORY,0}, "\301\3\xF2\x0F\x2C\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1485 | {I_DIVPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1486 | {I_DIVPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5E\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1487 | {I_DIVSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x5E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1488 | {I_DIVSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x5E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1489 | {I_MAXPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1490 | {I_MAXPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5F\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1491 | {I_MAXSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x5F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1492 | {I_MAXSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x5F\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1493 | {I_MINPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5D\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1494 | {I_MINPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5D\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1495 | {I_MINSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x5D\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1496 | {I_MINSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x5D\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1497 | {I_MOVAPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x28\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1498 | {I_MOVAPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x29\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1499 | {I_MOVAPD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x29\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1500 | {I_MOVAPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x28\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1501 | {I_MOVHPD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x17\101", IF_WILLAMETTE|IF_SSE2},\r |
| 1502 | {I_MOVHPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x16\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1503 | {I_MOVLPD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x13\101", IF_WILLAMETTE|IF_SSE2},\r |
| 1504 | {I_MOVLPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x12\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1505 | {I_MOVMSKPD, 2, {REG32,XMMREG,0}, "\3\x66\x0F\x50\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1506 | {I_MOVSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x10\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1507 | {I_MOVSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x11\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1508 | {I_MOVSD, 2, {MEMORY,XMMREG,0}, "\300\3\xF2\x0F\x11\101", IF_WILLAMETTE|IF_SSE2},\r |
| 1509 | {I_MOVSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x10\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1510 | {I_MOVUPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x10\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1511 | {I_MOVUPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x11\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1512 | {I_MOVUPD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x11\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1513 | {I_MOVUPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x10\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1514 | {I_MULPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x59\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1515 | {I_MULPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x59\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1516 | {I_MULSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x59\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1517 | {I_MULSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x59\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1518 | {I_ORPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x56\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1519 | {I_ORPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x56\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1520 | {I_SHUFPD, 3, {XMMREG,XMMREG,IMMEDIATE}, "\3\x66\x0F\xC6\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r |
| 1521 | {I_SHUFPD, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\3\x66\x0F\xC6\110\26", IF_WILLAMETTE|IF_SSE2|IF_SM|IF_SB|IF_AR2},\r |
| 1522 | {I_SQRTPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x51\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1523 | {I_SQRTPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x51\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1524 | {I_SQRTSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x51\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1525 | {I_SQRTSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x51\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1526 | {I_SUBPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5C\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1527 | {I_SUBPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5C\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1528 | {I_SUBSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x5C\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1529 | {I_SUBSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x5C\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1530 | {I_UCOMISD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x2E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1531 | {I_UCOMISD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x2E\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1532 | {I_UNPCKHPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x15\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1533 | {I_UNPCKHPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x15\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1534 | {I_UNPCKLPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x14\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1535 | {I_UNPCKLPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x14\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1536 | {I_XORPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x57\110", IF_WILLAMETTE|IF_SSE2},\r |
| 1537 | {I_XORPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x57\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r |
| 1538 | {I_ADDSUBPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD0\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r |
| 1539 | {I_ADDSUBPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD0\110", IF_PRESCOTT|IF_SSE3},\r |
| 1540 | {I_ADDSUBPS, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\xD0\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r |
| 1541 | {I_ADDSUBPS, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\xD0\110", IF_PRESCOTT|IF_SSE3},\r |
| 1542 | {I_HADDPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x7C\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r |
| 1543 | {I_HADDPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x7C\110", IF_PRESCOTT|IF_SSE3},\r |
| 1544 | {I_HADDPS, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x7C\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r |
| 1545 | {I_HADDPS, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x7C\110", IF_PRESCOTT|IF_SSE3},\r |
| 1546 | {I_HSUBPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x7D\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r |
| 1547 | {I_HSUBPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x7D\110", IF_PRESCOTT|IF_SSE3},\r |
| 1548 | {I_HSUBPS, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x7D\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r |
| 1549 | {I_HSUBPS, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x7D\110", IF_PRESCOTT|IF_SSE3},\r |
| 1550 | {I_LDDQU, 2, {XMMREG,MEMORY,0}, "\3\xF2\x0F\xF0\110", IF_PRESCOTT|IF_SSE3},\r |
| 1551 | {I_MOVDDUP, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x12\110", IF_PRESCOTT|IF_SSE3},\r |
| 1552 | {I_MOVDDUP, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x12\110", IF_PRESCOTT|IF_SSE3},\r |
| 1553 | {I_MOVSHDUP, 2, {XMMREG,MEMORY,0}, "\301\3\xF3\x0F\x16\110", IF_PRESCOTT|IF_SSE3},\r |
| 1554 | {I_MOVSHDUP, 2, {XMMREG,XMMREG,0}, "\3\xF3\x0F\x16\110", IF_PRESCOTT|IF_SSE3},\r |
| 1555 | {I_MOVSLDUP, 2, {XMMREG,MEMORY,0}, "\301\3\xF3\x0F\x12\110", IF_PRESCOTT|IF_SSE3},\r |
| 1556 | {I_MOVSLDUP, 2, {XMMREG,XMMREG,0}, "\3\xF3\x0F\x12\110", IF_PRESCOTT|IF_SSE3},\r |
| 1557 | ITEMPLATE_END\r |
| 1558 | };\r |
| 1559 | \r |
| 1560 | static struct itemplate *itable_00[] = {\r |
| 1561 | instrux + 29,\r |
| 1562 | instrux + 30,\r |
| 1563 | NULL\r |
| 1564 | };\r |
| 1565 | \r |
| 1566 | static struct itemplate *itable_01[] = {\r |
| 1567 | instrux + 31,\r |
| 1568 | instrux + 32,\r |
| 1569 | instrux + 33,\r |
| 1570 | instrux + 34,\r |
| 1571 | NULL\r |
| 1572 | };\r |
| 1573 | \r |
| 1574 | static struct itemplate *itable_02[] = {\r |
| 1575 | instrux + 35,\r |
| 1576 | instrux + 36,\r |
| 1577 | NULL\r |
| 1578 | };\r |
| 1579 | \r |
| 1580 | static struct itemplate *itable_03[] = {\r |
| 1581 | instrux + 37,\r |
| 1582 | instrux + 38,\r |
| 1583 | instrux + 39,\r |
| 1584 | instrux + 40,\r |
| 1585 | NULL\r |
| 1586 | };\r |
| 1587 | \r |
| 1588 | static struct itemplate *itable_04[] = {\r |
| 1589 | instrux + 43,\r |
| 1590 | NULL\r |
| 1591 | };\r |
| 1592 | \r |
| 1593 | static struct itemplate *itable_05[] = {\r |
| 1594 | instrux + 44,\r |
| 1595 | instrux + 45,\r |
| 1596 | NULL\r |
| 1597 | };\r |
| 1598 | \r |
| 1599 | static struct itemplate *itable_06[] = {\r |
| 1600 | instrux + 778,\r |
| 1601 | instrux + 779,\r |
| 1602 | NULL\r |
| 1603 | };\r |
| 1604 | \r |
| 1605 | static struct itemplate *itable_07[] = {\r |
| 1606 | instrux + 710,\r |
| 1607 | NULL\r |
| 1608 | };\r |
| 1609 | \r |
| 1610 | static struct itemplate *itable_08[] = {\r |
| 1611 | instrux + 578,\r |
| 1612 | instrux + 579,\r |
| 1613 | NULL\r |
| 1614 | };\r |
| 1615 | \r |
| 1616 | static struct itemplate *itable_09[] = {\r |
| 1617 | instrux + 580,\r |
| 1618 | instrux + 581,\r |
| 1619 | instrux + 582,\r |
| 1620 | instrux + 583,\r |
| 1621 | NULL\r |
| 1622 | };\r |
| 1623 | \r |
| 1624 | static struct itemplate *itable_0A[] = {\r |
| 1625 | instrux + 584,\r |
| 1626 | instrux + 585,\r |
| 1627 | NULL\r |
| 1628 | };\r |
| 1629 | \r |
| 1630 | static struct itemplate *itable_0B[] = {\r |
| 1631 | instrux + 586,\r |
| 1632 | instrux + 587,\r |
| 1633 | instrux + 588,\r |
| 1634 | instrux + 589,\r |
| 1635 | NULL\r |
| 1636 | };\r |
| 1637 | \r |
| 1638 | static struct itemplate *itable_0C[] = {\r |
| 1639 | instrux + 592,\r |
| 1640 | NULL\r |
| 1641 | };\r |
| 1642 | \r |
| 1643 | static struct itemplate *itable_0D[] = {\r |
| 1644 | instrux + 593,\r |
| 1645 | instrux + 594,\r |
| 1646 | NULL\r |
| 1647 | };\r |
| 1648 | \r |
| 1649 | static struct itemplate *itable_0E[] = {\r |
| 1650 | instrux + 778,\r |
| 1651 | instrux + 779,\r |
| 1652 | NULL\r |
| 1653 | };\r |
| 1654 | \r |
| 1655 | static struct itemplate *itable_0F[] = {\r |
| 1656 | instrux + 79,\r |
| 1657 | instrux + 80,\r |
| 1658 | instrux + 81,\r |
| 1659 | instrux + 82,\r |
| 1660 | instrux + 83,\r |
| 1661 | instrux + 84,\r |
| 1662 | instrux + 85,\r |
| 1663 | instrux + 86,\r |
| 1664 | instrux + 87,\r |
| 1665 | instrux + 88,\r |
| 1666 | instrux + 89,\r |
| 1667 | instrux + 90,\r |
| 1668 | instrux + 91,\r |
| 1669 | instrux + 92,\r |
| 1670 | instrux + 93,\r |
| 1671 | instrux + 94,\r |
| 1672 | instrux + 95,\r |
| 1673 | instrux + 96,\r |
| 1674 | instrux + 97,\r |
| 1675 | instrux + 98,\r |
| 1676 | instrux + 99,\r |
| 1677 | instrux + 100,\r |
| 1678 | instrux + 101,\r |
| 1679 | instrux + 102,\r |
| 1680 | instrux + 103,\r |
| 1681 | instrux + 104,\r |
| 1682 | instrux + 105,\r |
| 1683 | instrux + 106,\r |
| 1684 | instrux + 107,\r |
| 1685 | instrux + 108,\r |
| 1686 | instrux + 109,\r |
| 1687 | instrux + 110,\r |
| 1688 | instrux + 111,\r |
| 1689 | instrux + 139,\r |
| 1690 | instrux + 167,\r |
| 1691 | instrux + 168,\r |
| 1692 | instrux + 169,\r |
| 1693 | instrux + 170,\r |
| 1694 | instrux + 171,\r |
| 1695 | instrux + 172,\r |
| 1696 | instrux + 173,\r |
| 1697 | instrux + 174,\r |
| 1698 | instrux + 175,\r |
| 1699 | instrux + 176,\r |
| 1700 | instrux + 177,\r |
| 1701 | instrux + 178,\r |
| 1702 | instrux + 179,\r |
| 1703 | instrux + 180,\r |
| 1704 | instrux + 193,\r |
| 1705 | instrux + 261,\r |
| 1706 | instrux + 389,\r |
| 1707 | instrux + 390,\r |
| 1708 | instrux + 391,\r |
| 1709 | instrux + 392,\r |
| 1710 | instrux + 423,\r |
| 1711 | instrux + 424,\r |
| 1712 | instrux + 450,\r |
| 1713 | instrux + 451,\r |
| 1714 | instrux + 452,\r |
| 1715 | instrux + 453,\r |
| 1716 | instrux + 454,\r |
| 1717 | instrux + 456,\r |
| 1718 | instrux + 457,\r |
| 1719 | instrux + 458,\r |
| 1720 | instrux + 459,\r |
| 1721 | instrux + 467,\r |
| 1722 | instrux + 468,\r |
| 1723 | instrux + 469,\r |
| 1724 | instrux + 470,\r |
| 1725 | instrux + 471,\r |
| 1726 | instrux + 472,\r |
| 1727 | instrux + 473,\r |
| 1728 | instrux + 474,\r |
| 1729 | instrux + 475,\r |
| 1730 | instrux + 476,\r |
| 1731 | instrux + 477,\r |
| 1732 | instrux + 478,\r |
| 1733 | instrux + 479,\r |
| 1734 | instrux + 480,\r |
| 1735 | instrux + 499,\r |
| 1736 | instrux + 500,\r |
| 1737 | instrux + 501,\r |
| 1738 | instrux + 502,\r |
| 1739 | instrux + 503,\r |
| 1740 | instrux + 504,\r |
| 1741 | instrux + 505,\r |
| 1742 | instrux + 506,\r |
| 1743 | instrux + 507,\r |
| 1744 | instrux + 508,\r |
| 1745 | instrux + 521,\r |
| 1746 | instrux + 522,\r |
| 1747 | instrux + 523,\r |
| 1748 | instrux + 524,\r |
| 1749 | instrux + 525,\r |
| 1750 | instrux + 526,\r |
| 1751 | instrux + 548,\r |
| 1752 | instrux + 549,\r |
| 1753 | instrux + 550,\r |
| 1754 | instrux + 551,\r |
| 1755 | instrux + 552,\r |
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| 1757 | instrux + 554,\r |
| 1758 | instrux + 555,\r |
| 1759 | instrux + 559,\r |
| 1760 | instrux + 560,\r |
| 1761 | instrux + 561,\r |
| 1762 | instrux + 562,\r |
| 1763 | instrux + 563,\r |
| 1764 | instrux + 564,\r |
| 1765 | instrux + 565,\r |
| 1766 | instrux + 566,\r |
| 1767 | instrux + 570,\r |
| 1768 | instrux + 610,\r |
| 1769 | instrux + 611,\r |
| 1770 | instrux + 612,\r |
| 1771 | instrux + 613,\r |
| 1772 | instrux + 614,\r |
| 1773 | instrux + 615,\r |
| 1774 | instrux + 616,\r |
| 1775 | instrux + 617,\r |
| 1776 | instrux + 618,\r |
| 1777 | instrux + 619,\r |
| 1778 | instrux + 620,\r |
| 1779 | instrux + 621,\r |
| 1780 | instrux + 622,\r |
| 1781 | instrux + 623,\r |
| 1782 | instrux + 624,\r |
| 1783 | instrux + 625,\r |
| 1784 | instrux + 626,\r |
| 1785 | instrux + 627,\r |
| 1786 | instrux + 628,\r |
| 1787 | instrux + 629,\r |
| 1788 | instrux + 630,\r |
| 1789 | instrux + 631,\r |
| 1790 | instrux + 632,\r |
| 1791 | instrux + 633,\r |
| 1792 | instrux + 634,\r |
| 1793 | instrux + 635,\r |
| 1794 | instrux + 636,\r |
| 1795 | instrux + 637,\r |
| 1796 | instrux + 638,\r |
| 1797 | instrux + 639,\r |
| 1798 | instrux + 640,\r |
| 1799 | instrux + 641,\r |
| 1800 | instrux + 642,\r |
| 1801 | instrux + 643,\r |
| 1802 | instrux + 644,\r |
| 1803 | instrux + 645,\r |
| 1804 | instrux + 646,\r |
| 1805 | instrux + 647,\r |
| 1806 | instrux + 648,\r |
| 1807 | instrux + 649,\r |
| 1808 | instrux + 650,\r |
| 1809 | instrux + 651,\r |
| 1810 | instrux + 652,\r |
| 1811 | instrux + 653,\r |
| 1812 | instrux + 654,\r |
| 1813 | instrux + 655,\r |
| 1814 | instrux + 656,\r |
| 1815 | instrux + 657,\r |
| 1816 | instrux + 658,\r |
| 1817 | instrux + 659,\r |
| 1818 | instrux + 660,\r |
| 1819 | instrux + 661,\r |
| 1820 | instrux + 662,\r |
| 1821 | instrux + 663,\r |
| 1822 | instrux + 664,\r |
| 1823 | instrux + 665,\r |
| 1824 | instrux + 666,\r |
| 1825 | instrux + 667,\r |
| 1826 | instrux + 668,\r |
| 1827 | instrux + 669,\r |
| 1828 | instrux + 670,\r |
| 1829 | instrux + 671,\r |
| 1830 | instrux + 672,\r |
| 1831 | instrux + 673,\r |
| 1832 | instrux + 674,\r |
| 1833 | instrux + 675,\r |
| 1834 | instrux + 676,\r |
| 1835 | instrux + 677,\r |
| 1836 | instrux + 678,\r |
| 1837 | instrux + 679,\r |
| 1838 | instrux + 680,\r |
| 1839 | instrux + 681,\r |
| 1840 | instrux + 682,\r |
| 1841 | instrux + 683,\r |
| 1842 | instrux + 684,\r |
| 1843 | instrux + 685,\r |
| 1844 | instrux + 686,\r |
| 1845 | instrux + 687,\r |
| 1846 | instrux + 688,\r |
| 1847 | instrux + 689,\r |
| 1848 | instrux + 690,\r |
| 1849 | instrux + 691,\r |
| 1850 | instrux + 692,\r |
| 1851 | instrux + 693,\r |
| 1852 | instrux + 694,\r |
| 1853 | instrux + 695,\r |
| 1854 | instrux + 696,\r |
| 1855 | instrux + 697,\r |
| 1856 | instrux + 698,\r |
| 1857 | instrux + 699,\r |
| 1858 | instrux + 700,\r |
| 1859 | instrux + 701,\r |
| 1860 | instrux + 702,\r |
| 1861 | instrux + 703,\r |
| 1862 | instrux + 704,\r |
| 1863 | instrux + 705,\r |
| 1864 | instrux + 711,\r |
| 1865 | instrux + 718,\r |
| 1866 | instrux + 719,\r |
| 1867 | instrux + 720,\r |
| 1868 | instrux + 721,\r |
| 1869 | instrux + 722,\r |
| 1870 | instrux + 723,\r |
| 1871 | instrux + 724,\r |
| 1872 | instrux + 725,\r |
| 1873 | instrux + 726,\r |
| 1874 | instrux + 727,\r |
| 1875 | instrux + 728,\r |
| 1876 | instrux + 729,\r |
| 1877 | instrux + 730,\r |
| 1878 | instrux + 731,\r |
| 1879 | instrux + 732,\r |
| 1880 | instrux + 733,\r |
| 1881 | instrux + 734,\r |
| 1882 | instrux + 735,\r |
| 1883 | instrux + 736,\r |
| 1884 | instrux + 737,\r |
| 1885 | instrux + 738,\r |
| 1886 | instrux + 739,\r |
| 1887 | instrux + 740,\r |
| 1888 | instrux + 741,\r |
| 1889 | instrux + 742,\r |
| 1890 | instrux + 743,\r |
| 1891 | instrux + 744,\r |
| 1892 | instrux + 745,\r |
| 1893 | instrux + 746,\r |
| 1894 | instrux + 747,\r |
| 1895 | instrux + 748,\r |
| 1896 | instrux + 749,\r |
| 1897 | instrux + 750,\r |
| 1898 | instrux + 751,\r |
| 1899 | instrux + 752,\r |
| 1900 | instrux + 753,\r |
| 1901 | instrux + 754,\r |
| 1902 | instrux + 755,\r |
| 1903 | instrux + 756,\r |
| 1904 | instrux + 757,\r |
| 1905 | instrux + 758,\r |
| 1906 | instrux + 759,\r |
| 1907 | instrux + 760,\r |
| 1908 | instrux + 761,\r |
| 1909 | instrux + 762,\r |
| 1910 | instrux + 763,\r |
| 1911 | instrux + 764,\r |
| 1912 | instrux + 765,\r |
| 1913 | instrux + 766,\r |
| 1914 | instrux + 767,\r |
| 1915 | instrux + 768,\r |
| 1916 | instrux + 769,\r |
| 1917 | instrux + 770,\r |
| 1918 | instrux + 771,\r |
| 1919 | instrux + 772,\r |
| 1920 | instrux + 773,\r |
| 1921 | instrux + 780,\r |
| 1922 | instrux + 791,\r |
| 1923 | instrux + 792,\r |
| 1924 | instrux + 811,\r |
| 1925 | instrux + 812,\r |
| 1926 | instrux + 813,\r |
| 1927 | instrux + 814,\r |
| 1928 | instrux + 840,\r |
| 1929 | instrux + 841,\r |
| 1930 | instrux + 842,\r |
| 1931 | instrux + 843,\r |
| 1932 | instrux + 881,\r |
| 1933 | instrux + 891,\r |
| 1934 | instrux + 892,\r |
| 1935 | instrux + 893,\r |
| 1936 | instrux + 894,\r |
| 1937 | instrux + 895,\r |
| 1938 | instrux + 896,\r |
| 1939 | instrux + 897,\r |
| 1940 | instrux + 898,\r |
| 1941 | instrux + 908,\r |
| 1942 | instrux + 909,\r |
| 1943 | instrux + 910,\r |
| 1944 | instrux + 911,\r |
| 1945 | instrux + 912,\r |
| 1946 | instrux + 913,\r |
| 1947 | instrux + 914,\r |
| 1948 | instrux + 915,\r |
| 1949 | instrux + 916,\r |
| 1950 | instrux + 917,\r |
| 1951 | instrux + 918,\r |
| 1952 | instrux + 919,\r |
| 1953 | instrux + 920,\r |
| 1954 | instrux + 922,\r |
| 1955 | instrux + 923,\r |
| 1956 | instrux + 924,\r |
| 1957 | instrux + 925,\r |
| 1958 | instrux + 926,\r |
| 1959 | instrux + 933,\r |
| 1960 | instrux + 934,\r |
| 1961 | instrux + 935,\r |
| 1962 | instrux + 936,\r |
| 1963 | instrux + 960,\r |
| 1964 | instrux + 961,\r |
| 1965 | instrux + 962,\r |
| 1966 | instrux + 963,\r |
| 1967 | instrux + 964,\r |
| 1968 | instrux + 965,\r |
| 1969 | instrux + 966,\r |
| 1970 | instrux + 985,\r |
| 1971 | instrux + 986,\r |
| 1972 | instrux + 987,\r |
| 1973 | instrux + 988,\r |
| 1974 | instrux + 989,\r |
| 1975 | instrux + 990,\r |
| 1976 | instrux + 991,\r |
| 1977 | instrux + 992,\r |
| 1978 | instrux + 993,\r |
| 1979 | instrux + 994,\r |
| 1980 | instrux + 995,\r |
| 1981 | instrux + 996,\r |
| 1982 | instrux + 997,\r |
| 1983 | instrux + 998,\r |
| 1984 | instrux + 999,\r |
| 1985 | instrux + 1000,\r |
| 1986 | instrux + 1001,\r |
| 1987 | instrux + 1002,\r |
| 1988 | instrux + 1003,\r |
| 1989 | instrux + 1004,\r |
| 1990 | instrux + 1005,\r |
| 1991 | instrux + 1008,\r |
| 1992 | instrux + 1009,\r |
| 1993 | instrux + 1010,\r |
| 1994 | instrux + 1011,\r |
| 1995 | instrux + 1012,\r |
| 1996 | instrux + 1013,\r |
| 1997 | instrux + 1014,\r |
| 1998 | instrux + 1015,\r |
| 1999 | instrux + 1016,\r |
| 2000 | instrux + 1058,\r |
| 2001 | instrux + 1059,\r |
| 2002 | instrux + 1060,\r |
| 2003 | instrux + 1061,\r |
| 2004 | instrux + 1062,\r |
| 2005 | instrux + 1063,\r |
| 2006 | instrux + 1064,\r |
| 2007 | instrux + 1065,\r |
| 2008 | instrux + 1067,\r |
| 2009 | instrux + 1068,\r |
| 2010 | instrux + 1069,\r |
| 2011 | instrux + 1070,\r |
| 2012 | instrux + 1071,\r |
| 2013 | instrux + 1072,\r |
| 2014 | instrux + 1073,\r |
| 2015 | instrux + 1074,\r |
| 2016 | instrux + 1075,\r |
| 2017 | instrux + 1076,\r |
| 2018 | instrux + 1077,\r |
| 2019 | instrux + 1078,\r |
| 2020 | instrux + 1079,\r |
| 2021 | instrux + 1080,\r |
| 2022 | instrux + 1081,\r |
| 2023 | instrux + 1082,\r |
| 2024 | instrux + 1083,\r |
| 2025 | instrux + 1084,\r |
| 2026 | instrux + 1085,\r |
| 2027 | instrux + 1086,\r |
| 2028 | instrux + 1087,\r |
| 2029 | instrux + 1088,\r |
| 2030 | instrux + 1089,\r |
| 2031 | instrux + 1090,\r |
| 2032 | instrux + 1091,\r |
| 2033 | instrux + 1092,\r |
| 2034 | instrux + 1093,\r |
| 2035 | instrux + 1094,\r |
| 2036 | instrux + 1095,\r |
| 2037 | instrux + 1096,\r |
| 2038 | instrux + 1097,\r |
| 2039 | instrux + 1098,\r |
| 2040 | instrux + 1099,\r |
| 2041 | instrux + 1100,\r |
| 2042 | instrux + 1101,\r |
| 2043 | instrux + 1102,\r |
| 2044 | instrux + 1103,\r |
| 2045 | instrux + 1104,\r |
| 2046 | instrux + 1105,\r |
| 2047 | instrux + 1106,\r |
| 2048 | instrux + 1107,\r |
| 2049 | instrux + 1108,\r |
| 2050 | instrux + 1109,\r |
| 2051 | instrux + 1110,\r |
| 2052 | instrux + 1111,\r |
| 2053 | instrux + 1112,\r |
| 2054 | instrux + 1113,\r |
| 2055 | instrux + 1114,\r |
| 2056 | instrux + 1115,\r |
| 2057 | instrux + 1116,\r |
| 2058 | instrux + 1117,\r |
| 2059 | instrux + 1118,\r |
| 2060 | instrux + 1119,\r |
| 2061 | instrux + 1120,\r |
| 2062 | instrux + 1121,\r |
| 2063 | instrux + 1122,\r |
| 2064 | instrux + 1123,\r |
| 2065 | instrux + 1124,\r |
| 2066 | instrux + 1125,\r |
| 2067 | instrux + 1126,\r |
| 2068 | instrux + 1127,\r |
| 2069 | instrux + 1128,\r |
| 2070 | instrux + 1129,\r |
| 2071 | instrux + 1130,\r |
| 2072 | instrux + 1131,\r |
| 2073 | instrux + 1132,\r |
| 2074 | instrux + 1133,\r |
| 2075 | instrux + 1134,\r |
| 2076 | instrux + 1135,\r |
| 2077 | instrux + 1136,\r |
| 2078 | instrux + 1137,\r |
| 2079 | instrux + 1138,\r |
| 2080 | instrux + 1139,\r |
| 2081 | instrux + 1140,\r |
| 2082 | instrux + 1141,\r |
| 2083 | instrux + 1142,\r |
| 2084 | instrux + 1143,\r |
| 2085 | instrux + 1144,\r |
| 2086 | instrux + 1145,\r |
| 2087 | instrux + 1146,\r |
| 2088 | instrux + 1147,\r |
| 2089 | instrux + 1148,\r |
| 2090 | instrux + 1149,\r |
| 2091 | instrux + 1150,\r |
| 2092 | instrux + 1151,\r |
| 2093 | instrux + 1152,\r |
| 2094 | instrux + 1153,\r |
| 2095 | instrux + 1154,\r |
| 2096 | instrux + 1155,\r |
| 2097 | instrux + 1156,\r |
| 2098 | instrux + 1157,\r |
| 2099 | instrux + 1158,\r |
| 2100 | instrux + 1159,\r |
| 2101 | instrux + 1160,\r |
| 2102 | instrux + 1161,\r |
| 2103 | instrux + 1162,\r |
| 2104 | instrux + 1163,\r |
| 2105 | instrux + 1164,\r |
| 2106 | instrux + 1165,\r |
| 2107 | instrux + 1166,\r |
| 2108 | instrux + 1167,\r |
| 2109 | instrux + 1168,\r |
| 2110 | instrux + 1169,\r |
| 2111 | instrux + 1170,\r |
| 2112 | instrux + 1171,\r |
| 2113 | instrux + 1172,\r |
| 2114 | instrux + 1173,\r |
| 2115 | instrux + 1174,\r |
| 2116 | instrux + 1175,\r |
| 2117 | instrux + 1176,\r |
| 2118 | instrux + 1177,\r |
| 2119 | instrux + 1178,\r |
| 2120 | instrux + 1179,\r |
| 2121 | instrux + 1180,\r |
| 2122 | instrux + 1181,\r |
| 2123 | instrux + 1182,\r |
| 2124 | instrux + 1183,\r |
| 2125 | instrux + 1184,\r |
| 2126 | instrux + 1185,\r |
| 2127 | instrux + 1186,\r |
| 2128 | instrux + 1187,\r |
| 2129 | instrux + 1188,\r |
| 2130 | instrux + 1189,\r |
| 2131 | instrux + 1190,\r |
| 2132 | instrux + 1191,\r |
| 2133 | instrux + 1192,\r |
| 2134 | instrux + 1193,\r |
| 2135 | instrux + 1194,\r |
| 2136 | instrux + 1195,\r |
| 2137 | instrux + 1196,\r |
| 2138 | instrux + 1197,\r |
| 2139 | instrux + 1198,\r |
| 2140 | instrux + 1199,\r |
| 2141 | instrux + 1200,\r |
| 2142 | instrux + 1201,\r |
| 2143 | instrux + 1202,\r |
| 2144 | instrux + 1203,\r |
| 2145 | instrux + 1204,\r |
| 2146 | instrux + 1205,\r |
| 2147 | instrux + 1206,\r |
| 2148 | instrux + 1207,\r |
| 2149 | instrux + 1208,\r |
| 2150 | instrux + 1209,\r |
| 2151 | instrux + 1210,\r |
| 2152 | instrux + 1211,\r |
| 2153 | instrux + 1212,\r |
| 2154 | instrux + 1213,\r |
| 2155 | instrux + 1214,\r |
| 2156 | instrux + 1215,\r |
| 2157 | instrux + 1216,\r |
| 2158 | instrux + 1217,\r |
| 2159 | instrux + 1218,\r |
| 2160 | instrux + 1219,\r |
| 2161 | instrux + 1220,\r |
| 2162 | instrux + 1221,\r |
| 2163 | instrux + 1222,\r |
| 2164 | instrux + 1223,\r |
| 2165 | instrux + 1224,\r |
| 2166 | instrux + 1225,\r |
| 2167 | instrux + 1226,\r |
| 2168 | instrux + 1227,\r |
| 2169 | instrux + 1228,\r |
| 2170 | instrux + 1229,\r |
| 2171 | instrux + 1230,\r |
| 2172 | instrux + 1231,\r |
| 2173 | instrux + 1232,\r |
| 2174 | instrux + 1233,\r |
| 2175 | instrux + 1235,\r |
| 2176 | instrux + 1237,\r |
| 2177 | instrux + 1240,\r |
| 2178 | instrux + 1241,\r |
| 2179 | instrux + 1250,\r |
| 2180 | instrux + 1251,\r |
| 2181 | instrux + 1252,\r |
| 2182 | instrux + 1253,\r |
| 2183 | instrux + 1255,\r |
| 2184 | instrux + 1258,\r |
| 2185 | instrux + 1259,\r |
| 2186 | instrux + 1272,\r |
| 2187 | instrux + 1273,\r |
| 2188 | instrux + 1324,\r |
| 2189 | instrux + 1325,\r |
| 2190 | instrux + 1334,\r |
| 2191 | instrux + 1335,\r |
| 2192 | instrux + 1370,\r |
| 2193 | instrux + 1371,\r |
| 2194 | instrux + 1446,\r |
| 2195 | instrux + 1447,\r |
| 2196 | instrux + 1448,\r |
| 2197 | instrux + 1449,\r |
| 2198 | instrux + 1460,\r |
| 2199 | instrux + 1461,\r |
| 2200 | instrux + 1468,\r |
| 2201 | instrux + 1469,\r |
| 2202 | instrux + 1474,\r |
| 2203 | instrux + 1475,\r |
| 2204 | NULL\r |
| 2205 | };\r |
| 2206 | \r |
| 2207 | static struct itemplate *itable_10[] = {\r |
| 2208 | instrux + 6,\r |
| 2209 | instrux + 7,\r |
| 2210 | NULL\r |
| 2211 | };\r |
| 2212 | \r |
| 2213 | static struct itemplate *itable_11[] = {\r |
| 2214 | instrux + 8,\r |
| 2215 | instrux + 9,\r |
| 2216 | instrux + 10,\r |
| 2217 | instrux + 11,\r |
| 2218 | NULL\r |
| 2219 | };\r |
| 2220 | \r |
| 2221 | static struct itemplate *itable_12[] = {\r |
| 2222 | instrux + 12,\r |
| 2223 | instrux + 13,\r |
| 2224 | NULL\r |
| 2225 | };\r |
| 2226 | \r |
| 2227 | static struct itemplate *itable_13[] = {\r |
| 2228 | instrux + 14,\r |
| 2229 | instrux + 15,\r |
| 2230 | instrux + 16,\r |
| 2231 | instrux + 17,\r |
| 2232 | NULL\r |
| 2233 | };\r |
| 2234 | \r |
| 2235 | static struct itemplate *itable_14[] = {\r |
| 2236 | instrux + 20,\r |
| 2237 | NULL\r |
| 2238 | };\r |
| 2239 | \r |
| 2240 | static struct itemplate *itable_15[] = {\r |
| 2241 | instrux + 21,\r |
| 2242 | instrux + 22,\r |
| 2243 | NULL\r |
| 2244 | };\r |
| 2245 | \r |
| 2246 | static struct itemplate *itable_16[] = {\r |
| 2247 | instrux + 778,\r |
| 2248 | instrux + 779,\r |
| 2249 | NULL\r |
| 2250 | };\r |
| 2251 | \r |
| 2252 | static struct itemplate *itable_17[] = {\r |
| 2253 | instrux + 710,\r |
| 2254 | NULL\r |
| 2255 | };\r |
| 2256 | \r |
| 2257 | static struct itemplate *itable_18[] = {\r |
| 2258 | instrux + 855,\r |
| 2259 | instrux + 856,\r |
| 2260 | NULL\r |
| 2261 | };\r |
| 2262 | \r |
| 2263 | static struct itemplate *itable_19[] = {\r |
| 2264 | instrux + 857,\r |
| 2265 | instrux + 858,\r |
| 2266 | instrux + 859,\r |
| 2267 | instrux + 860,\r |
| 2268 | NULL\r |
| 2269 | };\r |
| 2270 | \r |
| 2271 | static struct itemplate *itable_1A[] = {\r |
| 2272 | instrux + 861,\r |
| 2273 | instrux + 862,\r |
| 2274 | NULL\r |
| 2275 | };\r |
| 2276 | \r |
| 2277 | static struct itemplate *itable_1B[] = {\r |
| 2278 | instrux + 863,\r |
| 2279 | instrux + 864,\r |
| 2280 | instrux + 865,\r |
| 2281 | instrux + 866,\r |
| 2282 | NULL\r |
| 2283 | };\r |
| 2284 | \r |
| 2285 | static struct itemplate *itable_1C[] = {\r |
| 2286 | instrux + 869,\r |
| 2287 | NULL\r |
| 2288 | };\r |
| 2289 | \r |
| 2290 | static struct itemplate *itable_1D[] = {\r |
| 2291 | instrux + 870,\r |
| 2292 | instrux + 871,\r |
| 2293 | NULL\r |
| 2294 | };\r |
| 2295 | \r |
| 2296 | static struct itemplate *itable_1E[] = {\r |
| 2297 | instrux + 778,\r |
| 2298 | instrux + 779,\r |
| 2299 | NULL\r |
| 2300 | };\r |
| 2301 | \r |
| 2302 | static struct itemplate *itable_1F[] = {\r |
| 2303 | instrux + 710,\r |
| 2304 | NULL\r |
| 2305 | };\r |
| 2306 | \r |
| 2307 | static struct itemplate *itable_20[] = {\r |
| 2308 | instrux + 52,\r |
| 2309 | instrux + 53,\r |
| 2310 | NULL\r |
| 2311 | };\r |
| 2312 | \r |
| 2313 | static struct itemplate *itable_21[] = {\r |
| 2314 | instrux + 54,\r |
| 2315 | instrux + 55,\r |
| 2316 | instrux + 56,\r |
| 2317 | instrux + 57,\r |
| 2318 | NULL\r |
| 2319 | };\r |
| 2320 | \r |
| 2321 | static struct itemplate *itable_22[] = {\r |
| 2322 | instrux + 58,\r |
| 2323 | instrux + 59,\r |
| 2324 | NULL\r |
| 2325 | };\r |
| 2326 | \r |
| 2327 | static struct itemplate *itable_23[] = {\r |
| 2328 | instrux + 60,\r |
| 2329 | instrux + 61,\r |
| 2330 | instrux + 62,\r |
| 2331 | instrux + 63,\r |
| 2332 | NULL\r |
| 2333 | };\r |
| 2334 | \r |
| 2335 | static struct itemplate *itable_24[] = {\r |
| 2336 | instrux + 66,\r |
| 2337 | NULL\r |
| 2338 | };\r |
| 2339 | \r |
| 2340 | static struct itemplate *itable_25[] = {\r |
| 2341 | instrux + 67,\r |
| 2342 | instrux + 68,\r |
| 2343 | NULL\r |
| 2344 | };\r |
| 2345 | \r |
| 2346 | static struct itemplate *itable_26[] = {\r |
| 2347 | NULL\r |
| 2348 | };\r |
| 2349 | \r |
| 2350 | static struct itemplate *itable_27[] = {\r |
| 2351 | instrux + 183,\r |
| 2352 | NULL\r |
| 2353 | };\r |
| 2354 | \r |
| 2355 | static struct itemplate *itable_28[] = {\r |
| 2356 | instrux + 937,\r |
| 2357 | instrux + 938,\r |
| 2358 | NULL\r |
| 2359 | };\r |
| 2360 | \r |
| 2361 | static struct itemplate *itable_29[] = {\r |
| 2362 | instrux + 939,\r |
| 2363 | instrux + 940,\r |
| 2364 | instrux + 941,\r |
| 2365 | instrux + 942,\r |
| 2366 | NULL\r |
| 2367 | };\r |
| 2368 | \r |
| 2369 | static struct itemplate *itable_2A[] = {\r |
| 2370 | instrux + 943,\r |
| 2371 | instrux + 944,\r |
| 2372 | NULL\r |
| 2373 | };\r |
| 2374 | \r |
| 2375 | static struct itemplate *itable_2B[] = {\r |
| 2376 | instrux + 945,\r |
| 2377 | instrux + 946,\r |
| 2378 | instrux + 947,\r |
| 2379 | instrux + 948,\r |
| 2380 | NULL\r |
| 2381 | };\r |
| 2382 | \r |
| 2383 | static struct itemplate *itable_2C[] = {\r |
| 2384 | instrux + 951,\r |
| 2385 | NULL\r |
| 2386 | };\r |
| 2387 | \r |
| 2388 | static struct itemplate *itable_2D[] = {\r |
| 2389 | instrux + 952,\r |
| 2390 | instrux + 953,\r |
| 2391 | NULL\r |
| 2392 | };\r |
| 2393 | \r |
| 2394 | static struct itemplate *itable_2E[] = {\r |
| 2395 | NULL\r |
| 2396 | };\r |
| 2397 | \r |
| 2398 | static struct itemplate *itable_2F[] = {\r |
| 2399 | instrux + 184,\r |
| 2400 | NULL\r |
| 2401 | };\r |
| 2402 | \r |
| 2403 | static struct itemplate *itable_30[] = {\r |
| 2404 | instrux + 1035,\r |
| 2405 | instrux + 1036,\r |
| 2406 | NULL\r |
| 2407 | };\r |
| 2408 | \r |
| 2409 | static struct itemplate *itable_31[] = {\r |
| 2410 | instrux + 1037,\r |
| 2411 | instrux + 1038,\r |
| 2412 | instrux + 1039,\r |
| 2413 | instrux + 1040,\r |
| 2414 | NULL\r |
| 2415 | };\r |
| 2416 | \r |
| 2417 | static struct itemplate *itable_32[] = {\r |
| 2418 | instrux + 1041,\r |
| 2419 | instrux + 1042,\r |
| 2420 | NULL\r |
| 2421 | };\r |
| 2422 | \r |
| 2423 | static struct itemplate *itable_33[] = {\r |
| 2424 | instrux + 1043,\r |
| 2425 | instrux + 1044,\r |
| 2426 | instrux + 1045,\r |
| 2427 | instrux + 1046,\r |
| 2428 | NULL\r |
| 2429 | };\r |
| 2430 | \r |
| 2431 | static struct itemplate *itable_34[] = {\r |
| 2432 | instrux + 1049,\r |
| 2433 | NULL\r |
| 2434 | };\r |
| 2435 | \r |
| 2436 | static struct itemplate *itable_35[] = {\r |
| 2437 | instrux + 1050,\r |
| 2438 | instrux + 1051,\r |
| 2439 | NULL\r |
| 2440 | };\r |
| 2441 | \r |
| 2442 | static struct itemplate *itable_36[] = {\r |
| 2443 | NULL\r |
| 2444 | };\r |
| 2445 | \r |
| 2446 | static struct itemplate *itable_37[] = {\r |
| 2447 | instrux + 0,\r |
| 2448 | NULL\r |
| 2449 | };\r |
| 2450 | \r |
| 2451 | static struct itemplate *itable_38[] = {\r |
| 2452 | instrux + 141,\r |
| 2453 | instrux + 142,\r |
| 2454 | NULL\r |
| 2455 | };\r |
| 2456 | \r |
| 2457 | static struct itemplate *itable_39[] = {\r |
| 2458 | instrux + 143,\r |
| 2459 | instrux + 144,\r |
| 2460 | instrux + 145,\r |
| 2461 | instrux + 146,\r |
| 2462 | NULL\r |
| 2463 | };\r |
| 2464 | \r |
| 2465 | static struct itemplate *itable_3A[] = {\r |
| 2466 | instrux + 147,\r |
| 2467 | instrux + 148,\r |
| 2468 | NULL\r |
| 2469 | };\r |
| 2470 | \r |
| 2471 | static struct itemplate *itable_3B[] = {\r |
| 2472 | instrux + 149,\r |
| 2473 | instrux + 150,\r |
| 2474 | instrux + 151,\r |
| 2475 | instrux + 152,\r |
| 2476 | NULL\r |
| 2477 | };\r |
| 2478 | \r |
| 2479 | static struct itemplate *itable_3C[] = {\r |
| 2480 | instrux + 155,\r |
| 2481 | NULL\r |
| 2482 | };\r |
| 2483 | \r |
| 2484 | static struct itemplate *itable_3D[] = {\r |
| 2485 | instrux + 156,\r |
| 2486 | instrux + 157,\r |
| 2487 | NULL\r |
| 2488 | };\r |
| 2489 | \r |
| 2490 | static struct itemplate *itable_3E[] = {\r |
| 2491 | NULL\r |
| 2492 | };\r |
| 2493 | \r |
| 2494 | static struct itemplate *itable_3F[] = {\r |
| 2495 | instrux + 5,\r |
| 2496 | NULL\r |
| 2497 | };\r |
| 2498 | \r |
| 2499 | static struct itemplate *itable_40[] = {\r |
| 2500 | instrux + 411,\r |
| 2501 | instrux + 412,\r |
| 2502 | NULL\r |
| 2503 | };\r |
| 2504 | \r |
| 2505 | static struct itemplate *itable_41[] = {\r |
| 2506 | instrux + 411,\r |
| 2507 | instrux + 412,\r |
| 2508 | NULL\r |
| 2509 | };\r |
| 2510 | \r |
| 2511 | static struct itemplate *itable_42[] = {\r |
| 2512 | instrux + 411,\r |
| 2513 | instrux + 412,\r |
| 2514 | NULL\r |
| 2515 | };\r |
| 2516 | \r |
| 2517 | static struct itemplate *itable_43[] = {\r |
| 2518 | instrux + 411,\r |
| 2519 | instrux + 412,\r |
| 2520 | NULL\r |
| 2521 | };\r |
| 2522 | \r |
| 2523 | static struct itemplate *itable_44[] = {\r |
| 2524 | instrux + 411,\r |
| 2525 | instrux + 412,\r |
| 2526 | NULL\r |
| 2527 | };\r |
| 2528 | \r |
| 2529 | static struct itemplate *itable_45[] = {\r |
| 2530 | instrux + 411,\r |
| 2531 | instrux + 412,\r |
| 2532 | NULL\r |
| 2533 | };\r |
| 2534 | \r |
| 2535 | static struct itemplate *itable_46[] = {\r |
| 2536 | instrux + 411,\r |
| 2537 | instrux + 412,\r |
| 2538 | NULL\r |
| 2539 | };\r |
| 2540 | \r |
| 2541 | static struct itemplate *itable_47[] = {\r |
| 2542 | instrux + 411,\r |
| 2543 | instrux + 412,\r |
| 2544 | NULL\r |
| 2545 | };\r |
| 2546 | \r |
| 2547 | static struct itemplate *itable_48[] = {\r |
| 2548 | instrux + 185,\r |
| 2549 | instrux + 186,\r |
| 2550 | NULL\r |
| 2551 | };\r |
| 2552 | \r |
| 2553 | static struct itemplate *itable_49[] = {\r |
| 2554 | instrux + 185,\r |
| 2555 | instrux + 186,\r |
| 2556 | NULL\r |
| 2557 | };\r |
| 2558 | \r |
| 2559 | static struct itemplate *itable_4A[] = {\r |
| 2560 | instrux + 185,\r |
| 2561 | instrux + 186,\r |
| 2562 | NULL\r |
| 2563 | };\r |
| 2564 | \r |
| 2565 | static struct itemplate *itable_4B[] = {\r |
| 2566 | instrux + 185,\r |
| 2567 | instrux + 186,\r |
| 2568 | NULL\r |
| 2569 | };\r |
| 2570 | \r |
| 2571 | static struct itemplate *itable_4C[] = {\r |
| 2572 | instrux + 185,\r |
| 2573 | instrux + 186,\r |
| 2574 | NULL\r |
| 2575 | };\r |
| 2576 | \r |
| 2577 | static struct itemplate *itable_4D[] = {\r |
| 2578 | instrux + 185,\r |
| 2579 | instrux + 186,\r |
| 2580 | NULL\r |
| 2581 | };\r |
| 2582 | \r |
| 2583 | static struct itemplate *itable_4E[] = {\r |
| 2584 | instrux + 185,\r |
| 2585 | instrux + 186,\r |
| 2586 | NULL\r |
| 2587 | };\r |
| 2588 | \r |
| 2589 | static struct itemplate *itable_4F[] = {\r |
| 2590 | instrux + 185,\r |
| 2591 | instrux + 186,\r |
| 2592 | NULL\r |
| 2593 | };\r |
| 2594 | \r |
| 2595 | static struct itemplate *itable_50[] = {\r |
| 2596 | instrux + 774,\r |
| 2597 | instrux + 775,\r |
| 2598 | NULL\r |
| 2599 | };\r |
| 2600 | \r |
| 2601 | static struct itemplate *itable_51[] = {\r |
| 2602 | instrux + 774,\r |
| 2603 | instrux + 775,\r |
| 2604 | NULL\r |
| 2605 | };\r |
| 2606 | \r |
| 2607 | static struct itemplate *itable_52[] = {\r |
| 2608 | instrux + 774,\r |
| 2609 | instrux + 775,\r |
| 2610 | NULL\r |
| 2611 | };\r |
| 2612 | \r |
| 2613 | static struct itemplate *itable_53[] = {\r |
| 2614 | instrux + 774,\r |
| 2615 | instrux + 775,\r |
| 2616 | NULL\r |
| 2617 | };\r |
| 2618 | \r |
| 2619 | static struct itemplate *itable_54[] = {\r |
| 2620 | instrux + 774,\r |
| 2621 | instrux + 775,\r |
| 2622 | NULL\r |
| 2623 | };\r |
| 2624 | \r |
| 2625 | static struct itemplate *itable_55[] = {\r |
| 2626 | instrux + 774,\r |
| 2627 | instrux + 775,\r |
| 2628 | NULL\r |
| 2629 | };\r |
| 2630 | \r |
| 2631 | static struct itemplate *itable_56[] = {\r |
| 2632 | instrux + 774,\r |
| 2633 | instrux + 775,\r |
| 2634 | NULL\r |
| 2635 | };\r |
| 2636 | \r |
| 2637 | static struct itemplate *itable_57[] = {\r |
| 2638 | instrux + 774,\r |
| 2639 | instrux + 775,\r |
| 2640 | NULL\r |
| 2641 | };\r |
| 2642 | \r |
| 2643 | static struct itemplate *itable_58[] = {\r |
| 2644 | instrux + 706,\r |
| 2645 | instrux + 707,\r |
| 2646 | NULL\r |
| 2647 | };\r |
| 2648 | \r |
| 2649 | static struct itemplate *itable_59[] = {\r |
| 2650 | instrux + 706,\r |
| 2651 | instrux + 707,\r |
| 2652 | NULL\r |
| 2653 | };\r |
| 2654 | \r |
| 2655 | static struct itemplate *itable_5A[] = {\r |
| 2656 | instrux + 706,\r |
| 2657 | instrux + 707,\r |
| 2658 | NULL\r |
| 2659 | };\r |
| 2660 | \r |
| 2661 | static struct itemplate *itable_5B[] = {\r |
| 2662 | instrux + 706,\r |
| 2663 | instrux + 707,\r |
| 2664 | NULL\r |
| 2665 | };\r |
| 2666 | \r |
| 2667 | static struct itemplate *itable_5C[] = {\r |
| 2668 | instrux + 706,\r |
| 2669 | instrux + 707,\r |
| 2670 | NULL\r |
| 2671 | };\r |
| 2672 | \r |
| 2673 | static struct itemplate *itable_5D[] = {\r |
| 2674 | instrux + 706,\r |
| 2675 | instrux + 707,\r |
| 2676 | NULL\r |
| 2677 | };\r |
| 2678 | \r |
| 2679 | static struct itemplate *itable_5E[] = {\r |
| 2680 | instrux + 706,\r |
| 2681 | instrux + 707,\r |
| 2682 | NULL\r |
| 2683 | };\r |
| 2684 | \r |
| 2685 | static struct itemplate *itable_5F[] = {\r |
| 2686 | instrux + 706,\r |
| 2687 | instrux + 707,\r |
| 2688 | NULL\r |
| 2689 | };\r |
| 2690 | \r |
| 2691 | static struct itemplate *itable_60[] = {\r |
| 2692 | instrux + 785,\r |
| 2693 | instrux + 786,\r |
| 2694 | instrux + 787,\r |
| 2695 | NULL\r |
| 2696 | };\r |
| 2697 | \r |
| 2698 | static struct itemplate *itable_61[] = {\r |
| 2699 | instrux + 712,\r |
| 2700 | instrux + 713,\r |
| 2701 | instrux + 714,\r |
| 2702 | NULL\r |
| 2703 | };\r |
| 2704 | \r |
| 2705 | static struct itemplate *itable_62[] = {\r |
| 2706 | instrux + 77,\r |
| 2707 | instrux + 78,\r |
| 2708 | NULL\r |
| 2709 | };\r |
| 2710 | \r |
| 2711 | static struct itemplate *itable_63[] = {\r |
| 2712 | instrux + 75,\r |
| 2713 | instrux + 76,\r |
| 2714 | NULL\r |
| 2715 | };\r |
| 2716 | \r |
| 2717 | static struct itemplate *itable_64[] = {\r |
| 2718 | NULL\r |
| 2719 | };\r |
| 2720 | \r |
| 2721 | static struct itemplate *itable_65[] = {\r |
| 2722 | NULL\r |
| 2723 | };\r |
| 2724 | \r |
| 2725 | static struct itemplate *itable_66[] = {\r |
| 2726 | instrux + 1234,\r |
| 2727 | instrux + 1236,\r |
| 2728 | instrux + 1238,\r |
| 2729 | instrux + 1242,\r |
| 2730 | instrux + 1243,\r |
| 2731 | instrux + 1244,\r |
| 2732 | instrux + 1245,\r |
| 2733 | instrux + 1246,\r |
| 2734 | instrux + 1247,\r |
| 2735 | instrux + 1248,\r |
| 2736 | instrux + 1249,\r |
| 2737 | instrux + 1256,\r |
| 2738 | instrux + 1257,\r |
| 2739 | instrux + 1260,\r |
| 2740 | instrux + 1261,\r |
| 2741 | instrux + 1262,\r |
| 2742 | instrux + 1263,\r |
| 2743 | instrux + 1264,\r |
| 2744 | instrux + 1265,\r |
| 2745 | instrux + 1266,\r |
| 2746 | instrux + 1267,\r |
| 2747 | instrux + 1268,\r |
| 2748 | instrux + 1269,\r |
| 2749 | instrux + 1270,\r |
| 2750 | instrux + 1271,\r |
| 2751 | instrux + 1274,\r |
| 2752 | instrux + 1275,\r |
| 2753 | instrux + 1276,\r |
| 2754 | instrux + 1277,\r |
| 2755 | instrux + 1278,\r |
| 2756 | instrux + 1279,\r |
| 2757 | instrux + 1280,\r |
| 2758 | instrux + 1281,\r |
| 2759 | instrux + 1282,\r |
| 2760 | instrux + 1283,\r |
| 2761 | instrux + 1284,\r |
| 2762 | instrux + 1285,\r |
| 2763 | instrux + 1286,\r |
| 2764 | instrux + 1287,\r |
| 2765 | instrux + 1288,\r |
| 2766 | instrux + 1289,\r |
| 2767 | instrux + 1290,\r |
| 2768 | instrux + 1291,\r |
| 2769 | instrux + 1292,\r |
| 2770 | instrux + 1293,\r |
| 2771 | instrux + 1294,\r |
| 2772 | instrux + 1295,\r |
| 2773 | instrux + 1296,\r |
| 2774 | instrux + 1297,\r |
| 2775 | instrux + 1298,\r |
| 2776 | instrux + 1299,\r |
| 2777 | instrux + 1300,\r |
| 2778 | instrux + 1301,\r |
| 2779 | instrux + 1302,\r |
| 2780 | instrux + 1303,\r |
| 2781 | instrux + 1304,\r |
| 2782 | instrux + 1305,\r |
| 2783 | instrux + 1306,\r |
| 2784 | instrux + 1307,\r |
| 2785 | instrux + 1308,\r |
| 2786 | instrux + 1309,\r |
| 2787 | instrux + 1310,\r |
| 2788 | instrux + 1311,\r |
| 2789 | instrux + 1312,\r |
| 2790 | instrux + 1313,\r |
| 2791 | instrux + 1314,\r |
| 2792 | instrux + 1315,\r |
| 2793 | instrux + 1316,\r |
| 2794 | instrux + 1317,\r |
| 2795 | instrux + 1318,\r |
| 2796 | instrux + 1319,\r |
| 2797 | instrux + 1320,\r |
| 2798 | instrux + 1321,\r |
| 2799 | instrux + 1322,\r |
| 2800 | instrux + 1323,\r |
| 2801 | instrux + 1326,\r |
| 2802 | instrux + 1327,\r |
| 2803 | instrux + 1328,\r |
| 2804 | instrux + 1329,\r |
| 2805 | instrux + 1330,\r |
| 2806 | instrux + 1331,\r |
| 2807 | instrux + 1332,\r |
| 2808 | instrux + 1333,\r |
| 2809 | instrux + 1338,\r |
| 2810 | instrux + 1339,\r |
| 2811 | instrux + 1340,\r |
| 2812 | instrux + 1341,\r |
| 2813 | instrux + 1342,\r |
| 2814 | instrux + 1343,\r |
| 2815 | instrux + 1344,\r |
| 2816 | instrux + 1345,\r |
| 2817 | instrux + 1346,\r |
| 2818 | instrux + 1347,\r |
| 2819 | instrux + 1348,\r |
| 2820 | instrux + 1349,\r |
| 2821 | instrux + 1350,\r |
| 2822 | instrux + 1351,\r |
| 2823 | instrux + 1352,\r |
| 2824 | instrux + 1353,\r |
| 2825 | instrux + 1354,\r |
| 2826 | instrux + 1355,\r |
| 2827 | instrux + 1356,\r |
| 2828 | instrux + 1357,\r |
| 2829 | instrux + 1358,\r |
| 2830 | instrux + 1359,\r |
| 2831 | instrux + 1360,\r |
| 2832 | instrux + 1361,\r |
| 2833 | instrux + 1362,\r |
| 2834 | instrux + 1363,\r |
| 2835 | instrux + 1364,\r |
| 2836 | instrux + 1365,\r |
| 2837 | instrux + 1366,\r |
| 2838 | instrux + 1367,\r |
| 2839 | instrux + 1368,\r |
| 2840 | instrux + 1369,\r |
| 2841 | instrux + 1372,\r |
| 2842 | instrux + 1373,\r |
| 2843 | instrux + 1374,\r |
| 2844 | instrux + 1375,\r |
| 2845 | instrux + 1376,\r |
| 2846 | instrux + 1377,\r |
| 2847 | instrux + 1378,\r |
| 2848 | instrux + 1379,\r |
| 2849 | instrux + 1380,\r |
| 2850 | instrux + 1381,\r |
| 2851 | instrux + 1382,\r |
| 2852 | instrux + 1383,\r |
| 2853 | instrux + 1384,\r |
| 2854 | instrux + 1385,\r |
| 2855 | instrux + 1386,\r |
| 2856 | instrux + 1387,\r |
| 2857 | instrux + 1388,\r |
| 2858 | instrux + 1389,\r |
| 2859 | instrux + 1390,\r |
| 2860 | instrux + 1391,\r |
| 2861 | instrux + 1392,\r |
| 2862 | instrux + 1393,\r |
| 2863 | instrux + 1394,\r |
| 2864 | instrux + 1395,\r |
| 2865 | instrux + 1396,\r |
| 2866 | instrux + 1397,\r |
| 2867 | instrux + 1398,\r |
| 2868 | instrux + 1399,\r |
| 2869 | instrux + 1400,\r |
| 2870 | instrux + 1401,\r |
| 2871 | instrux + 1404,\r |
| 2872 | instrux + 1405,\r |
| 2873 | instrux + 1406,\r |
| 2874 | instrux + 1407,\r |
| 2875 | instrux + 1408,\r |
| 2876 | instrux + 1409,\r |
| 2877 | instrux + 1412,\r |
| 2878 | instrux + 1413,\r |
| 2879 | instrux + 1416,\r |
| 2880 | instrux + 1417,\r |
| 2881 | instrux + 1420,\r |
| 2882 | instrux + 1421,\r |
| 2883 | instrux + 1424,\r |
| 2884 | instrux + 1425,\r |
| 2885 | instrux + 1428,\r |
| 2886 | instrux + 1429,\r |
| 2887 | instrux + 1432,\r |
| 2888 | instrux + 1433,\r |
| 2889 | instrux + 1436,\r |
| 2890 | instrux + 1437,\r |
| 2891 | instrux + 1440,\r |
| 2892 | instrux + 1441,\r |
| 2893 | instrux + 1444,\r |
| 2894 | instrux + 1445,\r |
| 2895 | instrux + 1452,\r |
| 2896 | instrux + 1453,\r |
| 2897 | instrux + 1454,\r |
| 2898 | instrux + 1455,\r |
| 2899 | instrux + 1456,\r |
| 2900 | instrux + 1457,\r |
| 2901 | instrux + 1458,\r |
| 2902 | instrux + 1459,\r |
| 2903 | instrux + 1470,\r |
| 2904 | instrux + 1471,\r |
| 2905 | instrux + 1472,\r |
| 2906 | instrux + 1473,\r |
| 2907 | instrux + 1478,\r |
| 2908 | instrux + 1479,\r |
| 2909 | instrux + 1482,\r |
| 2910 | instrux + 1483,\r |
| 2911 | instrux + 1486,\r |
| 2912 | instrux + 1487,\r |
| 2913 | instrux + 1490,\r |
| 2914 | instrux + 1491,\r |
| 2915 | instrux + 1492,\r |
| 2916 | instrux + 1493,\r |
| 2917 | instrux + 1494,\r |
| 2918 | instrux + 1495,\r |
| 2919 | instrux + 1496,\r |
| 2920 | instrux + 1497,\r |
| 2921 | instrux + 1498,\r |
| 2922 | instrux + 1503,\r |
| 2923 | instrux + 1504,\r |
| 2924 | instrux + 1505,\r |
| 2925 | instrux + 1506,\r |
| 2926 | instrux + 1507,\r |
| 2927 | instrux + 1508,\r |
| 2928 | instrux + 1511,\r |
| 2929 | instrux + 1512,\r |
| 2930 | instrux + 1513,\r |
| 2931 | instrux + 1514,\r |
| 2932 | instrux + 1515,\r |
| 2933 | instrux + 1516,\r |
| 2934 | instrux + 1519,\r |
| 2935 | instrux + 1520,\r |
| 2936 | instrux + 1523,\r |
| 2937 | instrux + 1524,\r |
| 2938 | instrux + 1525,\r |
| 2939 | instrux + 1526,\r |
| 2940 | instrux + 1527,\r |
| 2941 | instrux + 1528,\r |
| 2942 | instrux + 1529,\r |
| 2943 | instrux + 1530,\r |
| 2944 | instrux + 1531,\r |
| 2945 | instrux + 1532,\r |
| 2946 | instrux + 1535,\r |
| 2947 | instrux + 1536,\r |
| 2948 | instrux + 1539,\r |
| 2949 | instrux + 1540,\r |
| 2950 | NULL\r |
| 2951 | };\r |
| 2952 | \r |
| 2953 | static struct itemplate *itable_67[] = {\r |
| 2954 | NULL\r |
| 2955 | };\r |
| 2956 | \r |
| 2957 | static struct itemplate *itable_68[] = {\r |
| 2958 | instrux + 782,\r |
| 2959 | instrux + 783,\r |
| 2960 | instrux + 784,\r |
| 2961 | NULL\r |
| 2962 | };\r |
| 2963 | \r |
| 2964 | static struct itemplate *itable_69[] = {\r |
| 2965 | instrux + 394,\r |
| 2966 | instrux + 396,\r |
| 2967 | instrux + 398,\r |
| 2968 | instrux + 400,\r |
| 2969 | instrux + 402,\r |
| 2970 | instrux + 404,\r |
| 2971 | NULL\r |
| 2972 | };\r |
| 2973 | \r |
| 2974 | static struct itemplate *itable_6A[] = {\r |
| 2975 | instrux + 781,\r |
| 2976 | NULL\r |
| 2977 | };\r |
| 2978 | \r |
| 2979 | static struct itemplate *itable_6B[] = {\r |
| 2980 | instrux + 393,\r |
| 2981 | instrux + 395,\r |
| 2982 | instrux + 397,\r |
| 2983 | instrux + 399,\r |
| 2984 | instrux + 401,\r |
| 2985 | instrux + 403,\r |
| 2986 | NULL\r |
| 2987 | };\r |
| 2988 | \r |
| 2989 | static struct itemplate *itable_6C[] = {\r |
| 2990 | instrux + 416,\r |
| 2991 | NULL\r |
| 2992 | };\r |
| 2993 | \r |
| 2994 | static struct itemplate *itable_6D[] = {\r |
| 2995 | instrux + 417,\r |
| 2996 | instrux + 418,\r |
| 2997 | NULL\r |
| 2998 | };\r |
| 2999 | \r |
| 3000 | static struct itemplate *itable_6E[] = {\r |
| 3001 | instrux + 607,\r |
| 3002 | NULL\r |
| 3003 | };\r |
| 3004 | \r |
| 3005 | static struct itemplate *itable_6F[] = {\r |
| 3006 | instrux + 608,\r |
| 3007 | instrux + 609,\r |
| 3008 | NULL\r |
| 3009 | };\r |
| 3010 | \r |
| 3011 | static struct itemplate *itable_70[] = {\r |
| 3012 | instrux + 1066,\r |
| 3013 | NULL\r |
| 3014 | };\r |
| 3015 | \r |
| 3016 | static struct itemplate *itable_71[] = {\r |
| 3017 | instrux + 1066,\r |
| 3018 | NULL\r |
| 3019 | };\r |
| 3020 | \r |
| 3021 | static struct itemplate *itable_72[] = {\r |
| 3022 | instrux + 1066,\r |
| 3023 | NULL\r |
| 3024 | };\r |
| 3025 | \r |
| 3026 | static struct itemplate *itable_73[] = {\r |
| 3027 | instrux + 1066,\r |
| 3028 | NULL\r |
| 3029 | };\r |
| 3030 | \r |
| 3031 | static struct itemplate *itable_74[] = {\r |
| 3032 | instrux + 1066,\r |
| 3033 | NULL\r |
| 3034 | };\r |
| 3035 | \r |
| 3036 | static struct itemplate *itable_75[] = {\r |
| 3037 | instrux + 1066,\r |
| 3038 | NULL\r |
| 3039 | };\r |
| 3040 | \r |
| 3041 | static struct itemplate *itable_76[] = {\r |
| 3042 | instrux + 1066,\r |
| 3043 | NULL\r |
| 3044 | };\r |
| 3045 | \r |
| 3046 | static struct itemplate *itable_77[] = {\r |
| 3047 | instrux + 1066,\r |
| 3048 | NULL\r |
| 3049 | };\r |
| 3050 | \r |
| 3051 | static struct itemplate *itable_78[] = {\r |
| 3052 | instrux + 1066,\r |
| 3053 | NULL\r |
| 3054 | };\r |
| 3055 | \r |
| 3056 | static struct itemplate *itable_79[] = {\r |
| 3057 | instrux + 1066,\r |
| 3058 | NULL\r |
| 3059 | };\r |
| 3060 | \r |
| 3061 | static struct itemplate *itable_7A[] = {\r |
| 3062 | instrux + 1066,\r |
| 3063 | NULL\r |
| 3064 | };\r |
| 3065 | \r |
| 3066 | static struct itemplate *itable_7B[] = {\r |
| 3067 | instrux + 1066,\r |
| 3068 | NULL\r |
| 3069 | };\r |
| 3070 | \r |
| 3071 | static struct itemplate *itable_7C[] = {\r |
| 3072 | instrux + 1066,\r |
| 3073 | NULL\r |
| 3074 | };\r |
| 3075 | \r |
| 3076 | static struct itemplate *itable_7D[] = {\r |
| 3077 | instrux + 1066,\r |
| 3078 | NULL\r |
| 3079 | };\r |
| 3080 | \r |
| 3081 | static struct itemplate *itable_7E[] = {\r |
| 3082 | instrux + 1066,\r |
| 3083 | NULL\r |
| 3084 | };\r |
| 3085 | \r |
| 3086 | static struct itemplate *itable_7F[] = {\r |
| 3087 | instrux + 1066,\r |
| 3088 | NULL\r |
| 3089 | };\r |
| 3090 | \r |
| 3091 | static struct itemplate *itable_80[] = {\r |
| 3092 | instrux + 23,\r |
| 3093 | instrux + 26,\r |
| 3094 | instrux + 46,\r |
| 3095 | instrux + 49,\r |
| 3096 | instrux + 69,\r |
| 3097 | instrux + 72,\r |
| 3098 | instrux + 158,\r |
| 3099 | instrux + 161,\r |
| 3100 | instrux + 595,\r |
| 3101 | instrux + 598,\r |
| 3102 | instrux + 872,\r |
| 3103 | instrux + 875,\r |
| 3104 | instrux + 954,\r |
| 3105 | instrux + 957,\r |
| 3106 | instrux + 1052,\r |
| 3107 | instrux + 1055,\r |
| 3108 | NULL\r |
| 3109 | };\r |
| 3110 | \r |
| 3111 | static struct itemplate *itable_81[] = {\r |
| 3112 | instrux + 24,\r |
| 3113 | instrux + 25,\r |
| 3114 | instrux + 27,\r |
| 3115 | instrux + 28,\r |
| 3116 | instrux + 47,\r |
| 3117 | instrux + 48,\r |
| 3118 | instrux + 50,\r |
| 3119 | instrux + 51,\r |
| 3120 | instrux + 70,\r |
| 3121 | instrux + 71,\r |
| 3122 | instrux + 73,\r |
| 3123 | instrux + 74,\r |
| 3124 | instrux + 159,\r |
| 3125 | instrux + 160,\r |
| 3126 | instrux + 162,\r |
| 3127 | instrux + 163,\r |
| 3128 | instrux + 596,\r |
| 3129 | instrux + 597,\r |
| 3130 | instrux + 599,\r |
| 3131 | instrux + 600,\r |
| 3132 | instrux + 873,\r |
| 3133 | instrux + 874,\r |
| 3134 | instrux + 876,\r |
| 3135 | instrux + 877,\r |
| 3136 | instrux + 955,\r |
| 3137 | instrux + 956,\r |
| 3138 | instrux + 958,\r |
| 3139 | instrux + 959,\r |
| 3140 | instrux + 1053,\r |
| 3141 | instrux + 1054,\r |
| 3142 | instrux + 1056,\r |
| 3143 | instrux + 1057,\r |
| 3144 | NULL\r |
| 3145 | };\r |
| 3146 | \r |
| 3147 | static struct itemplate *itable_82[] = {\r |
| 3148 | NULL\r |
| 3149 | };\r |
| 3150 | \r |
| 3151 | static struct itemplate *itable_83[] = {\r |
| 3152 | instrux + 18,\r |
| 3153 | instrux + 19,\r |
| 3154 | instrux + 41,\r |
| 3155 | instrux + 42,\r |
| 3156 | instrux + 64,\r |
| 3157 | instrux + 65,\r |
| 3158 | instrux + 153,\r |
| 3159 | instrux + 154,\r |
| 3160 | instrux + 590,\r |
| 3161 | instrux + 591,\r |
| 3162 | instrux + 867,\r |
| 3163 | instrux + 868,\r |
| 3164 | instrux + 949,\r |
| 3165 | instrux + 950,\r |
| 3166 | instrux + 1047,\r |
| 3167 | instrux + 1048,\r |
| 3168 | NULL\r |
| 3169 | };\r |
| 3170 | \r |
| 3171 | static struct itemplate *itable_84[] = {\r |
| 3172 | instrux + 967,\r |
| 3173 | instrux + 968,\r |
| 3174 | instrux + 973,\r |
| 3175 | NULL\r |
| 3176 | };\r |
| 3177 | \r |
| 3178 | static struct itemplate *itable_85[] = {\r |
| 3179 | instrux + 969,\r |
| 3180 | instrux + 970,\r |
| 3181 | instrux + 971,\r |
| 3182 | instrux + 972,\r |
| 3183 | instrux + 974,\r |
| 3184 | instrux + 975,\r |
| 3185 | NULL\r |
| 3186 | };\r |
| 3187 | \r |
| 3188 | static struct itemplate *itable_86[] = {\r |
| 3189 | instrux + 1021,\r |
| 3190 | instrux + 1022,\r |
| 3191 | instrux + 1027,\r |
| 3192 | instrux + 1028,\r |
| 3193 | NULL\r |
| 3194 | };\r |
| 3195 | \r |
| 3196 | static struct itemplate *itable_87[] = {\r |
| 3197 | instrux + 1023,\r |
| 3198 | instrux + 1024,\r |
| 3199 | instrux + 1025,\r |
| 3200 | instrux + 1026,\r |
| 3201 | instrux + 1029,\r |
| 3202 | instrux + 1030,\r |
| 3203 | instrux + 1031,\r |
| 3204 | instrux + 1032,\r |
| 3205 | NULL\r |
| 3206 | };\r |
| 3207 | \r |
| 3208 | static struct itemplate *itable_88[] = {\r |
| 3209 | instrux + 527,\r |
| 3210 | instrux + 528,\r |
| 3211 | NULL\r |
| 3212 | };\r |
| 3213 | \r |
| 3214 | static struct itemplate *itable_89[] = {\r |
| 3215 | instrux + 529,\r |
| 3216 | instrux + 530,\r |
| 3217 | instrux + 531,\r |
| 3218 | instrux + 532,\r |
| 3219 | NULL\r |
| 3220 | };\r |
| 3221 | \r |
| 3222 | static struct itemplate *itable_8A[] = {\r |
| 3223 | instrux + 533,\r |
| 3224 | instrux + 534,\r |
| 3225 | NULL\r |
| 3226 | };\r |
| 3227 | \r |
| 3228 | static struct itemplate *itable_8B[] = {\r |
| 3229 | instrux + 535,\r |
| 3230 | instrux + 536,\r |
| 3231 | instrux + 537,\r |
| 3232 | instrux + 538,\r |
| 3233 | NULL\r |
| 3234 | };\r |
| 3235 | \r |
| 3236 | static struct itemplate *itable_8C[] = {\r |
| 3237 | instrux + 509,\r |
| 3238 | instrux + 510,\r |
| 3239 | instrux + 511,\r |
| 3240 | NULL\r |
| 3241 | };\r |
| 3242 | \r |
| 3243 | static struct itemplate *itable_8D[] = {\r |
| 3244 | instrux + 462,\r |
| 3245 | instrux + 463,\r |
| 3246 | NULL\r |
| 3247 | };\r |
| 3248 | \r |
| 3249 | static struct itemplate *itable_8E[] = {\r |
| 3250 | instrux + 512,\r |
| 3251 | instrux + 513,\r |
| 3252 | instrux + 514,\r |
| 3253 | NULL\r |
| 3254 | };\r |
| 3255 | \r |
| 3256 | static struct itemplate *itable_8F[] = {\r |
| 3257 | instrux + 708,\r |
| 3258 | instrux + 709,\r |
| 3259 | NULL\r |
| 3260 | };\r |
| 3261 | \r |
| 3262 | static struct itemplate *itable_90[] = {\r |
| 3263 | instrux + 574,\r |
| 3264 | instrux + 1017,\r |
| 3265 | instrux + 1018,\r |
| 3266 | instrux + 1019,\r |
| 3267 | instrux + 1020,\r |
| 3268 | instrux + 1239,\r |
| 3269 | NULL\r |
| 3270 | };\r |
| 3271 | \r |
| 3272 | static struct itemplate *itable_91[] = {\r |
| 3273 | instrux + 1017,\r |
| 3274 | instrux + 1018,\r |
| 3275 | instrux + 1019,\r |
| 3276 | instrux + 1020,\r |
| 3277 | NULL\r |
| 3278 | };\r |
| 3279 | \r |
| 3280 | static struct itemplate *itable_92[] = {\r |
| 3281 | instrux + 1017,\r |
| 3282 | instrux + 1018,\r |
| 3283 | instrux + 1019,\r |
| 3284 | instrux + 1020,\r |
| 3285 | NULL\r |
| 3286 | };\r |
| 3287 | \r |
| 3288 | static struct itemplate *itable_93[] = {\r |
| 3289 | instrux + 1017,\r |
| 3290 | instrux + 1018,\r |
| 3291 | instrux + 1019,\r |
| 3292 | instrux + 1020,\r |
| 3293 | NULL\r |
| 3294 | };\r |
| 3295 | \r |
| 3296 | static struct itemplate *itable_94[] = {\r |
| 3297 | instrux + 1017,\r |
| 3298 | instrux + 1018,\r |
| 3299 | instrux + 1019,\r |
| 3300 | instrux + 1020,\r |
| 3301 | NULL\r |
| 3302 | };\r |
| 3303 | \r |
| 3304 | static struct itemplate *itable_95[] = {\r |
| 3305 | instrux + 1017,\r |
| 3306 | instrux + 1018,\r |
| 3307 | instrux + 1019,\r |
| 3308 | instrux + 1020,\r |
| 3309 | NULL\r |
| 3310 | };\r |
| 3311 | \r |
| 3312 | static struct itemplate *itable_96[] = {\r |
| 3313 | instrux + 1017,\r |
| 3314 | instrux + 1018,\r |
| 3315 | instrux + 1019,\r |
| 3316 | instrux + 1020,\r |
| 3317 | NULL\r |
| 3318 | };\r |
| 3319 | \r |
| 3320 | static struct itemplate *itable_97[] = {\r |
| 3321 | instrux + 1017,\r |
| 3322 | instrux + 1018,\r |
| 3323 | instrux + 1019,\r |
| 3324 | instrux + 1020,\r |
| 3325 | NULL\r |
| 3326 | };\r |
| 3327 | \r |
| 3328 | static struct itemplate *itable_98[] = {\r |
| 3329 | instrux + 134,\r |
| 3330 | instrux + 182,\r |
| 3331 | NULL\r |
| 3332 | };\r |
| 3333 | \r |
| 3334 | static struct itemplate *itable_99[] = {\r |
| 3335 | instrux + 135,\r |
| 3336 | instrux + 181,\r |
| 3337 | NULL\r |
| 3338 | };\r |
| 3339 | \r |
| 3340 | static struct itemplate *itable_9A[] = {\r |
| 3341 | instrux + 118,\r |
| 3342 | instrux + 119,\r |
| 3343 | instrux + 120,\r |
| 3344 | instrux + 121,\r |
| 3345 | instrux + 122,\r |
| 3346 | NULL\r |
| 3347 | };\r |
| 3348 | \r |
| 3349 | static struct itemplate *itable_9B[] = {\r |
| 3350 | instrux + 212,\r |
| 3351 | instrux + 244,\r |
| 3352 | instrux + 262,\r |
| 3353 | instrux + 281,\r |
| 3354 | instrux + 331,\r |
| 3355 | instrux + 340,\r |
| 3356 | instrux + 341,\r |
| 3357 | instrux + 346,\r |
| 3358 | instrux + 347,\r |
| 3359 | instrux + 1006,\r |
| 3360 | instrux + 1007,\r |
| 3361 | NULL\r |
| 3362 | };\r |
| 3363 | \r |
| 3364 | static struct itemplate *itable_9C[] = {\r |
| 3365 | instrux + 788,\r |
| 3366 | instrux + 789,\r |
| 3367 | instrux + 790,\r |
| 3368 | NULL\r |
| 3369 | };\r |
| 3370 | \r |
| 3371 | static struct itemplate *itable_9D[] = {\r |
| 3372 | instrux + 715,\r |
| 3373 | instrux + 716,\r |
| 3374 | instrux + 717,\r |
| 3375 | NULL\r |
| 3376 | };\r |
| 3377 | \r |
| 3378 | static struct itemplate *itable_9E[] = {\r |
| 3379 | instrux + 844,\r |
| 3380 | NULL\r |
| 3381 | };\r |
| 3382 | \r |
| 3383 | static struct itemplate *itable_9F[] = {\r |
| 3384 | instrux + 455,\r |
| 3385 | NULL\r |
| 3386 | };\r |
| 3387 | \r |
| 3388 | static struct itemplate *itable_A0[] = {\r |
| 3389 | instrux + 515,\r |
| 3390 | NULL\r |
| 3391 | };\r |
| 3392 | \r |
| 3393 | static struct itemplate *itable_A1[] = {\r |
| 3394 | instrux + 516,\r |
| 3395 | instrux + 517,\r |
| 3396 | NULL\r |
| 3397 | };\r |
| 3398 | \r |
| 3399 | static struct itemplate *itable_A2[] = {\r |
| 3400 | instrux + 518,\r |
| 3401 | NULL\r |
| 3402 | };\r |
| 3403 | \r |
| 3404 | static struct itemplate *itable_A3[] = {\r |
| 3405 | instrux + 519,\r |
| 3406 | instrux + 520,\r |
| 3407 | NULL\r |
| 3408 | };\r |
| 3409 | \r |
| 3410 | static struct itemplate *itable_A4[] = {\r |
| 3411 | instrux + 556,\r |
| 3412 | NULL\r |
| 3413 | };\r |
| 3414 | \r |
| 3415 | static struct itemplate *itable_A5[] = {\r |
| 3416 | instrux + 557,\r |
| 3417 | instrux + 558,\r |
| 3418 | NULL\r |
| 3419 | };\r |
| 3420 | \r |
| 3421 | static struct itemplate *itable_A6[] = {\r |
| 3422 | instrux + 164,\r |
| 3423 | NULL\r |
| 3424 | };\r |
| 3425 | \r |
| 3426 | static struct itemplate *itable_A7[] = {\r |
| 3427 | instrux + 165,\r |
| 3428 | instrux + 166,\r |
| 3429 | NULL\r |
| 3430 | };\r |
| 3431 | \r |
| 3432 | static struct itemplate *itable_A8[] = {\r |
| 3433 | instrux + 976,\r |
| 3434 | NULL\r |
| 3435 | };\r |
| 3436 | \r |
| 3437 | static struct itemplate *itable_A9[] = {\r |
| 3438 | instrux + 977,\r |
| 3439 | instrux + 978,\r |
| 3440 | NULL\r |
| 3441 | };\r |
| 3442 | \r |
| 3443 | static struct itemplate *itable_AA[] = {\r |
| 3444 | instrux + 930,\r |
| 3445 | NULL\r |
| 3446 | };\r |
| 3447 | \r |
| 3448 | static struct itemplate *itable_AB[] = {\r |
| 3449 | instrux + 931,\r |
| 3450 | instrux + 932,\r |
| 3451 | NULL\r |
| 3452 | };\r |
| 3453 | \r |
| 3454 | static struct itemplate *itable_AC[] = {\r |
| 3455 | instrux + 481,\r |
| 3456 | NULL\r |
| 3457 | };\r |
| 3458 | \r |
| 3459 | static struct itemplate *itable_AD[] = {\r |
| 3460 | instrux + 482,\r |
| 3461 | instrux + 483,\r |
| 3462 | NULL\r |
| 3463 | };\r |
| 3464 | \r |
| 3465 | static struct itemplate *itable_AE[] = {\r |
| 3466 | instrux + 878,\r |
| 3467 | NULL\r |
| 3468 | };\r |
| 3469 | \r |
| 3470 | static struct itemplate *itable_AF[] = {\r |
| 3471 | instrux + 879,\r |
| 3472 | instrux + 880,\r |
| 3473 | NULL\r |
| 3474 | };\r |
| 3475 | \r |
| 3476 | static struct itemplate *itable_B0[] = {\r |
| 3477 | instrux + 539,\r |
| 3478 | NULL\r |
| 3479 | };\r |
| 3480 | \r |
| 3481 | static struct itemplate *itable_B1[] = {\r |
| 3482 | instrux + 539,\r |
| 3483 | NULL\r |
| 3484 | };\r |
| 3485 | \r |
| 3486 | static struct itemplate *itable_B2[] = {\r |
| 3487 | instrux + 539,\r |
| 3488 | NULL\r |
| 3489 | };\r |
| 3490 | \r |
| 3491 | static struct itemplate *itable_B3[] = {\r |
| 3492 | instrux + 539,\r |
| 3493 | NULL\r |
| 3494 | };\r |
| 3495 | \r |
| 3496 | static struct itemplate *itable_B4[] = {\r |
| 3497 | instrux + 539,\r |
| 3498 | NULL\r |
| 3499 | };\r |
| 3500 | \r |
| 3501 | static struct itemplate *itable_B5[] = {\r |
| 3502 | instrux + 539,\r |
| 3503 | NULL\r |
| 3504 | };\r |
| 3505 | \r |
| 3506 | static struct itemplate *itable_B6[] = {\r |
| 3507 | instrux + 539,\r |
| 3508 | NULL\r |
| 3509 | };\r |
| 3510 | \r |
| 3511 | static struct itemplate *itable_B7[] = {\r |
| 3512 | instrux + 539,\r |
| 3513 | NULL\r |
| 3514 | };\r |
| 3515 | \r |
| 3516 | static struct itemplate *itable_B8[] = {\r |
| 3517 | instrux + 540,\r |
| 3518 | instrux + 541,\r |
| 3519 | NULL\r |
| 3520 | };\r |
| 3521 | \r |
| 3522 | static struct itemplate *itable_B9[] = {\r |
| 3523 | instrux + 540,\r |
| 3524 | instrux + 541,\r |
| 3525 | NULL\r |
| 3526 | };\r |
| 3527 | \r |
| 3528 | static struct itemplate *itable_BA[] = {\r |
| 3529 | instrux + 540,\r |
| 3530 | instrux + 541,\r |
| 3531 | NULL\r |
| 3532 | };\r |
| 3533 | \r |
| 3534 | static struct itemplate *itable_BB[] = {\r |
| 3535 | instrux + 540,\r |
| 3536 | instrux + 541,\r |
| 3537 | NULL\r |
| 3538 | };\r |
| 3539 | \r |
| 3540 | static struct itemplate *itable_BC[] = {\r |
| 3541 | instrux + 540,\r |
| 3542 | instrux + 541,\r |
| 3543 | NULL\r |
| 3544 | };\r |
| 3545 | \r |
| 3546 | static struct itemplate *itable_BD[] = {\r |
| 3547 | instrux + 540,\r |
| 3548 | instrux + 541,\r |
| 3549 | NULL\r |
| 3550 | };\r |
| 3551 | \r |
| 3552 | static struct itemplate *itable_BE[] = {\r |
| 3553 | instrux + 540,\r |
| 3554 | instrux + 541,\r |
| 3555 | NULL\r |
| 3556 | };\r |
| 3557 | \r |
| 3558 | static struct itemplate *itable_BF[] = {\r |
| 3559 | instrux + 540,\r |
| 3560 | instrux + 541,\r |
| 3561 | NULL\r |
| 3562 | };\r |
| 3563 | \r |
| 3564 | static struct itemplate *itable_C0[] = {\r |
| 3565 | instrux + 795,\r |
| 3566 | instrux + 804,\r |
| 3567 | instrux + 824,\r |
| 3568 | instrux + 833,\r |
| 3569 | instrux + 848,\r |
| 3570 | instrux + 884,\r |
| 3571 | instrux + 901,\r |
| 3572 | NULL\r |
| 3573 | };\r |
| 3574 | \r |
| 3575 | static struct itemplate *itable_C1[] = {\r |
| 3576 | instrux + 798,\r |
| 3577 | instrux + 801,\r |
| 3578 | instrux + 807,\r |
| 3579 | instrux + 810,\r |
| 3580 | instrux + 827,\r |
| 3581 | instrux + 830,\r |
| 3582 | instrux + 836,\r |
| 3583 | instrux + 839,\r |
| 3584 | instrux + 851,\r |
| 3585 | instrux + 854,\r |
| 3586 | instrux + 887,\r |
| 3587 | instrux + 890,\r |
| 3588 | instrux + 904,\r |
| 3589 | instrux + 907,\r |
| 3590 | NULL\r |
| 3591 | };\r |
| 3592 | \r |
| 3593 | static struct itemplate *itable_C2[] = {\r |
| 3594 | instrux + 817,\r |
| 3595 | instrux + 821,\r |
| 3596 | NULL\r |
| 3597 | };\r |
| 3598 | \r |
| 3599 | static struct itemplate *itable_C3[] = {\r |
| 3600 | instrux + 816,\r |
| 3601 | instrux + 820,\r |
| 3602 | NULL\r |
| 3603 | };\r |
| 3604 | \r |
| 3605 | static struct itemplate *itable_C4[] = {\r |
| 3606 | instrux + 465,\r |
| 3607 | instrux + 466,\r |
| 3608 | NULL\r |
| 3609 | };\r |
| 3610 | \r |
| 3611 | static struct itemplate *itable_C5[] = {\r |
| 3612 | instrux + 460,\r |
| 3613 | instrux + 461,\r |
| 3614 | NULL\r |
| 3615 | };\r |
| 3616 | \r |
| 3617 | static struct itemplate *itable_C6[] = {\r |
| 3618 | instrux + 542,\r |
| 3619 | instrux + 545,\r |
| 3620 | NULL\r |
| 3621 | };\r |
| 3622 | \r |
| 3623 | static struct itemplate *itable_C7[] = {\r |
| 3624 | instrux + 543,\r |
| 3625 | instrux + 544,\r |
| 3626 | instrux + 546,\r |
| 3627 | instrux + 547,\r |
| 3628 | NULL\r |
| 3629 | };\r |
| 3630 | \r |
| 3631 | static struct itemplate *itable_C8[] = {\r |
| 3632 | instrux + 194,\r |
| 3633 | NULL\r |
| 3634 | };\r |
| 3635 | \r |
| 3636 | static struct itemplate *itable_C9[] = {\r |
| 3637 | instrux + 464,\r |
| 3638 | NULL\r |
| 3639 | };\r |
| 3640 | \r |
| 3641 | static struct itemplate *itable_CA[] = {\r |
| 3642 | instrux + 819,\r |
| 3643 | NULL\r |
| 3644 | };\r |
| 3645 | \r |
| 3646 | static struct itemplate *itable_CB[] = {\r |
| 3647 | instrux + 818,\r |
| 3648 | NULL\r |
| 3649 | };\r |
| 3650 | \r |
| 3651 | static struct itemplate *itable_CC[] = {\r |
| 3652 | instrux + 421,\r |
| 3653 | NULL\r |
| 3654 | };\r |
| 3655 | \r |
| 3656 | static struct itemplate *itable_CD[] = {\r |
| 3657 | instrux + 419,\r |
| 3658 | NULL\r |
| 3659 | };\r |
| 3660 | \r |
| 3661 | static struct itemplate *itable_CE[] = {\r |
| 3662 | instrux + 422,\r |
| 3663 | NULL\r |
| 3664 | };\r |
| 3665 | \r |
| 3666 | static struct itemplate *itable_CF[] = {\r |
| 3667 | instrux + 425,\r |
| 3668 | instrux + 426,\r |
| 3669 | instrux + 427,\r |
| 3670 | NULL\r |
| 3671 | };\r |
| 3672 | \r |
| 3673 | static struct itemplate *itable_D0[] = {\r |
| 3674 | instrux + 793,\r |
| 3675 | instrux + 802,\r |
| 3676 | instrux + 822,\r |
| 3677 | instrux + 831,\r |
| 3678 | instrux + 846,\r |
| 3679 | instrux + 882,\r |
| 3680 | instrux + 899,\r |
| 3681 | NULL\r |
| 3682 | };\r |
| 3683 | \r |
| 3684 | static struct itemplate *itable_D1[] = {\r |
| 3685 | instrux + 796,\r |
| 3686 | instrux + 799,\r |
| 3687 | instrux + 805,\r |
| 3688 | instrux + 808,\r |
| 3689 | instrux + 825,\r |
| 3690 | instrux + 828,\r |
| 3691 | instrux + 834,\r |
| 3692 | instrux + 837,\r |
| 3693 | instrux + 849,\r |
| 3694 | instrux + 852,\r |
| 3695 | instrux + 885,\r |
| 3696 | instrux + 888,\r |
| 3697 | instrux + 902,\r |
| 3698 | instrux + 905,\r |
| 3699 | NULL\r |
| 3700 | };\r |
| 3701 | \r |
| 3702 | static struct itemplate *itable_D2[] = {\r |
| 3703 | instrux + 794,\r |
| 3704 | instrux + 803,\r |
| 3705 | instrux + 823,\r |
| 3706 | instrux + 832,\r |
| 3707 | instrux + 847,\r |
| 3708 | instrux + 883,\r |
| 3709 | instrux + 900,\r |
| 3710 | NULL\r |
| 3711 | };\r |
| 3712 | \r |
| 3713 | static struct itemplate *itable_D3[] = {\r |
| 3714 | instrux + 797,\r |
| 3715 | instrux + 800,\r |
| 3716 | instrux + 806,\r |
| 3717 | instrux + 809,\r |
| 3718 | instrux + 826,\r |
| 3719 | instrux + 829,\r |
| 3720 | instrux + 835,\r |
| 3721 | instrux + 838,\r |
| 3722 | instrux + 850,\r |
| 3723 | instrux + 853,\r |
| 3724 | instrux + 886,\r |
| 3725 | instrux + 889,\r |
| 3726 | instrux + 903,\r |
| 3727 | instrux + 906,\r |
| 3728 | NULL\r |
| 3729 | };\r |
| 3730 | \r |
| 3731 | static struct itemplate *itable_D4[] = {\r |
| 3732 | instrux + 3,\r |
| 3733 | instrux + 4,\r |
| 3734 | NULL\r |
| 3735 | };\r |
| 3736 | \r |
| 3737 | static struct itemplate *itable_D5[] = {\r |
| 3738 | instrux + 1,\r |
| 3739 | instrux + 2,\r |
| 3740 | NULL\r |
| 3741 | };\r |
| 3742 | \r |
| 3743 | static struct itemplate *itable_D6[] = {\r |
| 3744 | instrux + 845,\r |
| 3745 | NULL\r |
| 3746 | };\r |
| 3747 | \r |
| 3748 | static struct itemplate *itable_D7[] = {\r |
| 3749 | instrux + 1033,\r |
| 3750 | instrux + 1034,\r |
| 3751 | NULL\r |
| 3752 | };\r |
| 3753 | \r |
| 3754 | static struct itemplate *itable_D8[] = {\r |
| 3755 | instrux + 199,\r |
| 3756 | instrux + 202,\r |
| 3757 | instrux + 204,\r |
| 3758 | instrux + 229,\r |
| 3759 | instrux + 231,\r |
| 3760 | instrux + 232,\r |
| 3761 | instrux + 237,\r |
| 3762 | instrux + 239,\r |
| 3763 | instrux + 240,\r |
| 3764 | instrux + 245,\r |
| 3765 | instrux + 249,\r |
| 3766 | instrux + 250,\r |
| 3767 | instrux + 253,\r |
| 3768 | instrux + 257,\r |
| 3769 | instrux + 258,\r |
| 3770 | instrux + 307,\r |
| 3771 | instrux + 311,\r |
| 3772 | instrux + 312,\r |
| 3773 | instrux + 348,\r |
| 3774 | instrux + 352,\r |
| 3775 | instrux + 353,\r |
| 3776 | instrux + 356,\r |
| 3777 | instrux + 360,\r |
| 3778 | instrux + 361,\r |
| 3779 | NULL\r |
| 3780 | };\r |
| 3781 | \r |
| 3782 | static struct itemplate *itable_D9[] = {\r |
| 3783 | instrux + 197,\r |
| 3784 | instrux + 198,\r |
| 3785 | instrux + 211,\r |
| 3786 | instrux + 242,\r |
| 3787 | instrux + 243,\r |
| 3788 | instrux + 280,\r |
| 3789 | instrux + 294,\r |
| 3790 | instrux + 297,\r |
| 3791 | instrux + 298,\r |
| 3792 | instrux + 299,\r |
| 3793 | instrux + 300,\r |
| 3794 | instrux + 301,\r |
| 3795 | instrux + 302,\r |
| 3796 | instrux + 303,\r |
| 3797 | instrux + 304,\r |
| 3798 | instrux + 305,\r |
| 3799 | instrux + 306,\r |
| 3800 | instrux + 319,\r |
| 3801 | instrux + 321,\r |
| 3802 | instrux + 322,\r |
| 3803 | instrux + 325,\r |
| 3804 | instrux + 326,\r |
| 3805 | instrux + 327,\r |
| 3806 | instrux + 328,\r |
| 3807 | instrux + 329,\r |
| 3808 | instrux + 332,\r |
| 3809 | instrux + 334,\r |
| 3810 | instrux + 335,\r |
| 3811 | instrux + 336,\r |
| 3812 | instrux + 337,\r |
| 3813 | instrux + 342,\r |
| 3814 | instrux + 364,\r |
| 3815 | instrux + 374,\r |
| 3816 | instrux + 375,\r |
| 3817 | instrux + 376,\r |
| 3818 | instrux + 377,\r |
| 3819 | instrux + 378,\r |
| 3820 | instrux + 379,\r |
| 3821 | instrux + 380,\r |
| 3822 | instrux + 381,\r |
| 3823 | NULL\r |
| 3824 | };\r |
| 3825 | \r |
| 3826 | static struct itemplate *itable_DA[] = {\r |
| 3827 | instrux + 213,\r |
| 3828 | instrux + 214,\r |
| 3829 | instrux + 215,\r |
| 3830 | instrux + 216,\r |
| 3831 | instrux + 217,\r |
| 3832 | instrux + 218,\r |
| 3833 | instrux + 227,\r |
| 3834 | instrux + 228,\r |
| 3835 | instrux + 265,\r |
| 3836 | instrux + 267,\r |
| 3837 | instrux + 269,\r |
| 3838 | instrux + 271,\r |
| 3839 | instrux + 273,\r |
| 3840 | instrux + 278,\r |
| 3841 | instrux + 290,\r |
| 3842 | instrux + 292,\r |
| 3843 | instrux + 373,\r |
| 3844 | NULL\r |
| 3845 | };\r |
| 3846 | \r |
| 3847 | static struct itemplate *itable_DB[] = {\r |
| 3848 | instrux + 219,\r |
| 3849 | instrux + 220,\r |
| 3850 | instrux + 221,\r |
| 3851 | instrux + 222,\r |
| 3852 | instrux + 223,\r |
| 3853 | instrux + 224,\r |
| 3854 | instrux + 225,\r |
| 3855 | instrux + 226,\r |
| 3856 | instrux + 233,\r |
| 3857 | instrux + 234,\r |
| 3858 | instrux + 275,\r |
| 3859 | instrux + 282,\r |
| 3860 | instrux + 284,\r |
| 3861 | instrux + 288,\r |
| 3862 | instrux + 296,\r |
| 3863 | instrux + 315,\r |
| 3864 | instrux + 316,\r |
| 3865 | instrux + 317,\r |
| 3866 | instrux + 318,\r |
| 3867 | instrux + 333,\r |
| 3868 | instrux + 344,\r |
| 3869 | instrux + 367,\r |
| 3870 | instrux + 368,\r |
| 3871 | NULL\r |
| 3872 | };\r |
| 3873 | \r |
| 3874 | static struct itemplate *itable_DC[] = {\r |
| 3875 | instrux + 200,\r |
| 3876 | instrux + 201,\r |
| 3877 | instrux + 203,\r |
| 3878 | instrux + 230,\r |
| 3879 | instrux + 238,\r |
| 3880 | instrux + 246,\r |
| 3881 | instrux + 247,\r |
| 3882 | instrux + 248,\r |
| 3883 | instrux + 254,\r |
| 3884 | instrux + 255,\r |
| 3885 | instrux + 256,\r |
| 3886 | instrux + 308,\r |
| 3887 | instrux + 309,\r |
| 3888 | instrux + 310,\r |
| 3889 | instrux + 349,\r |
| 3890 | instrux + 350,\r |
| 3891 | instrux + 351,\r |
| 3892 | instrux + 357,\r |
| 3893 | instrux + 358,\r |
| 3894 | instrux + 359,\r |
| 3895 | NULL\r |
| 3896 | };\r |
| 3897 | \r |
| 3898 | static struct itemplate *itable_DD[] = {\r |
| 3899 | instrux + 263,\r |
| 3900 | instrux + 287,\r |
| 3901 | instrux + 295,\r |
| 3902 | instrux + 320,\r |
| 3903 | instrux + 323,\r |
| 3904 | instrux + 330,\r |
| 3905 | instrux + 338,\r |
| 3906 | instrux + 339,\r |
| 3907 | instrux + 343,\r |
| 3908 | instrux + 345,\r |
| 3909 | instrux + 365,\r |
| 3910 | instrux + 366,\r |
| 3911 | instrux + 371,\r |
| 3912 | instrux + 372,\r |
| 3913 | NULL\r |
| 3914 | };\r |
| 3915 | \r |
| 3916 | static struct itemplate *itable_DE[] = {\r |
| 3917 | instrux + 205,\r |
| 3918 | instrux + 206,\r |
| 3919 | instrux + 241,\r |
| 3920 | instrux + 251,\r |
| 3921 | instrux + 252,\r |
| 3922 | instrux + 259,\r |
| 3923 | instrux + 260,\r |
| 3924 | instrux + 266,\r |
| 3925 | instrux + 268,\r |
| 3926 | instrux + 270,\r |
| 3927 | instrux + 272,\r |
| 3928 | instrux + 274,\r |
| 3929 | instrux + 279,\r |
| 3930 | instrux + 291,\r |
| 3931 | instrux + 293,\r |
| 3932 | instrux + 313,\r |
| 3933 | instrux + 314,\r |
| 3934 | instrux + 354,\r |
| 3935 | instrux + 355,\r |
| 3936 | instrux + 362,\r |
| 3937 | instrux + 363,\r |
| 3938 | NULL\r |
| 3939 | };\r |
| 3940 | \r |
| 3941 | static struct itemplate *itable_DF[] = {\r |
| 3942 | instrux + 207,\r |
| 3943 | instrux + 208,\r |
| 3944 | instrux + 209,\r |
| 3945 | instrux + 210,\r |
| 3946 | instrux + 235,\r |
| 3947 | instrux + 236,\r |
| 3948 | instrux + 264,\r |
| 3949 | instrux + 276,\r |
| 3950 | instrux + 277,\r |
| 3951 | instrux + 283,\r |
| 3952 | instrux + 285,\r |
| 3953 | instrux + 286,\r |
| 3954 | instrux + 289,\r |
| 3955 | instrux + 324,\r |
| 3956 | instrux + 369,\r |
| 3957 | instrux + 370,\r |
| 3958 | NULL\r |
| 3959 | };\r |
| 3960 | \r |
| 3961 | static struct itemplate *itable_E0[] = {\r |
| 3962 | instrux + 490,\r |
| 3963 | instrux + 491,\r |
| 3964 | instrux + 492,\r |
| 3965 | instrux + 493,\r |
| 3966 | instrux + 494,\r |
| 3967 | instrux + 495,\r |
| 3968 | NULL\r |
| 3969 | };\r |
| 3970 | \r |
| 3971 | static struct itemplate *itable_E1[] = {\r |
| 3972 | instrux + 487,\r |
| 3973 | instrux + 488,\r |
| 3974 | instrux + 489,\r |
| 3975 | instrux + 496,\r |
| 3976 | instrux + 497,\r |
| 3977 | instrux + 498,\r |
| 3978 | NULL\r |
| 3979 | };\r |
| 3980 | \r |
| 3981 | static struct itemplate *itable_E2[] = {\r |
| 3982 | instrux + 484,\r |
| 3983 | instrux + 485,\r |
| 3984 | instrux + 486,\r |
| 3985 | NULL\r |
| 3986 | };\r |
| 3987 | \r |
| 3988 | static struct itemplate *itable_E3[] = {\r |
| 3989 | instrux + 428,\r |
| 3990 | instrux + 429,\r |
| 3991 | NULL\r |
| 3992 | };\r |
| 3993 | \r |
| 3994 | static struct itemplate *itable_E4[] = {\r |
| 3995 | instrux + 405,\r |
| 3996 | NULL\r |
| 3997 | };\r |
| 3998 | \r |
| 3999 | static struct itemplate *itable_E5[] = {\r |
| 4000 | instrux + 406,\r |
| 4001 | instrux + 407,\r |
| 4002 | NULL\r |
| 4003 | };\r |
| 4004 | \r |
| 4005 | static struct itemplate *itable_E6[] = {\r |
| 4006 | instrux + 601,\r |
| 4007 | NULL\r |
| 4008 | };\r |
| 4009 | \r |
| 4010 | static struct itemplate *itable_E7[] = {\r |
| 4011 | instrux + 602,\r |
| 4012 | instrux + 603,\r |
| 4013 | NULL\r |
| 4014 | };\r |
| 4015 | \r |
| 4016 | static struct itemplate *itable_E8[] = {\r |
| 4017 | instrux + 112,\r |
| 4018 | instrux + 113,\r |
| 4019 | instrux + 114,\r |
| 4020 | instrux + 115,\r |
| 4021 | instrux + 116,\r |
| 4022 | instrux + 117,\r |
| 4023 | NULL\r |
| 4024 | };\r |
| 4025 | \r |
| 4026 | static struct itemplate *itable_E9[] = {\r |
| 4027 | instrux + 431,\r |
| 4028 | instrux + 432,\r |
| 4029 | instrux + 433,\r |
| 4030 | NULL\r |
| 4031 | };\r |
| 4032 | \r |
| 4033 | static struct itemplate *itable_EA[] = {\r |
| 4034 | instrux + 434,\r |
| 4035 | instrux + 435,\r |
| 4036 | instrux + 436,\r |
| 4037 | instrux + 437,\r |
| 4038 | instrux + 438,\r |
| 4039 | NULL\r |
| 4040 | };\r |
| 4041 | \r |
| 4042 | static struct itemplate *itable_EB[] = {\r |
| 4043 | instrux + 430,\r |
| 4044 | NULL\r |
| 4045 | };\r |
| 4046 | \r |
| 4047 | static struct itemplate *itable_EC[] = {\r |
| 4048 | instrux + 408,\r |
| 4049 | NULL\r |
| 4050 | };\r |
| 4051 | \r |
| 4052 | static struct itemplate *itable_ED[] = {\r |
| 4053 | instrux + 409,\r |
| 4054 | instrux + 410,\r |
| 4055 | NULL\r |
| 4056 | };\r |
| 4057 | \r |
| 4058 | static struct itemplate *itable_EE[] = {\r |
| 4059 | instrux + 604,\r |
| 4060 | NULL\r |
| 4061 | };\r |
| 4062 | \r |
| 4063 | static struct itemplate *itable_EF[] = {\r |
| 4064 | instrux + 605,\r |
| 4065 | instrux + 606,\r |
| 4066 | NULL\r |
| 4067 | };\r |
| 4068 | \r |
| 4069 | static struct itemplate *itable_F0[] = {\r |
| 4070 | NULL\r |
| 4071 | };\r |
| 4072 | \r |
| 4073 | static struct itemplate *itable_F1[] = {\r |
| 4074 | instrux + 420,\r |
| 4075 | instrux + 921,\r |
| 4076 | NULL\r |
| 4077 | };\r |
| 4078 | \r |
| 4079 | static struct itemplate *itable_F2[] = {\r |
| 4080 | instrux + 1254,\r |
| 4081 | instrux + 1336,\r |
| 4082 | instrux + 1337,\r |
| 4083 | instrux + 1402,\r |
| 4084 | instrux + 1403,\r |
| 4085 | instrux + 1410,\r |
| 4086 | instrux + 1411,\r |
| 4087 | instrux + 1414,\r |
| 4088 | instrux + 1415,\r |
| 4089 | instrux + 1418,\r |
| 4090 | instrux + 1419,\r |
| 4091 | instrux + 1422,\r |
| 4092 | instrux + 1423,\r |
| 4093 | instrux + 1426,\r |
| 4094 | instrux + 1427,\r |
| 4095 | instrux + 1430,\r |
| 4096 | instrux + 1431,\r |
| 4097 | instrux + 1434,\r |
| 4098 | instrux + 1435,\r |
| 4099 | instrux + 1438,\r |
| 4100 | instrux + 1439,\r |
| 4101 | instrux + 1442,\r |
| 4102 | instrux + 1443,\r |
| 4103 | instrux + 1450,\r |
| 4104 | instrux + 1451,\r |
| 4105 | instrux + 1462,\r |
| 4106 | instrux + 1463,\r |
| 4107 | instrux + 1464,\r |
| 4108 | instrux + 1465,\r |
| 4109 | instrux + 1466,\r |
| 4110 | instrux + 1467,\r |
| 4111 | instrux + 1476,\r |
| 4112 | instrux + 1477,\r |
| 4113 | instrux + 1480,\r |
| 4114 | instrux + 1481,\r |
| 4115 | instrux + 1484,\r |
| 4116 | instrux + 1485,\r |
| 4117 | instrux + 1488,\r |
| 4118 | instrux + 1489,\r |
| 4119 | instrux + 1499,\r |
| 4120 | instrux + 1500,\r |
| 4121 | instrux + 1501,\r |
| 4122 | instrux + 1502,\r |
| 4123 | instrux + 1509,\r |
| 4124 | instrux + 1510,\r |
| 4125 | instrux + 1517,\r |
| 4126 | instrux + 1518,\r |
| 4127 | instrux + 1521,\r |
| 4128 | instrux + 1522,\r |
| 4129 | instrux + 1533,\r |
| 4130 | instrux + 1534,\r |
| 4131 | instrux + 1537,\r |
| 4132 | instrux + 1538,\r |
| 4133 | instrux + 1541,\r |
| 4134 | instrux + 1542,\r |
| 4135 | instrux + 1543,\r |
| 4136 | instrux + 1544,\r |
| 4137 | instrux + 1545,\r |
| 4138 | NULL\r |
| 4139 | };\r |
| 4140 | \r |
| 4141 | static struct itemplate *itable_F3[] = {\r |
| 4142 | instrux + 1546,\r |
| 4143 | instrux + 1547,\r |
| 4144 | instrux + 1548,\r |
| 4145 | instrux + 1549,\r |
| 4146 | NULL\r |
| 4147 | };\r |
| 4148 | \r |
| 4149 | static struct itemplate *itable_F4[] = {\r |
| 4150 | instrux + 382,\r |
| 4151 | NULL\r |
| 4152 | };\r |
| 4153 | \r |
| 4154 | static struct itemplate *itable_F5[] = {\r |
| 4155 | instrux + 140,\r |
| 4156 | NULL\r |
| 4157 | };\r |
| 4158 | \r |
| 4159 | static struct itemplate *itable_F6[] = {\r |
| 4160 | instrux + 190,\r |
| 4161 | instrux + 383,\r |
| 4162 | instrux + 386,\r |
| 4163 | instrux + 567,\r |
| 4164 | instrux + 571,\r |
| 4165 | instrux + 575,\r |
| 4166 | instrux + 979,\r |
| 4167 | instrux + 982,\r |
| 4168 | NULL\r |
| 4169 | };\r |
| 4170 | \r |
| 4171 | static struct itemplate *itable_F7[] = {\r |
| 4172 | instrux + 191,\r |
| 4173 | instrux + 192,\r |
| 4174 | instrux + 384,\r |
| 4175 | instrux + 385,\r |
| 4176 | instrux + 387,\r |
| 4177 | instrux + 388,\r |
| 4178 | instrux + 568,\r |
| 4179 | instrux + 569,\r |
| 4180 | instrux + 572,\r |
| 4181 | instrux + 573,\r |
| 4182 | instrux + 576,\r |
| 4183 | instrux + 577,\r |
| 4184 | instrux + 980,\r |
| 4185 | instrux + 981,\r |
| 4186 | instrux + 983,\r |
| 4187 | instrux + 984,\r |
| 4188 | NULL\r |
| 4189 | };\r |
| 4190 | \r |
| 4191 | static struct itemplate *itable_F8[] = {\r |
| 4192 | instrux + 136,\r |
| 4193 | NULL\r |
| 4194 | };\r |
| 4195 | \r |
| 4196 | static struct itemplate *itable_F9[] = {\r |
| 4197 | instrux + 927,\r |
| 4198 | NULL\r |
| 4199 | };\r |
| 4200 | \r |
| 4201 | static struct itemplate *itable_FA[] = {\r |
| 4202 | instrux + 138,\r |
| 4203 | NULL\r |
| 4204 | };\r |
| 4205 | \r |
| 4206 | static struct itemplate *itable_FB[] = {\r |
| 4207 | instrux + 929,\r |
| 4208 | NULL\r |
| 4209 | };\r |
| 4210 | \r |
| 4211 | static struct itemplate *itable_FC[] = {\r |
| 4212 | instrux + 137,\r |
| 4213 | NULL\r |
| 4214 | };\r |
| 4215 | \r |
| 4216 | static struct itemplate *itable_FD[] = {\r |
| 4217 | instrux + 928,\r |
| 4218 | NULL\r |
| 4219 | };\r |
| 4220 | \r |
| 4221 | static struct itemplate *itable_FE[] = {\r |
| 4222 | instrux + 187,\r |
| 4223 | instrux + 413,\r |
| 4224 | NULL\r |
| 4225 | };\r |
| 4226 | \r |
| 4227 | static struct itemplate *itable_FF[] = {\r |
| 4228 | instrux + 123,\r |
| 4229 | instrux + 124,\r |
| 4230 | instrux + 125,\r |
| 4231 | instrux + 126,\r |
| 4232 | instrux + 127,\r |
| 4233 | instrux + 128,\r |
| 4234 | instrux + 129,\r |
| 4235 | instrux + 130,\r |
| 4236 | instrux + 131,\r |
| 4237 | instrux + 132,\r |
| 4238 | instrux + 133,\r |
| 4239 | instrux + 188,\r |
| 4240 | instrux + 189,\r |
| 4241 | instrux + 414,\r |
| 4242 | instrux + 415,\r |
| 4243 | instrux + 439,\r |
| 4244 | instrux + 440,\r |
| 4245 | instrux + 441,\r |
| 4246 | instrux + 442,\r |
| 4247 | instrux + 443,\r |
| 4248 | instrux + 444,\r |
| 4249 | instrux + 445,\r |
| 4250 | instrux + 446,\r |
| 4251 | instrux + 447,\r |
| 4252 | instrux + 448,\r |
| 4253 | instrux + 449,\r |
| 4254 | instrux + 776,\r |
| 4255 | instrux + 777,\r |
| 4256 | NULL\r |
| 4257 | };\r |
| 4258 | \r |
| 4259 | struct itemplate **itable[] = {\r |
| 4260 | itable_00,\r |
| 4261 | itable_01,\r |
| 4262 | itable_02,\r |
| 4263 | itable_03,\r |
| 4264 | itable_04,\r |
| 4265 | itable_05,\r |
| 4266 | itable_06,\r |
| 4267 | itable_07,\r |
| 4268 | itable_08,\r |
| 4269 | itable_09,\r |
| 4270 | itable_0A,\r |
| 4271 | itable_0B,\r |
| 4272 | itable_0C,\r |
| 4273 | itable_0D,\r |
| 4274 | itable_0E,\r |
| 4275 | itable_0F,\r |
| 4276 | itable_10,\r |
| 4277 | itable_11,\r |
| 4278 | itable_12,\r |
| 4279 | itable_13,\r |
| 4280 | itable_14,\r |
| 4281 | itable_15,\r |
| 4282 | itable_16,\r |
| 4283 | itable_17,\r |
| 4284 | itable_18,\r |
| 4285 | itable_19,\r |
| 4286 | itable_1A,\r |
| 4287 | itable_1B,\r |
| 4288 | itable_1C,\r |
| 4289 | itable_1D,\r |
| 4290 | itable_1E,\r |
| 4291 | itable_1F,\r |
| 4292 | itable_20,\r |
| 4293 | itable_21,\r |
| 4294 | itable_22,\r |
| 4295 | itable_23,\r |
| 4296 | itable_24,\r |
| 4297 | itable_25,\r |
| 4298 | itable_26,\r |
| 4299 | itable_27,\r |
| 4300 | itable_28,\r |
| 4301 | itable_29,\r |
| 4302 | itable_2A,\r |
| 4303 | itable_2B,\r |
| 4304 | itable_2C,\r |
| 4305 | itable_2D,\r |
| 4306 | itable_2E,\r |
| 4307 | itable_2F,\r |
| 4308 | itable_30,\r |
| 4309 | itable_31,\r |
| 4310 | itable_32,\r |
| 4311 | itable_33,\r |
| 4312 | itable_34,\r |
| 4313 | itable_35,\r |
| 4314 | itable_36,\r |
| 4315 | itable_37,\r |
| 4316 | itable_38,\r |
| 4317 | itable_39,\r |
| 4318 | itable_3A,\r |
| 4319 | itable_3B,\r |
| 4320 | itable_3C,\r |
| 4321 | itable_3D,\r |
| 4322 | itable_3E,\r |
| 4323 | itable_3F,\r |
| 4324 | itable_40,\r |
| 4325 | itable_41,\r |
| 4326 | itable_42,\r |
| 4327 | itable_43,\r |
| 4328 | itable_44,\r |
| 4329 | itable_45,\r |
| 4330 | itable_46,\r |
| 4331 | itable_47,\r |
| 4332 | itable_48,\r |
| 4333 | itable_49,\r |
| 4334 | itable_4A,\r |
| 4335 | itable_4B,\r |
| 4336 | itable_4C,\r |
| 4337 | itable_4D,\r |
| 4338 | itable_4E,\r |
| 4339 | itable_4F,\r |
| 4340 | itable_50,\r |
| 4341 | itable_51,\r |
| 4342 | itable_52,\r |
| 4343 | itable_53,\r |
| 4344 | itable_54,\r |
| 4345 | itable_55,\r |
| 4346 | itable_56,\r |
| 4347 | itable_57,\r |
| 4348 | itable_58,\r |
| 4349 | itable_59,\r |
| 4350 | itable_5A,\r |
| 4351 | itable_5B,\r |
| 4352 | itable_5C,\r |
| 4353 | itable_5D,\r |
| 4354 | itable_5E,\r |
| 4355 | itable_5F,\r |
| 4356 | itable_60,\r |
| 4357 | itable_61,\r |
| 4358 | itable_62,\r |
| 4359 | itable_63,\r |
| 4360 | itable_64,\r |
| 4361 | itable_65,\r |
| 4362 | itable_66,\r |
| 4363 | itable_67,\r |
| 4364 | itable_68,\r |
| 4365 | itable_69,\r |
| 4366 | itable_6A,\r |
| 4367 | itable_6B,\r |
| 4368 | itable_6C,\r |
| 4369 | itable_6D,\r |
| 4370 | itable_6E,\r |
| 4371 | itable_6F,\r |
| 4372 | itable_70,\r |
| 4373 | itable_71,\r |
| 4374 | itable_72,\r |
| 4375 | itable_73,\r |
| 4376 | itable_74,\r |
| 4377 | itable_75,\r |
| 4378 | itable_76,\r |
| 4379 | itable_77,\r |
| 4380 | itable_78,\r |
| 4381 | itable_79,\r |
| 4382 | itable_7A,\r |
| 4383 | itable_7B,\r |
| 4384 | itable_7C,\r |
| 4385 | itable_7D,\r |
| 4386 | itable_7E,\r |
| 4387 | itable_7F,\r |
| 4388 | itable_80,\r |
| 4389 | itable_81,\r |
| 4390 | itable_82,\r |
| 4391 | itable_83,\r |
| 4392 | itable_84,\r |
| 4393 | itable_85,\r |
| 4394 | itable_86,\r |
| 4395 | itable_87,\r |
| 4396 | itable_88,\r |
| 4397 | itable_89,\r |
| 4398 | itable_8A,\r |
| 4399 | itable_8B,\r |
| 4400 | itable_8C,\r |
| 4401 | itable_8D,\r |
| 4402 | itable_8E,\r |
| 4403 | itable_8F,\r |
| 4404 | itable_90,\r |
| 4405 | itable_91,\r |
| 4406 | itable_92,\r |
| 4407 | itable_93,\r |
| 4408 | itable_94,\r |
| 4409 | itable_95,\r |
| 4410 | itable_96,\r |
| 4411 | itable_97,\r |
| 4412 | itable_98,\r |
| 4413 | itable_99,\r |
| 4414 | itable_9A,\r |
| 4415 | itable_9B,\r |
| 4416 | itable_9C,\r |
| 4417 | itable_9D,\r |
| 4418 | itable_9E,\r |
| 4419 | itable_9F,\r |
| 4420 | itable_A0,\r |
| 4421 | itable_A1,\r |
| 4422 | itable_A2,\r |
| 4423 | itable_A3,\r |
| 4424 | itable_A4,\r |
| 4425 | itable_A5,\r |
| 4426 | itable_A6,\r |
| 4427 | itable_A7,\r |
| 4428 | itable_A8,\r |
| 4429 | itable_A9,\r |
| 4430 | itable_AA,\r |
| 4431 | itable_AB,\r |
| 4432 | itable_AC,\r |
| 4433 | itable_AD,\r |
| 4434 | itable_AE,\r |
| 4435 | itable_AF,\r |
| 4436 | itable_B0,\r |
| 4437 | itable_B1,\r |
| 4438 | itable_B2,\r |
| 4439 | itable_B3,\r |
| 4440 | itable_B4,\r |
| 4441 | itable_B5,\r |
| 4442 | itable_B6,\r |
| 4443 | itable_B7,\r |
| 4444 | itable_B8,\r |
| 4445 | itable_B9,\r |
| 4446 | itable_BA,\r |
| 4447 | itable_BB,\r |
| 4448 | itable_BC,\r |
| 4449 | itable_BD,\r |
| 4450 | itable_BE,\r |
| 4451 | itable_BF,\r |
| 4452 | itable_C0,\r |
| 4453 | itable_C1,\r |
| 4454 | itable_C2,\r |
| 4455 | itable_C3,\r |
| 4456 | itable_C4,\r |
| 4457 | itable_C5,\r |
| 4458 | itable_C6,\r |
| 4459 | itable_C7,\r |
| 4460 | itable_C8,\r |
| 4461 | itable_C9,\r |
| 4462 | itable_CA,\r |
| 4463 | itable_CB,\r |
| 4464 | itable_CC,\r |
| 4465 | itable_CD,\r |
| 4466 | itable_CE,\r |
| 4467 | itable_CF,\r |
| 4468 | itable_D0,\r |
| 4469 | itable_D1,\r |
| 4470 | itable_D2,\r |
| 4471 | itable_D3,\r |
| 4472 | itable_D4,\r |
| 4473 | itable_D5,\r |
| 4474 | itable_D6,\r |
| 4475 | itable_D7,\r |
| 4476 | itable_D8,\r |
| 4477 | itable_D9,\r |
| 4478 | itable_DA,\r |
| 4479 | itable_DB,\r |
| 4480 | itable_DC,\r |
| 4481 | itable_DD,\r |
| 4482 | itable_DE,\r |
| 4483 | itable_DF,\r |
| 4484 | itable_E0,\r |
| 4485 | itable_E1,\r |
| 4486 | itable_E2,\r |
| 4487 | itable_E3,\r |
| 4488 | itable_E4,\r |
| 4489 | itable_E5,\r |
| 4490 | itable_E6,\r |
| 4491 | itable_E7,\r |
| 4492 | itable_E8,\r |
| 4493 | itable_E9,\r |
| 4494 | itable_EA,\r |
| 4495 | itable_EB,\r |
| 4496 | itable_EC,\r |
| 4497 | itable_ED,\r |
| 4498 | itable_EE,\r |
| 4499 | itable_EF,\r |
| 4500 | itable_F0,\r |
| 4501 | itable_F1,\r |
| 4502 | itable_F2,\r |
| 4503 | itable_F3,\r |
| 4504 | itable_F4,\r |
| 4505 | itable_F5,\r |
| 4506 | itable_F6,\r |
| 4507 | itable_F7,\r |
| 4508 | itable_F8,\r |
| 4509 | itable_F9,\r |
| 4510 | itable_FA,\r |
| 4511 | itable_FB,\r |
| 4512 | itable_FC,\r |
| 4513 | itable_FD,\r |
| 4514 | itable_FE,\r |
| 4515 | itable_FF,\r |
| 4516 | };\r |