| 1 | /* hp2100_defs.h: HP 2100 simulator definitions\r |
| 2 | \r |
| 3 | Copyright (c) 1993-2008, Robert M. Supnik\r |
| 4 | \r |
| 5 | Permission is hereby granted, free of charge, to any person obtaining a\r |
| 6 | copy of this software and associated documentation files (the "Software"),\r |
| 7 | to deal in the Software without restriction, including without limitation\r |
| 8 | the rights to use, copy, modify, merge, publish, distribute, sublicense,\r |
| 9 | and/or sell copies of the Software, and to permit persons to whom the\r |
| 10 | Software is furnished to do so, subject to the following conditions:\r |
| 11 | \r |
| 12 | The above copyright notice and this permission notice shall be included in\r |
| 13 | all copies or substantial portions of the Software.\r |
| 14 | \r |
| 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r |
| 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\r |
| 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL\r |
| 18 | ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r |
| 19 | IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r |
| 20 | CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r |
| 21 | \r |
| 22 | Except as contained in this notice, the name of Robert M Supnik shall not\r |
| 23 | be used in advertising or otherwise to promote the sale, use or other dealings\r |
| 24 | in this Software without prior written authorization from Robert M Supnik.\r |
| 25 | \r |
| 26 | 24-Apr-08 JDB Added I_MRG_I, I_JSB, I_JSB_I, and I_JMP instruction masks\r |
| 27 | 14-Apr-08 JDB Changed TMR_MUX to TMR_POLL for idle support\r |
| 28 | Added POLLMODE, sync_poll() declaration\r |
| 29 | Added I_MRG, I_ISZ, I_IOG, I_STF, and I_SFS instruction masks\r |
| 30 | 07-Dec-07 JDB Added BACI device\r |
| 31 | 10-Nov-07 JDB Added 16/32-bit unsigned-to-signed conversions\r |
| 32 | 11-Jan-07 JDB Added 12578A DMA byte packing to DMA structure\r |
| 33 | 28-Dec-06 JDB Added CRS backplane signal as I/O pseudo-opcode\r |
| 34 | Added DMASK32 32-bit mask value\r |
| 35 | 21-Dec-06 JDB Changed MEM_ADDR_OK for 21xx loader support\r |
| 36 | 12-Sep-06 JDB Define NOTE_IOG to recalc interrupts after instr exec\r |
| 37 | Rename STOP_INDINT to NOTE_INDINT (not a stop condition)\r |
| 38 | 30-Dec-04 JDB Added IBL_DS_HEAD head number mask\r |
| 39 | 19-Nov-04 JDB Added STOP_OFFLINE, STOP_PWROFF stop codes\r |
| 40 | 25-Apr-04 RMS Added additional IBL definitions\r |
| 41 | Added DMA EDT I/O pseudo-opcode\r |
| 42 | 25-Apr-03 RMS Revised for extended file support\r |
| 43 | 24-Oct-02 RMS Added indirect address interrupt\r |
| 44 | 08-Feb-02 RMS Added DMS definitions\r |
| 45 | 01-Feb-02 RMS Added terminal multiplexor support\r |
| 46 | 16-Jan-02 RMS Added additional device support\r |
| 47 | 30-Nov-01 RMS Added extended SET/SHOW support\r |
| 48 | 15-Oct-00 RMS Added dynamic device numbers\r |
| 49 | 14-Apr-99 RMS Changed t_addr to unsigned\r |
| 50 | \r |
| 51 | The author gratefully acknowledges the help of Jeff Moffat in answering\r |
| 52 | questions about the HP2100; and of Dave Bryan in adding features and\r |
| 53 | correcting errors throughout the simulator.\r |
| 54 | */\r |
| 55 | #ifndef _HP2100_DEFS_H_\r |
| 56 | #define _HP2100_DEFS_H_ 0\r |
| 57 | \r |
| 58 | #include "sim_defs.h" /* simulator defns */\r |
| 59 | \r |
| 60 | /* Simulator stop and notification codes */\r |
| 61 | \r |
| 62 | #define STOP_RSRV 1 /* must be 1 */\r |
| 63 | #define STOP_IODV 2 /* must be 2 */\r |
| 64 | #define STOP_HALT 3 /* HALT */\r |
| 65 | #define STOP_IBKPT 4 /* breakpoint */\r |
| 66 | #define STOP_IND 5 /* indirect loop */\r |
| 67 | #define NOTE_INDINT 6 /* indirect intr */\r |
| 68 | #define STOP_NOCONN 7 /* no connection */\r |
| 69 | #define STOP_OFFLINE 8 /* device offline */\r |
| 70 | #define STOP_PWROFF 9 /* device powered off */\r |
| 71 | #define NOTE_IOG 10 /* I/O instr executed */\r |
| 72 | \r |
| 73 | #define ABORT_PRO 1 /* protection abort */\r |
| 74 | \r |
| 75 | /* Memory */\r |
| 76 | \r |
| 77 | #define MEMSIZE (cpu_unit.capac) /* actual memory size */\r |
| 78 | #define MEM_ADDR_OK(x) (((uint32) (x)) < fwanxm)\r |
| 79 | #define VA_N_SIZE 15 /* virtual addr size */\r |
| 80 | #define VASIZE (1 << VA_N_SIZE)\r |
| 81 | #define VAMASK 077777 /* virt addr mask */\r |
| 82 | #define PA_N_SIZE 20 /* phys addr size */\r |
| 83 | #define PASIZE (1 << PA_N_SIZE)\r |
| 84 | #define PAMASK (PASIZE - 1) /* phys addr mask */\r |
| 85 | \r |
| 86 | /* Architectural constants */\r |
| 87 | \r |
| 88 | #define SIGN32 020000000000 /* 32b sign */\r |
| 89 | #define DMASK32 037777777777 /* 32b data mask/maximum value */\r |
| 90 | #define DMAX32 017777777777 /* 32b maximum signed value */\r |
| 91 | #define SIGN 0100000 /* 16b sign */\r |
| 92 | #define DMASK 0177777 /* 16b data mask/maximum value */\r |
| 93 | #define DMAX 0077777 /* 16b maximum signed value */\r |
| 94 | #define DMASK8 0377 /* 8b data mask/maximum value */\r |
| 95 | #define AR ABREG[0] /* A = reg 0 */\r |
| 96 | #define BR ABREG[1] /* B = reg 1 */\r |
| 97 | \r |
| 98 | /* Portable conversions (sign-extension, unsigned-to-signed) */\r |
| 99 | \r |
| 100 | #define SEXT(x) ((int32) (((x) & SIGN)? ((x) | ~DMASK): ((x) & DMASK)))\r |
| 101 | \r |
| 102 | #define INT16(u) ((u) > DMAX ? (-(int16) (DMASK - (u)) - 1) : (int16) (u))\r |
| 103 | #define INT32(u) ((u) > DMAX32 ? (-(int32) (DMASK32 - (u)) - 1) : (int32) (u))\r |
| 104 | \r |
| 105 | /* Memory reference instructions */\r |
| 106 | \r |
| 107 | #define I_IA 0100000 /* indirect address */\r |
| 108 | #define I_AB 0004000 /* A/B select */\r |
| 109 | #define I_CP 0002000 /* current page */\r |
| 110 | #define I_DISP 0001777 /* page displacement */\r |
| 111 | #define I_PAGENO 0076000 /* page number */\r |
| 112 | \r |
| 113 | /* Other instructions */\r |
| 114 | \r |
| 115 | #define I_NMRMASK 0172000 /* non-mrf opcode */\r |
| 116 | #define I_SRG 0000000 /* shift */\r |
| 117 | #define I_ASKP 0002000 /* alter/skip */\r |
| 118 | #define I_EXTD 0100000 /* extend */\r |
| 119 | #define I_IO 0102000 /* I/O */\r |
| 120 | #define I_CTL 0004000 /* CTL on/off */\r |
| 121 | #define I_HC 0001000 /* hold/clear */\r |
| 122 | #define I_DEVMASK 0000077 /* device mask */\r |
| 123 | #define I_GETIOOP(x) (((x) >> 6) & 07) /* I/O sub op */\r |
| 124 | \r |
| 125 | /* Instruction masks */\r |
| 126 | \r |
| 127 | #define I_MRG 0074000 /* MRG instructions */\r |
| 128 | #define I_MRG_I (I_MRG | I_IA) /* MRG indirect instruction group */\r |
| 129 | #define I_JSB 0014000 /* JSB instruction */\r |
| 130 | #define I_JSB_I (I_JSB | I_IA) /* JSB,I instruction */\r |
| 131 | #define I_JMP 0024000 /* JMP instruction */\r |
| 132 | #define I_ISZ 0034000 /* ISZ instruction */\r |
| 133 | \r |
| 134 | #define I_IOG 0107700 /* I/O group instruction */\r |
| 135 | #define I_SFS 0102300 /* SFS instruction */\r |
| 136 | #define I_STF 0102100 /* STF instruction */\r |
| 137 | \r |
| 138 | /* DMA channels */\r |
| 139 | \r |
| 140 | #define DMA_OE 020000000000 /* byte packing odd/even flag */\r |
| 141 | #define DMA1_STC 0100000 /* DMA - issue STC */\r |
| 142 | #define DMA1_PB 0040000 /* DMA - pack bytes */\r |
| 143 | #define DMA1_CLC 0020000 /* DMA - issue CLC */\r |
| 144 | #define DMA2_OI 0100000 /* DMA - output/input */\r |
| 145 | \r |
| 146 | struct DMA { /* DMA channel */\r |
| 147 | uint32 cw1; /* device select */\r |
| 148 | uint32 cw2; /* direction, address */\r |
| 149 | uint32 cw3; /* word count */\r |
| 150 | uint32 latency; /* 1st cycle delay */\r |
| 151 | uint32 packer; /* byte-packer holding reg */\r |
| 152 | };\r |
| 153 | \r |
| 154 | /* Memory management */\r |
| 155 | \r |
| 156 | #define VA_N_OFF 10 /* offset width */\r |
| 157 | #define VA_M_OFF ((1 << VA_N_OFF) - 1) /* offset mask */\r |
| 158 | #define VA_GETOFF(x) ((x) & VA_M_OFF)\r |
| 159 | #define VA_N_PAG (VA_N_SIZE - VA_N_OFF) /* page width */\r |
| 160 | #define VA_V_PAG (VA_N_OFF)\r |
| 161 | #define VA_M_PAG ((1 << VA_N_PAG) - 1)\r |
| 162 | #define VA_GETPAG(x) (((x) >> VA_V_PAG) & VA_M_PAG)\r |
| 163 | \r |
| 164 | /* Maps */\r |
| 165 | \r |
| 166 | #define MAP_NUM 4 /* num maps */\r |
| 167 | #define MAP_LNT (1 << VA_N_PAG) /* map length */\r |
| 168 | #define MAP_MASK ((MAP_NUM * MAP_LNT) - 1)\r |
| 169 | #define SMAP 0 /* system map */\r |
| 170 | #define UMAP (SMAP + MAP_LNT) /* user map */\r |
| 171 | #define PAMAP (UMAP + MAP_LNT) /* port A map */\r |
| 172 | #define PBMAP (PAMAP + MAP_LNT) /* port B map */\r |
| 173 | \r |
| 174 | /* DMS map entries */\r |
| 175 | \r |
| 176 | #define MAP_V_RPR 15 /* read prot */\r |
| 177 | #define MAP_V_WPR 14 /* write prot */\r |
| 178 | #define RD (1 << MAP_V_RPR)\r |
| 179 | #define WR (1 << MAP_V_WPR)\r |
| 180 | #define MAP_MBZ 0036000 /* must be zero */\r |
| 181 | #define MAP_N_PAG (PA_N_SIZE - VA_N_OFF) /* page width */\r |
| 182 | #define MAP_V_PAG (VA_N_OFF)\r |
| 183 | #define MAP_M_PAG ((1 << MAP_N_PAG) - 1)\r |
| 184 | #define MAP_GETPAG(x) (((x) & MAP_M_PAG) << MAP_V_PAG)\r |
| 185 | \r |
| 186 | /* Map status register */\r |
| 187 | \r |
| 188 | #define MST_ENBI 0100000 /* mem enb @ int */\r |
| 189 | #define MST_UMPI 0040000 /* usr map @ int */\r |
| 190 | #define MST_ENB 0020000 /* mem enb */\r |
| 191 | #define MST_UMP 0010000 /* usr map */\r |
| 192 | #define MST_PRO 0004000 /* protection */\r |
| 193 | #define MST_FLT 0002000 /* fence comp */\r |
| 194 | #define MST_FENCE 0001777 /* base page fence */\r |
| 195 | \r |
| 196 | /* Map violation register */\r |
| 197 | \r |
| 198 | #define MVI_V_RPR 15 /* must be same as */\r |
| 199 | #define MVI_V_WPR 14 /* MAP_V_xPR */\r |
| 200 | #define MVI_RPR (1 << MVI_V_RPR) /* rd viol */\r |
| 201 | #define MVI_WPR (1 << MVI_V_WPR) /* wr viol */\r |
| 202 | #define MVI_BPG 0020000 /* base page viol */\r |
| 203 | #define MVI_PRV 0010000 /* priv viol */\r |
| 204 | #define MVI_MEB 0000200 /* me bus enb @ viol */\r |
| 205 | #define MVI_MEM 0000100 /* mem enb @ viol */\r |
| 206 | #define MVI_UMP 0000040 /* usr map @ viol */\r |
| 207 | #define MVI_PAG 0000037 /* pag sel */\r |
| 208 | \r |
| 209 | /* Timers */\r |
| 210 | \r |
| 211 | #define TMR_CLK 0 /* clock */\r |
| 212 | #define TMR_POLL 1 /* input polling */\r |
| 213 | \r |
| 214 | #define POLL_RATE 100 /* poll 100 times per second */\r |
| 215 | #define POLL_WAIT 15800 /* initial poll ~ 10 msec. */\r |
| 216 | \r |
| 217 | typedef enum { INITIAL, SERVICE } POLLMODE; /* poll synchronization modes */\r |
| 218 | \r |
| 219 | /* I/O sub-opcodes */\r |
| 220 | \r |
| 221 | #define ioHLT 0 /* halt */\r |
| 222 | #define ioFLG 1 /* set/clear flag */\r |
| 223 | #define ioSFC 2 /* skip on flag clear */\r |
| 224 | #define ioSFS 3 /* skip on flag set */\r |
| 225 | #define ioMIX 4 /* merge into A/B */\r |
| 226 | #define ioLIX 5 /* load into A/B */\r |
| 227 | #define ioOTX 6 /* output from A/B */\r |
| 228 | #define ioCTL 7 /* set/clear control */\r |
| 229 | #define ioEDT 8 /* DMA: end data transfer */\r |
| 230 | #define ioCRS 9 /* control reset ("CLC 0") */\r |
| 231 | \r |
| 232 | /* I/O devices - fixed assignments */\r |
| 233 | \r |
| 234 | #define CPU 000 /* interrupt control */\r |
| 235 | #define OVF 001 /* overflow */\r |
| 236 | #define DMALT0 002 /* DMA 0 alternate */\r |
| 237 | #define DMALT1 003 /* DMA 1 alternate */\r |
| 238 | #define PWR 004 /* power fail */\r |
| 239 | #define PRO 005 /* parity/mem protect */\r |
| 240 | #define DMA0 006 /* DMA channel 0 */\r |
| 241 | #define DMA1 007 /* DMA channel 1 */\r |
| 242 | #define VARDEV (DMA1 + 1) /* start of var assign */\r |
| 243 | #define M_NXDEV (INT_M (CPU) | INT_M (OVF) | \\r |
| 244 | INT_M (DMALT0) | INT_M (DMALT1))\r |
| 245 | #define M_FXDEV (M_NXDEV | INT_M (PWR) | INT_M (PRO) | \\r |
| 246 | INT_M (DMA0) | INT_M (DMA1))\r |
| 247 | \r |
| 248 | /* I/O devices - variable assignment defaults */\r |
| 249 | \r |
| 250 | #define PTR 010 /* 12597A-002 paper tape reader */\r |
| 251 | #define TTY 011 /* 12531C teleprinter */\r |
| 252 | #define PTP 012 /* 12597A-005 paper tape punch */\r |
| 253 | #define CLK 013 /* 12539C time-base generator */\r |
| 254 | #define LPS 014 /* 12653A line printer */\r |
| 255 | #define LPT 015 /* 12845A line printer */\r |
| 256 | #define MTD 020 /* 12559A data */\r |
| 257 | #define MTC 021 /* 12559A control */\r |
| 258 | #define DPD 022 /* 12557A data */\r |
| 259 | #define DPC 023 /* 12557A control */\r |
| 260 | #define DQD 024 /* 12565A data */\r |
| 261 | #define DQC 025 /* 12565A control */\r |
| 262 | #define DRD 026 /* 12610A data */\r |
| 263 | #define DRC 027 /* 12610A control */\r |
| 264 | #define MSD 030 /* 13181A data */\r |
| 265 | #define MSC 031 /* 13181A control */\r |
| 266 | #define IPLI 032 /* 12566B link in */\r |
| 267 | #define IPLO 033 /* 12566B link out */\r |
| 268 | #define DS 034 /* 13037A control */\r |
| 269 | #define BACI 035 /* 12966A Buffered Async Comm Interface */\r |
| 270 | #define MUXL 040 /* 12920A lower data */\r |
| 271 | #define MUXU 041 /* 12920A upper data */\r |
| 272 | #define MUXC 042 /* 12920A control */\r |
| 273 | \r |
| 274 | /* IBL assignments */\r |
| 275 | \r |
| 276 | #define IBL_V_SEL 14 /* ROM select */\r |
| 277 | #define IBL_M_SEL 03\r |
| 278 | #define IBL_PTR 0000000 /* PTR */\r |
| 279 | #define IBL_DP 0040000 /* disk: DP */\r |
| 280 | #define IBL_DQ 0060000 /* disk: DQ */\r |
| 281 | #define IBL_MS 0100000 /* option 0: MS */\r |
| 282 | #define IBL_DS 0140000 /* option 1: DS */\r |
| 283 | #define IBL_MAN 0010000 /* RPL/man boot */\r |
| 284 | #define IBL_V_DEV 6 /* dev in <11:6> */\r |
| 285 | #define IBL_OPT 0000070 /* options in <5:3> */\r |
| 286 | #define IBL_DP_REM 0000001 /* DP removable */\r |
| 287 | #define IBL_DS_HEAD 0000003 /* DS head number */\r |
| 288 | #define IBL_LNT 64 /* boot length */\r |
| 289 | #define IBL_MASK (IBL_LNT - 1) /* boot length mask */\r |
| 290 | #define IBL_DPC (IBL_LNT - 2) /* DMA ctrl word */\r |
| 291 | #define IBL_END (IBL_LNT - 1) /* last location */\r |
| 292 | \r |
| 293 | /* Dynamic device information table */\r |
| 294 | \r |
| 295 | typedef struct {\r |
| 296 | uint32 devno; /* device number */\r |
| 297 | uint32 cmd; /* saved command */\r |
| 298 | uint32 ctl; /* saved control */\r |
| 299 | uint32 flg; /* saved flag */\r |
| 300 | uint32 fbf; /* saved flag buf */\r |
| 301 | uint32 srq; /* saved svc req */\r |
| 302 | int32 (*iot)(int32 op, int32 ir, int32 dat); /* I/O routine */\r |
| 303 | } DIB;\r |
| 304 | \r |
| 305 | /* I/O macros */\r |
| 306 | \r |
| 307 | #define INT_V(x) ((x) & 037) /* device bit pos */\r |
| 308 | #define INT_M(x) (1u << INT_V (x)) /* device bit mask */\r |
| 309 | #define setCMD(D) dev_cmd[(D)/32] = dev_cmd[(D)/32] | INT_M ((D))\r |
| 310 | #define clrCMD(D) dev_cmd[(D)/32] = dev_cmd[(D)/32] & ~INT_M (D)\r |
| 311 | #define setCTL(D) dev_ctl[(D)/32] = dev_ctl[(D)/32] | INT_M ((D))\r |
| 312 | #define clrCTL(D) dev_ctl[(D)/32] = dev_ctl[(D)/32] & ~INT_M (D)\r |
| 313 | #define setFBF(D) dev_fbf[(D)/32] = dev_fbf[(D)/32] | INT_M (D)\r |
| 314 | #define clrFBF(D) dev_fbf[(D)/32] = dev_fbf[(D)/32] & ~INT_M (D)\r |
| 315 | #define setFLG(D) dev_flg[(D)/32] = dev_flg[(D)/32] | INT_M (D); \\r |
| 316 | setFBF(D)\r |
| 317 | #define clrFLG(D) dev_flg[(D)/32] = dev_flg[(D)/32] & ~INT_M (D); \\r |
| 318 | clrFBF(D)\r |
| 319 | #define setFSR(D) dev_flg[(D)/32] = dev_flg[(D)/32] | INT_M (D); \\r |
| 320 | setFBF(D); setSRQ(D)\r |
| 321 | #define clrFSR(D) dev_flg[(D)/32] = dev_flg[(D)/32] & ~INT_M (D); \\r |
| 322 | clrFBF(D); clrSRQ(D)\r |
| 323 | #define setSRQ(D) dev_srq[(D)/32] = dev_srq[(D)/32] | INT_M ((D))\r |
| 324 | #define clrSRQ(D) dev_srq[(D)/32] = dev_srq[(D)/32] & ~INT_M (D)\r |
| 325 | #define CMD(D) ((dev_cmd[(D)/32] >> INT_V (D)) & 1)\r |
| 326 | #define CTL(D) ((dev_ctl[(D)/32] >> INT_V (D)) & 1)\r |
| 327 | #define FLG(D) ((dev_flg[(D)/32] >> INT_V (D)) & 1)\r |
| 328 | #define FBF(D) ((dev_fbf[(D)/32] >> INT_V (D)) & 1)\r |
| 329 | #define SRQ(D) ((dev_srq[(D)/32] >> INT_V (D)) & 1)\r |
| 330 | \r |
| 331 | #define IOT_V_REASON 16\r |
| 332 | #define IORETURN(f,v) ((f)? (v): SCPE_OK) /* stop on error */\r |
| 333 | \r |
| 334 | /* Function prototypes */\r |
| 335 | \r |
| 336 | int32 sync_poll (POLLMODE poll_mode);\r |
| 337 | t_stat ibl_copy (const uint16 pboot[IBL_LNT], int32 dev);\r |
| 338 | t_stat hp_setdev (UNIT *uptr, int32 val, char *cptr, void *desc);\r |
| 339 | t_stat hp_showdev (FILE *st, UNIT *uptr, int32 val, void *desc);\r |
| 340 | void hp_enbdis_pair (DEVICE *ccp, DEVICE *dcp);\r |
| 341 | t_stat fprint_sym (FILE *ofile, t_addr addr, t_value *val, UNIT *uptr, int32 sw);\r |
| 342 | \r |
| 343 | #endif\r |