| 1 | /* nova_defs.h: NOVA/Eclipse simulator definitions \r |
| 2 | \r |
| 3 | Copyright (c) 1993-2008, Robert M. Supnik\r |
| 4 | \r |
| 5 | Permission is hereby granted, free of charge, to any person obtaining a\r |
| 6 | copy of this software and associated documentation files (the "Software"),\r |
| 7 | to deal in the Software without restriction, including without limitation\r |
| 8 | the rights to use, copy, modify, merge, publish, distribute, sublicense,\r |
| 9 | and/or sell copies of the Software, and to permit persons to whom the\r |
| 10 | Software is furnished to do so, subject to the following conditions:\r |
| 11 | \r |
| 12 | The above copyright notice and this permission notice shall be included in\r |
| 13 | all copies or substantial portions of the Software.\r |
| 14 | \r |
| 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r |
| 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\r |
| 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL\r |
| 18 | ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r |
| 19 | IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r |
| 20 | CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r |
| 21 | \r |
| 22 | Except as contained in this notice, the name of Robert M Supnik shall not be\r |
| 23 | used in advertising or otherwise to promote the sale, use or other dealings\r |
| 24 | in this Software without prior written authorization from Robert M Supnik.\r |
| 25 | \r |
| 26 | 04-Jul-07 BKR BUSY/DONE/INTR "convenience" macros added,\r |
| 27 | INT_TRAP added for Nova 3, 4 trap instruction handling,\r |
| 28 | support for 3rd-party 64KW Nova extensions added,\r |
| 29 | removed STOP_IND_TRP definition due to common INT/TRP handling\r |
| 30 | 14-Jan-04 BKR Added support for QTY and ALM\r |
| 31 | 22-Nov-03 CEO Added support for PIT device\r |
| 32 | 19-Jan-03 RMS Changed CMASK to CDMASK for Apple Dev kit conflict\r |
| 33 | 03-Oct-02 RMS Added device information structure\r |
| 34 | 22-Dec-00 RMS Added Bruce Ray's second terminal support\r |
| 35 | 10-Dec-00 RMS Added Charles Owen's Eclipse support\r |
| 36 | 08-Dec-00 RMS Added Bruce Ray's plotter support\r |
| 37 | 15-Oct-00 RMS Added stack, byte, trap instructions\r |
| 38 | 14-Apr-99 RMS Changed t_addr to unsigned\r |
| 39 | 16-Mar-95 RMS Added dynamic memory size\r |
| 40 | 06-Dec-95 RMS Added magnetic tape\r |
| 41 | \r |
| 42 | The author gratefully acknowledges the help of Tom West, Diana Englebart,\r |
| 43 | Carl Friend, Bruce Ray, and Charles Owen in resolving questions about\r |
| 44 | the NOVA.\r |
| 45 | */\r |
| 46 | \r |
| 47 | #ifndef _NOVA_DEFS_H_\r |
| 48 | #define _NOVA_DEFS_H_ 0\r |
| 49 | \r |
| 50 | #include "sim_defs.h" /* simulator defns */\r |
| 51 | \r |
| 52 | /* Simulator stop codes */\r |
| 53 | \r |
| 54 | #define STOP_RSRV 1 /* must be 1 */\r |
| 55 | #define STOP_HALT 2 /* HALT */\r |
| 56 | #define STOP_IBKPT 3 /* breakpoint */\r |
| 57 | #define STOP_IND 4 /* indirect loop */\r |
| 58 | #define STOP_IND_INT 5 /* ind loop, intr or trap */\r |
| 59 | \r |
| 60 | \r |
| 61 | /* Memory */\r |
| 62 | \r |
| 63 | #if defined (ECLIPSE)\r |
| 64 | /*----------------------*/\r |
| 65 | /* Eclipse */\r |
| 66 | /*----------------------*/\r |
| 67 | \r |
| 68 | #define MAXMEMSIZE 1048576 /* max memory size in 16-bit words */\r |
| 69 | #define PAMASK (MAXMEMSIZE - 1) /* physical addr mask */\r |
| 70 | #define MEM_ADDR_OK(x) (((uint32) (x)) < (uint32) MEMSIZE)\r |
| 71 | \r |
| 72 | #else\r |
| 73 | /*----------------------*/\r |
| 74 | /* Nova */\r |
| 75 | /*----------------------*/\r |
| 76 | \r |
| 77 | #define MAXMEMSIZE 65536 /* max memory size in 16-bit words: 32KW = DG max, */\r |
| 78 | /* 64 KW = 3rd-party extended memory feature */\r |
| 79 | #define DFTMEMSIZE 32768 /* default/initial mem size */\r |
| 80 | #define MEM_ADDR_OK(x) (((uint32) (x)) < (uint32) MEMSIZE)\r |
| 81 | \r |
| 82 | #endif\r |
| 83 | \r |
| 84 | \r |
| 85 | #define MEMSIZE (cpu_unit.capac) /* actual memory size */\r |
| 86 | #define A_V_IND 15 /* ind: indirect */\r |
| 87 | #define A_IND (1 << A_V_IND)\r |
| 88 | \r |
| 89 | /* Architectural constants */\r |
| 90 | \r |
| 91 | #define SIGN 0100000 /* sign */\r |
| 92 | #define DMASK 0177777 /* data mask */\r |
| 93 | #define CBIT (DMASK + 1) /* carry bit */\r |
| 94 | #define CDMASK (CBIT | DMASK) /* carry + data */\r |
| 95 | \r |
| 96 | /* Reserved memory locations */\r |
| 97 | \r |
| 98 | #define INT_SAV 0 /* intr saved PC */\r |
| 99 | #define INT_JMP 1 /* intr jmp @ */\r |
| 100 | #define STK_JMP 3 /* stack jmp @ */\r |
| 101 | #define TRP_SAV 046 /* trap saved PC */\r |
| 102 | #define TRP_JMP 047 /* trap jmp @ */\r |
| 103 | \r |
| 104 | #define AUTO_TOP 037 /* top of autoindex */\r |
| 105 | #define AUTO_DEC 030 /* start autodec */\r |
| 106 | #define AUTO_INC 020 /* start autoinc */\r |
| 107 | \r |
| 108 | \r |
| 109 | /* Instruction format */\r |
| 110 | \r |
| 111 | #define I_OPR 0100000 /* operate */\r |
| 112 | #define I_M_SRC 03 /* OPR: src AC */\r |
| 113 | #define I_V_SRC 13\r |
| 114 | #define I_GETSRC(x) (((x) >> I_V_SRC) & I_M_SRC)\r |
| 115 | #define I_M_DST 03 /* dst AC */\r |
| 116 | #define I_V_DST 11\r |
| 117 | #define I_GETDST(x) (((x) >> I_V_DST) & I_M_DST)\r |
| 118 | #define I_M_ALU 07 /* OPR: ALU op */\r |
| 119 | #define I_V_ALU 8\r |
| 120 | #define I_GETALU(x) (((x) >> I_V_ALU) & I_M_ALU)\r |
| 121 | #define I_M_SHF 03 /* OPR: shift */\r |
| 122 | #define I_V_SHF 6\r |
| 123 | #define I_GETSHF(x) (((x) >> I_V_SHF) & I_M_SHF)\r |
| 124 | #define I_M_CRY 03 /* OPR: carry */\r |
| 125 | #define I_V_CRY 4\r |
| 126 | #define I_GETCRY(x) (((x) >> I_V_CRY) & I_M_CRY)\r |
| 127 | #define I_V_NLD 3 /* OPR: no load */\r |
| 128 | #define I_NLD (1 << I_V_NLD)\r |
| 129 | #define I_M_SKP 07 /* OPR: skip */\r |
| 130 | #define I_V_SKP 0\r |
| 131 | #define I_GETSKP(x) (((x) >> I_V_SKP) & I_M_SKP)\r |
| 132 | \r |
| 133 | #define I_M_OPAC 017 /* MRF: opcode + AC */\r |
| 134 | #define I_V_OPAC 11\r |
| 135 | #define I_GETOPAC(x) (((x) >> I_V_OPAC) & I_M_OPAC)\r |
| 136 | #define I_V_IND 10 /* MRF: indirect */\r |
| 137 | #define I_IND (1 << I_V_IND)\r |
| 138 | #define I_M_MODE 03 /* MRF: mode */\r |
| 139 | #define I_V_MODE 8\r |
| 140 | #define I_GETMODE(x) (((x) >> I_V_MODE) & I_M_MODE)\r |
| 141 | #define I_M_DISP 0377 /* MRF: disp */\r |
| 142 | #define I_V_DISP 0\r |
| 143 | #define I_GETDISP(x) (((x) >> I_V_DISP) & I_M_DISP)\r |
| 144 | #define DISPSIZE (I_M_DISP + 1) /* page size */\r |
| 145 | #define DISPSIGN (DISPSIZE >> 1) /* page sign */\r |
| 146 | \r |
| 147 | #define I_M_IOT 07 /* IOT: code */\r |
| 148 | #define I_V_IOT 8\r |
| 149 | #define I_GETIOT(x) (((x) >> I_V_IOT) & I_M_IOT)\r |
| 150 | #define I_M_PULSE 03 /* IOT pulse */\r |
| 151 | #define I_V_PULSE 6\r |
| 152 | #define I_GETPULSE(x) (((x) >> I_V_PULSE) & I_M_PULSE)\r |
| 153 | #define I_M_DEV 077 /* IOT: device */\r |
| 154 | #define I_V_DEV 0\r |
| 155 | #define I_GETDEV(x) (((x) >> I_V_DEV) & I_M_DEV)\r |
| 156 | \r |
| 157 | #define I_M_XOP 037 /* XOP: code */\r |
| 158 | #define I_V_XOP 6\r |
| 159 | #define I_GETXOP(x) (((x) >> I_V_XOP) & I_M_XOP)\r |
| 160 | \r |
| 161 | /* IOT return codes */\r |
| 162 | \r |
| 163 | #define IOT_V_REASON 16 /* set reason */\r |
| 164 | #define IORETURN(f,v) ((f)? (v): SCPE_OK) /* stop on error */\r |
| 165 | \r |
| 166 | /* IOT fields */\r |
| 167 | \r |
| 168 | #define ioNIO 0 /* opcode field */\r |
| 169 | #define ioDIA 1\r |
| 170 | #define ioDOA 2\r |
| 171 | #define ioDIB 3\r |
| 172 | #define ioDOB 4\r |
| 173 | #define ioDIC 5\r |
| 174 | #define ioDOC 6\r |
| 175 | #define ioSKP 7\r |
| 176 | \r |
| 177 | #define iopN 0 /* pulse field */\r |
| 178 | #define iopS 1\r |
| 179 | #define iopC 2\r |
| 180 | #define iopP 3\r |
| 181 | \r |
| 182 | /* Device numbers */\r |
| 183 | \r |
| 184 | #define DEV_LOW 010 /* lowest intr dev */\r |
| 185 | #define DEV_HIGH 051 /* highest intr dev */\r |
| 186 | #define DEV_MDV 001 /* multiply/divide */\r |
| 187 | #define DEV_ECC 002 /* ECC memory control */\r |
| 188 | #define DEV_MAP 003 /* MMPU control */\r |
| 189 | #define DEV_TTI 010 /* console input */\r |
| 190 | #define DEV_TTO 011 /* console output */\r |
| 191 | #define DEV_PTR 012 /* paper tape reader */\r |
| 192 | #define DEV_PTP 013 /* paper tape punch */\r |
| 193 | #define DEV_CLK 014 /* clock */\r |
| 194 | #define DEV_PLT 015 /* plotter */\r |
| 195 | #define DEV_CDR 016 /* card reader */\r |
| 196 | #define DEV_LPT 017 /* line printer */\r |
| 197 | #define DEV_DSK 020 /* fixed head disk */\r |
| 198 | #define DEV_MTA 022 /* magtape */\r |
| 199 | #define DEV_DCM 024 /* data comm mux */\r |
| 200 | #define DEV_ADCV 030 /* A/D converter */\r |
| 201 | #define DEV_QTY 030 /* 4060 multiplexor */\r |
| 202 | #define DEV_DKP 033 /* disk pack */\r |
| 203 | #define DEV_CAS 034 /* cassette */\r |
| 204 | #define DEV_ALM 034 /* ALM/ULM multiplexor */\r |
| 205 | #define DEV_PIT 043 /* programmable interval timer */\r |
| 206 | #define DEV_TTI1 050 /* second console input */\r |
| 207 | #define DEV_TTO1 051 /* second console output */\r |
| 208 | #define DEV_CPU 077 /* CPU control */\r |
| 209 | \r |
| 210 | /* I/O structure\r |
| 211 | \r |
| 212 | The NOVA I/O structure is tied together by dev_table, indexed by\r |
| 213 | the device number. Each entry in dev_table consists of\r |
| 214 | \r |
| 215 | mask device mask for busy, done (simulator representation)\r |
| 216 | pi pi disable bit (hardware representation)\r |
| 217 | routine IOT action routine\r |
| 218 | \r |
| 219 | dev_table is populated at run time from the device information\r |
| 220 | blocks in each device.\r |
| 221 | */\r |
| 222 | \r |
| 223 | struct ndev {\r |
| 224 | int32 mask; /* done/busy mask */\r |
| 225 | int32 pi; /* assigned pi bit */\r |
| 226 | int32 (*routine)(); /* dispatch routine */\r |
| 227 | };\r |
| 228 | \r |
| 229 | typedef struct {\r |
| 230 | int32 dnum; /* device number */\r |
| 231 | int32 mask; /* done/busy mask */\r |
| 232 | int32 pi; /* assigned pi bit */\r |
| 233 | int32 (*routine)(); /* dispatch routine */\r |
| 234 | } DIB;\r |
| 235 | \r |
| 236 | /* Device flags (simulator representation)\r |
| 237 | \r |
| 238 | Priority (for INTA) runs from low numbers to high\r |
| 239 | */\r |
| 240 | \r |
| 241 | #define INT_V_PIT 2 /* PIT */\r |
| 242 | #define INT_V_DKP 3 /* moving head disk */\r |
| 243 | #define INT_V_DSK 4 /* fixed head disk */\r |
| 244 | #define INT_V_MTA 5 /* magnetic tape */\r |
| 245 | #define INT_V_LPT 6 /* line printer */\r |
| 246 | #define INT_V_CLK 7 /* clock */\r |
| 247 | #define INT_V_PTR 8 /* paper tape reader */\r |
| 248 | #define INT_V_PTP 9 /* paper tape punch */\r |
| 249 | #define INT_V_PLT 10 /* plotter */\r |
| 250 | #define INT_V_TTI 11 /* keyboard */\r |
| 251 | #define INT_V_TTO 12 /* terminal */\r |
| 252 | #define INT_V_TTI1 13 /* second keyboard */\r |
| 253 | #define INT_V_TTO1 14 /* second terminal */\r |
| 254 | #define INT_V_QTY 15 /* QTY multiplexor */\r |
| 255 | #define INT_V_ALM 16 /* ALM multiplexor */\r |
| 256 | #define INT_V_STK 17 /* stack overflow */\r |
| 257 | #define INT_V_NO_ION_PENDING 18 /* ion delay */\r |
| 258 | #define INT_V_ION 19 /* interrupts on */\r |
| 259 | #define INT_V_TRAP 20 /* trap instruction */\r |
| 260 | \r |
| 261 | #define INT_PIT (1 << INT_V_PIT)\r |
| 262 | #define INT_DKP (1 << INT_V_DKP)\r |
| 263 | #define INT_DSK (1 << INT_V_DSK)\r |
| 264 | #define INT_MTA (1 << INT_V_MTA)\r |
| 265 | #define INT_LPT (1 << INT_V_LPT)\r |
| 266 | #define INT_CLK (1 << INT_V_CLK)\r |
| 267 | #define INT_PTR (1 << INT_V_PTR)\r |
| 268 | #define INT_PTP (1 << INT_V_PTP)\r |
| 269 | #define INT_PLT (1 << INT_V_PLT)\r |
| 270 | #define INT_TTI (1 << INT_V_TTI)\r |
| 271 | #define INT_TTO (1 << INT_V_TTO)\r |
| 272 | #define INT_TTI1 (1 << INT_V_TTI1)\r |
| 273 | #define INT_TTO1 (1 << INT_V_TTO1)\r |
| 274 | #define INT_QTY (1 << INT_V_QTY)\r |
| 275 | #define INT_ALM (1 << INT_V_ALM)\r |
| 276 | #define INT_STK (1 << INT_V_STK)\r |
| 277 | #define INT_NO_ION_PENDING (1 << INT_V_NO_ION_PENDING)\r |
| 278 | #define INT_ION (1 << INT_V_ION)\r |
| 279 | #define INT_DEV ((1 << INT_V_STK) - 1) /* device ints */\r |
| 280 | #define INT_PENDING INT_ION+INT_NO_ION_PENDING\r |
| 281 | #define INT_TRAP (1 << INT_V_TRAP)\r |
| 282 | \r |
| 283 | /* PI disable bits */\r |
| 284 | \r |
| 285 | #define PI_PIT 0001000\r |
| 286 | #define PI_DKP 0000400\r |
| 287 | #define PI_DSK 0000100\r |
| 288 | #define PI_MTA 0000040\r |
| 289 | #define PI_LPT 0000010\r |
| 290 | #define PI_CLK 0000004\r |
| 291 | #define PI_PTR 0000020\r |
| 292 | #define PI_PTP 0000004\r |
| 293 | #define PI_PLT 0000010\r |
| 294 | #define PI_QTY 0000002\r |
| 295 | #define PI_ALM 0000002\r |
| 296 | #define PI_TTI 0000002\r |
| 297 | #define PI_TTO 0000001\r |
| 298 | #define PI_TTI1 PI_TTI\r |
| 299 | #define PI_TTO1 PI_TTO\r |
| 300 | /* #define PI_CDR 0000040 */\r |
| 301 | /* #define PI_DCM 0100000 */\r |
| 302 | /* #define PI_CAS 0000040 */\r |
| 303 | /* #define PI_ADCV 0000002 */\r |
| 304 | \r |
| 305 | \r |
| 306 | /* Macros to clear/set BUSY/DONE/INTR bits */\r |
| 307 | \r |
| 308 | #define DEV_SET_BUSY( x ) dev_busy = dev_busy | (x)\r |
| 309 | #define DEV_CLR_BUSY( x ) dev_busy = dev_busy & (~(x))\r |
| 310 | #define DEV_SET_DONE( x ) dev_done = dev_done | (x)\r |
| 311 | #define DEV_CLR_DONE( x ) dev_done = dev_done & (~(x))\r |
| 312 | #define DEV_UPDATE_INTR int_req = (int_req & ~INT_DEV) | (dev_done & ~dev_disable)\r |
| 313 | \r |
| 314 | #define DEV_IS_BUSY( x ) (dev_busy & (x))\r |
| 315 | #define DEV_IS_DONE( x ) (dev_done & (x))\r |
| 316 | \r |
| 317 | /* Function prototypes */\r |
| 318 | \r |
| 319 | int32 MapAddr (int32 map, int32 addr);\r |
| 320 | t_stat set_enb (UNIT *uptr, int32 val, char *cptr, void *desc);\r |
| 321 | t_stat set_dsb (UNIT *uptr, int32 val, char *cptr, void *desc);\r |
| 322 | \r |
| 323 | #endif\r |