| 1 | /* vax_syslist.c: VAX device list\r |
| 2 | \r |
| 3 | Copyright (c) 1998-2006, Robert M Supnik\r |
| 4 | \r |
| 5 | Permission is hereby granted, free of charge, to any person obtaining a\r |
| 6 | copy of this software and associated documentation files (the "Software"),\r |
| 7 | to deal in the Software without restriction, including without limitation\r |
| 8 | the rights to use, copy, modify, merge, publish, distribute, sublicense,\r |
| 9 | and/or sell copies of the Software, and to permit persons to whom the\r |
| 10 | Software is furnished to do so, subject to the following conditions:\r |
| 11 | \r |
| 12 | The above copyright notice and this permission notice shall be included in\r |
| 13 | all copies or substantial portions of the Software.\r |
| 14 | \r |
| 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r |
| 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\r |
| 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL\r |
| 18 | ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r |
| 19 | IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r |
| 20 | CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r |
| 21 | \r |
| 22 | Except as contained in this notice, the name of Robert M Supnik shall not be\r |
| 23 | used in advertising or otherwise to promote the sale, use or other dealings\r |
| 24 | in this Software without prior written authorization from Robert M Supnik.\r |
| 25 | \r |
| 26 | 17-May-06 RMS Added CR11/CD11 support (from John Dundas)\r |
| 27 | 01-Oct-04 RMS Cloned from vax_sys.c\r |
| 28 | */\r |
| 29 | \r |
| 30 | #include "vax_defs.h"\r |
| 31 | \r |
| 32 | char sim_name[] = "VAX780";\r |
| 33 | \r |
| 34 | extern DEVICE cpu_dev;\r |
| 35 | extern DEVICE tlb_dev;\r |
| 36 | extern DEVICE sbi_dev;\r |
| 37 | extern DEVICE mctl_dev[MCTL_NUM];\r |
| 38 | extern DEVICE uba_dev;\r |
| 39 | extern DEVICE mba_dev[MBA_NUM];\r |
| 40 | extern DEVICE clk_dev;\r |
| 41 | extern DEVICE tmr_dev;\r |
| 42 | extern DEVICE tti_dev, tto_dev;\r |
| 43 | extern DEVICE fl_dev;\r |
| 44 | extern DEVICE cr_dev;\r |
| 45 | extern DEVICE lpt_dev;\r |
| 46 | extern DEVICE rq_dev, rqb_dev, rqc_dev, rqd_dev;\r |
| 47 | extern DEVICE rl_dev;\r |
| 48 | extern DEVICE hk_dev;\r |
| 49 | extern DEVICE rp_dev;\r |
| 50 | extern DEVICE ry_dev;\r |
| 51 | extern DEVICE ts_dev;\r |
| 52 | extern DEVICE tq_dev;\r |
| 53 | extern DEVICE tu_dev;\r |
| 54 | extern DEVICE dz_dev;\r |
| 55 | extern DEVICE xu_dev, xub_dev;\r |
| 56 | \r |
| 57 | extern int32 sim_switches;\r |
| 58 | extern UNIT cpu_unit;\r |
| 59 | extern void WriteB (uint32 pa, int32 val);\r |
| 60 | extern void rom_wr_B (int32 pa, int32 val);\r |
| 61 | \r |
| 62 | DEVICE *sim_devices[] = { \r |
| 63 | &cpu_dev,\r |
| 64 | &tlb_dev,\r |
| 65 | &sbi_dev,\r |
| 66 | &mctl_dev[0],\r |
| 67 | &mctl_dev[1],\r |
| 68 | &uba_dev,\r |
| 69 | &mba_dev[0],\r |
| 70 | &mba_dev[1],\r |
| 71 | &clk_dev,\r |
| 72 | &tmr_dev,\r |
| 73 | &tti_dev,\r |
| 74 | &tto_dev,\r |
| 75 | &fl_dev,\r |
| 76 | &dz_dev,\r |
| 77 | &cr_dev,\r |
| 78 | &lpt_dev,\r |
| 79 | &rp_dev,\r |
| 80 | &rl_dev,\r |
| 81 | &hk_dev,\r |
| 82 | &rq_dev,\r |
| 83 | &rqb_dev,\r |
| 84 | &rqc_dev,\r |
| 85 | &rqd_dev,\r |
| 86 | &ry_dev,\r |
| 87 | &tu_dev,\r |
| 88 | &ts_dev,\r |
| 89 | &tq_dev,\r |
| 90 | &xu_dev,\r |
| 91 | &xub_dev,\r |
| 92 | NULL\r |
| 93 | };\r |
| 94 | \r |
| 95 | /* Binary loader\r |
| 96 | \r |
| 97 | The binary loader handles absolute system images, that is, system\r |
| 98 | images linked /SYSTEM. These are simply a byte stream, with no\r |
| 99 | origin or relocation information.\r |
| 100 | \r |
| 101 | -r load ROM0\r |
| 102 | -s load ROM1\r |
| 103 | -o for memory, specify origin\r |
| 104 | */\r |
| 105 | \r |
| 106 | t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)\r |
| 107 | {\r |
| 108 | t_stat r;\r |
| 109 | int32 val;\r |
| 110 | uint32 origin, limit;\r |
| 111 | \r |
| 112 | if (flag) return SCPE_ARG; /* dump? */\r |
| 113 | origin = 0; /* memory */\r |
| 114 | limit = (uint32) cpu_unit.capac;\r |
| 115 | if (sim_switches & SWMASK ('O')) { /* origin? */\r |
| 116 | origin = (int32) get_uint (cptr, 16, 0xFFFFFFFF, &r);\r |
| 117 | if (r != SCPE_OK) return SCPE_ARG;\r |
| 118 | }\r |
| 119 | \r |
| 120 | while ((val = getc (fileref)) != EOF) { /* read byte stream */\r |
| 121 | if (sim_switches & SWMASK ('R')) { /* ROM0? */\r |
| 122 | if (origin >= ROMSIZE) return SCPE_NXM;\r |
| 123 | rom_wr_B (ROM0BASE + origin, val);\r |
| 124 | }\r |
| 125 | else if (sim_switches & SWMASK ('S')) { /* ROM1? */\r |
| 126 | if (origin >= ROMSIZE) return SCPE_NXM;\r |
| 127 | rom_wr_B (ROM1BASE + origin, val);\r |
| 128 | }\r |
| 129 | else {\r |
| 130 | if (origin >= limit) return SCPE_NXM; /* NXM? */\r |
| 131 | WriteB (origin, val); /* memory */\r |
| 132 | }\r |
| 133 | origin = origin + 1;\r |
| 134 | }\r |
| 135 | return SCPE_OK;\r |
| 136 | }\r |
| 137 | \r |
| 138 | \r |