2 / VERSION 5A 4/26/77 MH
4 EXTERN #DISP /SYSTEM PAGE 0,NEEDED TO
5 /PUT CLOCK STATUS ON PG0
6 /(CSTAT) FOR USE BY GEN
7 /USER CLOCK SERVICE ROUTS
8 EXTERN #T812 /RTS CPTYP
9 EXTERN ONQI /INTERRUPT QUEUER
16 CSTAT=157 /IDOCLK PUTS CLSA BITS
21 JSA SETUP /HERE TO READ A STRIG
23 TRAP4 DOSYNC /FCNWD (XR) HOLDS STRIG
26 FSTA% FTMP1 /GIVE ANS TO CALLER
28 FTMP0, F 0.0 /BASE PAGE
30 RPTR, 27;ADDR RTBL /PTR TO RATE TBL, ALSO
31 /USED TO FLT OVRCNT (NOTE
32 /THAT THE EXPONENT=27)
33 MINRAT, F .02 /MIN ALLOWABLE RATE
41 RTBL, F 16.0 /CONSTANT USED TO CHK FOR
43 /THIS CONST MUST BE NE 0
45 F4096, F 4096.0 /USED TO GET OVRFLO COUNT
46 F 100000.0 /FASTEST RATE IN HERTZ
47 F 10000.0 /NEXT FASTEST RATE
50 F 1.0 /USED BY TIME FOR EXT CLK
53 SETUP, 0;0 /HERE TO INIT ALL FPP SUBS
55 FLDA 30 /PICK UP RTN TO CALLER
57 FLDA 0 /GET PTR TO CALLERS ARGS
58 SETX FCNWD /CLOCK XR AND BASE
63 FSTA FTMP0 /PTR TO 1ST ARG
65 FSTA FTMP1 /PTR TO 2ND ARG
66 FLDA #T812 /TELLS PDP8,PDP12
67 ATX CPTYP /0=8=DK8ES,1=12=KW12A
70 ATX FCNWD /ALWAYS IN FCNWD
73 CLOCK, JSA SETUP /HERE FOR CLOCK START
75 FSUB RTBL /FCNWD IS IN FAC,IF GE 16
76 JGE ITSEXT /(RTBL=16.0) THEN USER IS
77 /REQUESTING AN EXTERNAL
78 /CLOCK I.E. B8 OF FCNWD
80 FLDA% FTMP1 /=REQUESTED RATE IN HERTZ
81 FSUB MINRAT /.LE. MINUMUM RATE
82 JLE GOTR-2 /MEANS STOP CLOCK.
84 FSUB MAXRAT /CHK FOR TOO FAST
86 LDX -4,OVRFLO /THERE ARE 4 BASIC RATES
87 LDX 1,RATE /=INDEX INTO RTBL; UPON
91 /2-5=PROGRAMMABLE RATES
92 LOP0, FLDA% RPTR,RATE+
93 /GET NEXT SLOWEST RATE
94 FDIV% FTMP1 /=REQUESTED RATE IN HZ.
96 FSUB F4096 /MUST BE MODULO 12 BITS.
99 LDX 0,RATE /RATE IS TOO SLOW, STOP
101 GOTR, FADD F4096 /RESTORE
103 ATX OVRFLO /OVER FLOW COUNT
104 TRAP4 SETCLK /GO START CLOCK
105 JA GOBAK /RTN TO CALLER
106 ITSEXT, LDX 6,RATE /=RATE FOR EXT CLK
107 FLDA% FTMP1 /REQUESTED RATE IS
108 /INTERPRETED AS OVRFLO
109 JA GOTR+1 /WHEN RATE IS EXTERNAL
110 \f/MAGIC TABLE USED BY SETCLK TO SET CLOCK ENABLE
111 /BITS. EVEN NUMBERED ENTRIES ARE FOR THE DK8ES;
112 /ODD NUMBERED ONES ARE FOR THE KW12A.
114 CLKTBL, 0675 /"STANDARD" DK BITS
122 40 /DK ADC ON OVR BIT
123 400 /KW ADC ON OVR BIT
125 /IF NOT NEXT PAGE DO ORG
126 IFNEG .-200 < ORG .-SYNC&7600+200+SYNC >
127 \fSETCLK, 0 /TRAP HERE TO START CLK
128 /THIS ROUT HANDLES BOTH
130 CLLR /STOP KW AND SET MODE 0;
132 CLEN /CLR KW12 ENABLE OR
135 TAD P7540 /TOGGLE KW MODE 0 TO 1 TO
136 CLLR /CLR CLK COUNTER, OR SET
137 /DK ENABLE BITS, RATE FOR
138 CLA CMA /BOTH NOW=7=STOP.
139 CLZE /CLR ALL DK ENABLE BITS,
140 CLSA /CLR STATUS OF BOTH, ALL
142 TAD FCNTBL+1 /SET PTR TO CLKTBL FOR
143 /SETTING OF ENABLE REGS.
144 TAD CPTYP /=0 IF PDP8 =1 IF PDP12
145 DCA FCNPTR /TBL ENTRIES ALTERNATE
146 /FOR 8 AND 12. CPTYP SETS
147 /PTR TO 1ST 8 OR 1ST 12
149 TAD IDOCLK /(AC=JMP AROUND). THE
150 /FOLLOWING IS ONCE ONLY
151 /CODE. THESE LOCS ARE
152 /SUBSEQUENTLY USED AS
155 /THE TAG "ISVBIT" MUST BE
156 /IN FRONT OF THE STRIG
157 /FLAGS (STFLG) TO COVER
159 /STRIG 0 IN A FORT CALL
161 ISVBIT, TAD CPTYP /(AC=0,1) MAKE THE INST
162 /RAR CLL (FOR DK) OR THE
163 /INST RTR CLL FOR IDOCLK;
164 STFLG, RAL CLL /BECAUSE STATUS BITS FOR
165 TAD RARCLL /STRIGS DIFFER ON DK,KW.
166 DCA LOP2+1 /SEE SUB IDOCLK.
167 /THE ABOVE 3 LOCS ARE
168 /SCHMITT TRIGGER FLAGS.
169 /THE ORDER IS S1,S2,S3
170 /FOR PDP8 AND S3,S2,S1
172 /REASON FOR REVERSING
173 /THE ORDER IS BECAUSE
174 /ENGINEERS NEVER CONSULT
175 /PROGRAMMERS WHEN THEY
177 /HARDWARE (CHK THE STATUS
178 /BITS FOR DK AND KW).
179 JMS% KONQI+1 /PUT CLOCK ON THE
180 ITMP0, CLSK /INTERRUPT QUE
182 CLENAB, ADDR IDOCLK /THIS LOC WILL HOLD THE
183 /ENABLE BITS FOR DK,KW
184 AROUND, TAD RATE /(AC=0,2,3,4,5,6) RATE IS
186 RTR CLL /START TO POSITION RATE
187 RAR /BITS. B3-B5 FOR DK
189 TAD CPTYP /(THIS IS TRICKY) NEED
190 RAR /CPTYP IN LNK BECAUSE
191 /POSITION OF RATE BITS
193 TAD% FCNPTR /AC="STANDARD"
194 /ENABLE BITS FOR DK,KW.
195 SZL /IF ITS A KW THE RATE AND
196 /AND STND BITS ARE ALREADY
197 /POSITIONED AS FOLLOWS:
199 /B0-B3 AND B5 WILL GO TO
200 /KW CONTROL. B4,B5 WILL
201 /GO TO ENABLE. B3 IS ADC
202 /ON OVRFLO AND MAY BE SET
203 /BELOW. B5 ON CONTROL IS
204 /MODE 1. B4 AND B5 ON
205 /ENABLE ARE BUFF PRESET TO
206 /CLOCK COUNTER AND INTRUPT
207 /ON OVRFLO RESPECTIVELY.
208 JMP NOBIT-1 /ITS KW GO PUT IN CLENAB.
209 RTR /ITS DK; POSITION RATE TO
210 RAR /B3-B5. NOTE THAT THE LNK
211 /(CPTYP=0) IS BEING USED.
212 CMA /NOTE ALSO THAT THE RATE
213 /AND STND BITS ARE THE 1S
214 /COMP. OF WHAT THEY SHOULD
218 /PRESET TO CLK CNTR ON
219 /OVERFLO. LOOK AT THE RATE
220 /BITS IN THE HANDBOOK FOR
222 /FOR DK IS 100HZ, 100KHZ
223 /RESPECTIVELY. R2,R5 FOR
227 /THE FINAL VALUE OF THE
228 /STND DK ENABLE BITS (1ST
229 /ENTRY IN CLKTBL) IS LEFT
230 /AS AN EXERCISE FOR THE
232 JMP NOBIT-1 /GO PUT IN CLENAB
233 LOP1, RAR CLL /ROT 1 FCN BIT INTO LNK.
235 /IGNORED HERE. B8=ADC ON
236 /OVRFLO, B9-B11 ARE STRIG3
237 /-STRIG1 RESP. BX=1=ENABLE
239 DCA FCNWD /PUT IT BACK (FCNWD IS
243 TAD% FCNPTR /GET BITS FROM THE MAGIC
245 DCA CLENAB /UPDATE ENABLE WORD.
246 NOBIT, ISZ FCNPTR /ADV TO NEXT
247 ISZ FCNPTR /TBL ENTRY.
248 TAD FCNWD /WHEN FCNWD GOES TO 0
249 AND P17 /WE ARE ALL DONE.
250 /THE "AND" IS DONE TO
251 /PROTECT AGAINST A BAD
252 /ARG FROM THE FORT CALL.
253 /IN A FRIENDLY ENIVORN,
255 /NEVER TRUST A FORTRAN
257 P7540, SMA SZA /SMA IS SUPERFLOUS TO
259 /CREATES A NICE CONST.
261 DCA STFLG /CLR THE SCHMITT
262 DCA STFLG+1 /TRIGGER FLAGS.
264 TAD OVRFLO /SET BUFF PRESET
265 CIA /(FPP SET THIS ARG)
268 TAD CLENAB /THIS IS FOR KW ONLY.
269 AND P377 /AC=3XX. 3= OR BUFF PRE
270 /INTO CLK CNTR AND ENAB
273 CLEN /SET KW ENABLE OR
275 DCA OVRCNT+1 /CLR NUM OF CLK OVRFLOS
276 DCA OVRCNT /SINCE TIME 0.
277 TAD CPTYP /NEED TYPE IN ORDER TO
278 RARCLL, RAR CLL /ISOLATE CONTROL
281 AND P7540 /YES, B0-B2 IS RATE,
282 /B3 IS ADC, B5 IS BUFF
284 /OVRFLO, B6 IS MOX NIX.
285 /IF DK ALL BITS MAY HAVE
287 CLLR /START THE CLOCK
290 JMP% SETCLK /RTN TO RTS
291 \fDOSYNC, 0 /HERE TO DISPOSITION A
293 TAD CPTYP /DK AND KW FLAGS ARE IN
294 RAR CLL /REVERSE ORDER. IF DK
295 /ARG IS OK; IF KW THEN
296 /MUST SET 1=3, 2=2, 3=1
299 TAD FCNWD /=REQUESTED STRIG=1,2,3
303 AND P3 /IE 1 GOES TO -1 GOES
304 /TO 3 ETC. "AND" ALSO
305 /INSURES RANGE IS 0-3.
306 /IF ARG IS 0 RESULT IS
308 TAD KSTFLG+1 /GET PTR TO FLAG
310 TAD% SETCLK /FLAG=0 IF TRIG HAS NOT
311 /TRIPPED SINCE THE LAST
313 /OTHERWISE IE RTN 0=FALSE
314 DCA FCNWD /,1=TRUE (FPP WILL PICK
316 DCA% SETCLK /CLR FLAG ANYWAY
318 JMP% DOSYNC /RTN TO RTS
319 \fIDOCLK, JMP AROUND /HERE ON CLOCK INTERRUPT
320 /(JMP AROUND IS A ONCE
322 TAD KSTFLG+1 /SET PTR TO STRIG FLAGS.
324 CLSA /GET CLOCK BITS.
325 DCAZ CSTAT /SAVE THEM FOR SOME
326 TADZ CSTAT /BODY ELSE.
328 ISZ OVRCNT+1 /YES BUMP LO ORD CNTR
330 ISZ OVRCNT /BUMP HI ORD
331 JMP DOTRIG /(HI ORD ISZ SKP IS
333 LOP2, ISZ ITMP0 /ADV STRIG FLAG PTR.
334 RAR CLL /(OR RTR CLL IF KW)
335 /IE PUT STRIG BIT IN LNK.
337 /INTERROGATION IS S1,S2,S3
338 /IF KW THE ORDER IS S3,
339 /S2,S1. THE STATUS BITS
340 /FOR DK ARE ADJACENT IE
341 / B9(S3),B10(S2),B11(S1)
342 /FOR KW ITS EVERY OTHER,
343 /B6(S1),B8(S2),B10(S3).
344 DCA ISVBIT /SAVE WHATS LEFT.
345 RAL /COPY LNK INTO FLAG IF=1
346 SZA /IE DONT CLR FLAG WHEN
349 DOTRIG, AND P377 /THE "AND" INSURES THAT
351 /CLRED SO THAT ISVBIT
355 /CLR OVRFLO BIT FOR DK,KW
356 /AND CLR PRE-EVENT BIT
360 TAD #CLINT /CALL USER EXTENDED
361 SZA CLA /CLOCK ROUT ?
363 JMP% IDOCLK /RTN TO IHANDL
379 ENTRY TIME /FIGURE WHAT TIME IT IS
381 FLDA RPTR /=27;X;X IS USED TO FLOAT
383 FLDA# OVRCNT /NUM OF CLK OVRFLOS SINCE
386 FMUL TOVR /=NUM OF BASIC TICKS PER
388 /FAC=NUM OF TICKS SINCE
390 FDIV% RPTR,RATE /DIV BY BASIC RATE IN HZ
391 /OR 1 IF EXTERNAL CLK.
392 FSTA% FTMP0 /GIVE ANS TO CALLER, ALSO
395 /CALL. ANS=ELAPSED TIME IN
396 /SECONDS SINCE TIME 0 OR
397 /NUM OF EXTERNAL UNIT