1 SIMH/HP 21XX DIAGNOSTICS PERFORMANCE
2 ====================================
3 Last update: 2008-05-10
6 The HP 24396 diagnostic suite has been run against the SIMH HP 21xx simulation.
7 Diagnostic programs were obtained from two magnetic tapes, HP 24396-13601 Rev.
8 1713 and Rev. 2326, plus a few standalone paper tapes. For each diagnostic, the
9 recommended standard tests were selected, plus any available optional tests that
10 broadened the test coverage.
12 Except where noted in the individual diagnostic reports, the test system
13 configuration is the default SIMH configuration with these alterations:
15 * All I/O devices are enabled.
16 * The CPU is configured as a 1000-E with 128KW of memory.
18 Detailed diagnostic configuration, operation, and results are given after the
19 summary table. These may be used to duplicate the diagnostic results.
22 The results of the diagnostic runs are summarized below:
25 DSN Diagnostic Name Code Vers. Result
26 ------ --------------------------------------- ---- ----- -------------
27 000200 Diagnostic Configurator Pretest 1627 3.2-3 Passed
29 101100 Memory Reference Instruction Group 1624 3.2-3 Passed
30 101001 Alter-Skip Instruction Group 1431 3.2-3 Passed
31 101002 Shift-Rotate Instruction Group 1431 3.2-3 Passed
32 102200 Core Memory (2100/16/15/14) 1624 3.3-0 Passed
33 102104 Semiconductor Memory (21MX) 1644 3.2-3 Passed
35 101004 EAU Instruction Group 1431 3.2-3 Passed
36 101207 Floating Point Instruction Group 1551 3.2-3 Passed
37 102001 Memory Protect 1431 3.7-0 Passed
38 102002 Memory Parity Check 1431 - No simulation
39 102305 Memory Protect/Parity Error 1705 3.3-0 Partial
41 101206 Power Fail/Auto Restart 1635 - No simulation
42 141203 I/O Instruction Group - I/O Extender 2326 3.2-3 Passed
43 143300 General Purpose Register 1813 3.2-3 Passed
44 101105 Direct Memory Access (2114/15/16) 1502 3.7-0 Passed
45 101220 Direct Memory Access (2100/21MX) 1705 3.2-3 Passed
47 101011 Extended Instruction Group (Index) 1432 3.2-3 Passed
48 101112 Extended Instruction Group (Word, Byte) 1728 3.2-3 Passed
49 101110 2100 Fast FORTRAN Package 1632 3.4-0 Partial
50 101213 M/E-Series Fast FORTRAN Package 1 1822 3.4-0 Passed
51 101114 M/E-Series Fast FORTRAN Package 2 1632 3.4-0 Passed
52 101121 F-Series FPP/SIS/FFP 1926 3.7-0 Passed
53 101016 2000/Access Comm Processor for 2100 1526 3.2-3 Partial
55 102103 Memory Expansion Unit 1830 3.2-3 Passed
56 102103 Semiconductor Memory Microcoded 21MX 1644 - No simulation
57 103301 Time Base Generator 1830 3.2-3 Passed
58 103115 12936 Privileged Interrupt 1643 - No simulation
59 103105 12908/12978 WCS 256 Word 1502 - No simulation
60 103023 13197 WCS 1024 Word 1640 - No simulation
61 103207 12889 Hardwired Serial Interface 1717 - No simulation
62 103122 59310 Interface Bus Interface 1728 - No simulation
64 103003 12587 Asynchronous Data Set Interface 1552 - No simulation
65 103110 12920 Asynchronous Multiplexer (Data) 1805 3.7-1 Passed
66 103011 12920 Asynchronous Multiplexer (Cntl) 1444 3.7-1 Passed
67 103012 12621 Synchronous Data Set (Receive) 1532 - No simulation
68 103013 12622 Synchronous Data Set (Send) 1532 - No simulation
69 103116 12967 Synchronous Interface 1438 - No simulation
70 103017 12966 Asynchronous Data Set 1519 3.8-0 Passed
71 103121 12968 Asynchronous Comm. Interface 1602 - No simulation
72 103024 12821 ICD Disc Interface 1928 - No simulation
74 104000 2600 Keyboard Display Terminal 1615 - No simulation
75 104003 Teleprinter 1509 3.2-3 Partial
76 144105 2762A/B Terminal (Terminet) 1546 - No simulation
77 104007 2615 Video Terminal 1347 - No simulation
78 104011 2640 Interactive Terminal 1502 - No simulation
79 104012 2644 Mini Data Station (non CTU) 1542 - No simulation
80 104013 2644 Mini Data Station (CTU Only) 1542 - No simulation
81 104017 92900 Terminal Subsystem (3070, 40280) 1643 - No simulation
83 105000 2610/14 Line Printer 1451 - No simulation
84 105101 2767 Line Printer 1611 3.3-0 Passed
85 105102 2607 Line Printer 1446 3.3-0 Passed
86 145103 2613/17/18 Line Printer 1633 - No simulation
87 105104 9866 Line Printer 1541 - No simulation
88 105106 2631 Printer 1913 - No simulation
89 105107 2635 Printing Terminal 1913 - No simulation
90 105105 2608 Line Printer 2026 - No simulation
92 111001 Disc File (2883) 1451 3.3-0 Partial
93 111104 12732 Flexible Disc Subsystem 1708 - No simulation
94 151302 7900/01 Cartridge Disc 1805 3.2-3 Partial
95 151403 7905/06/20/25 Disc 1805 3.3-1 Partial
96 104117 92900 Terminal Subsystem 1814 - No simulation
98 112200 9-Track Magnetic Tape (7970, 13181/3) 2040 3.2-3 Partial
99 112102 7/9-Track Magnetic Tape (13184 Interf.) 1629 - No simulation
100 010000 Diagnostic Cross Link 1627 - No simulation
101 011000 7900/05/20 Disc Initialization 1627 - No simulation
102 146200 Paper Tape Reader/Punch 1725 3.2-3 Passed
103 107000 Digital Plotter Interface (CALCOMP) 1540 - No simulation
104 113100 2892 Card Reader 1537 - No simulation
105 113001 2894 Card Reader Punch 1728 - No simulation
106 113003 7261 Card Reader 1546 - No simulation
107 103006 12909B PROM Writer 1420 - No simulation
110 The following stand-alone diagnostics were run for devices not supported by the
114 Part Number DSN Diagnostic Name Code Vers. Result
115 ----------- ------ ------------------------------------ ---- ----- ----------
116 13207-16001 101217 2000/Access Comm Processor for 21MX 1728 3.2-3 Passed
117 20433-????? -- HP 3030 Magnetic Tape Subsystem -- - Not tested
118 22682-16017 177777 HP 2100 Fixed Head Disc/Drum (277x) 1612 3.3-0 Passed
119 24197-60001 -- 12875 Processor Interconnect Cable B 3.7-1 Passed
120 24203-60001 -- HP2100A Cartridge Disc Memory (2871) A 3.3-0 Partial
123 The following online diagnostics were run for devices not supported by the
127 Part Number Diagnostic Name Code Op. Sys. Code Vers. Result
128 ----------- ------------------------------- ---- -------- ---- ----- ----------
129 92067-16013 Extended Memory Area Firmware 1805 RTE-IVB 5010 3.8-0 Passed
130 92084-16423 Virtual Memory Area Firmware 2121 RTE-6/VM 6200 3.8-0 Passed
131 12824-16002 Vector Instruction Set Firmware 2026 RTE-IVB 5010 3.8-0 Passed
132 12829-16006 Vector Instruction Set Firmware 2226 RTE-6/VM 6200 3.8-0 Passed
133 92835-16006 SIGNAL/1000 Firmware Diagnostic 2040 RTE-6/VM 6200 3.8-0 Passed
136 The "SIMH Version" is the version number of the earliest SIMH system that was
137 tested with the given diagnostic. Earlier versions may or may not work
140 The "Result" column indicates the level of success in passing the given
144 ------------- ---------------------------------------------------------------
145 Passed All of the standard tests relevant to the hardware model passed
146 without error. Optional "utility" tests, where present, were
147 not run unless they broadened the test coverage.
149 Partial One or more of the standard tests relevant to the hardware
150 model were either excluded or failed as expected, due to known
151 limitations in the simulation, e.g., the lack of "defective
152 cylinder" flags in a disc simulation.
154 Failed One or more of the standard tests relevant to the hardware
155 model failed unexpectedly.
157 Not tested The diagnostic has not been run with the device simulation.
159 No simulation A simulation of the given device does not exist.
161 See the "Test Notes" associated with each diagnostic report below for details on
162 subsets, limitations, or errors encountered.
166 24396 DIAGNOSTIC SUITE DETAILED EXECUTION AND RESULTS
167 =====================================================
169 Each execution note below presumes that the target diagnostic has been loaded.
170 For all runs other than the diagnostic configurator pretest, the configurator
171 was used in automatic mode to load the target diagnostic via its Diagnostic
172 Serial Number (DSN), as follows:
174 sim> attach -r MSC0 24396-13601_Rev-2326.abin.tape
175 sim> deposit S 000000
178 HALT instruction 102077
181 sim> deposit B 000000
182 sim> deposit S 113011
186 For the pretest, only the first three commands above were used to load the
187 diagnostic configurator.
191 --------------------------------------------
192 DSN 000200 - Diagnostic Configurator Pretest
193 --------------------------------------------
195 TESTED DEVICE: CPU (hp2100_cpu.c)
197 CONFIGURATION: sim> deposit S 000011
201 TEST REPORT: HALT instruction 102077
207 -----------------------------------------------
208 DSN 101100 - Memory Reference Instruction Group
209 -----------------------------------------------
211 TESTED DEVICE: CPU (hp2100_cpu.c)
213 CONFIGURATION: sim> deposit S 000000
217 TEST REPORT: HALT instruction 102077
223 ------------------------------------
224 DSN 101001 - Alter-Skip Instructions
225 ------------------------------------
227 TESTED DEVICE: CPU (hp2100_cpu.c)
229 CONFIGURATION: sim> deposit S 000000
233 TEST REPORT: HALT instruction 102077
239 --------------------------------------
240 DSN 101002 - Shift-Rotate Instructions
241 --------------------------------------
243 TESTED DEVICE: CPU (hp2100_cpu.c)
245 CONFIGURATION: sim> deposit S 000000
249 TEST REPORT: HALT instruction 102077
255 ----------------------------------------
256 DSN 102200 - Core Memory (2100/16/15/14)
257 ----------------------------------------
259 TESTED DEVICE: CPU (hp2100_cpu.c)
261 CONFIGURATION: sim> set CPU 2100
264 sim> deposit S 000000
268 TEST REPORT: HALT instruction 102077
274 ---------------------------------
275 DSN 102104 - Semiconductor Memory
276 ---------------------------------
278 TESTED DEVICE: CPU (hp2100_cpu.c)
280 CONFIGURATION: sim> deposit S 001000
284 HALT instruction 102075
286 sim> deposit A 054777
287 sim> deposit S 000000
291 TEST REPORT: HALT instruction 102077
295 TEST NOTES: The standard tests 00-10, plus optional tests 13, 14, and 16 are
300 ----------------------------------
301 DSN 101004 - EAU Instruction Group
302 ----------------------------------
304 TESTED DEVICE: CPU (hp2100_cpu1.c)
306 CONFIGURATION: sim> deposit S 000000
310 TEST REPORT: 2100 SERIES EAU DIAGNOSTIC
313 HALT instruction 102077
319 ---------------------------------------------
320 DSN 101207 - Floating Point Instruction Group
321 ---------------------------------------------
323 TESTED DEVICE: CPU (hp2100_cpu2.c)
325 CONFIGURATION: sim> deposit S 000000
329 TEST REPORT: 2100-21MX FLOATING POINT DIAGNOSTIC
332 HALT instruction 102077
338 ---------------------------
339 DSN 102001 - Memory Protect
340 ---------------------------
342 TESTED DEVICE: MP (hp2100_cpu.c)
344 CONFIGURATION: sim> set CPU 2100
347 sim> deposit S 000000
351 TEST REPORT: HP 2100 SERIES MEMORY PROTECT DIAGNOSTIC
352 H07. PRESS PRESET (EXT/INT), RUN
354 HALT instruction 102007
359 H13. PRESS HALT, PRESET(INT), RUN
370 HALT instruction 102077
376 ----------------------------------------
377 DSN 102305 - Memory Protect/Parity Error
378 ----------------------------------------
380 TESTED DEVICE: MP (hp2100_cpu.c)
382 CONFIGURATION: sim> set LPS diag
383 sim> deposit S 140014
387 HALT instruction 102074
389 sim> deposit S 001000
393 MEMORY PROTECT-PARITY ERROR DIAGNOSTIC
395 HALT instruction 102075
397 sim> deposit A 035777
398 sim> deposit S 000000
402 TEST REPORT: H061 POWER DOWN COMPUTER
403 INSTALL JUMPERS PER TABLE 3-5 IN MOD
406 HALT instruction 102061
408 sim> set MP jsbout,intout,sel1in
411 H314 PRESS HALT,PRESET AND RUN WITHIN 30 SECONDS
421 H062 POWER DOWN COMPUTER
422 SET JUMPERS TO INITIAL SETTINGS
426 HALT instruction 102062
428 sim> set MP jsbin,intin,sel1out
431 HALT instruction 102077
433 TEST RESULT: Partially passed.
435 TEST NOTES: Test 10 is not executed. This test verifies parity error
436 detection. This feature is not simulated.
440 ----------------------------------
441 DSN 141103 - I/O Instruction Group
442 ----------------------------------
444 TESTED DEVICE: CPU (hp2100_cpu.c)
446 CONFIGURATION: sim> set LPS diag
447 sim> deposit S 000014
451 HALT instruction 102074
453 sim> deposit S 000000
457 TEST REPORT: I-O INSTRUCTION GROUP & CHANNEL OR
458 EXTENDER DIAGNOSTIC DSN 141103
459 H033 SET S-REG TO 125252, PRESS RUN
461 HALT instruction 102033
463 sim> deposit S 125252
466 H033 SET S-REG TO 052525, PRESS RUN
468 HALT instruction 102033
470 sim> deposit S 052525
473 H024 PRESS PRESET (EXT&INT),RUN
475 HALT instruction 102024
482 HALT instruction 102077
488 -------------------------------------
489 DSN 143300 - General Purpose Register
490 -------------------------------------
492 TESTED DEVICE: LPS (hp2100_lps.c)
494 CONFIGURATION: sim> set LPS diag
495 sim> deposit S 000014
499 HALT instruction 102074
501 sim> deposit S 000000
505 TEST REPORT: GENERAL PURPOSE REGISTER DIAGNOSTIC, DSN 143300
506 H024 PRESS PRESET (EXT&INT),RUN
508 HALT instruction 102024
513 H025 BASIC I-O COMPLETED
517 HALT instruction 102077
523 ----------------------------------------------
524 DSN 101105 - Direct Memory Access (2114/15/16)
525 ----------------------------------------------
527 TESTED DEVICE: DMA0/DMA1 (hp2100_cpu.c)
529 CONFIGURATION: sim> set CPU 2116
533 sim> deposit S 000014
537 HALT instruction 102074
539 sim> deposit S 040000
543 TEST REPORT: H0. START DMA DIAGNOSTIC
545 HALT instruction 102027
552 HALT instruction 102077
558 ---------------------------------------------
559 DSN 101220 - Direct Memory Access (2100/21MX)
560 ---------------------------------------------
562 TESTED DEVICE: DCPC0/DCPC1 (hp2100_cpu.c)
564 CONFIGURATION: sim> set LPS diag
565 sim> deposit S 000014
569 HALT instruction 102074
571 sim> deposit S 000000
575 TEST REPORT: DMA-DCPC DIAGNOSTIC
577 H324 PRESS PRESET AND RUN
579 HALT instruction 107024
586 HALT instruction 102077
592 -----------------------------------------------
593 DSN 101011 - Extended Instruction Group (Index)
594 -----------------------------------------------
596 TESTED DEVICE: CPU (hp2100_cpu2.c)
598 CONFIGURATION: sim> deposit S 000000
602 TEST REPORT: EIG (INDEX) DIAGNOSTIC
605 HALT instruction 102077
611 ---------------------------------------------------------
612 DSN 101112 - Extended Instruction Group (Word, Byte, Bit)
613 ---------------------------------------------------------
615 TESTED DEVICE: CPU (hp2100_cpu2.c)
617 CONFIGURATION: sim> set LPS diag
618 sim> deposit S 000014
622 HALT instruction 102074
624 sim> deposit S 000000
628 TEST REPORT: EIG (WORD,BYTE,BIT) DIAGNOSTIC DSN 101112
631 HALT instruction 102077
637 --------------------------------------
638 DSN 101110 - 2100 Fast FORTRAN Package
639 --------------------------------------
641 TESTED DEVICE: CPU (hp2100_cpu3.c)
643 CONFIGURATION: sim> set CPU 2100
647 sim> deposit S 000013
651 HALT instruction 102074
653 sim> deposit S 000000
657 TEST REPORT: START 2100A-S FFP DIAGNOSTIC
668 E142 NOT INTERRUPTIBLE
670 HALT instruction 106042
678 E162 NOT INTERRUPTIBLE
680 HALT instruction 106062
689 HALT instruction 102077
691 TEST RESULT: Partially passed.
693 TEST NOTES: Tests 07 and 11 test the interruptibility of the .XADD and .XMPY
694 instructions. These features are not simulated.
698 ----------------------------------------------
699 DSN 101213 - M/E-Series Fast FORTRAN Package 1
700 ----------------------------------------------
702 TESTED DEVICE: CPU (hp2100_cpu3.c)
704 CONFIGURATION: sim> set CPU FFP
707 sim> deposit S 000014
711 HALT instruction 102074
713 sim> deposit S 000000
717 TEST REPORT: START 21MX FFP DIAGNOSTIC 1
733 HALT instruction 102077
739 ----------------------------------------------
740 DSN 101114 - M/E-Series Fast FORTRAN Package 2
741 ----------------------------------------------
743 TESTED DEVICE: CPU (hp2100_cpu3.c)
745 CONFIGURATION: sim> set CPU FFP
748 sim> deposit S 000014
752 HALT instruction 102074
754 sim> deposit S 000000
758 TEST REPORT: START 21MX FFP DIAGNOSTIC 2
773 HALT instruction 102077
779 ---------------------------------
780 DSN 101121 - F-Series FPP/SIS/FFP
781 ---------------------------------
783 TESTED DEVICE: CPU (hp2100_cpu3.c)
785 CONFIGURATION: sim> set CPU 1000-F
788 sim> deposit S 000014
792 HALT instruction 102074
794 sim> deposit S 000000
798 TEST REPORT: FPP-SIS-FFP DIAGNOSTIC DSN 101121
799 BEGIN BASIC CONTROL TEST
809 END BASIC CONTROL TEST
828 HALT instruction 102077
834 ------------------------------------------------
835 DSN 101016 - 2000/Access Comm Processor for 2100
836 ------------------------------------------------
838 TESTED DEVICE: CPU (hp2100_cpu2.c)
840 CONFIGURATION: sim> set CPU 2100
844 sim> deposit S 000013
848 HALT instruction 102074
850 sim> deposit S 000000
854 TEST REPORT: 2100 2000-ACCESS COMM. PROC. FIRMWARE DIAGNOSTIC
856 H040 ENQ, DEQ AND PENQ TESTS
858 H110 READF, SAVE AND RESTR TESTS
859 H120 LAI AND SAI TESTS
863 H160 STORE-LOAD BYTE, TRSLT
867 E165 TRSLT NOT INTERRUPTIBLE
869 HALT instruction 106065
876 E234 WORD MOVE NOT INTERRUPTIBLE
878 HALT instruction 103034
884 HALT instruction 102077
886 TEST RESULT: Partially passed.
888 TEST NOTES: Tests 10 and 11 test the interruptibility of the TRSLT and MWORD
889 instructions. These features are not simulated.
893 ----------------------------------
894 DSN 102103 - Memory Expansion Unit
895 ----------------------------------
897 TESTED DEVICE: CPU (hp2100_cpu2.c)
899 CONFIGURATION: sim> set LPS diag
900 sim> deposit S 000014
904 HALT instruction 102074
906 sim> deposit S 001000
910 MEMORY EXPANSION MODULE DIAGNOSTIC, DSN = 102103
912 HALT instruction 102075
914 sim> deposit A 177777
915 sim> deposit B 000037
916 sim> deposit S 000000
920 TEST REPORT: H115 PRESS HALT-PRESET-RUN IN LESS THAN 10 SECONDS
928 H117 PRESET TEST COMPLETE
929 H327 00128K OF CONTIGUOUS MEMORY INSTALLED
930 H024 PRESS PRESET, RUN
932 HALT instruction 102024
940 HALT instruction 102077
944 TEST NOTES: The standard tests 00-22 plus optional tests 23 and 24 are
947 Test 25 (Register Crusher Test) is not executed. This test is
948 designed specifically for the RAM chips present on the hardware
949 and isn't relevant to simulation.
951 Test 23 cannot be run with more than 256K of memory, or the
952 diagnostic will be corrupted. There is a fixed-size table in
953 revision 1830 that overflows if memory size is greater than
958 --------------------------------
959 DSN 103301 - Time Base Generator
960 --------------------------------
962 TESTED DEVICE: CLK (hp2100_stddev.c)
964 CONFIGURATION: sim> set CLK diag
965 sim> deposit S 100013
969 HALT instruction 102074
971 sim> deposit S 000000
975 TEST REPORT: TBG DIAGNOSTIC, DSN = 103301
976 H024 PRESS PRESET (EXT&INT),RUN
978 HALT instruction 102024
984 H030 TEST 01 IN PROGRESS
985 H030 TEST 02 IN PROGRESS
986 H030 TEST 03 IN PROGRESS
987 H030 TEST 04 IN PROGRESS
988 H030 TEST 05 IN PROGRESS
989 H030 TEST 06 IN PROGRESS
990 H030 TEST 07 IN PROGRESS
991 H030 TEST 10 IN PROGRESS
992 H030 TEST 11 IN PROGRESS
993 H030 TEST 12 IN PROGRESS
996 HALT instruction 102077
1002 ---------------------------------------------------
1003 DSN 103110 - 12920A Asynchronous Multiplexer (Data)
1004 ---------------------------------------------------
1006 TESTED DEVICE: MUX, MUXL (hp2100_mux.c)
1008 CONFIGURATION: sim> set MUX DIAG
1009 sim> deposit S 004040
1013 HALT instruction 102074
1015 sim> deposit S 000000
1019 TEST REPORT: ASYNC MULTIPLEXER DATA BOARD DIAGNOSTIC DSN 103110
1020 H024 PRESS PRESET (EXT&INT),RUN
1022 HALT instruction 102024
1030 HALT instruction 102077
1032 TEST RESULT: Passed.
1036 ---------------------------------------------------
1037 DSN 103011 - 12920A Asynchronous Multiplexer (Cntl)
1038 ---------------------------------------------------
1040 TESTED DEVICE: MUXM (hp2100_mux.c)
1042 CONFIGURATION: sim> set MUX DIAG
1043 sim> deposit S 004042
1047 HALT instruction 102074
1049 sim> deposit S 000000
1053 TEST REPORT: ASYNC MULTIPLEXER CONTROL BOARD DIAGNOSTIC
1054 H024 PRESS PRESET (EXT&INT),RUN
1056 HALT instruction 102024
1064 HALT instruction 102077
1066 TEST RESULT: Passed.
1070 ----------------------------------------
1071 DSN 103017 - 12966 Asynchronous Data Set
1072 ----------------------------------------
1074 TESTED DEVICE: BACI (hp2100_baci.c)
1076 CONFIGURATION: sim> set BACI realtime
1078 sim> deposit S 000035
1082 HALT instruction 102074
1084 sim> deposit S 000000
1088 TEST REPORT: BUFFERED ASYNC COMM INTFC DIAG
1089 H024 PRESS PRESET (EXT&INT),RUN
1091 HALT instruction 102024
1099 TEST RESULT: Passed.
1103 ------------------------
1104 DSN 104003 - Teleprinter
1105 ------------------------
1107 TESTED DEVICE: TTY (hp2100_stddev.c)
1109 CONFIGURATION: sim> deposit S 000011
1113 HALT instruction 102074
1115 sim> deposit S 001000
1119 START TTY DIAGNOSTIC
1121 HALT instruction 102075
1123 sim> deposit A 000373
1124 sim> deposit S 000000
1128 TEST REPORT: H024 PRESS PRESET (EXT&INT),RUN
1130 HALT instruction 102024
1136 H030 TURN TTY PUNCH ON
1139 HALT instruction 102030
1141 sim> attach TTY2 scratch.2752.punch
1144 H045 TURN TTY PUNCH OFF
1147 HALT instruction 102045
1150 sim> deposit S 100000
1153 HALT instruction 102076
1157 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_
1158 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_
1159 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_
1160 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_
1161 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_
1162 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_
1163 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_
1164 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_
1165 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_
1166 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_
1168 HALT instruction 102076
1170 sim> set console WRU=003
1173 INPUT THE FOLLOWING:
1174 1 2 3 4 5 6 7 8 9 0 : -
1183 ! " # $ % & ' ( ) * =
1188 WRU TAPE NTAP XOFF EOT RU BELL TAB VT FORM
1194 HALT instruction 102076
1196 sim> set console WRU=005
1200 T H I S 040 I S 040 A 040
1206 sim> deposit S 000002
1212 sim> deposit S 000000
1215 H044 INPUT TERMINATED
1217 ECHO MODE ANY INPUT IS ECHOED
1223 sim> deposit S 000002
1229 sim> deposit S 100000
1232 H044 INPUT TERMINATED
1234 HALT instruction 102076
1236 sim> deposit TTY TTIME 158000
1237 sim> deposit S 000000
1242 HALT instruction 102077
1244 TEST RESULT: Partially passed.
1246 TEST NOTES: Test 2 is not executed. This test uses the teleprinter paper
1247 tape reader. This feature is not simulated.
1249 Test 7 is the oscillator tolerance test, so the TTY TTIME is set
1250 for realistic timing.
1254 ------------------------------
1255 DSN 105101 - 2767 Line Printer
1256 ------------------------------
1258 TESTED DEVICE: LPS (hp2100_lps.c)
1260 CONFIGURATION: sim> set LPS realtime
1261 sim> attach LPS scratch.2767.printer
1262 sim> deposit S 000014
1266 HALT instruction 102074
1268 sim> deposit S 000000
1272 TEST REPORT: 2767 L.P. DIAGNOSTIC
1273 H024 PRESS PRESET (EXT&INT),RUN
1275 HALT instruction 102024
1281 H035 TURN OFF L.P. POWER
1283 HALT instruction 102035
1285 sim> set LPS poweroff
1288 H036 TURN ON L.P. POWER
1290 HALT instruction 102036
1292 sim> set LPS poweron
1295 H033 PUT L.P. ON-LINE
1297 HALT instruction 102033
1302 H034 MASTER CLEAR L.P.
1304 HALT instruction 102034
1306 sim> set LPS offline
1309 H033 PUT L.P. ON-LINE
1311 HALT instruction 102033
1316 H040 PUT L.P. OFF-LINE. TOGGLE TOP-OF-FORM SWITCH
1318 HALT instruction 102040
1320 sim> set LPS offline
1323 H033 PUT L.P. ON-LINE
1325 HALT instruction 102033
1330 H041 PUT L.P. OFF-LINE. TOGGLE PAPER-STEP 5 TIMES
1332 HALT instruction 102041
1334 sim> set LPS offline
1337 H033 PUT L.P. ON-LINE
1339 HALT instruction 102033
1346 HALT instruction 102077
1348 TEST RESULT: Passed.
1350 TEST NOTES: The simulation provides no manual Master Clear, Top of Form, or
1351 Paper Step functions, so these are merely presumed above.
1355 ------------------------------
1356 DSN 105102 - 2607 Line Printer
1357 ------------------------------
1359 TESTED DEVICE: LPT (hp2100_lpt.c)
1361 CONFIGURATION: sim> attach LPT scratch.2607.printer
1362 sim> deposit S 100015
1366 HALT instruction 102074
1368 sim> deposit S 001000
1372 2607 LINE PRINTER DIAGNOSTIC
1374 HALT instruction 102075
1376 sim> deposit A 000377
1377 sim> deposit S 000000
1381 TEST REPORT: H024 PRESS PRESET (EXT&INT),RUN
1383 HALT instruction 102024
1389 H040 PWR OFF LP,PRESS RUN
1391 HALT instruction 102040
1393 sim> set LPT poweroff
1396 H041 PWR ON LP,READY LP,PRESS RUN
1398 HALT instruction 102041
1400 sim> set LPT poweron
1403 H042 PRINT SW OFF,PRESS RUN
1405 HALT instruction 102042
1407 sim> set LPT offline
1410 H043 PRINT SW ON,PRESS RUN
1412 HALT instruction 102043
1417 H044 OPEN PLATEN,PRESS RUN
1419 HALT instruction 102044
1421 sim> set LPT offline
1424 H045 CLOSE PLATEN,PRESS RUN
1426 HALT instruction 102045
1431 H046 REMOVE PAPER FROM LP,PRESS RUN
1433 HALT instruction 102046
1438 H047 RESTORE PAPER IN LP, READY LP,PRESS RUN
1440 HALT instruction 102047
1442 sim> attach LPT scratch.2607.printer
1447 HALT instruction 102077
1449 TEST RESULT: Passed.
1451 TEST NOTES: The standard tests 00-07 are executed. Test 08 (operator
1452 design) is selected as a standard test in this diagnostic only
1453 and so is excluded manually.
1457 -----------------------------------------------------
1458 DSN 111001 - HP2100A Disc File (2883) (multiple unit)
1459 -----------------------------------------------------
1461 TESTED DEVICE: DQ (hp2100_dq.c)
1463 CONFIGURATION: sim> attach DQC0 scratch.U0.2883.disc
1464 sim> attach DQC1 scratch.U1.2883.disc
1468 H0 HP 2100 SERIES DISC FILE(2883) DIAGNOSTIC
1470 H72 ENTER SELECT CODES,DMA CHANNEL IN SWITCH REGISTER,PRESS RUN
1472 HALT instruction 107001
1474 sim> deposit S 002411
1477 H1 ENTER PROGRAM OPTIONS IN SWITCH REGISTER,PRESS RUN
1479 HALT instruction 107077
1481 sim> deposit S 000400
1484 TEST REPORT: H65 PASS 0001
1490 TEST RESULT: Passed.
1492 TEST NOTES: Two passes are required to test all head/unit combinations.
1496 --------------------------------------------------------
1497 DSN 111001 - HP2100A Disc File (2883) (user interaction)
1498 --------------------------------------------------------
1500 TESTED DEVICE: DQ (hp2100_dq.c)
1502 CONFIGURATION: sim> attach DQC0 scratch.U0.2883.disc
1506 H0 HP 2100 SERIES DISC FILE(2883) DIAGNOSTIC
1508 H72 ENTER SELECT CODES,DMA CHANNEL IN SWITCH REGISTER,PRESS RUN
1510 HALT instruction 107001
1512 sim> deposit S 002411
1515 H1 ENTER PROGRAM OPTIONS IN SWITCH REGISTER,PRESS RUN
1517 HALT instruction 107077
1519 sim> deposit S 000142
1522 TEST REPORT: H66 SET FORMAT SWITCH ON UNIT 0,PUSH RUN
1524 HALT instruction 102002
1528 H37 READ ADDRESS IN S0
1529 E47 DATA WORD 0000 IS 000000 SHOULD BE 100000
1530 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0002 UNIT 00
1532 HALT instruction 102001
1536 H37 READ ADDRESS IN S0
1537 E47 DATA WORD 0000 IS 000000 SHOULD BE 100001
1538 H51 CYL 0001 HEAD 01 SECTOR 00 WORD COUNT 0002 UNIT 00
1540 HALT instruction 102001
1544 H33 WRITE DEFECTIVE TRACK IN S0
1545 E64 STATUS IS 000000 SHOULD BE 000031
1546 H51 CYL 0000 HEAD 01 SECTOR 00 WORD COUNT 0128 UNIT 00
1548 HALT instruction 102001
1552 H41 READ DEFECTIVE TRACK IN S0
1553 E64 STATUS IS 000000 SHOULD BE 000031
1554 H51 CYL 0000 HEAD 01 SECTOR 00 WORD COUNT 0128 UNIT 00
1556 HALT instruction 102001
1560 H67 CLEAR FORMAT SWITCH ON UNIT 0,PUSH RUN
1562 HALT instruction 102002
1566 H33 WRITE DEFECTIVE TRACK IN S0
1567 E64 STATUS IS 000000 SHOULD BE 000031
1568 H51 CYL 0000 HEAD 01 SECTOR 00 WORD COUNT 0128 UNIT 00
1570 HALT instruction 102001
1574 H41 READ DEFECTIVE TRACK IN S0
1575 E64 STATUS IS 000000 SHOULD BE 000031
1576 H51 CYL 0000 HEAD 01 SECTOR 00 WORD COUNT 0128 UNIT 00
1578 HALT instruction 102001
1582 H42 WRITE PROTECTED TRACK IN S0
1583 E64 STATUS IS 000000 SHOULD BE 000011
1584 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00
1586 HALT instruction 102001
1590 H36 WRITE ADDRESS IN S0
1591 E64 STATUS IS 000000 SHOULD BE 000011
1592 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0046 UNIT 00
1594 HALT instruction 102001
1598 H66 SET FORMAT SWITCH ON UNIT 0,PUSH RUN
1600 HALT instruction 102002
1604 H67 CLEAR FORMAT SWITCH ON UNIT 0,PUSH RUN
1606 HALT instruction 102002
1610 H70 DISABLE UNIT 0,PUSH RUN
1612 HALT instruction 102002
1614 sim> set DQC0 unloaded
1622 sim> set DQC0 loaded
1625 H71 PRESS PRESET THEN PRESS RUN
1627 HALT instruction 102002
1629 sim> deposit S 010140
1636 HALT instruction 102077
1638 TEST RESULT: Partially passed.
1640 TEST NOTES: Step 0 tests the FORMAT OVERRIDE switch, the use of the flagged
1641 track bit to indicate a protected or defective track, and the
1642 ability to write a sector address field that differs from the
1643 sector location to indicate track sparing. These features are
1648 ----------------------------------------------------------
1649 DSN 151302 - 7900/01 Cartridge Disc Memory (multiple unit)
1650 ----------------------------------------------------------
1652 TESTED DEVICE: DP (hp2100_dp.c)
1654 CONFIGURATION: sim> attach DPC0 scratch.U0.7900.disc
1655 sim> attach DPC1 scratch.U1.7900.disc
1656 sim> attach DPC2 scratch.U2.7900.disc
1657 sim> attach DPC3 scratch.U3.7900.disc
1658 sim> deposit S 000022
1662 HALT instruction 102074
1664 sim> deposit S 000004
1668 H0 7900/7901 CARTRIDGE DISC MEMORY DIAGNOSTIC
1670 000,001,002,004,008,016,032,064,128,202
1675 000000 177777 125252 052525 007417
1676 170360 162745 163346 155555 022222
1680 H62 TYPE A FOR HEADS 0,1;B FOR 2,3;C FOR ALTERNATELY 0,1 THEN 2,3
1683 H23 00020 ERRORS/PASS ALLOWED
1687 H37 UNIT TABLE/ 01 DRIVE(S); 0
1691 H34 ENTER UNIT NUMBERS(0-3)SEPARATED BY COMMAS
1694 H37 UNIT TABLE/ 04 DRIVE(S); 0 1 2 3
1700 sim> deposit S 000000
1705 TEST REPORT: H65 LONG PASS 0001,HEADS 0/1,UNIT 00, 0000 ERRORS
1706 H65 LONG PASS 0002,HEADS 0/1,UNIT 01, 0000 ERRORS
1707 H65 LONG PASS 0003,HEADS 0/1,UNIT 02, 0000 ERRORS
1708 H65 LONG PASS 0004,HEADS 0/1,UNIT 03, 0000 ERRORS,MULTI-DRIVE
1709 H65 LONG PASS 0005,HEADS 2/3,UNIT 00, 0000 ERRORS
1710 H65 LONG PASS 0006,HEADS 2/3,UNIT 01, 0000 ERRORS
1711 H65 LONG PASS 0007,HEADS 2/3,UNIT 02, 0000 ERRORS
1712 H65 LONG PASS 0008,HEADS 2/3,UNIT 03, 0000 ERRORS,MULTI-DRIVE
1717 TEST RESULT: Passed.
1719 TEST NOTES: Eight passes are required to test all head/unit combinations.
1723 -------------------------------------------------------------
1724 DSN 151302 - 7900/01 Cartridge Disc Memory (user interaction)
1725 -------------------------------------------------------------
1727 TESTED DEVICE: DP (hp2100_dp.c)
1729 CONFIGURATION: sim> attach DPC0 scratch.U0.7900.disc
1730 sim> deposit S 000022
1734 HALT instruction 102074
1736 sim> deposit S 000160
1740 TEST REPORT: H0 7900/7901 CARTRIDGE DISC MEMORY DIAGNOSTIC
1741 H66 SET OVERRIDE SWITCH,PUSH RUN
1743 HALT instruction 102002
1748 E64 STATUS IS 000000 SHOULD BE 000010
1749 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00
1751 HALT instruction 102001
1755 H22 CYCLIC CHECK IN STEP 04
1756 E64 STATUS IS 000000 SHOULD BE 000010
1757 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0001 UNIT 00
1759 HALT instruction 102001
1763 H67 CLEAR OVERRIDE SWITCH,PUSH RUN
1765 HALT instruction 102002
1770 E64 STATUS IS 000000 SHOULD BE 000031
1771 H51 CYL 0001 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00
1773 HALT instruction 102001
1777 H45 WRITE IN STEP 08
1778 E64 STATUS IS 000000 SHOULD BE 000011
1779 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00
1781 HALT instruction 102001
1785 H36 INITIALIZE DATA IN STEP 09
1786 E64 STATUS IS 000000 SHOULD BE 000011
1787 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 6144 UNIT 00
1789 HALT instruction 102001
1793 H66 SET OVERRIDE SWITCH,PUSH RUN
1795 HALT instruction 102002
1799 H67 CLEAR OVERRIDE SWITCH,PUSH RUN
1801 HALT instruction 102002
1805 H70 UNLOAD UNIT 0,PUSH RUN
1807 HALT instruction 102002
1809 sim> set DPC0 unloaded
1812 H40 PROTECT U/D THEN READY UNIT 0
1817 sim> set DPC0 locked
1818 sim> set DPC0 loaded
1821 H41 CLEAR U/D PROTECT,LOAD,PUSH RUN
1823 HALT instruction 102002
1825 sim> set DPC0 writeenabled
1828 H71 PRESS PRESET(S) THEN PRESS RUN
1830 HALT instruction 102002
1835 H65 SHORT PASS 0001,HEADS 0/1,UNIT 00, 0005 ERRORS
1840 TEST RESULT: Partially passed.
1842 TEST NOTES: Steps 4, 7, 8, and 9 test the defective and protected cylinder
1843 bits and the FORMAT switch. These features are not simulated.
1847 -----------------------------------------------
1848 DSN 151403 - 7905/06/20/25 Disc (multiple unit)
1849 -----------------------------------------------
1851 TESTED DEVICE: DS (hp2100_ds.c)
1853 CONFIGURATION: sim> set DS0 7905
1861 sim> attach DS0 scratch.U0.7905.disc
1862 sim> attach DS1 scratch.U1.7906.disc
1863 sim> attach DS2 scratch.U2.7920.disc
1864 sim> attach DS3 scratch.U3.7925.disc
1865 sim> attach DS4 scratch.U4.7905.disc
1866 sim> attach DS5 scratch.U5.7906.disc
1867 sim> attach DS6 scratch.U6.7920.disc
1868 sim> attach DS7 scratch.U7.7925.disc
1869 sim> deposit S 000034
1873 HALT instruction 102074
1875 sim> deposit S 000004
1879 H0 79XX/13037 DISC MEMORY DIAGNOSTIC
1880 H37 UNIT TABLE: 01 DRIVE(S); 0
1884 H34 ENTER UNIT NUMBERS(0-7)SEPARATED BY COMMAS
1887 H37 UNIT TABLE: 08 DRIVE(S); 0 1 2 3 4 5 6 7
1891 ENTER:(U)NIT,(?) ERRS,(H)EAD,(O)UTPUT,(P)ATT,(S)OFT,(C)YL,(M)CPU,(E)XIT
1894 H62 HEAD TABLE; UNIT 0 7905A , 02 HEAD(S) 0 1
1895 H62 HEAD TABLE; UNIT 1 7906A , 02 HEAD(S) 0 1
1896 H62 HEAD TABLE; UNIT 2 7920A , 05 HEAD(S) 0 1 2 3 4
1897 H62 HEAD TABLE; UNIT 3 7925A , 09 HEAD(S) 0 1 2 3 4 5 6 7 8
1898 H62 HEAD TABLE; UNIT 4 7905A , 02 HEAD(S) 0 1
1899 H62 HEAD TABLE; UNIT 5 7906A , 02 HEAD(S) 0 1
1900 H62 HEAD TABLE; UNIT 6 7920A , 05 HEAD(S) 0 1 2 3 4
1901 H62 HEAD TABLE; UNIT 7 7925A , 09 HEAD(S) 0 1 2 3 4 5 6 7 8
1905 H132 TYPE UNITS YOU WISH TO CHANGE SEPERATED BY COMMAS
1908 H62 HEAD TABLE; UNIT 0 7905A , 02 HEAD(S) 0 1
1909 H106 ENTER HEADS SEPARATED BY COMMAS
1912 H62 HEAD TABLE; UNIT 0 7905A , 03 HEAD(S) 0 1 2
1916 H62 HEAD TABLE; UNIT 1 7906A , 02 HEAD(S) 0 1
1917 H106 ENTER HEADS SEPARATED BY COMMAS
1920 H62 HEAD TABLE; UNIT 1 7906A , 04 HEAD(S) 0 1 2 3
1924 H62 HEAD TABLE; UNIT 4 7905A , 02 HEAD(S) 0 1
1925 H106 ENTER HEADS SEPARATED BY COMMAS
1928 H62 HEAD TABLE; UNIT 4 7905A , 03 HEAD(S) 0 1 2
1932 H62 HEAD TABLE; UNIT 5 7906A , 02 HEAD(S) 0 1
1933 H106 ENTER HEADS SEPARATED BY COMMAS
1936 H62 HEAD TABLE; UNIT 5 7906A , 04 HEAD(S) 0 1 2 3
1940 ENTER:(U)NIT,(?) ERRS,(H)EAD,(O)UTPUT,(P)ATT,(S)OFT,(C)YL,(M)CPU,(E)XIT
1943 TEST REPORT: H121 WARNING-FORMAT SWITCH OFF
1944 H65 LONG PASS 0001,HEAD 012 ,UNIT 0,0000 ERRORS-0000 SOFT
1945 H65 LONG PASS 0002,HEAD 0123 ,UNIT 1,0000 ERRORS-0000 SOFT
1946 H65 LONG PASS 0003,HEAD 01234 ,UNIT 2,0000 ERRORS-0000 SOFT
1947 H65 LONG PASS 0004,HEAD 012345678,UNIT 3,0000 ERRORS-0000 SOFT
1948 H65 LONG PASS 0005,HEAD 012 ,UNIT 4,0000 ERRORS-0000 SOFT
1949 H65 LONG PASS 0006,HEAD 0123 ,UNIT 5,0000 ERRORS-0000 SOFT
1950 H65 LONG PASS 0007,HEAD 01234 ,UNIT 6,0000 ERRORS-0000 SOFT
1951 H65 LONG PASS 0008,HEAD 012345678,UNIT 7,0000 ERRORS-0000 SOFT,MULTI-UNIT
1956 TEST RESULT: Passed.
1958 TEST NOTES: Eight passes are required to test all head/unit combinations.
1962 --------------------------------------------------
1963 DSN 151403 - 7905/06/20/25 Disc (user interaction)
1964 --------------------------------------------------
1966 TESTED DEVICE: DS (hp2100_ds.c)
1968 CONFIGURATION: sim> set DS0 7905
1969 sim> attach DS0 scratch.U0.7905.disc
1970 sim> deposit S 000034
1974 HALT instruction 102074
1976 sim> deposit S 000120
1980 H0 79XX/13037 DISC MEMORY DIAGNOSTIC
1981 H37 UNIT TABLE: 01 DRIVE(S); 0
1985 TEST REPORT: H66 SET FORMAT SWITCH ON UNIT 0,PUSH RUN
1987 HALT instruction 102002
1993 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B
1994 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0
1995 SHOULD BE 0 1 0 00000 XXXX XXXX / 0 000010 0 0 0 1 0 0 0 0 0
1996 H137 TERMINATION STATUS IS "NORMAL COMPLET"
1997 START 0000/00/00-LAST 0000/00/01 WORD COUNT 00128,OLD CYL 0000,UNIT 00
1999 HALT instruction 102001
2003 H22 VERIFY IN STEP 04
2004 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B
2005 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0
2006 SHOULD BE 0 1 0 00000 XXXX XXXX / 0 000010 0 0 0 1 0 0 0 0 0
2007 H137 TERMINATION STATUS IS "NORMAL COMPLET"
2008 START 0000/00/00-LAST 0001/00/00 WORD COUNT 00048,OLD CYL 0000,UNIT 00
2010 HALT instruction 102001
2014 H67 CLEAR FORMAT SWITCH ON UNIT 0,PUSH RUN
2016 HALT instruction 102002
2018 sim> set DS0 noformat
2022 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B
2023 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 0 0 0 0 0 0
2024 SHOULD BE 0 0 1 10001 XXXX XXXX / 0 000010 0 0 0 0 0 0 0 0 0
2025 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "DEFECTIVE TRK "
2026 START 0001/00/00-LAST 0001/00/01 WORD COUNT 00128,OLD CYL 0000,UNIT 00
2028 HALT instruction 102001
2032 H45 WRITE IN STEP 08
2033 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B
2034 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 0 0 0 0 0 0
2035 SHOULD BE 0 1 0 10110 XXXX XXXX / 0 000010 0 0 0 0 0 0 0 0 0
2036 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "WRT PROTEC TRK"
2037 START 0000/00/00-LAST 0000/00/01 WORD COUNT 00128,OLD CYL 0001,UNIT 00
2039 HALT instruction 102001
2043 H66 SET FORMAT SWITCH ON UNIT 0,PUSH RUN
2045 HALT instruction 102002
2050 H45 WRITE IN STEP 10
2051 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B
2052 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0
2053 SHOULD BE 0 1 0 00000 XXXX XXXX / 0 000010 0 0 0 1 0 0 0 0 0
2054 H137 TERMINATION STATUS IS "NORMAL COMPLET"
2055 START 0000/00/00-LAST 0000/00/08 WORD COUNT 01024,OLD CYL 0000,UNIT 00
2057 HALT instruction 102001
2061 H70 UNLOAD UNIT 0,PUSH RUN
2063 HALT instruction 102002
2065 sim> set DS0 unloaded
2076 H142 PROTECT U/D,PUSH RUN
2078 HALT instruction 102002
2083 H143 CLEAR U/D PROTECT,PUSH RUN
2085 HALT instruction 102002
2087 sim> set DS0 writeenabled
2090 H110 PRESS PRESET(S),PRESS RUN
2092 HALT instruction 102002
2098 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B
2099 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0
2100 SHOULD BE 0 0 0 00111 0000 0000 / 0 000010 0 0 0 X 0 0 0 0 0
2101 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "CYL CMP ERROR "
2102 START 0000/00/01-LAST 0000/00/03 WORD COUNT 00138,OLD CYL 0000,UNIT 00
2104 HALT instruction 102001
2109 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B
2110 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0
2111 SHOULD BE 0 0 0 01001 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0
2112 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "HD/SEC CMP ERR"
2113 START 0000/00/01-LAST 0000/00/03 WORD COUNT 00138,OLD CYL 0000,UNIT 00
2115 HALT instruction 102001
2120 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B
2121 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0
2122 SHOULD BE 0 0 0 01001 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0
2123 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "HD/SEC CMP ERR"
2124 START 0000/00/01-LAST 0000/00/03 WORD COUNT 00138,OLD CYL 0000,UNIT 00
2126 HALT instruction 102001
2131 E47 DATA WORD 0065 IS 075126 SHOULD BE 030400
2132 E47 DATA WORD 0066 IS 000762 SHOULD BE 030400
2133 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B
2134 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0
2135 SHOULD BE 0 0 0 01111 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0
2136 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "POSS CORR DATA"
2137 START 0000/00/00-LAST 0000/00/03 WORD COUNT 00128,OLD CYL 0000,UNIT 00
2139 HALT instruction 102001
2144 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B
2145 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0
2146 SHOULD BE 0 0 0 01000 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0
2147 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "UNCOR DATA ERR"
2148 START 0000/00/00-LAST 0000/00/03 WORD COUNT 00276,OLD CYL 0000,UNIT 00
2150 HALT instruction 102001
2154 H22 VERIFY IN STEP 43
2155 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B
2156 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0
2157 SHOULD BE 0 0 1 10001 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0
2158 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "DEFECTIVE TRK "
2159 START 0016/00/00-LAST 0017/00/00 WORD COUNT 00048,OLD CYL 0128,UNIT 00
2161 HALT instruction 102001
2165 H22 VERIFY IN STEP 43
2166 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B
2167 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0
2168 SHOULD BE 1 0 0 10000 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0
2169 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "SPR TRK ACCESS"
2170 START 0128/01/00-LAST 0129/01/00 WORD COUNT 00048,OLD CYL 0016,UNIT 00
2172 HALT instruction 102001
2176 H45 WRITE IN STEP 43
2177 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B
2178 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0
2179 SHOULD BE 1 0 0 00000 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0
2180 H137 TERMINATION STATUS IS "NORMAL COMPLET"
2181 START 0016/00/33-LAST 0016/00/34 WORD COUNT 00128,OLD CYL 0128,UNIT 00
2183 HALT instruction 102001
2188 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B
2189 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0
2190 SHOULD BE 1 0 0 00000 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0
2191 H137 TERMINATION STATUS IS "NORMAL COMPLET"
2192 START 0016/00/33-LAST 0016/00/34 WORD COUNT 00128,OLD CYL 0016,UNIT 00
2194 HALT instruction 102001
2199 E47 DATA WORD 0000 IS 156164 SHOULD BE 144300
2200 E47 DATA WORD 0001 IS 023302 SHOULD BE 117306
2201 E47 DATA WORD 0002 IS 114642 SHOULD BE 045322
2202 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B
2203 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0
2204 SHOULD BE 1 0 0 00000 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0
2205 H137 TERMINATION STATUS IS "NORMAL COMPLET"
2206 START 0016/00/33-LAST 0016/00/34 WORD COUNT 00128,OLD CYL 0016,UNIT 00
2208 HALT instruction 102001
2212 H65 SHORT PASS 0001,HEAD 01 ,UNIT 0,0015 ERRORS-0015 SOFT
2217 TEST RESULT: Partially passed.
2219 TEST NOTES: Steps 4, 8, and 10 test the protected cylinder bit. Step 7
2220 tests the defective cylinder bit. Steps 38, 39, and 40 test the
2221 Write Full Sector command. Steps 41 and 42 test error
2222 correction. Step 43 tests the spare cylinder bit and track
2223 sparing. These features are not simulated.
2227 -------------------------------------------------
2228 DSN 112200 - 9-Track Magnetic Tape (7970B, 13181)
2229 -------------------------------------------------
2231 DEVICE: MS (hp2100_ms.c)
2233 CONFIGURATION: sim> detach MSC0
2235 sim> set MSC realtime
2236 sim> attach MSC0 scratch.U0.7970.tape
2237 sim> attach MSC1 scratch.U1.7970.tape
2238 sim> attach MSC2 scratch.U2.7970.tape
2239 sim> attach MSC3 scratch.U3.7970.tape
2240 sim> deposit S 102030
2244 HALT instruction 102074
2246 sim> deposit S 000217
2250 TEST REPORT: 7970-13181 DIAG.
2251 H024 PRESS PRESET (EXT&INT),RUN
2253 HALT instruction 102024
2260 H024 PRESS PRESET (EXT&INT),RUN
2262 HALT instruction 102024
2271 H155 STATUS IS 0 000 000 001 000 000
2274 H155 STATUS IS 0 000 000 001 000 000
2277 H155 STATUS IS 0 000 000 001 000 000
2280 H155 STATUS IS 0 000 000 001 000 000
2285 H155 STATUS IS 0 000 000 000 000 000
2286 H155 AND SHOULD BE 0 000 000 000 000 000
2291 HALT instruction 106035
2298 H155 STATUS IS 0 000 000 000 000 000
2299 H155 AND SHOULD BE 0 000 000 000 000 000
2302 HALT instruction 106041
2308 HALT instruction 106026
2310 sim> attach MSC0 scratch.U3.7970.tape
2311 sim> attach MSC1 scratch.U2.7970.tape
2312 sim> attach MSC2 scratch.U1.7970.tape
2313 sim> attach MSC3 scratch.U0.7970.tape
2316 H127 SET SW 13 TO LOOP
2318 HALT instruction 106027
2322 H130 REMOVE WRITE RING
2324 HALT instruction 106030
2326 sim> set MSC0 locked
2329 H131 REPLACE WRITE RING
2331 HALT instruction 106031
2333 sim> set MSC0 writeenabled
2336 H137 PUT TAPE UNIT ON-LINE
2338 HALT instruction 106037
2340 sim> set MSC0 online
2343 H137 PUT TAPE UNIT ON-LINE
2345 HALT instruction 106037
2347 sim> set MSC1 online
2350 H137 PUT TAPE UNIT ON-LINE
2352 HALT instruction 106037
2354 sim> set MSC2 online
2357 H137 PUT TAPE UNIT ON-LINE
2359 HALT instruction 106037
2361 sim> set MSC3 online
2366 HALT instruction 102077
2368 TEST RESULT: Partially passed.
2370 TEST NOTES: Test 23 verifies the LRCC and CRCC values obtained from the
2371 interface. These features are not simulated. (Setting bit 7 of
2372 the S register during configuration eliminates most LRCC/CRCC
2373 checks but does not inhibit test 23.)
2375 If test 34 is selected manually, E065 WRITE ERROR will occur.
2376 This is due to the implementation of the tape simulation
2377 library. Test 34 writes data in a single record until a data
2378 error or EOT occurs (conceivably 20+ megabytes for the largest
2379 reel size at 800 bpi). Because the tape simulation library
2380 writes complete records, the 7970 simulator must use a data
2381 buffer to accumulate the entire record before calling
2382 "sim_tape_wrrecf" to write the record. The simulator uses a
2383 data buffer of 32768 words. When the buffer is full,
2384 parity-error status is returned to the program.
2388 -------------------------------------------------
2389 DSN 112200 - 9-Track Magnetic Tape (7970E, 13183)
2390 -------------------------------------------------
2392 DEVICE: MS (hp2100_ms.c)
2394 CONFIGURATION: sim> detach MSC0
2396 sim> set MSC realtime
2397 sim> attach MSC0 scratch.U0.7970.tape
2398 sim> attach MSC1 scratch.U1.7970.tape
2399 sim> attach MSC2 scratch.U2.7970.tape
2400 sim> attach MSC3 scratch.U3.7970.tape
2401 sim> deposit S 104030
2405 HALT instruction 102074
2407 sim> deposit S 000017
2411 TEST REPORT: 7970-13183 DIAG.
2412 H024 PRESS PRESET (EXT&INT),RUN
2414 HALT instruction 102024
2421 H024 PRESS PRESET (EXT&INT),RUN
2423 HALT instruction 102024
2432 H155 STATUS IS 1 000 000 001 000 000
2435 H155 STATUS IS 1 010 000 001 000 000
2438 H155 STATUS IS 1 100 000 001 000 000
2441 H155 STATUS IS 1 110 000 001 000 000
2445 HALT instruction 106026
2447 sim> attach MSC0 scratch.U3.7970.tape
2448 sim> attach MSC1 scratch.U2.7970.tape
2449 sim> attach MSC2 scratch.U1.7970.tape
2450 sim> attach MSC3 scratch.U0.7970.tape
2453 H127 SET SW 13 TO LOOP
2455 HALT instruction 106027
2459 H130 REMOVE WRITE RING
2461 HALT instruction 106030
2463 sim> set MSC0 locked
2466 H131 REPLACE WRITE RING
2468 HALT instruction 106031
2470 sim> set MSC0 writeenabled
2473 H137 PUT TAPE UNIT ON-LINE
2475 HALT instruction 106037
2477 sim> set MSC0 online
2480 H137 PUT TAPE UNIT ON-LINE
2482 HALT instruction 106037
2484 sim> set MSC1 online
2487 H137 PUT TAPE UNIT ON-LINE
2489 HALT instruction 106037
2491 sim> set MSC2 online
2494 H137 PUT TAPE UNIT ON-LINE
2496 HALT instruction 106037
2498 sim> set MSC3 online
2503 HALT instruction 102077
2505 TEST RESULT: Passed.
2509 ------------------------------------
2510 DSN 146200 - Paper Tape Reader/Punch
2511 ------------------------------------
2513 TESTED DEVICE: PTR and PTP (hp2100_stddev.c)
2515 CONFIGURATION: sim> deposit S 001012
2519 HALT instruction 102074
2521 sim> deposit S 001000
2525 PAPER TAPE READER AND PUNCH DIAGNOSTIC DSN 146200
2527 HALT instruction 102075
2529 sim> deposit A 000200
2533 H060 TO MAKE LOOP, PUNCH ON AND RUN
2535 HALT instruction 102060
2537 sim> attach PTP loop.2895.punch
2542 HALT instruction 102077
2545 sim> deposit S 001000
2549 PAPER TAPE READER AND PUNCH DIAGNOSTIC DSN 146200
2551 HALT instruction 102075
2553 sim> deposit A 003177
2554 sim> deposit S 000000
2558 TEST REPORT: H050 BI-O ON PUNCH
2559 H024 PRESS PRESET (EXT&INT),RUN
2561 HALT instruction 102024
2568 H024 PRESS PRESET (EXT&INT),RUN
2570 HALT instruction 102024
2576 H051 ALL CHARTR COMBINATIONS, PUNCH ONLY
2577 TURN PUNCH ON, PRESS RUN
2579 HALT instruction 102051
2581 sim> attach PTP scratch.2895.punch
2584 H052 ALL CHARTR COMBINATIONS, VERIFY
2585 TEAR TAPE AT PUNCH, PLACE IN READER, PRESS RUN
2587 HALT instruction 102052
2590 sim> attach PTR scratch.2895.punch
2593 H054 PLACE LOOP IN READER-PRESS RUN
2594 TO START READ, SET BIT0 TO 1
2595 TO EXIT TEST, SET BIT0 TO 0
2597 HALT instruction 102054
2600 sim> attach PTR loop.2895.punch
2601 sim> deposit S 000001
2607 sim> deposit S 000000
2610 H054 PLACE LOOP IN READER-PRESS RUN
2611 TO START READ, SET BIT0 TO 1
2612 TO EXIT TEST, SET BIT0 TO 0
2614 HALT instruction 102054
2616 sim> deposit S 000001
2622 sim> deposit PTR TIME 100
2623 sim> deposit PTP TIME 200
2624 sim> deposit S 000000
2627 H056 TURN PUNCH ON, PRESS RUN. PUNCH ROUTINE
2628 WILL START. LOAD THE TAPE BEING PUNCHED
2630 TO START READ, SET BIT0 TO 1
2631 TO EXIT, SET BIT0 TO 0
2633 HALT instruction 102056
2636 sim> attach PTR scratch.2895.punch
2637 sim> attach PTP scratch.2895.punch
2643 sim> deposit S 000001
2649 sim> deposit S 000000
2652 H057 TO COMPLETE, TEAR TAPE, PRESS RUN
2654 HALT instruction 102057
2658 H063 READER SPEED TEST. PLACE LOOP IN READER
2659 BIT 5=0 FOR 2748-58, BIT 5=1 FOR 2737. PRESS RUN.
2661 HALT instruction 102063
2664 sim> attach PTR loop.2895.punch
2665 sim> deposit PTR TIME 3150
2668 H066 TEST 11 COMPLETE
2669 H100 PUNCH SPEED TEST.
2670 BIT 6=0 FOR 2895 OR BIT 6=1 FOR 2753-PRESS RUN
2672 HALT instruction 106000
2674 sim> deposit PTP TIME 20790
2677 H103 TEST 12 COMPLETE
2680 HALT instruction 102077
2682 TEST RESULT: Passed.
2684 TEST NOTES: Test 07 is executed to punch a tape loop that is used in tests
2685 04, 05, and 11. Then the default tests 00-06, plus tests 11 and
2688 Test 06 punches and reads the same tape concurrently (the tape
2689 coming out of the punch is then fed into the reader). Under
2690 simulation, it is necessary to delay starting the read until the
2691 punch buffer has been flushed to the disc. Also, this test
2692 depends on the reader being at least twice as fast as the punch,
2693 so the PTR/PTP TIME registers are adjusted accordingly.
2695 Test 11 and test 12 are speed tests, so the PTR and PTP TIMEs
2696 are set for realistic timing.
2701 STAND-ALONE DIAGNOSTIC DETAILED EXECUTION AND RESULTS
2702 =====================================================
2704 Each execution note below presumes that the target diagnostic has been loaded.
2705 For all runs, the diagnostic configurator was used in automatic mode to load the
2706 target diagnostic from a paper tape image, as follows:
2708 sim> attach -r MSC0 24396-13601_Rev-2326.abin.tape
2709 sim> deposit S 000000
2712 HALT instruction 102077
2714 sim> attach PTR [paper-tape-image-file]
2715 sim> deposit S 001011
2721 ------------------------------------------------
2722 DSN 101217 - 2000/Access Comm Processor for 21MX
2723 ------------------------------------------------
2725 TESTED DEVICE: CPU (hp2100_cpu2.c)
2727 BINARY TAPE: 13207-16001 Rev. 1728
2729 CONFIGURATION: sim> set CPU IOP
2731 sim> deposit S 000013
2735 HALT instruction 102074
2737 sim> deposit S 000000
2741 TEST REPORT: 21MX 2000 COMPUTER SYSTEM COMM. PROC. FIRMWARE DIAGNOSTIC
2743 H040 ENQ, DEQ AND PENQ TESTS
2745 H110 INS,READF, SAVE AND RESTR TESTS
2746 H120 LAI AND SAI TESTS
2752 HALT instruction 102077
2754 TEST RESULT: Passed.
2758 --------------------------------------------
2759 DSN (none) - HP 3030 Magnetic Tape Subsystem
2760 --------------------------------------------
2762 TESTED DEVICE: MT (hp2100_mt.c)
2764 BINARY TAPE: None available.
2766 CONFIGURATION: (none)
2770 TEST RESULT: Not tested.
2772 TEST NOTES: The limited documentation available for this unit suggests that
2773 the diagnostic is HP product number 20433, but no copy of this
2774 diagnostic has been found.
2778 -----------------------------------------------------------
2779 DSN 177777 - HP 2100 Fixed Head Disc/Drum Diagnostic (2770)
2780 -----------------------------------------------------------
2782 TESTED DEVICE: DR (hp2100_dr.c)
2784 BINARY TAPE: 22682-16017 Rev. 1612
2786 CONFIGURATION: sim> reset
2789 H0 2100 SERIES FIXED HEAD DISC/DRUM DIAGNOSTIC
2790 ENTER SELECT CODES, CHANNELS IN SWITCH REGISTER,PUSH RUN
2792 HALT instruction 107001
2795 sim> set DRC trackprot=8
2796 sim> attach DRC0 scratch.U0.2770.disc
2797 sim> deposit S 002611
2800 H1 CONFIGURATION COMPLETE
2801 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED,
2802 H70 ENTER PROGRAM OPTIONS IN SWITCH REGISTER, PUSH RUN
2804 HALT instruction 107077
2806 sim> deposit S 010000
2809 TEST REPORT: H12 DEVICE HAS 90 SECTORS
2810 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN
2812 HALT instruction 102002
2814 sim> set DRC unprotected
2817 H10 SET TRACK PROTECT SWITCH TO PROTECTED,PRESS RUN
2819 HALT instruction 102002
2821 sim> set DRC protected
2824 H14 DEVICE HAS 0032 TRACKS,THE FOLLOWING ARE PROTECTED:
2826 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN
2828 HALT instruction 102002
2830 sim> set DRC unprotected
2835 HALT instruction 102077
2837 TEST RESULT: Passed.
2841 ---------------------------------------------------------------
2842 DSN 177777 - HP 2100 Fixed Head Disc/Drum Diagnostic (2771-001)
2843 ---------------------------------------------------------------
2845 TESTED DEVICE: DR (hp2100_dr.c)
2847 BINARY TAPE: 22682-16017 Rev. 1612
2849 CONFIGURATION: sim> reset
2852 H0 2100 SERIES FIXED HEAD DISC/DRUM DIAGNOSTIC
2853 ENTER SELECT CODES, CHANNELS IN SWITCH REGISTER,PUSH RUN
2855 HALT instruction 107001
2858 sim> set DRC trackprot=32
2859 sim> attach DRC0 scratch.U0.2771.disc
2860 sim> deposit S 002611
2863 H1 CONFIGURATION COMPLETE
2864 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED,
2865 H70 ENTER PROGRAM OPTIONS IN SWITCH REGISTER, PUSH RUN
2867 HALT instruction 107077
2869 sim> deposit S 010000
2872 TEST REPORT: H12 DEVICE HAS 90 SECTORS
2873 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN
2875 HALT instruction 102002
2877 sim> set DRC unprotected
2880 H10 SET TRACK PROTECT SWITCH TO PROTECTED,PRESS RUN
2882 HALT instruction 102002
2884 sim> set DRC protected
2887 H14 DEVICE HAS 0128 TRACKS,THE FOLLOWING ARE PROTECTED:
2889 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN
2891 HALT instruction 102002
2893 sim> set DRC unprotected
2898 HALT instruction 102077
2900 TEST RESULT: Passed.
2904 -----------------------------------------------------------
2905 DSN 177777 - HP 2100 Fixed Head Disc/Drum Diagnostic (2773)
2906 -----------------------------------------------------------
2908 TESTED DEVICE: DR (hp2100_dr.c)
2910 BINARY TAPE: 22682-16017 Rev. 1612
2912 CONFIGURATION: sim> reset
2915 H0 2100 SERIES FIXED HEAD DISC/DRUM DIAGNOSTIC
2916 ENTER SELECT CODES, CHANNELS IN SWITCH REGISTER,PUSH RUN
2918 HALT instruction 107001
2921 sim> set DRC trackprot=16
2922 sim> attach DRC0 scratch.U0.2773.disc
2923 sim> deposit S 002611
2926 H1 CONFIGURATION COMPLETE
2927 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED,
2928 H70 ENTER PROGRAM OPTIONS IN SWITCH REGISTER, PUSH RUN
2930 HALT instruction 107077
2932 sim> deposit S 010000
2935 TEST REPORT: H12 DEVICE HAS 32 SECTORS
2936 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN
2938 HALT instruction 102002
2940 sim> set DRC unprotected
2943 H10 SET TRACK PROTECT SWITCH TO PROTECTED,PRESS RUN
2945 HALT instruction 102002
2947 sim> set DRC protected
2950 H14 DEVICE HAS 0192 TRACKS,THE FOLLOWING ARE PROTECTED:
2952 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN
2954 HALT instruction 102002
2956 sim> set DRC unprotected
2961 HALT instruction 102077
2963 TEST RESULT: Passed.
2967 -----------------------------------------------------------
2968 DSN 177777 - HP 2100 Fixed Head Disc/Drum Diagnostic (2775)
2969 -----------------------------------------------------------
2971 TESTED DEVICE: DR (hp2100_dr.c)
2973 BINARY TAPE: 22682-16017 Rev. 1612
2975 CONFIGURATION: sim> reset
2978 H0 2100 SERIES FIXED HEAD DISC/DRUM DIAGNOSTIC
2979 ENTER SELECT CODES, CHANNELS IN SWITCH REGISTER,PUSH RUN
2981 HALT instruction 107001
2984 sim> set DRC trackprot=64
2985 sim> attach DRC0 scratch.U0.2775.disc
2986 sim> deposit S 002611
2989 H1 CONFIGURATION COMPLETE
2990 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED,
2991 H70 ENTER PROGRAM OPTIONS IN SWITCH REGISTER, PUSH RUN
2993 HALT instruction 107077
2995 sim> deposit S 010000
2998 TEST REPORT: H12 DEVICE HAS 32 SECTORS
2999 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN
3001 HALT instruction 102002
3003 sim> set DRC unprotected
3006 H10 SET TRACK PROTECT SWITCH TO PROTECTED,PRESS RUN
3008 HALT instruction 102002
3010 sim> set DRC protected
3013 H14 DEVICE HAS 0768 TRACKS,THE FOLLOWING ARE PROTECTED:
3015 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN
3017 HALT instruction 102002
3019 sim> set DRC unprotected
3024 HALT instruction 102077
3026 TEST RESULT: Passed.
3030 -----------------------------------------------
3031 DSN (none) - 12875 Processor Interconnect Cable
3032 -----------------------------------------------
3034 TESTED DEVICE: IPLI, IPLO (hp2100_ipl.c)
3036 BINARY TAPE: 24197-60001 Rev. B
3038 CONFIGURATION: sim> set IPLI DIAG
3040 sim> deposit S 003332
3044 HALT instruction 107076
3046 sim> deposit S 010000
3050 HALT instruction 107077
3052 sim> deposit S 000000
3056 TEST REPORT: H14. START 12875 CABLE DIAGNOSTIC
3057 H77. END 12875 CABLE DIAGNOSTIC
3059 HALT instruction 102077
3061 TEST RESULT: Passed.
3065 -----------------------------------------------------------------
3066 DSN (none) - HP2100A Cartridge Disc Memory (2871) (multiple unit)
3067 -----------------------------------------------------------------
3069 TESTED DEVICE: DP (hp2100_dp.c)
3071 BINARY TAPE: 24203-60001 Rev. A
3073 CONFIGURATION: sim> set DPC 12557A
3074 sim> attach DPC0 scratch.U0.2871.disc
3075 sim> attach DPC1 scratch.U1.2871.disc
3076 sim> attach DPC2 scratch.U2.2871.disc
3077 sim> attach DPC3 scratch.U3.2871.disc
3078 sim> deposit S 002211
3082 HALT instruction 107077
3084 sim> deposit S 000400
3088 H0 HP2100A CARTRIDGE DISC MEMORY DIAGNOSTIC
3089 H34 ENTER UNIT NUMBERS(0-3)SEPARATED BY COMMAS
3094 HALT instruction 102002
3096 sim> deposit S 000004
3100 000,001,002,004,008,016,032,064,128,202
3101 H25 WISH TO ALTER TABLE?
3105 000000 177777 125252 052525 007417
3106 170360 162745 163346 155555 022222
3107 H25 WISH TO ALTER TABLE?
3110 H62 TYPE A FOR HEADS 0,1;B FOR 2,3;C FOR ALTERNATELY 0,1 THEN 2,3
3115 HALT instruction 102002
3117 sim> deposit S 000000
3121 TEST REPORT: H0 HP2100A CARTRIDGE DISC MEMORY DIAGNOSTIC
3130 TEST RESULT: Passed.
3132 TEST NOTES: Four passes are required to test all head/unit combinations.
3136 --------------------------------------------------------------------
3137 DSN (none) - HP2100A Cartridge Disc Memory (2871) (user interaction)
3138 --------------------------------------------------------------------
3140 TESTED DEVICE: DP (hp2100_dp.c)
3142 BINARY TAPE: 24203-60001 Rev. A
3144 CONFIGURATION: sim> set DPC 12557A
3145 sim> attach DPC0 scratch.U0.2871.disc
3146 sim> deposit S 002211
3150 HALT instruction 107077
3152 sim> deposit S 010020
3156 TEST REPORT: H0 HP2100A CARTRIDGE DISC MEMORY DIAGNOSTIC
3157 H66 SET OVERRIDE SWITCH,PUSH RUN
3159 HALT instruction 102002
3163 H37 READ AFTER WRITE ADDRESS IN S0
3164 E64 STATUS IS 000000 SHOULD BE 000010
3165 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00
3167 HALT instruction 102001
3171 H22 CYCLIC CHECK IN S0
3172 E64 STATUS IS 000000 SHOULD BE 000010
3173 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00
3175 HALT instruction 102001
3179 H67 CLEAR OVERRIDE SWITCH,PUSH RUN
3181 HALT instruction 102002
3185 H41 READ DEFECTIVE TRACK IN S0
3186 E64 STATUS IS 000000 SHOULD BE 000031
3187 H51 CYL 0001 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00
3189 HALT instruction 102001
3193 H42 WRITE PROTECTED TRACK IN S0
3194 E64 STATUS IS 000000 SHOULD BE 000011
3195 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00
3197 HALT instruction 102001
3201 H36 WRITE ADDRESS IN S0
3202 E64 STATUS IS 000000 SHOULD BE 000011
3203 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 3072 UNIT 00
3205 HALT instruction 102001
3209 H66 SET OVERRIDE SWITCH,PUSH RUN
3211 HALT instruction 102002
3215 H67 CLEAR OVERRIDE SWITCH,PUSH RUN
3217 HALT instruction 102002
3221 H70 UNLOCK UNIT 0,PUSH RUN
3223 HALT instruction 102002
3225 sim> set DPC0 unloaded
3233 sim> set DPC0 loaded
3236 H71 PRESS PRESET THEN PRESS RUN
3238 HALT instruction 102002
3240 sim> deposit S 000140
3246 TEST RESULT: Partially passed.
3248 TEST NOTES: Step 0 tests the the defective and protected cylinder bits and
3249 the FORMAT OVERRIDE switch. These features are not simulated.
3254 ONLINE DIAGNOSTIC DETAILED EXECUTION AND RESULTS
3255 ================================================
3257 Online diagnostics were run under the control of the indicated operating
3258 systems. Unless otherwise noted, the programs were loaded with the default
3259 configuration specified by the associated linker command file or the operating
3264 ------------------------------------------------
3265 #EMA - Extended Memory Array Firmware Diagnostic
3266 ------------------------------------------------
3268 TESTED DEVICE: CPU (hp2100_cpu5.c)
3270 BINARY FILE: 92067-16013 Rev. 1805
3272 HOST SYSTEM: RTE-IVB Rev. 5010
3274 CONFIGURATION: sim> set CPU EMA
3277 TEST REPORT: EMA ON-LINE DIAGNOSTIC SUCCESSFUL COMPLETION
3279 TEST RESULT: Passed.
3283 ------------------------------------------------
3284 VMACK - Virtual Memory Array Firmware Diagnostic
3285 ------------------------------------------------
3287 TESTED DEVICE: CPU (hp2100_cpu5.c)
3289 BINARY FILE: 92084-16423 Rev. 2121
3291 HOST SYSTEM: RTE-6/VM Rev. 6200
3293 CONFIGURATION: sim> set CPU 1000-F
3297 TEST REPORT: VMACK - VMA FIRMWARE DIAGNOSTIC, FIRMWARE REV# 003
3298 VMACK - .IMAR NO ERRORS DETECTED PASS# 1
3299 VMACK - .JMAR NO ERRORS DETECTED PASS# 1
3300 VMACK - .LBP NO ERRORS DETECTED PASS# 1
3301 VMACK - .LBPR NO ERRORS DETECTED PASS# 1
3302 VMACK - .LPX NO ERRORS DETECTED PASS# 1
3303 VMACK - .LPXR NO ERRORS DETECTED PASS# 1
3304 VMACK - .PMAP NO ERRORS DETECTED PASS# 1
3305 VMACK - .IMAP NO ERRORS DETECTED PASS# 1
3306 VMACK - .JMAP NO ERRORS DETECTED PASS# 1
3308 TEST RESULT: Passed.
3312 --------------------------------------------------
3313 VISOD - Vector Instruction Set Firmware Diagnostic
3314 --------------------------------------------------
3316 TESTED DEVICE: CPU (hp2100_cpu7.c)
3318 BINARY FILE: 12824-16002 Rev. 2026
3320 HOST SYSTEM: RTE-IVB Rev. 5010
3322 CONFIGURATION: sim> set CPU 1000-F
3326 TEST REPORT: VIS ON-LINE DIAGNOSTIC SUCCESSFUL COMPLETION
3328 TEST RESULT: Passed.
3332 --------------------------------------------------
3333 VISOD - Vector Instruction Set Firmware Diagnostic
3334 --------------------------------------------------
3336 TESTED DEVICE: CPU (hp2100_cpu7.c)
3338 BINARY FILE: 12829-16006 Rev. 2226
3340 HOST SYSTEM: RTE-6/VM Rev. 6200
3342 CONFIGURATION: sim> set CPU 1000-F
3346 TEST REPORT: VIS ON-LINE DIAGNOSTIC SUCCESSFUL COMPLETION
3348 TEST RESULT: Passed.
3352 ---------------------------------------
3353 SDIAG - SIGNAL/1000 Firmware Diagnostic
3354 ---------------------------------------
3356 TESTED DEVICE: CPU (hp2100_cpu7.c)
3358 BINARY FILE: 92835-16006 Rev. 2040
3360 HOST SYSTEM: RTE-6/VM Rev. 6200
3362 CONFIGURATION: sim> set CPU 1000-F
3367 TEST REPORT: SIGNAL/1000 FIRMWARE DIAGNOSTIC
3369 SIGNAL/1000 FIRMWARE DIAGNOSTIC SUCCESSFUL COMPLETION
3371 TEST RESULT: Passed.