1 /* pdp11_kg.c - Communications Arithmetic Option KG11-A
3 Copyright (c) 2007-2008, John A. Dundas III
5 Permission is hereby granted, free of charge, to any person obtaining a
6 copy of this software and associated documentation files (the "Software"),
7 to deal in the Software without restriction, including without limitation
8 the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 and/or sell copies of the Software, and to permit persons to whom the
10 Software is furnished to do so, subject to the following conditions:
12 The above copyright notice and this permission notice shall be included in
13 all copies or substantial portions of the Software.
15 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19 IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 Except as contained in this notice, the name of the author shall not be
23 used in advertising or otherwise to promote the sale, use or other dealings
24 in this Software without prior written authorization from the author.
26 kg KG11-A Communications Arithmetic Option (M7251)
28 08-Jan-08 JAD First public release integrated with SIMH V3.7-3.
29 09-Dec-07 JAD SIMH-style debugging.
30 Finished validating against real hardware.
31 Support for up to 8 units, the maximum.
32 Keep all module data in the UNIT structure.
33 Clean up bit and mask definitions.
34 01-Dec-07 JAD Now work on the corner cases that the
35 diagnostic does not check.
36 CLR does not clear the QUO bit.
37 Correct SR write logic.
38 29-Nov-07 JAD Original implementation and testing based on
39 an idea from 07-Jul-03. Passes the ZKGAB0
42 Information necessary to create this simulation was gathered from
43 a number of sources including:
45 KG11-A Exclusive-OR and CRC block check manual, DEC-11-HKGAA-B-D
46 <http://www.computer.museum.uq.edu.au/pdf/DEC-11-HKGAA-B-D%20KG11-A%20Exclusive-OR%20and%20CRC%20Block%20Check%20Manual.pdf>
48 <http://bitsavers.org/pdf/dec/unibus/KG11A_EngrDrws.pdf>
49 A Painless Guide to CRC Error Detection Algorithms, Ross N. Williams
50 <http://www.ross.net/crc/download/crc_v3.txt">
52 The original PDP-11 instruction set, as implemented in the /20,
53 /15, /10, and /5, did not include XOR. [One of the differences
54 tables incorrectly indicates the /04 does not implement this
55 instruction.] This device implements XOR, XORB, and a variety of
58 The maintenance prints indicate that the device was probably available
59 starting in late 1971. May need to check further. The first edition
60 of the manual was May 1972.
62 The device was still sold at least as late as mid-1982 according
63 to the PDP-11 Systems and Options Summary. RSTS/E included support
64 for up to 8 units in support of the 2780 emulation or for use with
65 DP11, DU11, or DUP11. The device appears to have been retired by
66 1983-03, and possibly earlier.
70 SR 7707x0 (read-write) status
71 BCC 7707x2 (read-only) BCC (block check character)
72 DR 7707x4 (write-only) data
78 The KG11-A is a programmed-I/O, non-interrupting device. Therefore
79 no vector or bus request level are necessary. It is a Unibus device
80 but since it does not address memory itself (it only presents
81 registers in the I/O page) it is compatible with extended Unibus
82 machines (22-bit) as well as traditional Unibus.
84 Implements 5 error detection codes:
92 #if !defined (VM_PDP11)
93 #error "KG11 is not supported!"
95 #include "pdp11_defs.h"
105 /* Control and Status Register */
107 #define KGSR_V_QUO (8) /* RO */
108 #define KGSR_V_DONE (7) /* RO */
109 #define KGSR_V_SEN (6) /* R/W shift enable */
110 #define KGSR_V_STEP (5) /* W */
111 #define KGSR_V_CLR (4) /* W */
112 #define KGSR_V_DDB (3) /* R/W double data byte */
113 #define KGSR_V_CRCIC (2) /* R/W */
114 #define KGSR_V_LRC (1) /* R/W */
115 #define KGSR_V_16 (0) /* R/W */
117 #define KGSR_M_QUO (1u << KGSR_V_QUO)
118 #define KGSR_M_DONE (1u << KGSR_V_DONE)
119 #define KGSR_M_SEN (1u << KGSR_V_SEN)
120 #define KGSR_M_STEP (1u << KGSR_V_STEP)
121 #define KGSR_M_CLR (1u << KGSR_V_CLR)
122 #define KGSR_M_DDB (1u << KGSR_V_DDB)
123 #define KGSR_M_CRCIC (1u << KGSR_V_CRCIC)
124 #define KGSR_M_LRC (1u << KGSR_V_LRC)
125 #define KGSR_M_16 (1u << KGSR_V_16)
127 #define KG_SR_RDMASK (KGSR_M_QUO | KGSR_M_DONE | KGSR_M_SEN | KGSR_M_DDB | \
128 KGSR_M_CRCIC | KGSR_M_LRC | KGSR_M_16)
129 #define KG_SR_WRMASK (KGSR_M_SEN | KGSR_M_DDB | KGSR_M_CRCIC | \
130 KGSR_M_LRC | KGSR_M_16)
132 #define KG_SR_POLYMASK (KGSR_M_CRCIC|KGSR_M_LRC|KGSR_M_16)
134 /* Unit structure redefinitions */
140 #define POLY_LRC8 (0x0008)
141 #define POLY_LRC16 (0x0080)
142 #define POLY_CRC12 (0x0f01)
143 #define POLY_CRC16 (0xa001)
144 #define POLY_CCITT (0x8408)
146 static const struct {
149 const char * const name
;
152 { POLY_CRC12
, 6, "CRC-12" },
153 { POLY_CRC16
, 8, "CRC-16" },
154 { POLY_LRC8
, 8, "LRC-8" },
155 { POLY_LRC16
, 8, "LRC-16" },
156 { 0, 0, "undefined" },
157 { POLY_CCITT
, 8, "CRC-CCITT" },
158 { 0, 0, "undefined" },
159 { 0, 0, "undefined" },
161 { POLY_CRC12
, 12, "CRC-12" },
162 { POLY_CRC16
, 16, "CRC-16" },
163 { POLY_LRC8
, 16, "LRC-8" },
164 { POLY_LRC16
, 16, "LRC-16" },
165 { 0, 0, "undefined" },
166 { POLY_CCITT
, 16, "CRC-CCITT" },
167 { 0, 0, "undefined" },
168 { 0, 0, "undefined" }
171 /* Forward declarations */
173 static t_stat
kg_rd (int32
*, int32
, int32
);
174 static t_stat
kg_wr (int32
, int32
, int32
);
175 static t_stat
kg_reset (DEVICE
*);
176 static void do_poly (int, t_bool
);
177 static t_stat
set_units (UNIT
*, int32
, char *, void *);
179 /* 16-bit rotate right */
181 #define ROR(n,v) (((v >> n) & DMASK) | (v << (16 - n)) & DMASK)
183 /* 8-bit rotate right */
185 #define RORB(n,v) (((v & 0377) >> n) | ((v << (8 - n)) & 0377))
187 /* KG data structures
189 kg_dib KG PDP-11 device information block
190 kg_unit KG unit descriptor
191 kg_reg KG register list
192 kg_mod KG modifiers table
193 kg_debug KG debug names table
194 kg_dev KG device descriptor
197 static DIB kg_dib
= {
199 (IOLN_KG
+ 2) * KG_UNITS
,
205 static UNIT kg_unit
[] = {
206 { UDATA (NULL
, 0, 0) },
207 { UDATA (NULL
, UNIT_DISABLE
+ UNIT_DIS
, 0) },
208 { UDATA (NULL
, UNIT_DISABLE
+ UNIT_DIS
, 0) },
209 { UDATA (NULL
, UNIT_DISABLE
+ UNIT_DIS
, 0) },
210 { UDATA (NULL
, UNIT_DISABLE
+ UNIT_DIS
, 0) },
211 { UDATA (NULL
, UNIT_DISABLE
+ UNIT_DIS
, 0) },
212 { UDATA (NULL
, UNIT_DISABLE
+ UNIT_DIS
, 0) },
213 { UDATA (NULL
, UNIT_DISABLE
+ UNIT_DIS
, 0) },
216 static const REG kg_reg
[] = {
217 { ORDATA (SR0
, kg_unit
[0].SR
, 16) },
218 { ORDATA (SR1
, kg_unit
[1].SR
, 16) },
219 { ORDATA (SR2
, kg_unit
[2].SR
, 16) },
220 { ORDATA (SR3
, kg_unit
[3].SR
, 16) },
221 { ORDATA (SR4
, kg_unit
[4].SR
, 16) },
222 { ORDATA (SR5
, kg_unit
[5].SR
, 16) },
223 { ORDATA (SR6
, kg_unit
[6].SR
, 16) },
224 { ORDATA (SR7
, kg_unit
[7].SR
, 16) },
225 { ORDATA (BCC0
, kg_unit
[0].BCC
, 16) },
226 { ORDATA (BCC1
, kg_unit
[1].BCC
, 16) },
227 { ORDATA (BCC2
, kg_unit
[2].BCC
, 16) },
228 { ORDATA (BCC3
, kg_unit
[3].BCC
, 16) },
229 { ORDATA (BCC4
, kg_unit
[4].BCC
, 16) },
230 { ORDATA (BCC5
, kg_unit
[5].BCC
, 16) },
231 { ORDATA (BCC6
, kg_unit
[6].BCC
, 16) },
232 { ORDATA (BCC7
, kg_unit
[7].BCC
, 16) },
233 { ORDATA (DR0
, kg_unit
[0].DR
, 16) },
234 { ORDATA (DR1
, kg_unit
[1].DR
, 16) },
235 { ORDATA (DR2
, kg_unit
[2].DR
, 16) },
236 { ORDATA (DR3
, kg_unit
[3].DR
, 16) },
237 { ORDATA (DR4
, kg_unit
[4].DR
, 16) },
238 { ORDATA (DR5
, kg_unit
[5].DR
, 16) },
239 { ORDATA (DR6
, kg_unit
[6].DR
, 16) },
240 { ORDATA (DR7
, kg_unit
[7].DR
, 16) },
241 { ORDATA (PULSCNT0
, kg_unit
[0].PULSCNT
, 16) },
242 { ORDATA (PULSCNT1
, kg_unit
[1].PULSCNT
, 16) },
243 { ORDATA (PULSCNT2
, kg_unit
[2].PULSCNT
, 16) },
244 { ORDATA (PULSCNT3
, kg_unit
[3].PULSCNT
, 16) },
245 { ORDATA (PULSCNT4
, kg_unit
[4].PULSCNT
, 16) },
246 { ORDATA (PULSCNT5
, kg_unit
[5].PULSCNT
, 16) },
247 { ORDATA (PULSCNT6
, kg_unit
[6].PULSCNT
, 16) },
248 { ORDATA (PULSCNT7
, kg_unit
[7].PULSCNT
, 16) },
249 { ORDATA (DEVADDR
, kg_dib
.ba
, 32), REG_HRO
},
253 static const MTAB kg_mod
[] = {
254 { MTAB_XTD
|MTAB_VDV
, 0, "ADDRESS", NULL
, NULL
, &show_addr
, NULL
},
255 { MTAB_XTD
|MTAB_VDV
, 0, NULL
, "UNITS=0..8", &set_units
, NULL
, NULL
},
260 #define DBG_POLY (02)
261 #define DBG_CYCLE (04)
263 static const DEBTAB kg_debug
[] = {
266 {"CYCLE", DBG_CYCLE
},
271 "KG", (UNIT
*) &kg_unit
, (REG
*) kg_reg
, (MTAB
*) kg_mod
,
272 KG_UNITS
, 8, 16, 2, 8, 16,
275 &kg_reset
, /* reset */
280 DEV_DISABLE
| DEV_DIS
| DEV_UBUS
| DEV_DEBUG
,
281 0, /* debug control */
282 (DEBTAB
*) &kg_debug
, /* debug flags */
283 NULL
, /* memory size chage */
284 NULL
/* logical name */
286 \f /* KG I/O address routines */
288 static t_stat
kg_rd (int32
*data
, int32 PA
, int32 access
)
290 int unit
= (PA
>> 3) & 07;
292 if ((unit
>= KG_UNITS
) || (kg_unit
[unit
].flags
& UNIT_DIS
))
294 switch ((PA
>> 1) & 03) {
297 if (DEBUG_PRI(kg_dev
, DBG_REG
))
298 fprintf (sim_deb
, ">>KG%d: rd SR %06o, PC %06o\n",
299 unit
, kg_unit
[unit
].SR
, PC
);
300 *data
= kg_unit
[unit
].SR
& KG_SR_RDMASK
;
304 if (DEBUG_PRI(kg_dev
, DBG_REG
))
305 fprintf (sim_deb
, ">>KG%d rd BCC %06o, PC %06o\n",
306 unit
, kg_unit
[unit
].BCC
, PC
);
307 *data
= kg_unit
[unit
].BCC
& DMASK
;
319 static t_stat
kg_wr (int32 data
, int32 PA
, int32 access
)
322 int unit
= (PA
>> 3) & 07;
324 if ((unit
>= KG_UNITS
) || (kg_unit
[unit
].flags
& UNIT_DIS
))
326 switch ((PA
>> 1) & 03) {
329 if (access
== WRITEB
)
331 (kg_unit
[unit
].SR
& 0377) | (data
<< 8) :
332 (kg_unit
[unit
].SR
& ~0377) | data
;
333 if (DEBUG_PRI(kg_dev
, DBG_REG
))
334 fprintf (sim_deb
, ">>KG%d: wr SR %06o, PC %06o\n",
336 if (data
& KGSR_M_CLR
) {
337 kg_unit
[unit
].PULSCNT
= 0; /* not sure about this */
338 kg_unit
[unit
].BCC
= 0;
339 kg_unit
[unit
].SR
|= KGSR_M_DONE
;
341 setup
= (kg_unit
[unit
].SR
& 017) ^ (data
& 017);
342 kg_unit
[unit
].SR
= (kg_unit
[unit
].SR
& ~KG_SR_WRMASK
) |
343 (data
& KG_SR_WRMASK
);
344 /* if low 4b changed, reset C1 & C2 */
346 kg_unit
[unit
].PULSCNT
= 0;
347 if (DEBUG_PRI(kg_dev
, DBG_POLY
))
348 fprintf (sim_deb
, ">>KG%d poly %s %d\n",
349 unit
, config
[data
& 017].name
, config
[data
& 017].pulses
);
351 if (data
& KGSR_M_SEN
)
353 if (data
& KGSR_M_STEP
) {
354 do_poly (unit
, TRUE
);
363 if (access
== WRITEB
)
365 (kg_unit
[unit
].DR
& 0377) | (data
<< 8) :
366 (kg_unit
[unit
].DR
& ~0377) | data
;
367 kg_unit
[unit
].DR
= data
& DMASK
;
368 if (DEBUG_PRI(kg_dev
, DBG_REG
))
369 fprintf (sim_deb
, ">>KG%d: wr DR %06o, data %06o, PC %06o\n",
370 unit
, kg_unit
[unit
].DR
, data
, PC
);
371 kg_unit
[unit
].SR
&= ~KGSR_M_DONE
;
373 /* In a typical device, this is normally where we would use sim_activate()
374 to initiate an I/O to be completed later. The KG is a little
375 different. When it was first introduced, it's computation operation
376 completed before another instruction could execute (on early PDP-11s),
377 and software often took "advantage" of this fact by not bothering
378 to check the status of the DONE bit. In reality, the execution
379 time of the polynomial is dependent upon the width of the poly; if
380 8 bits 1us, if 16 bits, 2us. Since known existing software will
381 break if we actually defer the computation, it is performed immediately
382 instead. However this could easily be made into a run-time option,
383 if there were software to validate correct operation. */
385 if (kg_unit
[unit
].SR
& KGSR_M_SEN
)
386 do_poly (unit
, FALSE
);
397 static t_stat
kg_reset (DEVICE
*dptr
)
401 if (DEBUG_PRI(kg_dev
, DBG_REG
))
402 fprintf (sim_deb
, ">>KG: reset PC %06o\n", PC
);
403 for (i
= 0; i
< KG_UNITS
; i
++) {
404 kg_unit
[i
].SR
= KGSR_M_DONE
;
406 kg_unit
[i
].PULSCNT
= 0;
411 static void cycleOneBit (int unit
)
415 if (DEBUG_PRI(kg_dev
, DBG_CYCLE
))
416 fprintf (sim_deb
, ">>KG%d: cycle s BCC %06o DR %06o\n",
417 unit
, kg_unit
[unit
].BCC
, kg_unit
[unit
].DR
);
418 if (kg_unit
[unit
].SR
& KGSR_M_DONE
)
420 if ((kg_unit
[unit
].SR
& KG_SR_POLYMASK
) == 0)
421 kg_unit
[unit
].BCC
= (kg_unit
[unit
].BCC
& 077) |
422 ((kg_unit
[unit
].BCC
>> 2) & 07700);
423 kg_unit
[unit
].SR
&= ~KGSR_M_QUO
;
424 quo
= (kg_unit
[unit
].BCC
& 01) ^ (kg_unit
[unit
].DR
& 01);
425 kg_unit
[unit
].BCC
= (kg_unit
[unit
].BCC
& ~01) | quo
;
426 if (kg_unit
[unit
].SR
& KGSR_M_LRC
)
427 kg_unit
[unit
].BCC
= (kg_unit
[unit
].SR
& KGSR_M_16
) ?
428 ROR(1, kg_unit
[unit
].BCC
) :
429 RORB(1, kg_unit
[unit
].BCC
);
431 kg_unit
[unit
].BCC
= (kg_unit
[unit
].BCC
& 01) ?
432 (kg_unit
[unit
].BCC
>> 1) ^ config
[kg_unit
[unit
].SR
& 07].poly
:
433 kg_unit
[unit
].BCC
>> 1;
434 kg_unit
[unit
].DR
>>= 1;
435 kg_unit
[unit
].SR
|= quo
<< KGSR_V_QUO
;
436 if ((kg_unit
[unit
].SR
& KG_SR_POLYMASK
) == 0)
437 kg_unit
[unit
].BCC
= (kg_unit
[unit
].BCC
& 077) |
438 ((kg_unit
[unit
].BCC
& 07700) << 2);
439 kg_unit
[unit
].PULSCNT
++;
440 if (kg_unit
[unit
].PULSCNT
>= config
[kg_unit
[unit
].SR
& 017].pulses
)
441 kg_unit
[unit
].SR
|= KGSR_M_DONE
;
442 if (DEBUG_PRI(kg_dev
, DBG_CYCLE
))
443 fprintf (sim_deb
, ">>KG%d: cycle e BCC %06o DR %06o\n",
444 unit
, kg_unit
[unit
].BCC
, kg_unit
[unit
].DR
);
447 static void do_poly (int unit
, t_bool step
)
449 if (kg_unit
[unit
].SR
& KGSR_M_DONE
)
454 while (!(kg_unit
[unit
].SR
& KGSR_M_DONE
))
459 static t_stat
set_units (UNIT
*u
, int32 val
, char *s
, void *desc
)
466 units
= get_uint (s
, 10, KG_UNITS
, &stat
);
469 for (i
= 0; i
< KG_UNITS
; i
++) {
471 kg_unit
[i
].flags
&= ~UNIT_DIS
;
473 kg_unit
[i
].flags
|= UNIT_DIS
;
475 kg_dev
.numunits
= units
;