1 /* pdp11_rc.c: RC11/RS64 fixed head disk simulator
3 Copyright (c) 2007-2008, John A. Dundas III
5 Permission is hereby granted, free of charge, to any person obtaining a
6 copy of this software and associated documentation files (the "Software"),
7 to deal in the Software without restriction, including without limitation
8 the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 and/or sell copies of the Software, and to permit persons to whom the
10 Software is furnished to do so, subject to the following conditions:
12 The above copyright notice and this permission notice shall be included in
13 all copies or substantial portions of the Software.
15 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19 IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 Except as contained in this notice, the name of the author shall not be
23 used in advertising or otherwise to promote the sale, use or other dealings
24 in this Software without prior written authorization from the author.
26 rc RC11/RS64 fixed head disk
28 28-Dec-07 JAD Correct extraction of unit number from da in rc_svc.
29 Clear _all_ error bits when a new operation starts.
30 Passes all diagnostics in all configurations.
31 25-Dec-07 JAD Compute the CRC-16 of the last sector read via
33 20-Dec-07 JAD Correctly simulate rotation over the selected
34 track for RCLA. Also update the register
35 correctly during I/O operations.
36 Insure function activation time is non-zero.
37 Handle unit number wrap correctly.
38 19-Dec-07 JAD Iterate over a full sector regardless of the
39 actual word count so that RCDA ends correctly.
40 Honor the read-only vs. read-write status of the
42 16-Dec-07 JAD The RCDA must be checked for validity when it is
43 written to, not just when GO is received.
44 15-Dec-07 JAD Better handling of disk address errors and the RCLA
46 Add more registers to the visible device state.
47 07-Jan-07 JAD Initial creation and testing. Adapted from pdp11_rf.c.
49 The RS64 is a head-per-track disk. To minimize overhead, the entire RC11
50 is buffered in memory. Up to 4 RS64 "platters" may be controlled by one
51 RC11 for a total of 262,144 words (65536kW/platter). [Later in time the
52 RK611 was assigned the same CSR address.]
55 ZRCAB0.BIC - passes w/1-4 platters
56 ZRCBB0.BIC - passes w/1-4 platters
57 ZRCCB0.BIC - passes w/1-4 platters
58 Note that the diagnostics require R/W disks (i.e., will destroy any
61 For regression, must pass all three diagnostics configured for 1-4
62 platters for a total of 12 tests.
64 Information necessary to create this simulation was gathered from the
65 PDP11 Peripherals Handbook, 1973-74 edition.
67 One timing parameter is provided:
69 rc_time Minimum I/O operation time, must be non-zero
72 #if !defined (VM_PDP11)
73 #error "RC11 is not supported!"
75 #include "pdp11_defs.h"
78 #define UNIT_V_AUTO (UNIT_V_UF + 0) /* autosize */
79 #define UNIT_V_PLAT (UNIT_V_UF + 1) /* #platters - 1 */
80 #define UNIT_M_PLAT 03
81 #define UNIT_GETP(x) ((((x) >> UNIT_V_PLAT) & UNIT_M_PLAT) + 1)
82 #define UNIT_AUTO (1 << UNIT_V_AUTO)
83 #define UNIT_PLAT (UNIT_M_PLAT << UNIT_V_PLAT)
87 #define RC_NUMWD (32*64) /* words/track */
88 #define RC_NUMTR 32 /* tracks/disk */
89 #define RC_DKSIZE (RC_NUMTR * RC_NUMWD) /* words/disk */
90 #define RC_NUMDK 4 /* disks/controller */
91 #define RC_WMASK (RC_NUMWD - 1) /* word mask */
93 /* Parameters in the unit descriptor */
95 #define FUNC u4 /* function */
97 /* Control and status register (RCCS) */
99 #define RCCS_ERR (CSR_ERR) /* error */
100 #define RCCS_DATA 0040000 /* data error */
101 #define RCCS_ADDR 0020000 /* address error */
102 #define RCCS_WLK 0010000 /* write lock */
103 #define RCCS_NED 0004000 /* nx disk */
104 #define RCCS_WCHK 0002000 /* write check */
105 #define RCCS_INH 0001000 /* inhibit CA incr */
106 #define RCCS_ABO 0000400 /* abort */
107 #define RCCS_DONE (CSR_DONE)
108 #define RCCS_IE (CSR_IE)
109 #define RCCS_M_MEX 0000003 /* memory extension */
111 #define RCCS_MEX (RCCS_M_MEX << RCCS_V_MEX)
112 #define RCCS_MAINT 0000010 /* maint */
113 #define RCCS_M_FUNC 0000003 /* function */
118 #define RCCS_V_FUNC 1
119 #define RCCS_FUNC (RCCS_M_FUNC << RCCS_V_FUNC)
120 #define RCCS_GO 0000001
122 #define RCCS_ALLERR (RCCS_DATA|RCCS_ADDR|RCCS_WLK|RCCS_NED|RCCS_WCHK)
123 #define RCCS_W (RCCS_INH | RCCS_ABO |RCCS_IE | RCCS_MEX | RCCS_MAINT | \
126 /* Disk error status register (RCER) */
128 #define RCER_DLT 0100000 /* data late */
129 #define RCER_CHK 0040000 /* block check */
130 #define RCER_SYNC 0020000 /* data sync */
131 #define RCER_NXM 0010000 /* nonexistant memory */
132 #define RCER_TRK 0001000 /* track error */
133 #define RCER_APAR 0000200 /* address parity */
134 #define RCER_SADDR 0000100 /* sync address */
135 #define RCER_OVFL 0000040 /* disk overflow */
136 #define RCER_MIS 0000020 /* missed transfer */
138 /* Lood Ahead Register (RCLA) */
140 #define RCLA_BADD 0100000 /* bad address */
142 /* extract device operation code */
143 #define GET_FUNC(x) (((x) >> RCCS_V_FUNC) & RCCS_M_FUNC)
144 /* extract memory extension address (bits 17,18) */
145 #define GET_MEX(x) (((x) & RCCS_MEX) << (16 - RCCS_V_MEX))
146 #define GET_POS(x) ((int) fmod (sim_gtime() / ((double) (x)), \
147 ((double) RC_NUMWD)))
149 extern int32 int_req
[IPL_HLVL
];
150 extern FILE *sim_deb
;
153 static uint32 rc_la
= 0; /* look-ahead */
154 static uint32 rc_da
= 0; /* disk address */
155 static uint32 rc_er
= 0; /* error status */
156 static uint32 rc_cs
= 0; /* command and status */
157 static uint32 rc_wc
= 0; /* word count */
158 static uint32 rc_ca
= 0; /* current address */
159 static uint32 rc_maint
= 0; /* maintenance */
160 static uint32 rc_db
= 0; /* data buffer */
161 static uint32 rc_wlk
= 0; /* write lock */
162 static uint32 rc_time
= 16; /* inter-word time: 16us */
163 static uint32 rc_stopioe
= 1; /* stop on error */
165 /* forward references */
168 static t_stat
rc_rd (int32
*, int32
, int32
);
169 static t_stat
rc_wr (int32
, int32
, int32
);
170 static t_stat
rc_svc (UNIT
*);
171 static t_stat
rc_reset (DEVICE
*);
172 static t_stat
rc_attach (UNIT
*, char *);
173 static t_stat
rc_set_size (UNIT
*, int32
, char *, void *);
174 static uint32
update_rccs (uint32
, uint32
);
176 /* RC11 data structures
178 rc_dev RC device descriptor
179 rc_unit RC unit descriptor
180 rc_reg RC register list
183 static DIB rc_dib
= {
188 1, IVCL (RC
), VEC_RC
, { NULL
}
191 static UNIT rc_unit
= {
192 UDATA (&rc_svc
, UNIT_FIX
+ UNIT_ATTABLE
+ UNIT_BUFABLE
+
193 UNIT_MUSTBUF
+ UNIT_ROABLE
+ UNIT_BINK
, RC_DKSIZE
)
196 static const REG rc_reg
[] = {
197 { ORDATA (RCLA
, rc_la
, 16) },
198 { ORDATA (RCDA
, rc_da
, 16) },
199 { ORDATA (RCER
, rc_er
, 16) },
200 { ORDATA (RCCS
, rc_cs
, 16) },
201 { ORDATA (RCWC
, rc_wc
, 16) },
202 { ORDATA (RCCA
, rc_ca
, 16) },
203 { ORDATA (RCMN
, rc_maint
, 16) },
204 { ORDATA (RCDB
, rc_db
, 16) },
205 { ORDATA (RCWLK
, rc_wlk
, 32) },
206 { FLDATA (INT
, IREQ (RC
), INT_V_RC
) },
207 { FLDATA (ERR
, rc_cs
, CSR_V_ERR
) },
208 { FLDATA (DONE
, rc_cs
, CSR_V_DONE
) },
209 { FLDATA (IE
, rc_cs
, CSR_V_IE
) },
210 { DRDATA (TIME
, rc_time
, 24), REG_NZ
+ PV_LEFT
},
211 { FLDATA (STOP_IOE
, rc_stopioe
, 0) },
212 { ORDATA (DEVADDR
, rc_dib
.ba
, 32), REG_HRO
},
213 { ORDATA (DEVVEC
, rc_dib
.vec
, 16), REG_HRO
},
217 static const MTAB rc_mod
[] = {
218 { UNIT_PLAT
, (0 << UNIT_V_PLAT
), NULL
, "1P", &rc_set_size
},
219 { UNIT_PLAT
, (1 << UNIT_V_PLAT
), NULL
, "2P", &rc_set_size
},
220 { UNIT_PLAT
, (2 << UNIT_V_PLAT
), NULL
, "3P", &rc_set_size
},
221 { UNIT_PLAT
, (3 << UNIT_V_PLAT
), NULL
, "4P", &rc_set_size
},
222 { UNIT_AUTO
, UNIT_AUTO
, "autosize", "AUTOSIZE", NULL
},
223 { MTAB_XTD
|MTAB_VDV
, 020, "ADDRESS", "ADDRESS",
224 &set_addr
, &show_addr
, NULL
},
225 { MTAB_XTD
|MTAB_VDV
, 0, "VECTOR", "VECTOR",
226 &set_vec
, &show_vec
, NULL
},
231 "RC", &rc_unit
, (REG
*) rc_reg
, (MTAB
*) rc_mod
,
235 &rc_reset
, /* reset */
237 &rc_attach
, /* attach */
240 DEV_DISABLE
| DEV_DIS
| DEV_UBUS
| DEV_DEBUG
243 /* I/O dispatch routine, I/O addresses 17777440 - 17777456 */
245 static t_stat
rc_rd (int32
*data
, int32 PA
, int32 access
)
249 switch ((PA
>> 1) & 07) { /* decode PA<3:1> */
253 if ((rc_cs
& RCCS_NED
) || (rc_er
& RCER_OVFL
))
256 /* simulate sequential rotation about the current track */
257 rc_la
= (rc_la
& ~077) | ((rc_la
+ 1) & 077);
258 if (DEBUG_PRS (rc_dev
))
259 fprintf (sim_deb
, ">>RC rd: RCLA %06o\n", rc_la
);
264 if (DEBUG_PRS (rc_dev
))
265 fprintf (sim_deb
, ">>RC rd: RCDA %06o, PC %06o\n",
271 if (DEBUG_PRS (rc_dev
))
272 fprintf (sim_deb
, ">>RC rd: RCER %06o\n", rc_er
);
276 *data
= update_rccs (0, 0) & ~(RCCS_ABO
| RCCS_GO
);
277 if (DEBUG_PRS (rc_dev
))
278 fprintf (sim_deb
, ">>RC rd: RCCS %06o\n", *data
);
283 if (DEBUG_PRS (rc_dev
))
284 fprintf (sim_deb
, ">>RC rd: RCWC %06o\n", rc_wc
);
289 if (DEBUG_PRS (rc_dev
))
290 fprintf (sim_deb
, ">>RC rd: RCCA %06o\n", rc_ca
);
295 if (DEBUG_PRS (rc_dev
))
296 fprintf (sim_deb
, ">>RC rd: RCMN %06o\n", rc_maint
);
301 if (DEBUG_PRS (rc_dev
))
302 fprintf (sim_deb
, ">>RC rd: RCDB %06o\n", rc_db
);
306 return (SCPE_NXM
); /* can't happen */
311 static t_stat
rc_wr (int32 data
, int32 PA
, int32 access
)
315 switch ((PA
>> 1) & 07) { /* decode PA<3:1> */
318 if (DEBUG_PRS (rc_dev
))
319 fprintf (sim_deb
, ">>RC wr: RCLA\n");
320 break; /* read only */
323 if (access
== WRITEB
)
325 (rc_da
& 0377) | (data
<< 8) :
326 (rc_da
& ~0377) | data
;
327 rc_da
= data
& 017777;
330 /* perform unit select */
331 if (((rc_da
>> 11) & 03) >= UNIT_GETP(rc_unit
.flags
))
332 update_rccs (RCCS_NED
, 0);
335 if (DEBUG_PRS (rc_dev
))
336 fprintf (sim_deb
, ">>RC wr: RCDA %06o, PC %06o\n",
341 if (DEBUG_PRS (rc_dev
))
342 fprintf (sim_deb
, ">>RC wr: RCER\n");
343 break; /* read only */
346 if (access
== WRITEB
)
348 (rc_cs
& 0377) | (data
<< 8) :
349 (rc_cs
& ~0377) | data
;
350 if (data
& RCCS_ABO
) {
351 update_rccs (RCCS_DONE
, 0);
352 sim_cancel (&rc_unit
);
354 if ((data
& RCCS_IE
) == 0) /* int disable? */
355 CLR_INT (RC
); /* clr int request */
356 else if ((rc_cs
& (RCCS_DONE
| RCCS_IE
)) == RCCS_DONE
)
357 SET_INT (RC
); /* set int request */
358 rc_cs
= (rc_cs
& ~RCCS_W
) | (data
& RCCS_W
); /* merge */
359 if ((rc_cs
& RCCS_DONE
) && (data
& RCCS_GO
)) { /* new function? */
360 rc_unit
.FUNC
= GET_FUNC (data
); /* save function */
361 t
= (rc_da
& RC_WMASK
) - GET_POS (rc_time
); /* delta to new loc */
362 if (t
<= 0) /* wrap around? */
364 sim_activate (&rc_unit
, t
* rc_time
); /* schedule op */
365 /* clear error indicators for new operation */
366 rc_cs
&= ~(RCCS_ALLERR
| RCCS_ERR
| RCCS_DONE
);
369 if (DEBUG_PRS (rc_dev
))
370 fprintf (sim_deb
, ">>RC start: cs = %o, da = %o, ma = %o, wc = %o\n",
371 update_rccs (0, 0), rc_da
,
372 GET_MEX (rc_cs
) | rc_ca
, rc_wc
);
377 if (access
== WRITEB
)
379 (rc_wc
& 0377) | (data
<< 8) :
380 (rc_wc
& ~0377) | data
;
381 rc_wc
= data
& DMASK
;
382 if (DEBUG_PRS (rc_dev
))
383 fprintf (sim_deb
, ">>RC wr: RCWC %06o, PC %06o\n",
388 /* TBD: write byte fixup? */
389 rc_ca
= data
& 0177776;
390 if (DEBUG_PRS (rc_dev
))
391 fprintf (sim_deb
, ">>RC wr: RCCA %06o\n", rc_ca
);
395 /* TBD: write byte fixup? */
396 rc_maint
= data
& 0177700;
397 if (DEBUG_PRS (rc_dev
))
398 fprintf (sim_deb
, ">>RC wr: RCMN %06o\n", rc_maint
);
402 if (DEBUG_PRS (rc_dev
))
403 fprintf (sim_deb
, ">>RC wr: RCDB\n");
404 break; /* read only */
406 default: /* can't happen */
413 /* sector (32W) CRC-16 */
415 static uint32
sectorCRC (const uint16
*data
)
420 for (i
= 0; i
< 32; i
++) {
422 /* cribbed from KG11-A */
423 for (j
= 0; j
< 16; j
++) {
424 crc
= (crc
& ~01) | ((crc
& 01) ^ (d
& 01));
425 crc
= (crc
& 01) ? (crc
>> 1) ^ 0120001 : crc
>> 1;
434 Note that for reads and writes, memory addresses wrap around in the
435 current field. This code assumes the entire disk is buffered.
438 static t_stat
rc_svc (UNIT
*uptr
)
440 uint32 ma
, da
, t
, u_old
, u_new
, last_da
;
442 uint16
*fbuf
= uptr
->filebuf
;
444 if ((uptr
->flags
& UNIT_BUF
) == 0) { /* not buf? abort */
445 update_rccs (RCCS_NED
| RCCS_DONE
, 0); /* nx disk */
446 return (IORETURN (rc_stopioe
, SCPE_UNATT
));
449 ma
= GET_MEX (rc_cs
) | rc_ca
; /* 18b mem addr */
450 da
= rc_da
* RC_NUMTR
; /* sector->word offset */
451 u_old
= (da
>> 16) & 03; /* save starting unit# */
453 u_new
= (da
>> 16) & 03;
454 if (u_new
< u_old
) { /* unit # overflow? */
455 update_rccs (RCCS_NED
, RCER_OVFL
);
458 if (u_new
>= UNIT_GETP(uptr
->flags
)) { /* disk overflow? */
459 update_rccs (RCCS_NED
, 0);
462 if (uptr
->FUNC
== RFNC_READ
) { /* read? */
464 dat
= fbuf
[da
]; /* get disk data */
466 if (Map_WriteW (ma
, 2, &dat
)) { /* store mem, nxm? */
467 update_rccs (0, RCER_NXM
);
470 } else if (uptr
->FUNC
== RFNC_WCHK
) { /* write check? */
472 rc_db
= fbuf
[da
]; /* get disk data */
473 if (Map_ReadW (ma
, 2, &dat
)) { /* read mem, nxm? */
474 update_rccs (0, RCER_NXM
);
477 if (rc_db
!= dat
) { /* miscompare? */
478 update_rccs (RCCS_WCHK
, 0);
481 } else if (uptr
->FUNC
== RFNC_WRITE
) { /* write */
482 t
= (da
>> 15) & 037;
483 if (((rc_wlk
>> t
) & 1) ||
484 (uptr
->flags
& UNIT_RO
)) { /* write locked? */
485 update_rccs (RCCS_WLK
, 0);
489 if (Map_ReadW (ma
, 2, &dat
)) { /* read mem, nxm? */
490 update_rccs (0, RCER_NXM
);
493 fbuf
[da
] = dat
; /* write word */
495 if (da
>= uptr
->hwmark
)
496 uptr
->hwmark
= da
+ 1;
497 } else { /* look ahead */
498 break; /* no op for now */
500 rc_wc
= (rc_wc
+ 1) & DMASK
; /* incr word count */
501 da
= (da
+ 1) & 0777777; /* incr disk addr */
502 if ((rc_cs
& RCCS_INH
) == 0) /* inhibit clear? */
503 ma
= (ma
+ 2) & UNIMASK
; /* incr mem addr */
504 } while (rc_wc
!= 0); /* brk if wc */
505 rc_ca
= ma
& DMASK
; /* split ma */
506 rc_cs
= (rc_cs
& ~RCCS_MEX
) | ((ma
>> (16 - RCCS_V_MEX
)) & RCCS_MEX
);
508 rc_da
= (da
>> 5) & 017777;
509 /* CRC of last 32W, if necessary */
510 if ((uptr
->FUNC
== RFNC_READ
) || (uptr
->FUNC
== RFNC_WCHK
))
511 rc_db
= sectorCRC (&fbuf
[last_da
]);
512 if (uptr
->FUNC
!= RFNC_LAH
)
514 update_rccs (RCCS_DONE
, 0);
515 if (DEBUG_PRS (rc_dev
))
516 fprintf (sim_deb
, ">>RC done: cs = %o, da = %o, ma = %o, wc = %o\n",
517 rc_cs
, rc_da
, rc_ca
, rc_wc
);
521 /* Update CS register */
523 static uint32
update_rccs (uint32 newcs
, uint32 newer
)
525 uint32 oldcs
= rc_cs
;
527 rc_er
|= newer
; /* update RCER */
528 rc_cs
|= newcs
; /* update CS */
529 if ((rc_cs
& RCCS_ALLERR
) || (rc_er
!= 0)) /* update CS<err> */
533 if ((rc_cs
& RCCS_IE
) && /* IE and */
534 (rc_cs
& RCCS_DONE
) && !(oldcs
& RCCS_DONE
)) /* done 0->1? */
541 static t_stat
rc_reset (DEVICE
*dptr
)
551 sim_cancel (&rc_unit
);
557 static t_stat
rc_attach (UNIT
*uptr
, char *cptr
)
560 static const uint32 ds_bytes
= RC_DKSIZE
* sizeof (int16
);
562 if ((uptr
->flags
& UNIT_AUTO
) && (sz
= sim_fsize_name (cptr
))) {
563 p
= (sz
+ ds_bytes
- 1) / ds_bytes
;
566 uptr
->flags
= (uptr
->flags
& ~UNIT_PLAT
) | (p
<< UNIT_V_PLAT
);
568 uptr
->capac
= UNIT_GETP (uptr
->flags
) * RC_DKSIZE
;
569 return (attach_unit (uptr
, cptr
));
572 /* Change disk size */
574 static t_stat
rc_set_size (UNIT
*uptr
, int32 val
, char *cptr
, void *desc
)
578 if (uptr
->flags
& UNIT_ATT
)
580 uptr
->capac
= UNIT_GETP (val
) * RC_DKSIZE
;
581 uptr
->flags
= uptr
->flags
& ~UNIT_AUTO
;