PDP11/pdp11_rk.c

   1 /* pdp11_rk.c: RK11/RKV11 cartridge disk simulator
   2
   3    Copyright (c) 1993-2005, Robert M Supnik
   4
   5    Permission is hereby granted, free of charge, to any person obtaining a
   6    copy of this software and associated documentation files (the "Software"),
   7    to deal in the Software without restriction, including without limitation
   8    the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9    and/or sell copies of the Software, and to permit persons to whom the
  10    Software is furnished to do so, subject to the following conditions:
  11
  12    The above copyright notice and this permission notice shall be included in
  13    all copies or substantial portions of the Software.
  14
  15    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18    ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  19    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  20    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  21
  22    Except as contained in this notice, the name of Robert M Supnik shall not be
  23    used in advertising or otherwise to promote the sale, use or other dealings
  24    in this Software without prior written authorization from Robert M Supnik.
  25
  26    rk           RK11/RKV11/RK05 cartridge disk
  27
  28    16-Aug-05    RMS     Fixed C++ declaration and cast problems
  29    07-Jul-05    RMS     Removed extraneous externs
  30    30-Sep-04    RMS     Revised Unibus interface
  31    24-Jan-04    RMS     Added increment inhibit, overrun detection, formatting
  32    29-Dec-03    RMS     Added RKV11 support
  33    29-Sep-02    RMS     Added variable address support to bootstrap
  34                         Added vector change/display support
  35                         Revised mapping mnemonics
  36                         New data structures
  37    26-Jan-02    RMS     Revised bootstrap to conform to M9312
  38    06-Jan-02    RMS     Revised enable/disable support
  39    30-Nov-01    RMS     Added read only unit, extended SET/SHOW support
  40    24-Nov-01    RMS     Converted FLG to array
  41    09-Nov-01    RMS     Added bus map support
  42    07-Sep-01    RMS     Revised device disable and interrupt mechanisms
  43    26-Apr-01    RMS     Added device enable/disable support
  44    25-Mar-01    RMS     Fixed block fill calculation
  45    15-Feb-01    RMS     Corrected bootstrap string
  46    29-Jun-96    RMS     Added unit disable support
  47
  48    The RK11 is an eight drive cartridge disk subsystem.  An RK05 drive
  49    consists of 203 cylinders, each with 2 surfaces containing 12 sectors
  50    of 512 bytes.
  51
  52    The most complicated part of the RK11 controller is the concept of
  53    interrupt "polling".  While only one read or write can occur at a
  54    time, the controller supports multiple seeks.  When a seek completes,
  55    if done is set the drive attempts to interrupt.  If an interrupt is
  56    already pending, the interrupt is "queued" until it can be processed.
  57    When an interrupt occurs, RKDS<15:13> is loaded with the number of the
  58    interrupting drive.
  59
  60    To implement this structure, and to assure that read/write interrupts
  61    take priority over seek interrupts, the controller contains an
  62    interrupt queue, rkintq, with a bit for a controller interrupt and
  63    then one for each drive.  In addition, the drive number of the last
  64    non-seeking drive is recorded in last_drv.
  65 */
  66
  67 #include "pdp11_defs.h"
  68
  69 /* Constants */
  70
  71 #define RK_NUMWD        256                             /* words/sector */
  72 #define RK_NUMSC        12                              /* sectors/surface */
  73 #define RK_NUMSF        2                               /* surfaces/cylinder */
  74 #define RK_NUMCY        203                             /* cylinders/drive */
  75 #define RK_NUMTR        (RK_NUMCY * RK_NUMSF)           /* tracks/drive */
  76 #define RK_NUMDR        8                               /* drives/controller */
  77 #define RK_M_NUMDR      07
  78 #define RK_SIZE         (RK_NUMCY * RK_NUMSF * RK_NUMSC * RK_NUMWD)
  79                                                         /* words/drive */
  80 #define RK_CTLI         1                               /* controller int */
  81 #define RK_SCPI(x)      (2u << (x))                     /* drive int */
  82 #define RK_MAXFR        (1 << 16)                       /* max transfer */
  83
  84 /* Flags in the unit flags word */
  85
  86 #define UNIT_V_HWLK     (UNIT_V_UF + 0)                 /* hwre write lock */
  87 #define UNIT_V_SWLK     (UNIT_V_UF + 1)                 /* swre write lock */
  88 #define UNIT_HWLK       (1u << UNIT_V_HWLK)
  89 #define UNIT_SWLK       (1u << UNIT_V_SWLK)
  90 #define UNIT_WPRT       (UNIT_HWLK|UNIT_SWLK|UNIT_RO)   /* write prot */
  91
  92 /* Parameters in the unit descriptor */
  93
  94 #define CYL             u3                              /* current cylinder */
  95 #define FUNC            u4                              /* function */
  96
  97 /* RKDS */
  98
  99 #define RKDS_SC         0000017                         /* sector counter */
 100 #define RKDS_ON_SC      0000020                         /* on sector */
 101 #define RKDS_WLK        0000040                         /* write locked */
 102 #define RKDS_RWS        0000100                         /* rd/wr/seek ready */
 103 #define RKDS_RDY        0000200                         /* drive ready */
 104 #define RKDS_SC_OK      0000400                         /* SC valid */
 105 #define RKDS_INC        0001000                         /* seek incomplete */
 106 #define RKDS_UNSAFE     0002000                         /* unsafe */
 107 #define RKDS_RK05       0004000                         /* RK05 */
 108 #define RKDS_PWR        0010000                         /* power low */
 109 #define RKDS_ID         0160000                         /* drive ID */
 110 #define RKDS_V_ID       13
 111
 112 /* RKER */
 113
 114 #define RKER_WCE        0000001                         /* write check */
 115 #define RKER_CSE        0000002                         /* checksum */
 116 #define RKER_NXS        0000040                         /* nx sector */
 117 #define RKER_NXC        0000100                         /* nx cylinder */
 118 #define RKER_NXD        0000200                         /* nx drive */
 119 #define RKER_TE         0000400                         /* timing error */
 120 #define RKER_DLT        0001000                         /* data late */
 121 #define RKER_NXM        0002000                         /* nx memory */
 122 #define RKER_PGE        0004000                         /* programming error */
 123 #define RKER_SKE        0010000                         /* seek error */
 124 #define RKER_WLK        0020000                         /* write lock */
 125 #define RKER_OVR        0040000                         /* overrun */
 126 #define RKER_DRE        0100000                         /* drive error */
 127 #define RKER_IMP        0177743                         /* implemented */
 128 #define RKER_SOFT       (RKER_WCE+RKER_CSE)             /* soft errors */
 129 #define RKER_HARD       0177740                         /* hard errors */
 130
 131 /* RKCS */
 132
 133 #define RKCS_M_FUNC     0000007                         /* function */
 134 #define  RKCS_CTLRESET  0
 135 #define  RKCS_WRITE     1
 136 #define  RKCS_READ      2
 137 #define  RKCS_WCHK      3
 138 #define  RKCS_SEEK      4
 139 #define  RKCS_RCHK      5
 140 #define  RKCS_DRVRESET  6
 141 #define  RKCS_WLK       7
 142 #define RKCS_V_FUNC     1
 143 #define RKCS_MEX        0000060                         /* memory extension */
 144 #define RKCS_V_MEX      4
 145 #define RKCS_SSE        0000400                         /* stop on soft err */
 146 #define RKCS_FMT        0002000                         /* format */
 147 #define RKCS_INH        0004000                         /* inhibit increment */
 148 #define RKCS_SCP        0020000                         /* search complete */
 149 #define RKCS_HERR       0040000                         /* hard error */
 150 #define RKCS_ERR        0100000                         /* error */
 151 #define RKCS_REAL       0026776                         /* kept here */
 152 #define RKCS_RW         0006576                         /* read/write */
 153 #define GET_FUNC(x)     (((x) >> RKCS_V_FUNC) & RKCS_M_FUNC)
 154
 155 /* RKDA */
 156
 157 #define RKDA_V_SECT     0                               /* sector */
 158 #define RKDA_M_SECT     017
 159 #define RKDA_V_TRACK    4                               /* track */
 160 #define RKDA_M_TRACK    0777
 161 #define RKDA_V_CYL      5                               /* cylinder */
 162 #define RKDA_M_CYL      0377
 163 #define RKDA_V_DRIVE    13                              /* drive */
 164 #define RKDA_M_DRIVE    07
 165 #define RKDA_DRIVE      (RKDA_M_DRIVE << RKDA_V_DRIVE)
 166 #define GET_SECT(x)     (((x) >> RKDA_V_SECT) & RKDA_M_SECT)
 167 #define GET_CYL(x)      (((x) >> RKDA_V_CYL) & RKDA_M_CYL)
 168 #define GET_TRACK(x)    (((x) >> RKDA_V_TRACK) & RKDA_M_TRACK)
 169 #define GET_DRIVE(x)    (((x) >> RKDA_V_DRIVE) & RKDA_M_DRIVE)
 170 #define GET_DA(x)       ((GET_TRACK (x) * RK_NUMSC) + GET_SECT (x))
 171
 172 /* RKBA */
 173
 174 #define RKBA_IMP        0177776                         /* implemented */
 175
 176 #define RK_MIN          10
 177 #define MAX(x,y)        (((x) > (y))? (x): (y))
 178
 179 extern uint16 *M;                                       /* memory */
 180 extern int32 int_req[IPL_HLVL];
 181
 182 uint16 *rkxb = NULL;                                    /* xfer buffer */
 183 int32 rkcs = 0;                                         /* control/status */
 184 int32 rkds = 0;                                         /* drive status */
 185 int32 rkba = 0;                                         /* memory address */
 186 int32 rkda = 0;                                         /* disk address */
 187 int32 rker = 0;                                         /* error status */
 188 int32 rkwc = 0;                                         /* word count */
 189 int32 rkintq = 0;                                       /* interrupt queue */
 190 int32 last_drv = 0;                                     /* last r/w drive */
 191 int32 rk_stopioe = 1;                                   /* stop on error */
 192 int32 rk_swait = 10;                                    /* seek time */
 193 int32 rk_rwait = 10;                                    /* rotate time */
 194
 195 DEVICE rk_dev;
 196 t_stat rk_rd (int32 *data, int32 PA, int32 access);
 197 t_stat rk_wr (int32 data, int32 PA, int32 access);
 198 int32 rk_inta (void);
 199 t_stat rk_svc (UNIT *uptr);
 200 t_stat rk_reset (DEVICE *dptr);
 201 void rk_go (void);
 202 void rk_set_done (int32 error);
 203 void rk_clr_done (void);
 204 t_stat rk_boot (int32 unitno, DEVICE *dptr);
 205
 206 /* RK11 data structures
 207
 208    rk_dev       RK device descriptor
 209    rk_unit      RK unit list
 210    rk_reg       RK register list
 211    rk_mod       RK modifier list
 212 */
 213
 214 DIB rk_dib = {
 215     IOBA_RK, IOLN_RK, &rk_rd, &rk_wr,
 216     1, IVCL (RK), VEC_RK, { &rk_inta }
 217     };
 218
 219 UNIT rk_unit[] = {
 220     { UDATA (&rk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
 221              UNIT_ROABLE, RK_SIZE) },
 222     { UDATA (&rk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
 223              UNIT_ROABLE, RK_SIZE) },
 224     { UDATA (&rk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
 225              UNIT_ROABLE, RK_SIZE) },
 226     { UDATA (&rk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
 227              UNIT_ROABLE, RK_SIZE) },
 228     { UDATA (&rk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
 229              UNIT_ROABLE, RK_SIZE) },
 230     { UDATA (&rk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
 231              UNIT_ROABLE, RK_SIZE) },
 232     { UDATA (&rk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
 233              UNIT_ROABLE, RK_SIZE) },
 234     { UDATA (&rk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
 235              UNIT_ROABLE, RK_SIZE) }
 236     };
 237
 238 REG rk_reg[] = {
 239     { ORDATA (RKCS, rkcs, 16) },
 240     { ORDATA (RKDA, rkda, 16) },
 241     { ORDATA (RKBA, rkba, 16) },
 242     { ORDATA (RKWC, rkwc, 16) },
 243     { ORDATA (RKDS, rkds, 16) },
 244     { ORDATA (RKER, rker, 16) },
 245     { ORDATA (INTQ, rkintq, 9) },
 246     { ORDATA (DRVN, last_drv, 3) },
 247     { FLDATA (INT, IREQ (RK), INT_V_RK) },
 248     { FLDATA (ERR, rkcs, CSR_V_ERR) },
 249     { FLDATA (DONE, rkcs, CSR_V_DONE) },
 250     { FLDATA (IE, rkcs, CSR_V_IE) },
 251     { DRDATA (STIME, rk_swait, 24), PV_LEFT },
 252     { DRDATA (RTIME, rk_rwait, 24), PV_LEFT },
 253     { FLDATA (STOP_IOE, rk_stopioe, 0) },
 254     { ORDATA (DEVADDR, rk_dib.ba, 32), REG_HRO },
 255     { ORDATA (DEVVEC, rk_dib.vec, 16), REG_HRO },
 256     { NULL }
 257     };
 258
 259 MTAB rk_mod[] = {
 260     { UNIT_HWLK, 0, "write enabled", "WRITEENABLED", NULL },
 261     { UNIT_HWLK, UNIT_HWLK, "write locked", "LOCKED", NULL },
 262     { MTAB_XTD|MTAB_VDV, 020, "ADDRESS", "ADDRESS",
 263       &set_addr, &show_addr, NULL },
 264     { MTAB_XTD|MTAB_VDV, 0, "VECTOR", "VECTOR",
 265       &set_vec, &show_vec, NULL },
 266     { 0 }
 267     };
 268
 269 DEVICE rk_dev = {
 270     "RK", rk_unit, rk_reg, rk_mod,
 271     RK_NUMDR, 8, 24, 1, 8, 16,
 272     NULL, NULL, &rk_reset,
 273     &rk_boot, NULL, NULL,
 274     &rk_dib, DEV_DISABLE | DEV_UBUS | DEV_Q18
 275     };
 276
 277 /* I/O dispatch routine, I/O addresses 17777400 - 17777416
 278
 279    17777400     RKDS    read only, constructed from "id'd drive"
 280                         plus current drive status flags
 281    17777402     RKER    read only, set as operations progress,
 282                         cleared by INIT or CONTROL RESET
 283    17777404     RKCS    read/write
 284    17777406     RKWC    read/write
 285    17777410     RKBA    read/write
 286    17777412     RKDA    read/write
 287    17777414     RKMR    read/write, unimplemented
 288    17777416     RKDB    read only, unimplemented
 289 */
 290
 291 t_stat rk_rd (int32 *data, int32 PA, int32 access)
 292 {
 293 UNIT *uptr;
 294
 295 switch ((PA >> 1) & 07) {                               /* decode PA<3:1> */
 296
 297     case 0:                                             /* RKDS: read only */
 298         rkds = (rkds & RKDS_ID) | RKDS_RK05 | RKDS_SC_OK |
 299             (rand () % RK_NUMSC);                       /* random sector */
 300         uptr = rk_dev.units + GET_DRIVE (rkda);         /* selected unit */
 301         if (uptr->flags & UNIT_ATT)                     /* attached? */
 302             rkds = rkds | RKDS_RDY;
 303         if (!sim_is_active (uptr))                      /* idle? */
 304             rkds = rkds | RKDS_RWS;
 305         if (uptr->flags & UNIT_WPRT) rkds = rkds | RKDS_WLK;
 306         if (GET_SECT (rkda) == (rkds & RKDS_SC)) rkds = rkds | RKDS_ON_SC;
 307         *data = rkds;
 308         return SCPE_OK;
 309
 310     case 1:                                             /* RKER: read only */
 311         *data = rker & RKER_IMP;
 312         return SCPE_OK;
 313
 314     case 2:                                             /* RKCS */
 315         rkcs = rkcs & RKCS_REAL;
 316         if (rker) rkcs = rkcs | RKCS_ERR;               /* update err flags */
 317         if (rker & RKER_HARD) rkcs = rkcs | RKCS_HERR;
 318         *data = rkcs;
 319         return SCPE_OK;
 320
 321     case 3:                                             /* RKWC */
 322         *data = rkwc;
 323         return SCPE_OK;
 324
 325     case 4:                                             /* RKBA */
 326         *data = rkba & RKBA_IMP;
 327         return SCPE_OK;
 328
 329     case 5:                                             /* RKDA */
 330         *data = rkda;
 331         return SCPE_OK;
 332
 333     default:
 334         *data = 0;
 335         return SCPE_OK;
 336         }                                               /* end switch */
 337 }
 338
 339 t_stat rk_wr (int32 data, int32 PA, int32 access)
 340 {
 341 switch ((PA >> 1) & 07) {                               /* decode PA<3:1> */
 342
 343     case 0:                                             /* RKDS: read only */
 344         return SCPE_OK;
 345
 346     case 1:                                             /* RKER: read only */
 347         return SCPE_OK;
 348
 349     case 2:                                             /* RKCS */
 350         rkcs = rkcs & RKCS_REAL;
 351         if (access == WRITEB) data = (PA & 1)?
 352             (rkcs & 0377) | (data << 8): (rkcs & ~0377) | data;
 353         if ((data & CSR_IE) == 0) {                     /* int disable? */
 354             rkintq = 0;                                 /* clr int queue */
 355             CLR_INT (RK);                               /* clr int request */
 356             }
 357         else if ((rkcs & (CSR_DONE + CSR_IE)) == CSR_DONE) {
 358             rkintq = rkintq | RK_CTLI;                  /* queue ctrl int */
 359             SET_INT (RK);                               /* set int request */
 360             }
 361         rkcs = (rkcs & ~RKCS_RW) | (data & RKCS_RW);
 362         if ((rkcs & CSR_DONE) && (data & CSR_GO))       /* new function? */
 363             rk_go ();
 364         return SCPE_OK;
 365
 366     case 3:                                             /* RKWC */
 367         if (access == WRITEB) data = (PA & 1)?
 368             (rkwc & 0377) | (data << 8): (rkwc & ~0377) | data;
 369         rkwc = data;
 370         return SCPE_OK;
 371
 372     case 4:                                             /* RKBA */
 373         if (access == WRITEB) data = (PA & 1)?
 374             (rkba & 0377) | (data << 8): (rkba & ~0377) | data;
 375         rkba = data & RKBA_IMP;
 376         return SCPE_OK;
 377
 378     case 5:                                             /* RKDA */
 379         if ((rkcs & CSR_DONE) == 0) return SCPE_OK;
 380         if (access == WRITEB) data = (PA & 1)?
 381             (rkda & 0377) | (data << 8): (rkda & ~0377) | data;
 382         rkda = data;
 383         return SCPE_OK;
 384
 385     default:
 386         return SCPE_OK;
 387         }                                               /* end switch */
 388 }
 389
 390 /* Initiate new function */
 391
 392 void rk_go (void)
 393 {
 394 int32 i, sect, cyl, func;
 395 UNIT *uptr;
 396
 397 func = GET_FUNC (rkcs);                                 /* get function */
 398 if (func == RKCS_CTLRESET) {                            /* control reset? */
 399     rker = 0;                                           /* clear errors */
 400     rkda = 0;
 401     rkba = 0;
 402     rkcs = CSR_DONE;
 403     rkintq = 0;                                         /* clr int queue */
 404     CLR_INT (RK);                                       /* clr int request */
 405     return;
 406     }
 407 rker = rker & ~RKER_SOFT;                               /* clear soft errors */
 408 if (rker == 0) rkcs = rkcs & ~RKCS_ERR;                 /* redo summary */
 409 rkcs = rkcs & ~RKCS_SCP;                                /* clear sch compl*/
 410 rk_clr_done ();                                         /* clear done */
 411 last_drv = GET_DRIVE (rkda);                            /* get drive no */
 412 uptr = rk_dev.units + last_drv;                         /* select unit */
 413 if (uptr->flags & UNIT_DIS) {                           /* not present? */
 414     rk_set_done (RKER_NXD);
 415     return;
 416     }
 417 if (((uptr->flags & UNIT_ATT) == 0) ||                  /* not att or busy? */
 418     sim_is_active (uptr)) {
 419     rk_set_done (RKER_DRE);
 420     return;
 421     }
 422 if ((rkcs & RKCS_FMT) &&                                /* format and */
 423     (func != RKCS_READ) && (func != RKCS_WRITE)) {      /* not read or write? */
 424         rk_set_done (RKER_PGE);
 425         return;
 426         }
 427 if ((func == RKCS_WRITE) &&                             /* write and locked? */
 428     (uptr->flags & UNIT_WPRT)) {
 429     rk_set_done (RKER_WLK);
 430     return;
 431     }
 432 if (func == RKCS_WLK) {                                 /* write lock? */
 433     uptr->flags = uptr->flags | UNIT_SWLK;
 434     rk_set_done (0);
 435     return;
 436     }
 437 if (func == RKCS_DRVRESET) {                            /* drive reset? */
 438     uptr->flags = uptr->flags & ~UNIT_SWLK;
 439     cyl = sect = 0;
 440     func = RKCS_SEEK;
 441     }
 442 else {
 443     sect = GET_SECT (rkda);
 444     cyl = GET_CYL (rkda);
 445     }
 446 if (sect >= RK_NUMSC) {                                 /* bad sector? */
 447     rk_set_done (RKER_NXS);
 448     return;
 449     }
 450 if (cyl >= RK_NUMCY) {                                  /* bad cyl? */
 451     rk_set_done (RKER_NXC);
 452     return;
 453     }
 454 i = abs (cyl - uptr->CYL) * rk_swait;                   /* seek time */
 455 if (func == RKCS_SEEK) {                                /* seek? */
 456     rk_set_done (0);                                    /* set done */
 457     sim_activate (uptr, MAX (RK_MIN, i));               /* schedule */
 458     }
 459 else sim_activate (uptr, i + rk_rwait);
 460 uptr->FUNC = func;                                      /* save func */
 461 uptr->CYL = cyl;                                        /* put on cylinder */
 462 return;
 463 }
 464
 465 /* Service unit timeout
 466
 467    If seek in progress, complete seek command
 468    Else complete data transfer command
 469
 470    The unit control block contains the function and disk address for
 471    the current command.
 472 */
 473
 474 t_stat rk_svc (UNIT *uptr)
 475 {
 476 int32 i, drv, err, awc, wc, cma, cda, t;
 477 int32 da, cyl, track, sect;
 478 uint32 ma;
 479 uint16 comp;
 480
 481 drv = (int32) (uptr - rk_dev.units);                    /* get drv number */
 482 if (uptr->FUNC == RKCS_SEEK) {                          /* seek */
 483     rkcs = rkcs | RKCS_SCP;                             /* set seek done */
 484     if (rkcs & CSR_IE) {                                /* ints enabled? */
 485         rkintq = rkintq | RK_SCPI (drv);                /* queue request */
 486         if (rkcs & CSR_DONE) SET_INT (RK);
 487         }
 488     else {
 489         rkintq = 0;                                     /* clear queue */
 490         CLR_INT (RK);                                   /* clear interrupt */
 491         }
 492     return SCPE_OK;
 493     }
 494
 495 if ((uptr->flags & UNIT_ATT) == 0) {                    /* attached? */
 496     rk_set_done (RKER_DRE);
 497     return IORETURN (rk_stopioe, SCPE_UNATT);
 498     }
 499 sect = GET_SECT (rkda);                                 /* get sector, cyl */
 500 cyl = GET_CYL (rkda);
 501 if (sect >= RK_NUMSC) {                                 /* bad sector? */
 502     rk_set_done (RKER_NXS);
 503     return SCPE_OK;
 504     }
 505 if (cyl >= RK_NUMCY) {                                  /* bad cyl? */
 506     rk_set_done (RKER_NXC);
 507     return SCPE_OK;
 508     }
 509 ma = ((rkcs & RKCS_MEX) << (16 - RKCS_V_MEX)) | rkba;   /* get mem addr */
 510 da = GET_DA (rkda) * RK_NUMWD;                          /* get disk addr */
 511 wc = 0200000 - rkwc;                                    /* get wd cnt */
 512 if ((da + wc) > (int32) uptr->capac) {                  /* overrun? */
 513     wc = uptr->capac - da;                              /* trim transfer */
 514     rker = rker | RKER_OVR;                             /* set overrun err */
 515     }
 516
 517 err = fseek (uptr->fileref, da * sizeof (int16), SEEK_SET);
 518 if (wc && (err == 0)) {                                 /* seek ok? */
 519     switch (uptr->FUNC) {                               /* case on function */
 520
 521     case RKCS_READ:                                     /* read */
 522         if (rkcs & RKCS_FMT) {                          /* format? */
 523             for (i = 0, cda = da; i < wc; i++) {        /* fill buffer with cyl #s */
 524                 if (cda >= (int32) uptr->capac) {       /* overrun? */
 525                     rker = rker | RKER_OVR;             /* set overrun err */
 526                     wc = i;                             /* trim transfer */
 527                     break;
 528                     }
 529                 rkxb[i] = (cda / RK_NUMWD) / (RK_NUMSF * RK_NUMSC);
 530                 cda = cda + RK_NUMWD;                   /* next sector */
 531                 }                                       /* end for wc */
 532             }                                           /* end if format */
 533         else {                                          /* normal read */
 534             i = fxread (rkxb, sizeof (int16), wc, uptr->fileref);
 535             err = ferror (uptr->fileref);               /* read file */
 536             for ( ; i < wc; i++) rkxb[i] = 0;           /* fill buf */
 537             }
 538         if (rkcs & RKCS_INH) {                          /* incr inhibit? */
 539             if (t = Map_WriteW (ma, 2, &rkxb[wc - 1])) { /* store last */
 540                 rker = rker | RKER_NXM;                 /* NXM? set flag */
 541                 wc = 0;                                 /* no transfer */
 542                 }
 543             }
 544         else {                                          /* normal store */
 545             if (t = Map_WriteW (ma, wc << 1, rkxb)) {   /* store buf */
 546                 rker = rker | RKER_NXM;                 /* NXM? set flag */
 547                 wc = wc - t;                            /* adj wd cnt */
 548                 }
 549             }
 550         break;                                          /* end read */
 551
 552     case RKCS_WRITE:                                    /* write */
 553         if (rkcs & RKCS_INH) {                          /* incr inhibit? */
 554             if (t = Map_ReadW (ma, 2, &comp)) {         /* get 1st word */
 555                 rker = rker | RKER_NXM;                 /* NXM? set flag */
 556                 wc = 0;                                 /* no transfer */
 557                 }
 558             for (i = 0; i < wc; i++) rkxb[i] = comp;    /* all words same */
 559             }
 560         else {                                          /* normal fetch */
 561             if (t = Map_ReadW (ma, wc << 1, rkxb)) {    /* get buf */
 562                 rker = rker | RKER_NXM;                 /* NXM? set flg */
 563                 wc = wc - t;                            /* adj wd cnt */
 564                 }
 565             }
 566         if (wc) {                                       /* any xfer? */
 567             awc = (wc + (RK_NUMWD - 1)) & ~(RK_NUMWD - 1); /* clr to */
 568             for (i = wc; i < awc; i++) rkxb[i] = 0;     /* end of blk */
 569             fxwrite (rkxb, sizeof (int16), awc, uptr->fileref);
 570             err = ferror (uptr->fileref);
 571             }
 572         break;                                          /* end write */
 573
 574     case RKCS_WCHK:                                     /* write check */
 575         i = fxread (rkxb, sizeof (int16), wc, uptr->fileref);
 576         if (err = ferror (uptr->fileref)) {             /* read error? */
 577             wc = 0;                                     /* no transfer */
 578             break;
 579             }
 580         for ( ; i < wc; i++) rkxb[i] = 0;               /* fill buf */
 581         awc = wc;                                       /* save wc */
 582         for (wc = 0, cma = ma; wc < awc; wc++)  {       /* loop thru buf */
 583             if (Map_ReadW (cma, 2, &comp)) {            /* mem wd */
 584                 rker = rker | RKER_NXM;                 /* NXM? set flg */
 585                 break;
 586                 }
 587             if (comp != rkxb[wc])  {                    /* match to disk? */
 588                 rker = rker | RKER_WCE;                 /* no, err */
 589                 if (rkcs & RKCS_SSE) break;
 590                 }
 591             if (!(rkcs & RKCS_INH)) cma = cma + 2;      /* next mem addr */
 592             }                                           /* end for */
 593         break;                                          /* end wcheck */
 594
 595     default:                                            /* read check */
 596         break;
 597         }                                               /* end switch */
 598     }                                                   /* end else */
 599
 600 rkwc = (rkwc + wc) & 0177777;                           /* final word count */
 601 if (!(rkcs & RKCS_INH)) ma = ma + (wc << 1);            /* final byte addr */
 602 rkba = ma & RKBA_IMP;                                   /* lower 16b */
 603 rkcs = (rkcs & ~RKCS_MEX) | ((ma >> (16 - RKCS_V_MEX)) & RKCS_MEX);
 604 if ((uptr->FUNC == RKCS_READ) && (rkcs & RKCS_FMT))     /* read format? */
 605     da = da + (wc * RK_NUMWD);                          /* count by sectors */
 606 else da = da + wc + (RK_NUMWD - 1);                     /* count by words */
 607 track = (da / RK_NUMWD) / RK_NUMSC;
 608 sect = (da / RK_NUMWD) % RK_NUMSC;
 609 rkda = (rkda & RKDA_DRIVE) | (track << RKDA_V_TRACK) | (sect << RKDA_V_SECT);
 610 rk_set_done (0);
 611
 612 if (err != 0) {                                         /* error? */
 613     perror ("RK I/O error");
 614     clearerr (uptr->fileref);
 615     return SCPE_IOERR;
 616     }
 617 return SCPE_OK;
 618 }
 619
 620 /* Interrupt state change routines
 621
 622    rk_set_done          set done and possibly errors
 623    rk_clr_done          clear done
 624    rk_inta              acknowledge intererupt
 625 */
 626
 627 void rk_set_done (int32 error)
 628 {
 629 rkcs = rkcs | CSR_DONE;                                 /* set done */
 630 if (error != 0) {
 631     rker = rker | error;                                /* update error */
 632     if (rker) rkcs = rkcs | RKCS_ERR;                   /* update err flags */
 633     if (rker & RKER_HARD) rkcs = rkcs | RKCS_HERR;
 634         }
 635 if (rkcs & CSR_IE) {                                    /* int enable? */
 636     rkintq = rkintq | RK_CTLI;                          /* set ctrl int */
 637     SET_INT (RK);                                       /* request int */
 638     }
 639 else {
 640     rkintq = 0;                                         /* clear queue */
 641     CLR_INT (RK);
 642     }
 643 return;
 644 }
 645
 646 void rk_clr_done (void)
 647 {
 648 rkcs = rkcs & ~CSR_DONE;                                /* clear done */
 649 rkintq = rkintq & ~RK_CTLI;                             /* clear ctl int */
 650 CLR_INT (RK);                                           /* clear int req */
 651 return;
 652 }
 653
 654 int32 rk_inta (void)
 655 {
 656 int32 i;
 657
 658 for (i = 0; i <= RK_NUMDR; i++) {                       /* loop thru intq */
 659     if (rkintq & (1u << i)) {                           /* bit i set? */
 660         rkintq = rkintq & ~(1u << i);                   /* clear bit i */
 661         if (rkintq) SET_INT (RK);                       /* queue next */
 662         rkds = (rkds & ~RKDS_ID) |                      /* id drive */
 663             (((i == 0)? last_drv: i - 1) << RKDS_V_ID);
 664         return rk_dib.vec;                              /* return vector */
 665         }
 666     }
 667 rkintq = 0;                                             /* clear queue */
 668 return 0;                                               /* passive release */
 669 }
 670
 671 /* Device reset */
 672
 673 t_stat rk_reset (DEVICE *dptr)
 674 {
 675 int32 i;
 676 UNIT *uptr;
 677
 678 rkcs = CSR_DONE;
 679 rkda = rkba = rker = rkds = 0;
 680 rkintq = last_drv = 0;
 681 CLR_INT (RK);
 682 for (i = 0; i < RK_NUMDR; i++) {
 683     uptr = rk_dev.units + i;
 684     sim_cancel (uptr);
 685     uptr->CYL = uptr->FUNC = 0;
 686     uptr->flags = uptr->flags & ~UNIT_SWLK;
 687     }
 688 if (rkxb == NULL) rkxb = (uint16 *) calloc (RK_MAXFR, sizeof (uint16));
 689 if (rkxb == NULL) return SCPE_MEM;
 690 return SCPE_OK;
 691 }
 692
 693 /* Device bootstrap */
 694
 695 #define BOOT_START      02000                           /* start */
 696 #define BOOT_ENTRY      (BOOT_START + 002)              /* entry */
 697 #define BOOT_UNIT       (BOOT_START + 010)              /* unit number */
 698 #define BOOT_CSR        (BOOT_START + 032)              /* CSR */
 699 #define BOOT_LEN        (sizeof (boot_rom) / sizeof (int16))
 700
 701 static const uint16 boot_rom[] = {
 702     0042113,                        /* "KD" */
 703     0012706, BOOT_START,            /* MOV #boot_start, SP */
 704     0012700, 0000000,               /* MOV #unit, R0        ; unit number */
 705     0010003,                        /* MOV R0, R3 */
 706     0000303,                        /* SWAB R3 */
 707     0006303,                        /* ASL R3 */
 708     0006303,                        /* ASL R3 */
 709     0006303,                        /* ASL R3 */
 710     0006303,                        /* ASL R3 */
 711     0006303,                        /* ASL R3 */
 712     0012701, 0177412,               /* MOV #RKDA, R1        ; csr */
 713     0010311,                        /* MOV R3, (R1)         ; load da */
 714     0005041,                        /* CLR -(R1)            ; clear ba */
 715     0012741, 0177000,               /* MOV #-256.*2, -(R1)  ; load wc */
 716     0012741, 0000005,               /* MOV #READ+GO, -(R1)  ; read & go */
 717     0005002,                        /* CLR R2 */
 718     0005003,                        /* CLR R3 */
 719     0012704, BOOT_START+020,        /* MOV #START+20, R4 */
 720     0005005,                        /* CLR R5 */
 721     0105711,                        /* TSTB (R1) */
 722     0100376,                        /* BPL .-2 */
 723     0105011,                        /* CLRB (R1) */
 724     0005007                         /* CLR PC */
 725     };
 726
 727 t_stat rk_boot (int32 unitno, DEVICE *dptr)
 728 {
 729 int32 i;
 730 extern int32 saved_PC;
 731
 732 for (i = 0; i < BOOT_LEN; i++) M[(BOOT_START >> 1) + i] = boot_rom[i];
 733 M[BOOT_UNIT >> 1] = unitno & RK_M_NUMDR;
 734 M[BOOT_CSR >> 1] = (rk_dib.ba & DMASK) + 012;
 735 saved_PC = BOOT_ENTRY;
 736 return SCPE_OK;
 737 }