1 The IBM System/3 simulator is configured as follows:
3 CPU 5410 (Model 10) CPU with 64KB of memory.
4 PKB 5471 Printer/Keyboard console.
9 R1 5444 Top Drive (removeable)
10 F1 5444 Top Drive (fixed)
11 R2 5444 Bottom Drive (removeable)
12 F2 5444 Bottom Drive (fixed
14 The only CPU options are to set Model 15 mode (not implemented), DPF
15 (Dual Programming Facility, not implemented), and the memory size 8K, 16K,
18 CPU registers are the standard System/3 set:
22 IAR-P1 16 Instruction Address Register for Program Level 1
23 ARR-P2 16 Address Recall Register for Program Level 1
24 IAR-P2 16 IAR for Program Level 2 (not implemented)
25 ARR-P2 16 ARR for Program Level 2 (not implemented)
26 AAR 16 A-Address Register
27 BAR 16 B-Address Register
28 PSR 16 Program Status Register
29 XR1 16 Index Register 1
30 XR2 16 Index Register 2
31 IAR<0:7> 16 IAR for interrupt level 0 thru 7
32 ARR<0:7> 16 ARR for interrupt level 0 thru 7
34 Plus these simulator registers:
36 IAR 16 Value of last IAR used.
37 LEVEL 8 Current operating level (8=P1, 9=P2,
38 0 thru 7 = Interrupt level)
39 SR 16 Front Panel switches
40 INT 16 Interrupt Request Flags
41 WRU 8 Simulator Interrupt Character
42 BREAK 17 Breakpoint Address
43 DEBUG 16 Debugging bits:
44 0x01: Write all instructions executed to
46 0x02: Write details of all Disk I/O
47 requests to trace.log.
48 0x80: Breakpoint on first character
49 written to 5471 printer.
51 1 5471 Printer/Keyboard
53 This is the operator console. It has the following registers:
56 IBUF: Input character from keyboard
57 OBUF: Output character to printer
58 POS: Number of characters printed
59 TIME: Delay for device operation
60 REQKEY: ASCII value of key mapped to 5471 REQUEST key
61 RTNKEY: ASCII value of key mapped to 5471 RETURN key
62 ENDKEY: ASCII value of key mapped to 5471 END key
63 CANKEY: ASCII value of key mapped to 5471 CANCEL key
66 2 1442 Card Reader. This reader reads 80-column cards; the input
67 is usually an ASCII file which is translated to EBCDIC when read,
68 but optionally can be a binary file in EBCDIC format (such as an
73 NOTRDY 1442 reader not ready (not attached or past EOF)
74 DAR Data Address Register (shared with punch)
75 LCR Length Count Register (shared with punch)
76 EBCDIC EBCDIC mode flag: if 1, input is 80-col EBCDIC binary.
77 (IPL from 1442 automatically sets this to 1).
78 S2 Stacker 2 is selected when this is 1
79 POS Number of cards read
82 The real hardware 1442 had only 1 hopper for cards, whether
83 these were used for blank cards for punching, or cards to be
84 read. Cards could be read without a feed cycle, then
85 punched. When punching cards, the SCP does a read of a card,
86 makes sure it is blank, and then punches it. To simulate
87 this without requiring that a stack of blank lines be attached
88 to the card reader device, a special feature of the simulator
89 is this: if no file is attached to the cdr device, but a file
90 is attached to the cdp or the cdp2 devices, any read from the
91 reader will return a blank card -- i.e. when punching, an
92 unattached cdr device is assumed to be loaded with an unlimited
93 supply of blank cards.
96 3 1442 Card Punch. Normally cards are written to the attached
97 disk file as ASCII with newline/cr delimiters. But an optional
98 flag allows writing as 80-column binary EBCDIC.
101 EBCDIC When this is 1, output will be 80-col EBCDIC.
102 S2 When this is 1, output is placed in stacker 2
103 NOTRDY 1442 punch not ready (not attached)
104 DAR Data Address Register (shared with reader)
105 LCR Length Count Register (shared with reader)
106 POS Number of cards punched
109 4 1442 Stacker 2. When cards are to be punched in stacker 2,
110 attach a disk file to this device (cdp2) to hold that output.
111 Note: When SCP punches cards, the default is to punch in
114 POS0 Number of cards punched.
116 5 1403 Printer. This is a 132-column output device, emulating
117 the famous IBM 1403, models 2, 6, and N1. Output is always
118 translated to ASCII with newline/CR delimiters. Page advance
119 is output as a form feed.
122 LPDAR Data Address Register
123 LPFLR Forms Length Register
124 LPIAR Image Address Register
125 LINECT Current Line on form
126 POS Number of lines printed
128 6 5444 Disk Drives (R1, R2, F1, F2)
130 The 5444 came as a set of two drives, each with two disks. The
131 top disk in a drive was removable, the bottom fixed. The first
132 drive consists of disks R1 and F1, the second drive R2 and F2.
133 Each disk holds 2,467,600 bytes of user data, plus 3 alternate
134 tracks and a CE track. Flagging of alternate tracks is not
135 supported in this version of the simulator.
137 NOTRDY Drive not ready (not attached)
138 SEEK Drive is busy with a seek operation
139 DAR Data Address Register
140 CAR Control Address Register
141 ERR Error Flags (16 bits)
142 CYL Current Cylinder (0 thru 203)
143 HEAD Current head (0 or 1)
144 POS Current position in attached disk file
147 7 Symbolic Display and Input
149 The System/3 Simulator supports symbolic display and input.
150 Display is controlled by command line switches:
152 (none) display as hex EBCDIC
153 -c display bytes as characters
154 -m display instruction mnemonics.
155 -a display a 256-byte block of memory in both hex and ASCII.
157 The symbolic format contains the same elements as the machine
158 language operation, but not always in the same order. The
159 operation code frequently specifies both the opcode and the Q byte,
160 and the top nybble of the opcode is determined by the format of the
163 Addresses take two forms: the direct address in hex, or a relative
164 address specified thusly: (byte,XRx) where 'byte' is a 1-byte
165 offset, and XRx is either XR1 or XR2 for the two index registers.
166 Use these formats when 'address' is indicated below:
168 When 'reg' is mentioned, a mnemonic may be used for the register,
171 IAR Instruction Address Register for the current program level
172 ARR Address Recall Register for the current program level
173 P1IAR IAR for Program Level 1
174 P2IAR IAR for Program Level 2
175 PSR Program Status Register
178 IARx IAR for the interrupt level x (x = 0 thru 7)
180 All other operands mentioned below are single-byte hex, except for
181 the length (len) operand of the two-address instructions, which is a
182 decimal length in the range 1-256.
184 In operations where there is a source and a destination, the
185 destination is always operand 1, the source is operand 2.
190 HPL hex,hex Halt Program Level, the operands are the
197 A reg,address Add to register
198 CLI address,byte Compare Logical Immediate
199 MVI address,byte Move Immediate
200 TBF address,mask Test Bits Off
201 TBN address,mask Test Bits On
202 SBF address,mask Set Bits Off
203 SBN address,mask Set Bits On
204 ST reg,address Store Register
205 L reg,address Load Register
206 LA reg,address Load Address (reg can only be XR1 or XR2)
207 JC address,cond Jump on Condition
208 BC address,cond Branch on Condition
210 These operations do not specify a qbyte, it is implicit in the
213 B address Unconditional branch to address
214 BE address Branch Equal
215 BNE address Branch Not Equal
216 BH address Branch High
217 BNH address Branch Not High
218 BL address Branch Low
219 BNL address Branch Not Low
220 BT address Branch True
221 BF address Branch False
222 BP address Branch Plus
223 BM address Branch Minus
224 BNP address Branch Not Plus
225 BNM address Branch Not Minus
226 BZ address Branch Zero
227 BNZ address Branch Not Zero
228 BOZ address Branch Overflow Zoned
229 BOL address Branch Overflow Logical
230 BNOZ address Branch No Overflow Zoned
231 BNOL address Branch No Overflow Logical
232 NOPB address No - never branch
234 (substitute J for B above for a set of Jumps -- 1-byte operand (not
235 2), always jumps forward up to 255 bytes from the address following
236 the Jump instruction. In this case, 'address' cannot be less than
237 the current address, nor greater than the current address + 255)
239 Two-address formats (first address is destination, len is decimal 1-256):
242 MVC address,address,len Move Characters
243 CLC address,address,len Compare Logical Characters
244 ALC address,address,len Add Logical Characters
245 SLC address,address,len Subtract Logical Characters
246 ED address,address,len Edit
247 ITC address,address,len Insert and Test Characters
248 AZ address,address,len Add Zoned Decimal
249 SZ address,address,len Subtract Zoned Decimal
251 MNN address,address Move Numeric to Numeric
252 MNZ address,address Move Numeric to Zone
253 MZZ address,address Move Zone to Zone
254 MZN address,address Move Zone to Numeric
259 In the I/O format, there are always 3 fields:
261 da - Device Address 0-15 (decimal)
265 The meaning of these is entirely defined by the device addressed.
267 There may be an optional control byte, or an optional address (based
268 on the type of instruction).
270 SNS da,m,n,address Sense I/O
271 LIO da,m,n,address Load I/O
272 TIO da,m,n,address Test I/O
274 SIO da,m,n,cc Start I/O -- cc is a control byte
276 APL da,m,n Advance Program Level
279 8 Device Programming.
281 Note: On a model 15, interrupts are used for all devices. On
282 other models, interrupts are only used for the printer/keyboard.
284 This is a summary of the DA, M, N, and CC codes for all supported
287 5471 Printer Keyboard
288 ---------------------
290 The PKB has 2 visible indicators: Proceed and Request
291 Pending. It has a normal keyboard and 4 special keys:
292 Request, Return, End, and Cancel.
294 SIO 1,0,0,XX Start Keyboard Operation, bit masks for XX are:
295 X'20': Request Pending Indicator On
296 X'10': Proceed Indicator On
297 X'04': Request Key Interrupts Enable (1) Disable (0)
298 X'02': Other Key Interrupts Enable (1) Disable (0)
299 X'01': Reset request key and other key interrupts
301 SIO 1,1,0,XX Start Printer Operation, bit masks for XX are:
302 X'80': Start Printing
303 X'40': Start Carrier Return
304 X'04': Printer Interrupt Enable(1) or Disable (0)
305 X'01': Reset Printer Interrupt
307 LIO 1,1,0,addr Load Printer Output Character
308 addr is address of low-order (highest numbered)
309 byte of two-byte field, and high-order byte
310 (that is, addr - 1) is loaded into output
311 register to print. Printing is done one character
314 SNS 1,0,1,addr Sense Status Bytes 0 and 1:
315 Byte 0 (leftmost) is the character typed in
318 X'80': Request key interrupt pending
319 X'40': End or Cancel key interrupt pending
320 X'20': Cancel key pressed
321 X'10': End Key Pressed
322 X'08': Return or data key interrupt pending
323 X'04': Return key pressed
325 SNS 1,0,3,addr Sense Status Bytes 2 and 3: returns 0000 in
331 SIO 5,0,0,XX Feed Card without reading/punching
332 XX is stacker select for all functions: 0 = stacker
333 1 (normal), 1 = stacker 2.
335 SIO 5,0,1,XX Read Card
336 SIO 5,0,2,XX Punch and Feed
337 SIO 5,0,3,XX Read Column Binary
338 SIO 5,0,4,XX Punch with no feed
340 TIO 5,0,0,addr Branch to addr if not ready or busy
341 TIO 5,0,2,addr Branch to addr if busy
342 TIO 5,0,5,addr (mod 15 only) branch if interrupt pending
344 APL 5,0,0 Loop (or switch prog levels) if not ready/busy
345 APL 5,0,2 Loop (or switch) if busy
346 APL 5,0,5 Loop (or switch) if interrupt pending (mod 15 only)
348 LIO 5,0,0,addr Load 2-byte field to Length Count Register
349 LIO 5,0,4,addr Load 2-byte field to Data Address Register
350 (DAR is incremented by a read/punch operation and must
353 SNS 5,0,1,addr Sense CE indicators (0000 returned in this sim)
354 SNS 5,0,2,addr Sense CE indicators (0000 returned in this sim)
355 SNS 5,0,3,addr Sense Status Indicators: (only simulated bits shown)
359 X'1000': Data Overrun
366 SIO 14,0,0,XX Line space XX lines (0-3 valid in XX)
367 SIO 14,0,2,XX Print a line space (0-3 valid in XX)
368 SIO 14,0,4,XX Skip Only (line number 1-112 in XX)
370 SIO 14,0,6,XX Print and Skip (line number 0-112 in XX)
372 TIO 14,0,0,addr Branch to addr if not ready
373 TIO 14,0,2,addr Branch to addr if buffer busy
374 TIO 14,0,3,addr Branch to addr if interrupt pending (mod 15 only)
375 TIO 14,0,4,addr Branch if carriage busy
376 TIO 14,0,6,addr Branch if printer busy
378 APL 14,0,0 Loop (or switch prog levels) if not ready/check
379 APL 14,0,2 Loop (or switch) if buffer busy
380 APL 14,0,3 Loop (or switch) if interrupt pending (mod 15 only)
381 APL 14,0,4 Loop (or switch) if carriage busy
382 APL 14,0,6 Loop (or switch) if printer busy
384 LIO 14,0,0,addr Load 1 byte to Forms Length Reg at addr-1
385 LIO 14,0,4,addr Load 2 bytes to Chain Image Address Register
386 LIO 14,0,6,addr Load 2 bytes to Data Address Register
388 SNS 14,0,0,addr Sense Character Count
389 SNS 14,0,4,addr Sense LPIAR (Image Address Register)
390 SNS 14,0,6,addr Sense LPDAR (data addres register)
396 Each drive has two disks (upper and lower), each disk
397 has two surfaces (upper and lower), each surface has
398 24 256-byte sectors, sectors are number 0 thru 23 on
399 upper surface, 32 thru 55 on lower.
401 d = drive, 0 is R1/F1, 1 is R2/F2
402 s = surface, 0 = upper (removable), 1 = lower (fixed)
404 The Control register points to the leftmost byte of a 4-byte
405 control field in memory with these bytes:
407 F - Flag byte (not supported in this sim)
408 C - Cylinder Address (0-203)
409 S - Sector Number (0-23, or 32-55) in top 6 bits
410 N - Number of sectors minus 1
412 These have meaning for all operations except seek, seek uses
413 the fields differently.
415 SIO 1d,s,0,XX Seek, XX not used, control field is used:
419 S - high bit is head to be used 0-upper 1-lower
420 low bit is direction to move 0-back 1-forward
421 N - number of cylinders to move
423 SIO 1d,s,1,XX Read, values of XX are as follows:
425 X'01': Read Identifier (updates control field, no
427 X'02': Read Data Diagnostic
428 X'03': Verify (does not read, but checks)
430 SIO 1d,s,2,XX Write, values of XX are as follows:
432 X'01': Write Identifier (24 sectors with byte at
433 data address register)
435 SIO 1d,s,3,XX Scan. All 256 bytes in memory at data
436 address register are compared to disk
437 sectors on current track, except those
438 bytes of X'FF' are not compared. Values of
442 X'01': Scan Low or Equal
443 X'02': Scan High or Equal
445 LIO 1d,0,4,addr Load Data Address Register
446 LIO 1d,0,6,addr Load Disk Control Address Register
448 TIO 1d,0,0,addr Branch if not ready/unit check
449 TIO 1d,0,2,addr Branch if busy
450 TIO 1d,0,4,addr Branch if Scan Found
452 APL 1d,0,0 Loop if not ready/unit check
453 APL 1d,0,2 Loop if busy
454 APL 1d,0,4 Loop if scan found
456 SNS 1d,0,2,addr Sense Status Bytes 0 and 1: (simulated
457 bits only are shown, otehrs are 0):
458 X'1000': equipment check
460 X'0400': No record found
461 X'0100': Seek Check (past cyl 203)
462 X'0080': Scan equal Hit
464 X'0020': End of Cylinder
466 SNS 1d,0,3,addr Sense bytes 2 and 3 (0000 in this sim)
467 SNS 1d,0,4,addr Sense Data Address Register
468 SNS 1d,0,6,addr Sense Control Address Register