1 /
\ eCLOCK.RA - DK8-EP HANDLER
3 / TO ASSEMBLE DK8-EP HANDLER FOR FIRST CLOCK: NO SWITCHES
4 / TO ASSEMBLE DK8-EP HANDLER FOR 2 ND CLOCK: /1 SWITCH
5 / TO ENABLE TIME ROUTINE TO APPROPIATE CLOCK : /2 SWITCH
6 / TO ENABLE CLOCK STATUS TO GENERAL RTS ROUTINES: /3 SWITCH
7 / SO NORMALLY FOR FIRST CLOCK USE /3 SWITCH!
8 / TO ENABLE CLOCK TO SCHMITT TRIGGER EVENT USE /4 SWITCH
9 / DO NOT COMBINE /2 AND /4 SWITCHES!
10 / THIS GENERATES CLOCK4:
14 / APPLICABLE FOR BOTH DK8-EP CLOCKS. BUT ONLY FOR ONE PER PROGRAM!
17 / 1.0 18-MAR-85 H.A. (COPY OF CLOCK.RA )
20 EXTERN #DISP /SYSTEM PAGE 0,NEEDED TO
21 /PUT CLOCK STATUS ON PG0
22 /(CSTAT) FOR USE BY GEN
23 /USER CLOCK SERVICE ROUTS
24 EXTERN #T812 /RTS CPTYP
25 EXTERN ONQI /INTERRUPT QUEUER
28 ENTRY #CLINT /USER EXTENDED CLOCK ROUTINE
32 CSTAT=157 /IDOCLK PUTS CLSA BITS OF FIRST CLOCK
33 /IN HERE FOR SOMEBODY ELSE
36 ENTRY TIME / ENABLE TIME ROUTINE TO RTS
39 ENTRY #CLIN1 /USER EXTENDED CLOCK ROUTINE
42 CLZE=6000!DEVICE /CLOCK IOTS
44 CLLR=6002!DEVICE /ALSO CLOE
60 JSA SETUP /HERE TO READ A STRIG
62 TRAP4 DOSYNC /FCNWD (XR) HOLDS STRIG
65 FSTA% FTMP1 /GIVE ANS TO CALLER
67 FTMP0, F 0.0 /BASE PAGE
69 RPTR, 27;ADDR RTBL /PTR TO RATE TBL, ALSO
70 /USED TO FLT OVRCNT (NOTE
71 /THAT THE EXPONENT=27)
72 MINRAT, F .02 /MIN ALLOWABLE RATE
91 RTBL, F 16.0 /CONSTANT USED TO CHK FOR
93 /THIS CONST MUST BE NE 0
95 F4096, F 4096.0 /USED TO GET OVRFLO COUNT
96 F 100000.0 /FASTEST RATE IN HERTZ
97 F 10000.0 /NEXT FASTEST RATE
100 F 1.0 /USED BY TIME FOR EXT CLK
103 SETUP, 0;0 /HERE TO INIT ALL FPP SUBS
105 FLDA 30 /PICK UP RTN TO CALLER
107 FLDA 0 /GET PTR TO CALLERS ARGS
108 SETX FCNWD /CLOCK XR AND BASE
113 FSTA FTMP0 /PTR TO 1ST ARG
115 FSTA FTMP1 /PTR TO 2ND ARG
116 FLDA #T812 /TELLS PDP8,PDP12
117 ATX CPTYP /0=8=DK8ES,1=12=KW12A
119 FLDA% FTMP0 /=1ST ARG
120 ATX FCNWD /ALWAYS IN FCNWD
142 JSA SETUP /HERE FOR CLOCK START
144 FSUB RTBL /FCNWD IS IN FAC,IF GE 16
145 JGE ITSEXT /(RTBL=16.0) THEN USER IS
146 /REQUESTING AN EXTERNAL
147 /CLOCK I.E. B8 OF FCNWD
149 FLDA% FTMP1 /=REQUESTED RATE IN HERTZ
150 FSUB MINRAT /.LE. MINUMUM RATE
151 JLE GOTR-2 /MEANS STOP CLOCK.
153 FSUB MAXRAT /CHK FOR TOO FAST
155 LDX -4,OVRFLO /THERE ARE 4 BASIC RATES
156 LDX 1,RATE /=INDEX INTO RTBL; UPON
157 /TRAP(CLOCK) RATE=(0,
160 /2-5=PROGRAMMABLE RATES
161 LOP0, FLDA% RPTR,RATE+
162 /GET NEXT SLOWEST RATE
163 FDIV% FTMP1 /=REQUESTED RATE IN HZ.
165 FSUB F4096 /MUST BE MODULO 12 BITS.
168 LDX 0,RATE /RATE IS TOO SLOW, STOP
170 GOTR, FADD F4096 /RESTORE
172 ATX OVRFLO /OVER FLOW COUNT
173 TRAP4 SETCLK /GO START CLOCK
174 JA GOBAK /RTN TO CALLER
175 ITSEXT, LDX 6,RATE /=RATE FOR EXT CLK
176 FLDA% FTMP1 /REQUESTED RATE IS
177 /INTERPRETED AS OVRFLO
178 JA GOTR+1 /WHEN RATE IS EXTERNAL
179 \f/MAGIC TABLE USED BY SETCLK TO SET CLOCK ENABLE
180 /BITS. EVEN NUMBERED ENTRIES ARE FOR THE DK8ES;
181 /ODD NUMBERED ONES ARE FOR THE KW12A.
185 0675 > /"STANDARD" DK BITS
187 0670 > / MODE BITS 10
195 40 /DK ADC ON OVR BIT
196 400 /KW ADC ON OVR BIT
198 /IF NOT NEXT PAGE DO ORG
199 IFNEG .-200 < ORG .-SYNC&7600+200+SYNC >
200 \fSETCLK, 0 /TRAP HERE TO START CLK
201 /THIS ROUT HANDLES BOTH
203 CLLR /STOP KW AND SET MODE 0;
205 CLEN /CLR KW12 ENABLE OR
208 TAD P7540 /TOGGLE KW MODE 0 TO 1 TO
209 CLLR /CLR CLK COUNTER, OR SET
210 /DK ENABLE BITS, RATE FOR
211 CLA CMA /BOTH NOW=7=STOP.
212 CLZE /CLR ALL DK ENABLE BITS,
213 CLSA /CLR STATUS OF BOTH, ALL
215 TAD FCNTBL+1 /SET PTR TO CLKTBL FOR
216 /SETTING OF ENABLE REGS.
217 TAD CPTYP /=0 IF PDP8 =1 IF PDP12
218 DCA FCNPTR /TBL ENTRIES ALTERNATE
219 /FOR 8 AND 12. CPTYP SETS
220 /PTR TO 1ST 8 OR 1ST 12
222 TAD IDOCLK /(AC=JMP AROUND). THE
223 /FOLLOWING IS ONCE ONLY
224 /CODE. THESE LOCS ARE
225 /SUBSEQUENTLY USED AS
228 /THE TAG "ISVBIT" MUST BE
229 /IN FRONT OF THE STRIG
230 /FLAGS (STFLG) TO COVER
232 /STRIG 0 IN A FORT CALL
234 ISVBIT, TAD CPTYP /(AC=0,1) MAKE THE INST
235 /RAR CLL (FOR DK) OR THE
236 /INST RTR CLL FOR IDOCLK;
237 STFLG, RAL CLL /BECAUSE STATUS BITS FOR
238 TAD RARCLL /STRIGS DIFFER ON DK,KW.
239 DCA LOP2+1 /SEE SUB IDOCLK.
240 /THE ABOVE 3 LOCS ARE
241 /SCHMITT TRIGGER FLAGS.
242 /THE ORDER IS S1,S2,S3
243 /FOR PDP8 AND S3,S2,S1
245 /REASON FOR REVERSING
246 /THE ORDER IS BECAUSE
247 /ENGINEERS NEVER CONSULT
248 /PROGRAMMERS WHEN THEY
250 /HARDWARE (CHK THE STATUS
251 /BITS FOR DK AND KW).
252 JMS% KONQI+1 /PUT CLOCK ON THE
253 ITMP0, CLSK /INTERRUPT QUE
255 CLENAB, ADDR IDOCLK /THIS LOC WILL HOLD THE
256 /ENABLE BITS FOR DK,KW
257 AROUND, TAD RATE /(AC=0,2,3,4,5,6) RATE IS
259 RTR CLL /START TO POSITION RATE
260 RAR /BITS. B3-B5 FOR DK
262 TAD CPTYP /(THIS IS TRICKY) NEED
263 RAR /CPTYP IN LNK BECAUSE
264 /POSITION OF RATE BITS
266 TAD% FCNPTR /AC="STANDARD"
267 /ENABLE BITS FOR DK,KW.
268 SZL /IF ITS A KW THE RATE AND
269 /AND STND BITS ARE ALREADY
270 /POSITIONED AS FOLLOWS:
272 /B0-B3 AND B5 WILL GO TO
273 /KW CONTROL. B4,B5 WILL
274 /GO TO ENABLE. B3 IS ADC
275 /ON OVRFLO AND MAY BE SET
276 /BELOW. B5 ON CONTROL IS
277 /MODE 1. B4 AND B5 ON
278 /ENABLE ARE BUFF PRESET TO
279 /CLOCK COUNTER AND INTRUPT
280 /ON OVRFLO RESPECTIVELY.
281 JMP NOBIT-1 /ITS KW GO PUT IN CLENAB.
282 RAR STL /ITS DK; POSITION RATE TO
283 RTR /B3-B5. NOTE THAT THE LNK
284 /(CPTYP=0) IS BEING USED.
285 CMA /NOTE ALSO THAT THE RATE
286 /AND STND BITS ARE THE 1S
287 /COMP. OF WHAT THEY SHOULD
291 /PRESET TO CLK CNTR ON
292 /OVERFLO. LOOK AT THE RATE
293 /BITS IN THE HANDBOOK FOR
295 /FOR DK IS 100HZ, 100KHZ
296 /RESPECTIVELY. R2,R5 FOR
300 /THE FINAL VALUE OF THE
301 /STND DK ENABLE BITS (1ST
302 /ENTRY IN CLKTBL) IS LEFT
303 /AS AN EXERCISE FOR THE
305 JMP NOBIT-1 /GO PUT IN CLENAB
306 LOP1, RAR CLL /ROT 1 FCN BIT INTO LNK.
308 /IGNORED HERE. B8=ADC ON
309 /OVRFLO, B9-B11 ARE STRIG3
310 /-STRIG1 RESP. BX=1=ENABLE
312 DCA FCNWD /PUT IT BACK (FCNWD IS
316 TAD% FCNPTR /GET BITS FROM THE MAGIC
318 DCA CLENAB /UPDATE ENABLE WORD.
319 NOBIT, ISZ FCNPTR /ADV TO NEXT
320 ISZ FCNPTR /TBL ENTRY.
321 TAD FCNWD /WHEN FCNWD GOES TO 0
322 AND P17 /WE ARE ALL DONE.
323 /THE "AND" IS DONE TO
324 /PROTECT AGAINST A BAD
325 /ARG FROM THE FORT CALL.
326 /IN A FRIENDLY ENIVORN,
328 /NEVER TRUST A FORTRAN
330 P7540, SMA SZA /SMA IS SUPERFLOUS TO
332 /CREATES A NICE CONST.
334 DCA STFLG /CLR THE SCHMITT
335 DCA STFLG+1 /TRIGGER FLAGS.
337 TAD OVRFLO /SET BUFF PRESET
338 CIA /(FPP SET THIS ARG)
340 CLAB > / SET PRESET COUNTER
342 IFSW 4 < / ZERO PRESET COUNTER
344 TAD CLENAB /THIS IS FOR KW ONLY.
345 AND P377 /AC=3XX. 3= OR BUFF PRE
346 /INTO CLK CNTR AND ENAB
349 CLEN /SET KW ENABLE OR
351 DCA OVRCNT+1 /CLR NUM OF CLK OVRFLOS
352 DCA OVRCNT /SINCE TIME 0.
353 TAD CPTYP /NEED TYPE IN ORDER TO
354 RARCLL, RAR CLL /ISOLATE CONTROL
357 AND P7540 /YES, B0-B2 IS RATE,
358 /B3 IS ADC, B5 IS BUFF
360 /OVRFLO, B6 IS MOX NIX.
361 /IF DK ALL BITS MAY HAVE
363 CLLR /START THE CLOCK
366 JMP% SETCLK /RTN TO RTS
367 \fDOSYNC, 0 /HERE TO DISPOSITION A
369 TAD CPTYP /DK AND KW FLAGS ARE IN
370 RAR CLL /REVERSE ORDER. IF DK
371 /ARG IS OK; IF KW THEN
372 /MUST SET 1=3, 2=2, 3=1
375 TAD FCNWD /=REQUESTED STRIG=1,2,3
379 AND P3 /IE 1 GOES TO -1 GOES
380 /TO 3 ETC. "AND" ALSO
381 /INSURES RANGE IS 0-3.
382 /IF ARG IS 0 RESULT IS
384 TAD KSTFLG+1 /GET PTR TO FLAG
386 TAD% SETCLK /FLAG=0 IF TRIG HAS NOT
387 /TRIPPED SINCE THE LAST
389 /OTHERWISE IE RTN 0=FALSE
390 DCA FCNWD /,1=TRUE (FPP WILL PICK
392 DCA% SETCLK /CLR FLAG ANYWAY
394 JMP% DOSYNC /RTN TO RTS
395 \f/ INTERRUPT SERVICE ROUTINE
397 IDOCLK, JMP AROUND /HERE ON CLOCK INTERRUPT
398 /(JMP AROUND IS A ONCE
400 TAD KSTFLG+1 /SET PTR TO STRIG FLAGS.
402 CLSA /GET CLOCK BITS.
404 DCAZ CSTAT /SAVE THEM FOR SOME
405 TADZ CSTAT /BODY ELSE.
408 JMP .+2 / WE DO NOT SAVE STATUS OF SECOND CLOCK
411 ISZ OVRCNT+1 /YES BUMP LO ORD CNTR
413 ISZ OVRCNT /BUMP HI ORD
414 JMP DOTRIG /(HI ORD ISZ SKP IS
416 LOP2, ISZ ITMP0 /ADV STRIG FLAG PTR.
417 RAR CLL /(OR RTR CLL IF KW)
418 /IE PUT STRIG BIT IN LNK.
420 /INTERROGATION IS S1,S2,S3
421 /IF KW THE ORDER IS S3,
422 /S2,S1. THE STATUS BITS
423 /FOR DK ARE ADJACENT IE
424 / B9(S3),B10(S2),B11(S1)
425 /FOR KW ITS EVERY OTHER,
426 /B6(S1),B8(S2),B10(S3).
427 DCA ISVBIT /SAVE WHATS LEFT.
428 / RAL /COPY LNK INTO FLAG IF=1
429 / SZA /IE DONT CLR FLAG WHEN
430 / DCA% ITMP0 /ITS SET.
432 SZL / HERE WE COUNT THE NUMBER OF EVENTS BETWEEN
433 ISZ% ITMP0 / CALL TO SYNC ROUTINE (NO OVERFLOW PROTECTION!)
434 ISZ% ITMP0 / HERE TO PROTECT ISZ
437 DOTRIG, AND P377 /THE "AND" INSURES THAT
439 /CLRED SO THAT ISVBIT
443 /CLR OVRFLO BIT FOR DK,KW
444 /AND CLR PRE-EVENT BIT
448 TAD CLINT /CALL USER EXTENDED
449 SZA CLA /CLOCK ROUT ?
451 JMP% IDOCLK /RTN TO IHANDL
473 / ENTRY TIME /FIGURE WHAT TIME IT IS
477 FLDA RPTR /=27;X;X IS USED TO FLOAT
479 FLDA# OVRCNT /NUM OF CLK OVRFLOS SINCE
482 FMUL TOVR /=NUM OF BASIC TICKS PER
484 /FAC=NUM OF TICKS SINCE
486 FDIV% RPTR,RATE /DIV BY BASIC RATE IN HZ
487 /OR 1 IF EXTERNAL CLK.
488 FSTA% FTMP0 /GIVE ANS TO CALLER, ALSO
491 /CALL. ANS=ELAPSED TIME IN
492 /SECONDS SINCE TIME 0 OR
493 /NUM OF EXTERNAL UNIT