--- /dev/null
+ DISCLAIMER\r
+\r
+ This document file was created by scanning the\r
+ original document and then editing the scanned\r
+ text. As much as possible, the original text\r
+ format was restored. The original page breaks\r
+ have been removed. The original spelling and\r
+ grammar has been preserved. The assembler\r
+ listing of the original document is not\r
+ included in this document.\r
+ \r
+ B. Baehr (bb@balloo.han.de), Feb. 22, 1999\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+ PRODUCT CODE: MAINDEC-8E-D0LB-D\r
+ \r
+ PRODUCT TEST: KE8-E (EAE) INSTRUCTION TEST 1\r
+ \r
+ DATE CREATED: FEBRUARY 9, 1972\r
+ \r
+ MAINTAINER: DIAGNOSTIC GROUP\r
+ \r
+ AUTHOR: ED FORTMILLER\r
+ \r
+ \r
+ COPYRIGHT © 1972\r
+ DIGITAL EQUIPMENT CORPORATION\r
+\f\r
+1. ABSTRACT\r
+ --------\r
+\r
+ THIS PROGRAM IS A TEST OF ALL THE KE8-E EAE INSTRUCTIONS.\r
+ (EXCEPT MULTIPLY AND DIVIDE).\r
+\r
+2. REQUIREMENTS\r
+ ------------\r
+\r
+2.1 EQUIPMENT\r
+ --------\r
+\r
+ PDP-8/E OR /M PROCESSOR, KE8-E OPTION, AND A TELETYPE ARE REQUIRED.\r
+\r
+2.2 STORAGE\r
+ -------\r
+\r
+ LOCATION 0000 THROUGH 7600 ARE USED.\r
+\r
+2.3 PRELIMINARY PROGRAMS\r
+ --------------------\r
+\r
+ ALL PROCESSOR RELATED TEST PROGRAMS MUST HAVE BEEN RUN\r
+ SUCCESSFULLY.\r
+\r
+3. LOADING PROCEDURE\r
+ -----------------\r
+\r
+3.1 METHOD\r
+ ------\r
+\r
+ THE BINARY LOADER IS USED TO LOAD THE PROGRAM INTO ANY DE-\r
+ SIRED FIELD. REFER TO THE BINARY LOADER DOCUMENTATION IF\r
+ UNFAMILIAR WITH ITS USE.\r
+\r
+4. STARTING PROCEDURE\r
+ ------------------\r
+\r
+4.1 CONTROL SWITCH SETTING\r
+ ----------------------\r
+\r
+ CONTROL SWITCH SETTINGS DO NOT APPLY TO STEP COUNTER, GT, MODE,\r
+ AND COMBINED TESTS. AN ERROR WILL BE INDICATED BY A PROGRAM HALT.\r
+\r
+ SR0=1 HALT ON ERROR\r
+\r
+ SR1=1 SCOPE MODE (REPEAT PATTERN AND/OR TEST)\r
+\r
+ SR2=1 PRINT ERROR INFORMATION\r
+\r
+ SR3=1 DO NOT EXIT CURRENT TEST.\r
+\r
+ SR10=11 SR10 SR11\r
+ 0 0 EXECUTE TEST IN "A" AND "B" MODES\r
+ 0 1 EXECUTE TEST IN "A" AND "B" MODES.\r
+ 1 0 SELECT "A" MODE.\r
+ 1 1 SELECT "B" MODE.\r
+\f\r
+4.2 STARTING ADDRESS\r
+ ----------------\r
+\r
+ THIS PROGRAM STARTS AT LOCATION 0200.\r
+\r
+4.3 PROGRAM AND/OR OPERATOR ACTION\r
+ ------------------------------\r
+\r
+ WITH THE PROGRAM LOADED IN CORE PROCEED AS FOLLOWS:\r
+\r
+ A. INSURE TELETYPE IS ON-LINE.\r
+\r
+ B. LOAD ADDRESS 0200.\r
+\r
+ C. SET ANY DESIRED OPTIONS IN THE SR.\r
+\r
+ D. PRESS CLEAR AND CONTINUE.\r
+\r
+ NOTE:\r
+\r
+ FOR A NORMAL PROGRAM RUN, SET SR SWITCHES TO 5000.\r
+ PROGRAM WILL RUN CONTINUOUSLY EXECUTING THE TEST IN "A"\r
+ AND "B" MODES UNLESS AN ERROR IS DETECTED AT WHICH TIME\r
+ THE ERROR INFORMATION WOULD BE PRINTED OUT AND THEN\r
+ THE PROGRAM WILL HALT.\r
+\r
+5. ERRORS\r
+ ------\r
+\r
+5.1 PROGRAM AND/OR OPERATOR ACTION.\r
+ -------------------------------\r
+\r
+ THE PURPOSE OF THIS PROGRAM IS TO DETECT OPERATION ERRORS\r
+ IN THE KE-8 HARDWARE. UPON DETECTION OF AN ERROR, THE\r
+ PROGRAM EITHER HALTS, OR GIVES AN ERROR PRINTOUT DE-\r
+ PENDING ON THE SETTING OF SR 0 AND 2.\r
+\f\r
+5.2 ERROR HALTS AND DESCRIPTION\r
+ ---------------------------\r
+\r
+ LOC 0236 MQL FAILED TO CLEAR THE AC OR THE LINK WAS CLEARED.\r
+\r
+ LOC 0447 MQL FAILED TO CLEAR THE AC OR THE LINK WAS SET.\r
+\r
+ LOC 0562 MQL FAILED TO LOAD THE MQ OR MQA FAILED TO LOAD\r
+ THE AC.\r
+\r
+ LOC 0727 MQL FAILED TO LOAD THE MQ OR MQA FAILED TO LOAD\r
+ THE AC.\r
+\r
+ LOC 1054 MQA FAILED TO "INCLUSIVE OR" THE MQ WITH THE AC.\r
+\r
+ LOC 1222 MQA FAILED TO "INCLUSIVE OR" THE MQ WITH THE AC.\r
+\r
+ LOC 1301 SAM INSTRUCTION FAILED.\r
+\r
+ LOC 1414 SAM INSTRUCTION FAILED.\r
+\r
+ LOC 1477 SHL INSTRUCTION FAILED.\r
+\r
+ LOC 1631 SHL INSTRUCTION FAILED.\r
+\r
+ LOC 1716 LSR INSTRUCTION FAILED.\r
+\r
+ LOC 2031 LSR INSTRUCTION FAILED.\r
+\r
+ LOC 2116 ASR INSTRUCTION FAILED.\r
+\r
+ LOC 2231 ASR INSTRUCTION FAILED.\r
+\r
+ LOC 2516 DPSZ INSTRUCTION FAILED.\r
+\r
+ LOC 2637 DPIC INSTRUCTION FAILED.\r
+\f\r
+ LOC 2703 DPIC INSTRUCTION FAILED.\r
+\r
+ LOC 3014 DCM INSTRUCTION FAILED.\r
+\r
+ LOC 3124 DAD INSTRUCTION FAILED.\r
+\r
+ LOC 3274 DAD INSTRUCTION FAILED.\r
+\r
+ LOC 3434 DST INSTRUCTION FAILED.\r
+\r
+ LOC 3531 DST INSTRUCTION FAILED.\r
+\r
+ LOC 3653 NORMALIZE INSTRUCTION FAILED.\r
+\r
+ LOC 4336 NORMALIZE INSTRUCTION FAILED.\r
+\r
+ LOC 4520 NORMALIZE INSTRUCTION FAILED.\r
+\r
+ LOC 4605 EAE NOP SKIPPED.\r
+\r
+ LOC 4610 EAE NOP MODIFIED THE AC.\r
+\r
+ LOC 4614 EAE NOP MODIFIED THE MQ.\r
+\r
+ LOC 4622 EAE CLA SKIPPED.\r
+\r
+ LOC 4624 EAE CLA FAILED TO CLEAR THE AC.\r
+\r
+ LOC 4630 EAE CLA MODIFIED THE MQ.\r
+\r
+ LOC 4637 AC OR MQ NOT CLEARED BY CAM.\r
+\r
+ LOC 4650 SWP FAILED.\r
+\r
+ LOC 4655 SWP FAILED.\r
+\r
+ LOC 4666 ACL FAILED.\r
+\r
+ LOC 4710 DLD (CAM DAD) FAILED.\r
+\r
+ LOC 4715 DLD (CAM DAD) FAILED.\r
+\r
+ LOC 4736 DDZ (CAM DST) FAILED.\r
+ 4741\r
+ 4744\r
+\r
+ LOC 4752 "B" MODE NORMALIZE FAILED TO CLEAR AC.\r
+\r
+ LOC 5004 CLEAR KEY FAILED TO SET "MODE A" OR DPSZ FAILED.\r
+\r
+ LOC 5010 SWAB FAILED TO SET "MODE B" OR DPSZ FAILED.\r
+\r
+ LOC 5015 SWBA FAILED TO SET "MODE A".\r
+\r
+ LOC 5023 CAF FAILED TO SET "MODE A".\r
+\f\r
+ LOC 5031 SCL OR SCA ERROR.\r
+ 5040\r
+ 5047\r
+ 5056\r
+ 5065\r
+ 5074\r
+ 5103\r
+ 5112\r
+ 5117\r
+ 5126\r
+ 5135\r
+ 5145\r
+ 5155\r
+\r
+ LOC 5163 ACS INSTRUCTION FAILED\r
+ 5170\r
+ 5205\r
+ 5210\r
+\r
+ LOC 5220 RTF INSTRUCTION FAILED TO SET GT FLAG TO 0 OR\r
+ GTF FAILED TO GET IT.\r
+\r
+ LOC 5230 RTF INSTRUCTION FAILED TO SET GT FALG TO 1 OR\r
+ GTF FAILED TO GET IT.\r
+\r
+ LOC 5236 SGT SKIPPED WITH GT FLAG NOT SET.\r
+\r
+ LOC 5243 SGT FAILED TO SKIP WITH GT FLAG SET.\r
+\r
+ LOC 5252 SWBA FAILED TO CLEAR THE GT FLAG.\r
+\f\r
+5.3 ERROR PRINTOUTS\r
+ ---------------\r
+\r
+5.3.1 MQL TESTS\r
+ ----------\r
+\r
+ MQLT MODE A (OR B)\r
+\r
+ AC 1 000000000011\r
+ 0-AC 1 000000000001\r
+\r
+ MQLT MQL INSTRUCTION TEST WITH LINK SET TO A 1.\r
+ AC THE ORIGINAL C(AC) AND C(L).\r
+ 0-AC C(AC) AND C(L) AFTER THE MQL INSTRUCTION WAS\r
+ EXECUTED.\r
+ NOTE THAT BIT 11 OF AC SHOULD EQUAL 0.\r
+\r
+ MQLT1 MODE A (OR B)\r
+\r
+ AC 0 000000000001\r
+ 0-AC 0 000000000001\r
+\r
+ MQLT MQL INSTRUCTION TEST WITH LINK SET TO A 0.\r
+ AC THE ORIGINAL C(AC) AND C(L)\r
+ 0-AC C(AC) AND C(L) AFTER THE MQL INSTRUCTION\r
+ WAS EXECUTED.\r
+ NOTE THAT BIT 11 OF THE AC SHOULD EQUAL 0.\r
+\r
+5.3.2 MQA TESTS\r
+ ---------\r
+\r
+ MQAT MODE A (OR B)\r
+\r
+ AC 1 000000000001\r
+ MQL)1 000000000000\r
+ MQA)\r
+\r
+ MQAT MQA MQL INSTRUCTION TEST WITH THE LINK SET\r
+ TO A 1.\r
+ AC THE ORIGINAL C(AC) AND C(L).\r
+ MQL MQA THE C(AC) AND C(L) AFTER THE EXECUTION OF\r
+ AN MQL INSTRUCTION FOLLOWED BY AN MQA IN-\r
+ STRUCTION. NOTE THAT BIT 11 OF THE AC SHOULD\r
+ BE A 1.\r
+\r
+ MQAT1 MODE A (OR B)\r
+\r
+ AC 0 100000000000\r
+ MQL) 0 011111111111\r
+ MQA)\r
+\f\r
+ MQAT1 MQL,MQA INSTRUCTION TEST WITH THE LINK SET TO A 0.\r
+ AC THE ORIGINAL C(AC) AND C(L).\r
+ MQL,MQA THE C(AC) AND C(L) AFTER THE EXECUTION OF AN MQL\r
+ INSTRUCTION FOLLOWED BY AN MQA INSTRUCTION.\r
+ NOTE THAT THE C(AC) SHOULD BE 4000.\r
+\r
+\r
+ MQAT2 MODE A (OR B)\r
+\r
+ AC 1 111111111110\r
+ MQ 000000000001\r
+ MQVAC 1 000000000000\r
+\r
+ MQAT2 MQA INSTRUCTION TEST.\r
+ AC ORIGINAL C(AC) AND C(L).\r
+ MQ ORIGINAL C(MQ).\r
+ MQVAC THE C(AC) AND C(L) AFTER THE EXECUTION OF AN MQA\r
+ INSTRUCTION.\r
+ NOTE THAT THE C(AC) SHOULD BE 7777.\r
+\r
+ MQAT3 MODE A (OR B)\r
+\r
+ AC 0 111111111110\r
+ MQ 000000000001\r
+ MQVAC 0 000000000000\r
+\r
+\r
+ MQAT3 MQA INSTRUCTION TEST.\r
+ AC ORIGINAL C(L) AND C(AC).\r
+ MQ ORIGINAL C(MQ).\r
+ MQVAC THE C(AC) AND THE C(L) AFTER THE EXECUTION\r
+ OF AN MQA INSTRUCTION.\r
+ NOTE THAT THE C(AC) SHOULD BE 7777.\r
+\r
+5.3.3 SAM TESTS\r
+ ---------\r
+\r
+ SAM TEST 0 (OR 1) MODE B\r
+\r
+ C(L) C(AC) C(MQ) C(GT) C(SC)\r
+\r
+ PROBLEM 1 000000111111 000001000000 0 000000000000\r
+ SIMULATED 0 000000000001 000001000000 1 000000000000\r
+ ACTUAL 0 000000000000 000001000000 1 000000000000\r
+\r
+ PROBLEM THE CONTENTS OF THE REGISTERS PRIOR TO ISSUING\r
+ A SAM INSTRUCTION.\r
+ SIMULATED WHAT THE RESULTS SHOULD BE.\r
+ ACTUAL WHAT THE RESULTS WERE FROM THE EXECUTION OF\r
+ A SAM INSTRUCTION.\r
+ NOTE THAT AC SHOULD BE 0001 IN THE "ACTUAL".\r
+\f\r
+5.3.4 SHL TESTS\r
+ ---------\r
+\r
+ SHL TEST 0 (OR 1) 0003 SHIFTS MODE A (OR B)\r
+\r
+ C(L) C(AC) C(MQ) C(GT) C(SC)\r
+\r
+ PROBLEM 1 000100100001 000100000001 0 000000000010\r
+ SIMULATED 0 100100001000 100000001000 0 000000000000\r
+ ACTUAL 0 100100000000 100000001000 0 000000000000\r
+\r
+ PROBLEM THE CONTENTS OF THE REGISTERS PRIOR TO ISSUING AN\r
+ SHL INSTRUCTION. THE NUMBER CONTAINED IN C(SC) IS\r
+ THE CONTENTS OF THE ADDRESS FOLLOWING THE SHL\r
+ INSTRUCTION.\r
+ SIMULATED WHAT THE RESULTS SHOULD BE.\r
+ ACTUAL WHAT THE RESULTS WERE FROM THE EXECUTION OF AN\r
+ SHL INSTRUCTION.\r
+\r
+5.3.5 LSR TESTS\r
+ ---------\r
+\r
+ LSR TEST 1 (OR 0) 0004 SHIFTS MODE B (OR A)\r
+\r
+ C(L) C(AC) C(MQ) C(GT) C(SC)\r
+\r
+ PROBLEM 1 000000111111 000000001111 0 000000000100\r
+ SIMULATED 0 000000000011 111100000000 1 000000011111\r
+ ACTUAL 0 000000000011 111100000000 0 000000011111\r
+\r
+ PROBLEM THE CONTENTS OF THE REGISTERS PRIOR TO ISSUING AN\r
+ LSR INSTRUCTION. THE NUMBER CONTAINED IN C(SC)\r
+ IS THE CONTENTS OF THE ADDRESS FOLLOWING THE LSR\r
+ INSTRUCTION.\r
+ SIMULATED WHAT THE RESULTS SHOULD BE.\r
+ ACTUAL WHAT THE RESULTS WERE FROM THE EXECUTION OF AN\r
+ LSR INSTRUCTION.\r
+ NOTE THAT THE C(GT) SHOULD BE 1 IN THE "ACTUAL".\r
+\f\r
+5.3.6 ASR TESTS\r
+ ---------\r
+\r
+ ASR TEST 0 (OR 1) 0002 SHIFTS MODE B (OR A)\r
+\r
+ C(L) C(AC) C(MQ) C(GT) C(SC)\r
+\r
+ PROBLEM 0 000000000110 000000100001 1 000000000010\r
+ SIMULATED 1 110000000001 100000001000 0 000000011111\r
+ ACTUAL 1 110000000001 000000001000 0 000000011111\r
+\r
+ PROBLEM THE CONTENTS OF THE REGISTERS PRIOR TO ISSUING\r
+ AN ASR INSTRUCTION. THE NUMBER CONTAINED IN C(SC)\r
+ IS THE CONTENTS OF THE ADDRESS FOLLOWING THE ASR\r
+ INSTRUCTION.\r
+ SIMULATED WHAT THE RESULTS SHOULD BE.\r
+ ACTUAL WHAT THE RESULTS WERE FROM THE EXECUTION OF AN\r
+ ASR INSTRUCTION.\r
+ NOTE THAT THE C(MQ) SHOULD BE 4010 IN THE "ACTUAL".\r
+\r
+5.3.7 DPSZ TESTS\r
+ ----------\r
+\r
+ DPSZ TEST 0 MODE B\r
+\r
+ NO SKIP OCCURRED\r
+\r
+ C(L) C(AC) C(MQ) C(GT) C(SC)\r
+\r
+ PROBLEM 0 000000000000 000000000000 0 000000000000\r
+ SIMULATED 0 000000000000 000000000000 0 000000000000\r
+ ACTUAL 0 000000000000 000000000000 0 000000000000\r
+\r
+ PROBLEM THE CONTENTS OF THE REGISTERS PRIOR TO ISSUING A\r
+ DPSZ INSTRUCTION.\r
+ SIMULATED WHAT THE REGISTERS SHOULD BE AFTER ISSUING THE\r
+ DPSZ INSTRUCTION.\r
+ ACTUAL WHAT THE REGISTERS WERE AFTER ISSUING THE DPSZ\r
+ INSTRUCTION.\r
+ NOTE WITH AC ANC MQ BOTH ZERO A SKIP FAILED TO\r
+ OCCUR.\r
+\r
+ DPSZ TEST 0 MODE B\r
+\r
+ SKIP OCCURRED\r
+\r
+ C(L) C(AC) C(MQ) C(GT) C(SC)\r
+\r
+ PROBLEM 0 000000000000 000000000001 0 000000000000\r
+ SIMULATED 0 000000000000 000000000000 0 000000000000\r
+ ACTUAL 0 000000000000 000000000000 0 000000000000\r
+\r
+ PROBLEM THE CONTENTS OF THE REGISTER PRIOR TO ISSUING A\r
+ DPSZ INSTRUCTION.\r
+ SIMULATED WHAT THE REGISTERS SHOULD BE AFTER ISSUING THE\r
+ DPSZ INSTRUCTION.\r
+ ACTUAL WHAT THE REGISTERS WERE AFTER ISSUING THE DPSZ\r
+ INSTRUCTION.\r
+ NOTE WITH MQ NON ZERO A SKIP OCCURRED.\r
+\f\r
+ DPSZ TEST 0 MODE B\r
+\r
+ REG MODIFIED\r
+\r
+ C(L) C(AC) C(MQ) C(GT) C(SC)\r
+\r
+ PROBLEM 0 000000000001 000000000000 0 000000000000\r
+ SIMULATED 0 000000000001 000000000000 0 000000000000\r
+ ACTUAL 0 000000000000 000000000000 0 000000000000\r
+\r
+ PROBLEM THE CONTENTS OF THE REGISTERS PRIOR TO ISSUING A\r
+ DPSZ INSTRUCTION.\r
+ SIMULATED WHAT THE REGISTERS SHOULD BE AFTER ISSUING THE\r
+ DPSZ INSTRUCTION.\r
+ ACTUAL WHAT THE REGISTERS WERE AFTER ISSUING THE DPSZ\r
+ INSTRUCTION.\r
+ NOTE THAT THE C(AC) SHOULD BE 0001 IN THE "ACTUAL".\r
+\r
+5.3.8 DPIC TESTS\r
+ ----------\r
+\r
+ DPIC TEST 0 (OR 1) MODE B\r
+\r
+ C(L) C(AC) C(MQ) C(GT) C(SC)\r
+\r
+ PROBLEM 1 000000000000 000000000000 0 000000000000\r
+ SIMULATED 0 000000000000 000000000001 0 000000000000\r
+ ACTUAL 0 000000000000 000000000000 0 000000000000\r
+\r
+ PROBLEM THE CONTENTS OF THE REGISTERS PRIOR TO ISSUING A\r
+ DPIC INSTRUCTION.\r
+ SIMULATED WHAT THE REGISTERS SHOULD BE AFTER THE ISSUING\r
+ OF A DPIC INSTRUCTION.\r
+ ACTUAL WHAT THE REGISTERS WERE AFTER ISSUING THE DPIC\r
+ INSTRUCTION.\r
+ NOTE THAT THE C(AC) SHOULD BE 0001 IN THE "ACTUAL".\r
+\r
+5.3.9 DCM TESTS\r
+ ---------\r
+\r
+ DCM TEST 0 (OR 1) MODE B\r
+\r
+ C(L) C(AC) C(MQ)\r
+\r
+ PROBLEM 1 000000000000 000000000001 0 000000000000\r
+ SIMULATED 0 111111111111 111111111111 0 000000000000\r
+ ACTUAL 0 111111111111 111111111110 0 000000000000\r
+\r
+ PROBLEM THE CONTENTS OF THE REGISTERS PRIOR TO ISSUING A\r
+ DCM INSTRUCTION.\r
+ SIMULATED WHAT THE REGISTERS SHOULD BE AFTER THE ISSUING OF\r
+ A DCM INSTRUCTION.\r
+ ACTUAL WHAT THE REGISTERS WERE AFTER ISSUING THE DCM\r
+ INSTRUCTION.\r
+ NOTE THAT THE C(MQ) SHOULD BE 7777.\r
+\f\r
+5.3.10 DAD TESTS\r
+ ---------\r
+\r
+ DAD TEST 0 (OR 1) MODE B\r
+\r
+ C(L) C(AC) C(MQ) C(GT) C(SC)\r
+\r
+ PROBLEM 0 000000011111 000011110101 0 000000000000\r
+ TO BE ADDED 111111100000 111100001010\r
+ SIMULATED 0 111111111111 111111111111 0 000000000000\r
+ ACTUAL 0 111111111111 111111111110 0 000000000000\r
+\r
+ PROBLEM THE CONTENTS OF THE REGISTERS PRIOR TO ISSUING\r
+ A DAD INSTRUCTION.\r
+ TO BE ADDED THE CONTENTS OF THE TWO ADDRESS TO BE ADDED TO\r
+ THE AC AND MQ.\r
+ SIMULATED WHAT THE REGISTERS SHOULD BE AFTER THE ISSUING\r
+ THE DAD INSTRUCTION.\r
+ ACTUAL WHAT THE REGISTERS WERE AFTER ISSUING THE DAD\r
+ INSTRUCTION.\r
+ NOTE THAT C(MQ) SHOULD BE 7777 IN THE ACTUAL.\r
+\r
+5.3.11 DST TESTS\r
+ ---------\r
+\r
+ DST TEST 0 (OR 1) MODE B\r
+\r
+ REG BEFORE DST AFTER DST\r
+\r
+ C(L) 1 1\r
+ C(AC) 111111111111 111111111111\r
+ C(MSH) 000000000000\r
+ C(MQ) 111110111110 111110111110\r
+ C(LSH) 111110111110\r
+\r
+ BEFORE DST THE CONTENTS OF THE REGISTERS BEFORE ISSUING A\r
+ DST INSTRUCTION.\r
+ AFTER DST WHAT THE REGISTERS WERE AFTER ISSUING THE DST\r
+ INSTRUCTION.\r
+ MSH IS WHAT DST STORED FOR THE AC.\r
+ LSH IS WHAT DST STORED FOR THE MQ\r
+ NOTE THAT THE C(MSH) SHOULD BE 7777.\r
+\r
+5.3.12 NORMALIZE TESTS\r
+ ---------------\r
+\r
+ NMIT C(AC) C(MQ) MODE A (OR B)\r
+\r
+ 000000000000 010101010101\r
+ NMI 010101010100 000000000000\r
+ SCAT 000000001100\r
+ SCA 000000001100\r
+\r
+ NMIT NORMALIZE AND STEP COUNTER TEST. ORIGINAL C(AC) AND\r
+ C(MQ).\r
+\f\r
+(5.3.12 CONT'D)\r
+\r
+ NMI C(AC) AND C(MQ) AFTER THE NMI INSTRUCTION WAS EXECUTED.\r
+\r
+ SCAT THE CORRECT COUNT OF THE STEP COUNTER AFTER THE NORMALIZE\r
+ INSTRUCTION WAS EXECUTED.\r
+\r
+ SCA THE ACTUAL COUNT IN THE STEP COUNTER AS READ INTO THE AC\r
+ BY THE SCA INSTRUCTION AFTER THE NORMALIZE INSTRUCTION\r
+ WAS EXECUTED.\r
+\r
+ NOTE THAT BIT 11 OF AC IN ERROR. C(AC) SHOULD EQUAL TO 2525.\r
+\r
+5.4 TABLE OF INSTRUCTIONS\r
+ ---------------------\r
+\r
+ THE FOLLOWING TABLE CONTAINS THE TEST MNEMONICS, STARTING ADDRESS,\r
+ ERROR HALT ADDRESS AND INSTRUCTION TESTED.\r
+\r
+ STARTING ERROR\r
+ MNEMONIC INSTRUCTIONS ADDRESS HALT\r
+ -------- ------------ -------- -----\r
+\r
+ MQLT MQL 0204 0236\r
+ MQLT1 MQL 0400 0447\r
+ MQAT MQL,MQA 0503 0562\r
+ MQAT1 MQL,MQA 0650 0727\r
+ MQAT2 MQA 1000 1054\r
+ MQAT3 MQA 1135 1222\r
+ SAMTS0 SAM 1245 1301\r
+ SAMTS1 SAM 1333 1414\r
+ SHLTS0 SHL 1430 1477\r
+ SHLTS1 SHL 1600 1631\r
+ LSRTS0 LSR 1646 1716\r
+ LSRTS1 LSR 2000 2031\r
+ ASRTS0 ASR 2046 2116\r
+ ASRTS1 ASR 2200 2231\r
+ DPSZS0 DPSZ 2246 2516\r
+ DPITS0 DPIC 2600 2637\r
+ DPITS1 DPIC 2653 2703\r
+ DCMTS0 DCM 2717 3014\r
+ DADTS0 DAD 3030 3124\r
+ DADTS1 DAD 3200 3274\r
+ DSTTS0 DST 3310 3434\r
+ DSTTS1 DST 3450 3531\r
+ NORMT NMI,SCA 3600 3653\r
+ NORMT1 NMI,SCA 4200 4336\r
+ NORMT2 NMI 4400 4520\r
+ COMTST NOP,CLA,ACL,CAM 4600 4605-4744\r
+ SWP,DLD,DDZ,NMI\r
+ MDTST DPSZ,SWAB,SWBA 0200 5004-5023\r
+ TSCL SCL,ACS 0200 5031-5210\r
+ GTTST GTF,RTF,SGT 0200 5220-5252\r
+\f\r
+6. DESCRIPTION\r
+ -----------\r
+\r
+ THE KE8 EAE INSTRUCTION TEST 1, TESTS THE FOLLOWING EXTENDED\r
+ ARITHMETIC ELEMENT INSTRUCTIONS:\r
+\r
+ MQL, MQA, SHL, LSR, ASR, DPSZ, DPIC, DCM, DAD,\r
+ DST, NMI, SWAB, SWBA, SGT, RTF, AND GTF.\r
+\r
+ THE EXTENDED ARITHMETIC ELEMENT IS TESTED USING PATTERNS\r
+ NECESSARY TO DETECT AND ISOLATE ERRORS. IF A FAILURE DOES OCCUR,\r
+ THE TEST WILL PRINTOUT THE ERROR INFORMATION AND/OR HALT AT A\r
+ PREDETERMINED ERROR HALT ACCORDING TO THE SR SETTING.\r
+\r
+7. EXECUTION TIME\r
+ --------------\r
+\r
+ ONE COMPLETE PROGRAM PASS TAKES APPROXIMATELY 6 MINUTES AND AT\r
+ THE END OF EACH PASS "KE8 1" WILL BE PRINTED OUT ON THE TELETYPE.\r
projects / pdp8.git / blobdiff