--- /dev/null
+ EXTERN #DISP /SYSTEM PAGE 0,NEEDED TO\r
+ /PUT CLOCK STATUS ON PG0\r
+ /(CSTAT) FOR USE BY GEN\r
+ /USER CLOCK SERVICE ROUTS\r
+ EXTERN #T812 /RTS CPTYP\r
+ EXTERN ONQI /INTERRUPT QUEUER\r
+ CLZE=6130 /CLOCK IOTS\r
+ CLSK=6131\r
+ CLLR=6132 /ALSO CLOE\r
+ CLAB=6133\r
+ CLEN=6134\r
+ CLSA=6135\r
+ CSTAT=157 /IDOCLK PUTS CLSA BITS\r
+ /IN HERE\r
+\f BASE FTMP0\r
+ INDEX FCNWD\r
+ FIELD1 SYNC\r
+ JSA SETUP /HERE TO READ A STRIG\r
+ /INITIALIZE ARGS\r
+ TRAP4 DOSYNC /FCNWD (XR) HOLDS STRIG\r
+ /TO READ\r
+ XTA FCNWD /=ANS=0,1\r
+ FSTA% FTMP1 /GIVE ANS TO CALLER\r
+ JA GOBAK\r
+FTMP0, F 0.0 /BASE PAGE\r
+FTMP1, F 0.0\r
+RPTR, 27;ADDR RTBL /PTR TO RATE TBL, ALSO\r
+ /USED TO FLT OVRCNT (NOTE\r
+ /THAT THE EXPONENT=27)\r
+MINRAT, F .02 /MIN ALLOWABLE RATE\r
+TOVR, F 0.0\r
+NAME, TEXT +CLOCK +\r
+ ORG 10*3+FTMP0\r
+ FNOP\r
+ JA NAME+3\r
+ 0\r
+GOBAK, JA .\r
+RTBL, F 16.0 /CONSTANT USED TO CHK FOR\r
+ /EXT CLK BIT IN FCNWD\r
+ /THIS CONST MUST BE NE 0\r
+MAXRAT,\r
+F4096, F 4096.0 /USED TO GET OVRFLO COUNT\r
+ F 100000.0 /FASTEST RATE IN HERTZ\r
+ F 10000.0 /NEXT FASTEST RATE\r
+ F 1000.0\r
+ F 100.0 /SLOWEST RATE\r
+ F 1.0 /USED BY TIME FOR EXT CLK\r
+\f BASE 0\r
+ \r
+SETUP, 0;0 /HERE TO INIT ALL FPP SUBS\r
+ STARTD\r
+ FLDA 30 /PICK UP RTN TO CALLER\r
+ FSTA GOBAK\r
+ FLDA 0 /GET PTR TO CALLERS ARGS\r
+ SETX FCNWD /CLOCK XR AND BASE\r
+ SETB FTMP0\r
+ BASE FTMP0\r
+ FSTA FTMP1\r
+ FLDA% FTMP1,P1\r
+ FSTA FTMP0 /PTR TO 1ST ARG\r
+ FLDA% FTMP1,P2\r
+ FSTA FTMP1 /PTR TO 2ND ARG\r
+ FLDA #T812 /TELLS PDP8,PDP12\r
+ ATX CPTYP /0=8=DK8ES,1=12=KW12A\r
+ STARTF\r
+ FLDA% FTMP0 /=1ST ARG\r
+ ATX FCNWD /ALWAYS IN FCNWD\r
+ JA SETUP\r
+\f ENTRY CLOCK\r
+CLOCK, JSA SETUP /HERE FOR CLOCK START\r
+ FLDA% FTMP0\r
+ FSUB RTBL /FCNWD IS IN FAC,IF GE 16\r
+ JGE ITSEXT /(RTBL=16.0) THEN USER IS\r
+ /REQUESTING AN EXTERNAL\r
+ /CLOCK I.E. B8 OF FCNWD\r
+ /IS SET.\r
+ FLDA% FTMP1 /=REQUESTED RATE IN HERTZ\r
+ FSUB MINRAT /.LE. MINUMUM RATE\r
+ JLE GOTR-2 /MEANS STOP CLOCK.\r
+ FADD MINRAT\r
+ FSUB MAXRAT /CHK FOR TOO FAST\r
+ JGT GOTR-2\r
+ LDX -4,OVRFLO /THERE ARE 4 BASIC RATES\r
+ LDX 1,RATE /=INDEX INTO RTBL; UPON\r
+ /TRAP(CLOCK) RATE=(0,\r
+ /2,3,4,5,6) 0=STOP,\r
+ /6=EXTERNAL\r
+ /2-5=PROGRAMMABLE RATES\r
+LOP0, FLDA% RPTR,RATE+\r
+ /GET NEXT SLOWEST RATE\r
+ FDIV% FTMP1 /=REQUESTED RATE IN HZ.\r
+ /FAC=OVRFLO COUNT;\r
+ FSUB F4096 /MUST BE MODULO 12 BITS.\r
+ JLE GOTR /FOUND IT\r
+ JXN LOP0,OVRFLO+\r
+ LDX 0,RATE /RATE IS TOO SLOW, STOP\r
+ /CLOCK.\r
+GOTR, FADD F4096 /RESTORE\r
+ FSTA TOVR\r
+ ATX OVRFLO /OVER FLOW COUNT\r
+ TRAP4 SETCLK /GO START CLOCK\r
+ JA GOBAK /RTN TO CALLER\r
+ITSEXT, LDX 6,RATE /=RATE FOR EXT CLK\r
+ FLDA% FTMP1 /REQUESTED RATE IS\r
+ /INTERPRETED AS OVRFLO\r
+ JA GOTR+1 /WHEN RATE IS EXTERNAL\r
+\f/MAGIC TABLE USED BY SETCLK TO SET CLOCK ENABLE\r
+/BITS. EVEN NUMBERED ENTRIES ARE FOR THE DK8ES;\r
+/ODD NUMBERED ONES ARE FOR THE KW12A.\r
+ \r
+CLKTBL, 0675 /"STANDARD" DK BITS\r
+ 300 /STND KW BITS\r
+ 1 /DK STRIG1 BIT\r
+ 60 /KW STRIG1 BITS\r
+ 2 /DK S2\r
+ 14 /KW S2\r
+ 4 /S3\r
+P3, 3 /S3\r
+ 40 /DK ADC ON OVR BIT\r
+ 400 /KW ADC ON OVR BIT\r
+ \r
+ /IF NOT NEXT PAGE DO ORG\r
+ IFNEG .-200 < ORG .-SYNC&7600+200+SYNC >\r
+\fSETCLK, 0 /TRAP HERE TO START CLK\r
+ /THIS ROUT HANDLES BOTH\r
+ /DK8ES AND KW12A.\r
+ CLLR /STOP KW AND SET MODE 0;\r
+ /NOP FOR DK.\r
+ CLEN /CLR KW12 ENABLE OR\r
+ /READ DK ENABLE.\r
+ CLA\r
+ TAD P7540 /TOGGLE KW MODE 0 TO 1 TO\r
+ CLLR /CLR CLK COUNTER, OR SET\r
+ /DK ENABLE BITS, RATE FOR\r
+ CLA CMA /BOTH NOW=7=STOP.\r
+ CLZE /CLR ALL DK ENABLE BITS,\r
+ CLSA /CLR STATUS OF BOTH, ALL \r
+ CLA /IS NOW CLEAR.\r
+ TAD FCNTBL+1 /SET PTR TO CLKTBL FOR\r
+ /SETTING OF ENABLE REGS.\r
+ TAD CPTYP /=0 IF PDP8 =1 IF PDP12\r
+ DCA FCNPTR /TBL ENTRIES ALTERNATE\r
+ /FOR 8 AND 12. CPTYP SETS\r
+ /PTR TO 1ST 8 OR 1ST 12\r
+ /ENTRY\r
+ TAD IDOCLK /(AC=JMP AROUND). THE\r
+ /FOLLOWING IS ONCE ONLY\r
+ /CODE. THESE LOCS ARE\r
+ /SUBSEQUENTLY USED AS\r
+ /OPERANDS\r
+ DCA .-1\r
+ /THE TAG "ISVBIT" MUST BE\r
+ /IN FRONT OF THE STRIG\r
+ /FLAGS (STFLG) TO COVER\r
+ /THE ILLEGAL CASE OF\r
+ /STRIG 0 IN A FORT CALL\r
+ /TO SYNC.\r
+ISVBIT, TAD CPTYP /(AC=0,1) MAKE THE INST\r
+ /RAR CLL (FOR DK) OR THE\r
+ /INST RTR CLL FOR IDOCLK;\r
+STFLG, RAL CLL /BECAUSE STATUS BITS FOR\r
+ TAD RARCLL /STRIGS DIFFER ON DK,KW.\r
+ DCA LOP2+1 /SEE SUB IDOCLK.\r
+ /THE ABOVE 3 LOCS ARE\r
+ /SCHMITT TRIGGER FLAGS.\r
+ /THE ORDER IS S1,S2,S3\r
+ /FOR PDP8 AND S3,S2,S1\r
+ /FOR PDP12. THE MAIN\r
+ /REASON FOR REVERSING\r
+ /THE ORDER IS BECAUSE\r
+ /ENGINEERS NEVER CONSULT\r
+ /PROGRAMMERS WHEN THEY\r
+ /ARE BUILDING NEW \r
+ /HARDWARE (CHK THE STATUS\r
+ /BITS FOR DK AND KW).\r
+ JMS% KONQI+1 /PUT CLOCK ON THE\r
+ITMP0, CLSK /INTERRUPT QUE\r
+ /VIA ONQI.\r
+CLENAB, ADDR IDOCLK /THIS LOC WILL HOLD THE\r
+ /ENABLE BITS FOR DK,KW\r
+AROUND, TAD RATE /(AC=0,2,3,4,5,6) RATE IS\r
+ /SET BY FPP\r
+ RTR CLL /START TO POSITION RATE\r
+ RAR /BITS. B3-B5 FOR DK\r
+ /B0-B2 FOR KW\r
+ TAD CPTYP /(THIS IS TRICKY) NEED\r
+ RAR /CPTYP IN LNK BECAUSE\r
+ /POSITION OF RATE BITS\r
+ /DIFFER FOR DK KW.\r
+ TAD% FCNPTR /AC="STANDARD"\r
+ /ENABLE BITS FOR DK,KW.\r
+ SZL /IF ITS A KW THE RATE AND\r
+ /AND STND BITS ARE ALREADY\r
+ /POSITIONED AS FOLLOWS:\r
+ /RRR011000000\r
+ /B0-B3 AND B5 WILL GO TO\r
+ /KW CONTROL. B4,B5 WILL\r
+ /GO TO ENABLE. B3 IS ADC\r
+ /ON OVRFLO AND MAY BE SET\r
+ /BELOW. B5 ON CONTROL IS\r
+ /MODE 1. B4 AND B5 ON\r
+ /ENABLE ARE BUFF PRESET TO\r
+ /CLOCK COUNTER AND INTRUPT\r
+ /ON OVRFLO RESPECTIVELY.\r
+ JMP NOBIT-1 /ITS KW GO PUT IN CLENAB.\r
+ RTR /ITS DK; POSITION RATE TO\r
+ RAR /B3-B5. NOTE THAT THE LNK\r
+ /(CPTYP=0) IS BEING USED.\r
+ CMA /NOTE ALSO THAT THE RATE\r
+ /AND STND BITS ARE THE 1S\r
+ /COMP. OF WHAT THEY SHOULD\r
+ /BE, IE CPTYP=LNK=0\r
+ /BECOMES\r
+ /B2=1 OF ENABLE=BUFF\r
+ /PRESET TO CLK CNTR ON\r
+ /OVERFLO. LOOK AT THE RATE\r
+ /BITS IN THE HANDBOOK FOR\r
+ /BOTH DK,KW. R2,R5\r
+ /FOR DK IS 100HZ, 100KHZ\r
+ /RESPECTIVELY. R2,R5 FOR\r
+ /KW IS 100KHZ,100HZ.\r
+ /1S COMP.OF 2=5 ETC.\r
+ /SMARTEN UP STEVE!\r
+ /THE FINAL VALUE OF THE\r
+ /STND DK ENABLE BITS (1ST\r
+ /ENTRY IN CLKTBL) IS LEFT\r
+ /AS AN EXERCISE FOR THE\r
+ /PROGRAMMER.\r
+ JMP NOBIT-1 /GO PUT IN CLENAB\r
+LOP1, RAR CLL /ROT 1 FCN BIT INTO LNK.\r
+ /B7=EXT CLK AND IS\r
+ /IGNORED HERE. B8=ADC ON\r
+ /OVRFLO, B9-B11 ARE STRIG3\r
+ /-STRIG1 RESP. BX=1=ENABLE\r
+ /FCN. 0=DISABLE\r
+ DCA FCNWD /PUT IT BACK (FCNWD IS\r
+ /SET BY FPP)\r
+ SNL /ENABLE FCN ?\r
+ JMP NOBIT /NO\r
+ TAD% FCNPTR /GET BITS FROM THE MAGIC\r
+ TAD CLENAB /TABLE.\r
+ DCA CLENAB /UPDATE ENABLE WORD.\r
+NOBIT, ISZ FCNPTR /ADV TO NEXT\r
+ ISZ FCNPTR /TBL ENTRY.\r
+ TAD FCNWD /WHEN FCNWD GOES TO 0\r
+ AND P17 /WE ARE ALL DONE.\r
+ /THE "AND" IS DONE TO\r
+ /PROTECT AGAINST A BAD\r
+ /ARG FROM THE FORT CALL.\r
+ /IN A FRIENDLY ENIVORN,\r
+ /ITS NOT NECESSARY.\r
+ /NEVER TRUST A FORTRAN\r
+ /"PROGRAMMER".\r
+P7540, SMA SZA /SMA IS SUPERFLOUS TO\r
+ /THE ROUT; BUT IT\r
+ /CREATES A NICE CONST.\r
+ JMP LOP1 /MORE TO DO\r
+ DCA STFLG /CLR THE SCHMITT\r
+ DCA STFLG+1 /TRIGGER FLAGS.\r
+\f DCA STFLG+2\r
+ TAD OVRFLO /SET BUFF PRESET\r
+ CIA /(FPP SET THIS ARG)\r
+ CLAB\r
+ CLA\r
+ TAD CLENAB /THIS IS FOR KW ONLY.\r
+ AND P377 /AC=3XX. 3= OR BUFF PRE\r
+ /INTO CLK CNTR AND ENAB\r
+ /INT ON OVRFLO.\r
+ /XX ARE THE STRIGS.\r
+ CLEN /SET KW ENABLE OR\r
+ CLA /READ DK ENABLE.\r
+ DCA OVRCNT+1 /CLR NUM OF CLK OVRFLOS\r
+ DCA OVRCNT /SINCE TIME 0.\r
+ TAD CPTYP /NEED TYPE IN ORDER TO\r
+RARCLL, RAR CLL /ISOLATE CONTROL\r
+ TAD CLENAB /BITS FOR\r
+ SZL /KW ?\r
+ AND P7540 /YES, B0-B2 IS RATE,\r
+ /B3 IS ADC, B5 IS BUFF\r
+ /PRE TO CLK CNTR ON\r
+ /OVRFLO, B6 IS MOX NIX.\r
+ /IF DK ALL BITS MAY HAVE\r
+ /MEANING\r
+ CLLR /START THE CLOCK\r
+ CLA\r
+ CIF CDF\r
+ JMP% SETCLK /RTN TO RTS\r
+\fDOSYNC, 0 /HERE TO DISPOSITION A\r
+ /A SCHMITT TRIGGER.\r
+ TAD CPTYP /DK AND KW FLAGS ARE IN\r
+ RAR CLL /REVERSE ORDER. IF DK\r
+ /ARG IS OK; IF KW THEN\r
+ /MUST SET 1=3, 2=2, 3=1\r
+ /TO GET INDEX TO\r
+ /CORRECT FLAG.\r
+ TAD FCNWD /=REQUESTED STRIG=1,2,3\r
+ /(SET BY FPP)\r
+ SZL /DK ?\r
+ CIA /NO KW\r
+ AND P3 /IE 1 GOES TO -1 GOES\r
+ /TO 3 ETC. "AND" ALSO\r
+ /INSURES RANGE IS 0-3.\r
+ /IF ARG IS 0 RESULT IS\r
+ /ALWAYS 0.\r
+ TAD KSTFLG+1 /GET PTR TO FLAG\r
+ DCA SETCLK\r
+ TAD% SETCLK /FLAG=0 IF TRIG HAS NOT\r
+ /TRIPPED SINCE THE LAST\r
+ /CALL TO SYNC; =1\r
+ /OTHERWISE IE RTN 0=FALSE\r
+ DCA FCNWD /,1=TRUE (FPP WILL PICK\r
+ / UP FCNWD)\r
+ DCA% SETCLK /CLR FLAG ANYWAY\r
+ CIF CDF\r
+ JMP% DOSYNC /RTN TO RTS\r
+\fIDOCLK, JMP AROUND /HERE ON CLOCK INTERRUPT\r
+ /(JMP AROUND IS A ONCE\r
+ /ONLY CONSTANT).\r
+ TAD KSTFLG+1 /SET PTR TO STRIG FLAGS.\r
+ DCA ITMP0\r
+ CLSA /GET CLOCK BITS.\r
+ DCAZ CSTAT /SAVE THEM FOR SOME\r
+ TADZ CSTAT /BODY ELSE.\r
+ SPA /OVER FLOW ?\r
+ ISZ OVRCNT+1 /YES BUMP LO ORD CNTR\r
+ SKP\r
+ ISZ OVRCNT /BUMP HI ORD\r
+ JMP DOTRIG /(HI ORD ISZ SKP IS\r
+ /HARMLESS)\r
+LOP2, ISZ ITMP0 /ADV STRIG FLAG PTR.\r
+ RAR CLL /(OR RTR CLL IF KW)\r
+ /IE PUT STRIG BIT IN LNK.\r
+ /IF DK THE ORDER OF\r
+ /INTERROGATION IS S1,S2,S3\r
+ /IF KW THE ORDER IS S3,\r
+ /S2,S1. THE STATUS BITS\r
+ /FOR DK ARE ADJACENT IE\r
+ / B9(S3),B10(S2),B11(S1)\r
+ /FOR KW ITS EVERY OTHER,\r
+ /B6(S1),B8(S2),B10(S3).\r
+ DCA ISVBIT /SAVE WHATS LEFT.\r
+ RAL /COPY LNK INTO FLAG IF=1\r
+ SZA /IE DONT CLR FLAG WHEN\r
+ DCA% ITMP0 /ITS SET.\r
+ TAD ISVBIT\r
+DOTRIG, AND P377 /THE "AND" INSURES THAT\r
+ /THE HI ORD BITS ARE\r
+ /CLRED SO THAT ISVBIT\r
+ /GOES TO 0 WHEN ALL\r
+ /STRIGS HAVE BEEN\r
+ /DISPOSITIONED. IE\r
+ /CLR OVRFLO BIT FOR DK,KW\r
+ /AND CLR PRE-EVENT BIT\r
+ /ON KW IF IT IS SET\r
+ SZA /DONE ?\r
+ JMP LOP2 /NO\r
+ TAD #CLINT /CALL USER EXTENDED\r
+ SZA CLA /CLOCK ROUT ?\r
+ JMS% #CLINT+1 /YES\r
+ JMP% IDOCLK /RTN TO IHANDL\r
+\fFCNPTR,\r
+OVRCNT,\r
+KONQI, ADDR ONQI\r
+P17, 17\r
+P377, 377\r
+FCNWD, 0 /FPP XRS\r
+CPTYP, 0\r
+RATE, 0\r
+P1, 1\r
+P2, 2\r
+OVRFLO,\r
+FCNTBL, ADDR CLKTBL\r
+KSTFLG, ADDR STFLG-1\r
+ ENTRY #CLINT\r
+#CLINT, 0;0\r
+ ENTRY TIME /FIGURE WHAT TIME IT IS\r
+TIME, JSA SETUP\r
+ FLDA RPTR /=27;X;X IS USED TO FLOAT\r
+ STARTD\r
+ FLDA# OVRCNT /NUM OF CLK OVRFLOS SINCE\r
+ STARTF /TIME 0\r
+ FNORM\r
+ FMUL TOVR /=NUM OF BASIC TICKS PER\r
+ /CLOCK OVER FLOW.\r
+ /FAC=NUM OF TICKS SINCE\r
+ /TIME 0.\r
+ FDIV% RPTR,RATE /DIV BY BASIC RATE IN HZ\r
+ /OR 1 IF EXTERNAL CLK.\r
+ FSTA% FTMP0 /GIVE ANS TO CALLER, ALSO\r
+ /LEAVE ANS IN FAC IN\r
+ /CASE TIME WAS A FCN\r
+ /CALL. ANS=ELAPSED TIME IN\r
+ /SECONDS SINCE TIME 0 OR\r
+ /NUM OF EXTERNAL UNIT\r
+ JA GOBAK /TICKS\r
+\f\1a\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0
\ No newline at end of file
projects / pdp8.git / blobdiff