--- /dev/null
+/ OS/8 TSAR/TSARINA\r
+/\r
+/ ADBUFF.RA\r
+/\r
+/ DEC-S8-STSAA-A-LA25\r
+/\r
+/ K. ELLSON AND L. PEARSON\r
+/\r
+/ /8 AD CONVERSION CLOCKED WITH CLOCK ROUTINE\r
+/ /8 /1 AD CONVERSION CLOCKED WITH CLOCK1 ROUTINE\r
+/ /8/4/1 AD CONVERSION CLOCKED WITH CLOCK1 AND SCHMITT TRIGGER INPUT TIMED WITH CLOCK ROUTINE\r
+/\r
+/\r
+/ TSAR SUBROUTINE - BUFFERED A/D\r
+/ COPYRIGHT 1973\r
+/ DIGITAL EQUIPMENT CORPORATION\r
+/ MAYNARD, MASSACHUSETTS 01754\r
+/\r
+/ THIS PACKAGE PROVIDES A FUNCTIONAL REPLACEMENT FOR\r
+/ THE FOLLOWING FORTRAN IV LIBRARY SUBROUTINES: REALTM\r
+/ AND ADB. REALTM AND ADB ARE REPLACED BY THE SUBROUTINE\r
+/ THRUPT. A THRUPT CALL IS ILLUSTRATED BY THE FOLLOWING\r
+/ FORTRAN PROGRAM.\r
+/\r
+/*************************************************************\r
+/\r
+/ EXTERNAL STAT1,STAT2\r
+/ INTEGER BUFF1(85),BUFF2(85),IPARMS(3),HASH(# OF CHANNELS)\r
+/ CALL THRUPT(BUFF1,BUFF2,IPARMS,HASH,NTRIG)\r
+/ CALL CLOCK(8,IRATE) @ IF NO /1 SWITCH AT ASSEMBLY TIME \r
+/ @ FOR A/D CONVERSION TIMED WITH FIRST DK8-EP\r
+/ CALL CLOCK1(8,IRATE) @ IF /1 SWITCH SET AT ASSEMBLY TIME\r
+/ @ THIS IS FOR A/D CONVERSION TIMED WITH 2ND DK8-EP\r
+/ IF YOU USE BOTH CLOCKS ON ONE SYSTEM, THEN YOU\r
+/ MAY SWITCH ON ONLY ONE CLOCK-TIMED A/D CONVERSION.\r
+/ THIS MEANS: ONLY ONE CLOCK MAY BE STARTED WITH FUNCTION=8 (BIT 9 SET)\r
+/ ...\r
+/ 100 IF (STAT1-0.5) 100, 110, 999\r
+/ 110 WRITE (5) BUFF1\r
+/ CALL RELEAS (1)\r
+/ ...\r
+/ 999 WRITE (4,1000)\r
+/ 1000 FORMAT (' SAMPLING TOO FAST')\r
+/ CALL CLOCK (0,0)\r
+/ ...\r
+/\r
+/************************************************************\r
+/\r
+/ BUFF1 - ONE OF 2 BUFFERS FOR THE ANALOG DATA, 255 12 BIT\r
+/ WORDS ARE STORED IN EACH BUFFER\r
+/\r
+/ STAT1 - DYNAMIC STATUS WORD OF BUFF1. THE VALUES 0.25,\r
+/ 0.5, AND +1. INDICATE THAT THE BUFFER IS NOT FILLED,\r
+/ BUFFER IS FILLED, AND BUFFER OVERFLOW.\r
+/\r
+/ BUFF2 - THE SECOND BUFFER.\r
+/\r
+/ STAT2 - THE DYNAMIC STATUS WORD OF BUFF2, VALUES ARE THE\r
+/ SAME AS FOR STAT1.\r
+\f/\r
+/ IPARMS - THE PARAMETER VECTOR WHICH CONTAINS IN ORDER THE\r
+/ STARTING CHANNEL, THE NUMBER OF CHANNELS, AND THE NUMBER\r
+/ OF SAMPLES. \r
+/ HASH - OPTIONAL: A TABLE CONTAINING THE READ VALID INFORMATION FOR A/D CHANNELS AND STRIGG INPUTS\r
+/ NTRIG - OPTIONAL BUT HASH MUST BE SPECIFIED:\r
+/ THE NUMBER OF SCHMITT TRIGGER CHANNELS TO SAMPLE\r
+/ CONFIGURATION REQUIRED FOR A/D AND STRIGG SAMPLING:\r
+/ FIRST DK8-EP: FREE RUNNING TIMER (10 KHZ OR 100 KHZ) FOR TRIGGER INPUT.\r
+/ CALL CLOCK4 (1 TO 7,3) FOR 10 KHZ\r
+/ CALL CLOCK4 (1 TO 7,30) FOR 100 KHZ \r
+/ SECOND DK8-EP STARTS THE A/D VIA EXTERNAL EVENT: CALL CLOCK1(8,RATE)\r
+/ TIME WORD: THE INTERVALL BETWEEN TWO A/D CYCLES IS DIVIDED INTO\r
+/ 12 SLICES CALLED S0 TO S11.\r
+/ AN EXTERNAL EVENT BETWEEN 0 AND S0 (SAMRAT/12) SETS THE LEFTMOST BIT 0.\r
+/ ' '' '' '' S11 AND SAMRAT SETS THE RIGHTMOST BIT 11.\r
+/\r
+/ UPDATES:\r
+/\r
+/ WGET: THE THIRD PARAMETER (RESULT) IS OPTIONAL\r
+/ VALID CALLS:\r
+/ I=WGET(BUFF,PNTR,RESULT)\r
+/ I=WGET(BUFF,PNTR)\r
+/ CALL WGET (BUFF,PNTR,RESULT)\r
+/\r
+/ 11-SEP-80 HA\r
+/\r
+/ INTERRUPT SERVICE ROUTINE FSMPLE:\r
+/ BEFORE THE READ ADRB WAIT FOR ADSE TO AVOID A NON VALID READ\r
+/ IF CLOCK DID'NT START THE AD CONVERTER.\r
+/ THEREFORE IN ANY CASE (ONE OR MORE CHANNELS) THE \r
+/ CLOCK MUST BE STARTED WITH CALL CLOCK(8,FREQU).\r
+/ FIRST PARAMETER OF CLOCK MUST BE 8 !\r
+/ 29-SEP-80 HA\r
+/ 1-OCT-82 HA REV 2.0 PACKS THE SAMPLE\r
+/ 15-JUL-83 HA REV 2.1 REARANGES CODE FOR PDP12 LINC OPTION\r
+/ 18-MAR-85 HA REV 3.0 ALLOWS TWO DK8-EP MODULES\r
+/ FOR A/D TRIGGED WITH DEV. CODE 13 CLOCK: /8 SWITCH\r
+/ FOR A/D TRIGG'D WITH DEV. CODE 17 CLOCK: /1 /8 SWITCH\r
+/ FOR A/D ON PDP-12 : NO SWITCH\r
+/\r
+/ 26-JUN-85 HA REV 3.1 ALLOWS SCMITT TRIGGER INPUT WITH DK8-EP DEV 13 AND CLOCKED A/D WITH DK8-EP DEV 17\r
+/ 12-JUL-85 HA REV 4.0 EVERYTHING CONFUSED\r
+/ 20-AUG-85 HA REV 4.1 REMOVES BUG IN TRIGG. TIME PICKUP ROUTINE\r
+/\r
+\f/\r
+ CL1DEV=13*10 / FIRST DK8-EP\r
+ CL2DEV=17*10 / SECOND DK8-EP\r
+/\r
+ MQL=7421\r
+ MQA=7501 / WE USE EAE MODE B\r
+ ACL=7701\r
+ SWP=7521\r
+ CAM=7621\r
+ SWAB=7431\r
+ DAD=7443\r
+ DST=7445\r
+ DLD=DAD!CAM\r
+ DDZ=DST!CAM\r
+ DVI=7407\r
+ DPIC=7573\r
+ DPSZ=7451\r
+ IFNSW 1 <\r
+ EXTERN #CLINT\r
+CLINT= #CLINT\r
+ IFSW 4 < BAD SWITCH /1/4 >\r
+ >\r
+ IFSW 1 <\r
+ EXTERN #CLIN1\r
+CLINT= #CLIN1\r
+ EXTERN #CLINT\r
+ >\r
+ CSTAT=157 /CLOCK ROUTINE PUTS CLSA BITS IN HERE\r
+ ENTRY STAT1 /ALLOW FORTRAN ACCESS TO THES\r
+ ENTRY STAT2 /LOCATIONS\r
+ COMMZ #PAGE0\r
+ ORG 2\r
+PBUFF, 0 /PNTR TO CURRENT BUFFER\r
+CURSTT, 0 /PNTR TO CURRENT STATUS WORD\r
+NXTSTT, 0 /PNTR TO NEXT STATUS WORD\r
+CURBUF, 0;0 /START OF CURRENT BUFFER PNTR\r
+NXTBUF, 0;0 /START OF NEXT BUFFER PNTR\r
+ /STATUS WORDS, VALUES\r
+STAT1, F 0.25 /0.25, 0.5, & 1.0 INDICATE\r
+STAT2, F 0.25 /STATUS WORD IS NOT FILLED,\r
+ /FILLED, AND OVERFLOWED\r
+/STATUS WORD: F 0.25 = 7777;2000;0000 NOT FILLED\r
+/ F 0.5 = 0000;2000;0000 FILLED\r
+/ F 1.0 = 0001;2000;0000 OVERFLOWED\r
+/\r
+ IFSW 8 <\r
+ ADSK=6534\r
+ ADRB=6533\r
+ ADST=6532\r
+ ADLM=6531\r
+ ADLE=6536\r
+ ADCL=6530\r
+ ADRS=6537\r
+ ADSE=6535\r
+ CLED=6134\r
+ CLAB=6003\r
+ CLBA=6006 / DO NOT FORGET TO INSERT THE DEVICE CODE\r
+ CLZE=6000\r
+ >\r
+ IFNSW 8 <\r
+ ESF=4\r
+ LINC=6141\r
+ PDP=2\r
+ SAM=100\r
+ CLEN=6134\r
+ >\r
+\r
+\r
+\f FIELD1 FSMPLE\r
+ 0 /INTERRUPT TIME A/D SAMPLER\r
+ ADDR MQAC /SAVE AC AND MQ --> MQAC\r
+ ORG .-2; DST; ORG .+1\r
+ ADDR CLKOVR / CLEAR OVERFLOW COUNTER FOR THE SCHMITT TRIGGER SERVICE ROUTINE\r
+ ORG .-2; DDZ; ORG .+1\r
+ IFSW 4 < / IF TRIGGER INPUT THEN WE CLEAR THE CLOCK COUNTER\r
+ CLAB CL1DEV\r
+ >\r
+ IFNSW 4 < NOP > / HERE TO INSERT A WORD TO GET THE SAME WORD COUNT FOR BOTH PROGRAM VERSIONS\r
+ TAD NCHANL+2 /NUMBER OF CHANNELS\r
+ DCA NCHANL+1 /INTO COUNTER\r
+ JMS% ITSTVL+1 /TEST VALID FOR THE FIRST SAMPLE\r
+ JMS INVALID /AND DECLARE NOT VALID\r
+WAITSP,\r
+ IFNSW 8<\r
+ JMS LNCSAM /INITIATE SAMPLE\r
+NEXTCH, ISZ SAMINS /UPDATE SAM INST FOR NXT CHAN\r
+ JMS LNCSAM\r
+ TAD SAMTMP\r
+ >\r
+ IFSW 8 <\r
+ ADSK / WAIT FOR COMPLETION OF CONVERSION\r
+ JMP .-1\r
+ ADRB /READ SAMPLE\r
+ JMS PUTSAM / INSERT INTO THE OUTPUT BUFFER AND TEST IF WORK DONE\r
+ JMP MORESM / SKIP TO MORESM\r
+/\r
+/\r
+SKIPSM,/ SKIP ONE A/D SAMPLE\r
+ JMS UPDCNT / INCREMENT THE TOTAL SAMPLE COUNTER (ALL CHNLS+STRIGS)*SAMRAT\r
+ ADRS / LOAD MUX REGISTER --> AC\r
+ IAC / AND INCREMENT- WE SKIPP THIS CHANNELS\r
+ ADLM / BUMP BACK INTO THE A/D MUX REGISTER\r
+/\r
+MORESM,/\r
+ ISZ NCHANL+1 / ANY MORE CHANNELS TO SAMPLE?\r
+ SKP / START THE NEXT CONVERSION IF THERE IS ANY REMAINING\r
+ JMP NOTMOR / NOTHING MORE TO A/D SAMPLE\r
+ JMS% ITSTVL+1 /HERE ONLY IF SOME MORE A/D TO SAMPLE!\r
+ JMP SKIPSM / SKIP THE NEXT SAMPLE, RETURNS TO MORESM !!\r
+ ADST / AND START THE NEXT CONVERSION - AUTO INCREMENT MODE!\r
+ >\r
+ JMS INCPTR / INCREMENT BUFFER POINTER\r
+ JMP WAITSP / AND TAKE THE NEXT SAMPLE\r
+NOTMOR,/\r
+ TAD CSTART+2 /STARTING CHANNEL\r
+ IFSW 8 <\r
+ ADLM / ELSE RESET MUX REGISTER\r
+ >\r
+ IFNSW 8 <\r
+ DCA SAMINS\r
+ JMS LNCSAM /SET CHANNEL TO START IN CASE\r
+ /CLOCK INITIATED\r
+ >\r
+/\r
+/ HERE WE INSERT THE STRIGG TIME WORDS\r
+/\r
+ CLA\r
+ TAD IWSTRI+1 /HOLDS ADDR \r
+ DCA IWSTRI / HOLDS POINTER TO THE TIME WORD\r
+ TAD WSTRC / -(NUMBER OF TRIGG INPUTS+1) --> AC\r
+ DCA IWSTRC / HOLDS THE COUNTER\r
+IWLOP1,\r
+ JMS INCPTR / INCREMENT BUFFER POINTER\r
+ ISZ IWSTRC / IF ANY MORE TRIGG INPUTS\r
+ SKP / THEN SKIP\r
+ JMP IWLOP2 / ELSE RESET AC AND MQ AT IWLOP2\r
+ JMS% ITSTVL+1 /TEST FOR VALID SAMPLE (INVALID MEANS CRAZY PROGRAMMER!)\r
+ JMS INVALID / SET THE INVALID FLAG\r
+ TAD% IWSTRI / TRIGG TIME WORD --> AC\r
+ JMS PUTSAM /INSERT TIME WORD INTO THE OUTPUT BUFFER, CLEARS AC\r
+ DCA% IWSTRI / CLEAR THE TIME WORDS\r
+ ISZ IWSTRI / INCREMENT POINTER TO THE TIME WORDS\r
+ JMP IWLOP1 / AND LOOK FOR THE NEXT TRIGG WORDS TO PROCESS\r
+IWLOP2,\r
+ ADDR MQAC /RESTORE AC AND MQ\r
+ ORG .-2; DLD; ORG .+1\r
+ JMP% FSMPLE /DONE FOR THIS TIC\r
+\f/\r
+/ SAMPLING FINISHED\r
+/\r
+SAMDON,/\r
+ JMS INCPTR / INCREMENT BUFFER POINTER\r
+ CLA / CLEAR THE STATUS WORD\r
+ DCAZ% CURSTT /SET STATUS OF CURRENT FULL\r
+SAMXIT,/ STOP THE SAMPLING, DISABLE CLOCK INTERRUPT\r
+ ADDR CLINT\r
+ ORG .-2; DDZ; ORG .+1\r
+ IFSW 4 <\r
+ ADDR #CLINT\r
+ ORG .-2; DDZ; ORG .+1 > / DISABLE CLOCK EXTENSION ROUTINE\r
+ ADDR MQAC /RESTORE AC AND MQ\r
+ ORG .-2; DLD; ORG .+1\r
+ JMP% FSMPLE\r
+/\r
+/\r
+/ HERE WE COUNT THE WHOLE NUMBER OF SAMPLES TOKEN\r
+/\r
+UPDCNT, 0\r
+ ADDR NPOINT+1 / NPOINT IS A 3 WORD FPP BASE PAGE VARIABLE, TAKE CARE\r
+ ORG .-2; DLD; ORG .+1\r
+ DPIC / INCREMENT DOUBLE PREC. COUNTER TO TEST FOR MORE SAMPLES\r
+ ADDR NPOINT+1 / BUMP INTO COUNTER\r
+ ORG .-2; DST; ORG .+1\r
+ DPSZ / SKIP IF WORK DONE\r
+ JMP% UPDCNT\r
+ JMP SAMDON / SET STATUS OF CURRENT BUFFER FULL: SAMPLE DONE\r
+/\r
+/\r
+PUTSAM, 0 / INSERTS AC INTO OUTPUT BUFFER, ON RETURNS CLEARS AC!\r
+ ISZ AVALID / VALID INPUT?\r
+ SKP / AVALID IS SET TO -1 FOR INVALID SAMPLE, SO SKIP\r
+ JMP PUTSA1 / NON VALID, RETURN WITHOUT ACTION\r
+BUFCDF, HLT /REPLACED BY CDF TO BUFFER\r
+ DCAZ% PBUFF\r
+ CDF 10 / USED FOR POINTER PVALID!\r
+ CLA CMA / -1 --> AC\r
+ DCA PUTFLG / DON'T FORGET TO INCREMENT THE BUFFER POINTER -1 --> PUTFLG\r
+ DCA AVALID / CLEAR VALID FLAG FOR NEXT CALL\r
+PUTSA1,/\r
+ JMS UPDCNT / UPDATE THE TOTAL SAMPLE COUNT\r
+ CLA / CLEAR AC FOR RETURN\r
+ JMP% PUTSAM\r
+/\r
+/\r
+INVALID,0 / SET THE ACTUAL SAMPLE INVALID\r
+ CLA CMA / -1 --> AC\r
+ DCA AVALID\r
+ JMP% INVALID / ON RETURN AC=0\r
+PUTFLG, 0 / SET TO -1 IF WE HAVE TO INCREMENT THE BUFFER POINTER\r
+\r
+AVALID, / / ACTUAL VALID FLAG\r
+ITSTVL, ADDR TSTVLD / TEST FOR VALID READ \r
+IWSTRC, 0 / NEGATIVE NUMBER OF STRIGS EVENT CHANNELS -1 (FOR COUNTER)\r
+WSTRC, 0 / -(NUMBER OF STRIG INPUTS+1) PLACED HERE BY THRUPT\r
+IWSTRI, ADDR TIMWRD / POINTER TO THESE TIME WORDS\r
+NCHANL, 0;0;0\r
+SAMCNT,\r
+CSTART, 0;0;0\r
+\f/\r
+L10, 10\r
+/\r
+INCPTR, 0\r
+ CLA / CLEAR AC\r
+ ISZ PUTFLG / IF WE HAVE TO INCREMENT THE BUFFER POINTER,\r
+ JMP% INCPTR / THEN SKIP ELSE RETURN\r
+ ISZZ PBUFF /ELSE INCR PNTR & SKIP IF WE\r
+ JMP FLDOK /CROSSED A FIELD BOUNDARY\r
+ TAD BUFCDF /UPDATE FIELD\r
+ TAD L10\r
+ DCA BUFCDF\r
+FLDOK,\r
+ ISZ SAMCNT /INCR BUFFER CNTR & SKIP IF\r
+ JMP% INCPTR /FILLED. BUFFER OK\r
+ DCAZ% CURSTT /SET STATUS WORD TO 0.5\r
+ /FOR BUFFER FILLED\r
+ TADZ NXTSTT /SWAP STATUS WORD PNTRS\r
+ DCA TMP / NXTSTT<=> CURSTT\r
+ TADZ CURSTT\r
+ DCAZ NXTSTT\r
+ TAD TMP\r
+ DCAZ CURSTT\r
+ TADZ% CURSTT /HAS USER RELEASED THIS BUFFER\r
+ SMA CLA\r
+ JMP% ITOOFST+1 /NO, SAMPLING TOO FAST!\r
+ JMS% ISWPBFR+1 / SWAP BUFFER\r
+ JMP% INCPTR / BUFFER POINTER UPDATED\r
+ISWPBF, ADDR SWPBFR\r
+/\r
+/\r
+TMP,\r
+ITOOFS, ADDR TOOFST\r
+/\r
+\f ORG FSMPLE+200\r
+/\r
+/ HERE WE SWAP THE INPUT BUFFERS POINTERS\r
+/\r
+SWPBFR, 0\r
+/\r
+/ SWAP BUFFER POINTERS\r
+/\r
+ TADZ NXTBUF / NXTBUF <=> CURBUF\r
+ DCA% IBUFCDF / BUFCDF, PBUFF = NXTBUF\r
+ TADZ NXTBUF+1\r
+ DCAZ PBUFF\r
+ TADZ CURBUF\r
+ DCAZ NXTBUF\r
+ TADZ CURBUF+1\r
+ DCAZ NXTBUF+1\r
+ TAD% IBUFCDF\r
+ DCAZ CURBUF\r
+ TADZ PBUFF\r
+ DCAZ CURBUF+1\r
+ TAD% IBUFSIZ /RESET BUFFER COUNTER\r
+ DCA% ISAMCNT\r
+ JMP% SWPBFR\r
+IBUFCDF=.+1\r
+ ADDR BUFCDF\r
+IBUFSIZ=.+1\r
+ ADDR BUFSIZ\r
+ISAMCNT=.+1\r
+ ADDR SAMCNT\r
+/\r
+/ SAMPLING RATE TOO FAST\r
+/\r
+TOOFST,/\r
+ CLA IAC /SET STATUS WORD TO 1.0\r
+ DCAZ% CURSTT\r
+ IAC\r
+ DCAZ% NXTSTT\r
+ JMP% ISAMXIT+1 / DISABLES CLOCK INTERRUPTS\r
+ISAMXIT,/\r
+ ADDR SAMXIT\r
+ IFNSW 8 <\r
+LNCSAM, 0 /LINC SAM SUBROUTINE\r
+ LINC\r
+SAMINS, SAM 0 /SAMPLE AND SELECT NEXT CHANNEL\r
+ PDP\r
+ DCA SAMTMP /SAVE IT\r
+ JMP% LNCSAM\r
+ >\r
+\f/\r
+/ INTERRUPT TIME SCHMITT TRIGGER INPUT HANDLER\r
+/\r
+FIREED, 0 / ON ENTRY AC IS CLEARED BY CLOCK RTN\r
+ CLA CLL CMA RTL / -3 --> AC\r
+ ADDR MQSAVE / SECOND: STRIG COUNTER, FIRST: SAVES MQ\r
+ ORG .-2; DST; ORG .+1\r
+ CLA\r
+ TADZ CSTAT / LOOK AHEAD FOR CLOCK OVERFLOW\r
+ RAL CLL / LINKS GOES ON HERE IF CLOCK OVERFLOWED\r
+ SNA CLA / AND IF THERE IS NO STRIGG THEN JUMP TO CLOCK OVERFLOW HANDLING\r
+ JMP CLKINT\r
+/\r
+ CAM / MQ HOLDS # OF STRIGG FIRED, FIRST IS #0\r
+ TADZ CSTAT / CLSA BITS OF FIRST CLOCK --> AC\r
+TRILOP, RAR / STRIG BITS --> LINK\r
+ SWP / NOW AC HOLDS # OF STRIGG \r
+ SZL / SKIP IF STRIGG DID NOT FIRE\r
+ JMS TRIGGD / ELSE SET THE TRIGGER TIME WORD\r
+ IAC / INCREMENT FOR NEXT STRIGG\r
+ SWP / # OF STRIGG --> MQ, CLSA BIT MASK --> AC\r
+ ISZ MQSAVE+1 / SOME MORE STRIGS?\r
+ JMP TRILOP / YES, FETCH THE NEXT EVENT\r
+ CAM / STRIGS DONE, TEST FOR CLOCK OVERFLOW\r
+ TADZ CSTAT / CLSA BITS --> AC\r
+ RAL / LINK GOES ON IF CLOCK OVERFLOWED\r
+ SZL / IF NO CLOCK OVERFLOW THEN RETURN\r
+CLKINT, ISZ CLKOVR+1 / ELSE INCREMENT THE CLOCK OVERFLOW COUNTER (EAE HIGH ORDER WORD)\r
+ NOP / PROTECT ISZ\r
+ ADDR MQSAVE / RESTORE MQ, CLEAR AC! TRICKSY!\r
+ ORG .-2; DLD; ORG .+1\r
+ CLA\r
+ JMP% FIREED / RETURN TO CLOCK ROUTINE\r
+/\r
+MQSAVE, 0;0 / SECOND WORD IS USED FOR STRIGG COUNTER, FIRST SAVES MQ ON ENTRY\r
+CLKOVR, 0;0 / HERE IS THE CLOCK OVERFLOW COUNTER, (SINGLE PRECISION, SECOND WORD HOLDS CLOCK COUNTER)\r
+/ CLKOVR IS CLEARED AT EACH A/D INTERRUPT. WE ALSO CLEAR THE CLOCK COUNT REGISTER.\r
+/ SINCE A/D CLOCK AS HIGHER INTERRUPT FREQUENCY THAN TRIGG CLOCK\r
+/ THE TRIGGER CLOCK OVERFLOW SHOULD BE ZERO ALL THE TIME!\r
+/ BUT WHAT'S SHURE IN A COMPUTER'S WORLD NOWADAYS????\r
+/\r
+MQAC, 0;0 / HERE FSMPLE AND TRIGGED ROUTINE SAVE MQ&AC ON ENTRY\r
+ITIMWR, ADDR TIMWRD / POINTER TO STRIGG TIME WORDS\r
+TIMWRD, 0;0;0 / TIME WORDS FOR 3 SCHMITT TRIGGER CHANNELS\r
+TIMBIT, 0;0 / THRUPT INSERTS CLOCKRATE/SAMRAT/12\r
+M15, -15 / DEC 13: USED TO TEST TIME SLICE OVERFLOW\r
+IBITWR, TAD BITWRD / POINTER TO LOAD THE CORRECT BIT MASK FOR EACH TIME SLICE\r
+ 7777 / TOO MUCH EVENTS\r
+BITWRD, 4000\r
+ 2000\r
+ 1000\r
+ 0400\r
+ 0200\r
+ 0100\r
+ 0040\r
+ 0020\r
+ 0010\r
+ 0004\r
+ 0002\r
+ 0001\r
+ 0001 / HERE FOR SOME VERY LATE EVENTS\r
+/\r
+/ HERE WE COMPUTE THE STRIGG TIME WORD\r
+/\r
+TRIGGD, 0 / ON ENTRY AC HOLDS NUMBER OF SCHMITT TRIGGER FIRED\r
+ ADDR MQAC / SAVE AC AND MQ\r
+ ORG .-2; DST; ORG .+1\r
+ TAD ITIMWR+1 / COMPUTE CORRECT ADDRESS OF TIME WORD\r
+ DCA ITIMWR\r
+ CLBA!CL1DEV / LOAD CLOCK BUFFER --> AC\r
+ MQL / AND INTO MQ, CLEAR AC\r
+ ADDR CLKOVR /AND ADD THE CLOCK OVERFLOW COUNTER REQUIRES MODE BITS OF CLOCK SET TO 10\r
+ ORG .-2; DAD; ORG .+1\r
+ ADDR TIMBIT / TIMBIT= RATE*12/SAMRAT HERE WE COMPUTE THE TIME SLICES\r
+ ORG .-2 ; DVI ; ORG .+1\r
+ ACL / MQ HOLDS QUOTIENT SO: TIME SLICE -> MQ -> AC\r
+ TAD M15 / IF THERE ARE ALLREADY 13 SLICES PASSED \r
+ SMA SZA CLA / THEN STOP, ELSE GOON\r
+ JMS OVRTRI / STRIGG INPUT OVERFLOWED\r
+ ACL / TIME SLICE --> AC\r
+ TAD IBITWR / HERE WE DO SOME COMPUTATIONS \r
+ DCA .+3 / IN ORDER TO FETCH THE \r
+ TAD% ITIMWR / CORRECT BIT AND TIMEWORD.\r
+ MQL / PREP FOR .OR. TIMEWORD AND SLICE BIT\r
+ TAD BITWRD / IS REPLACED BY CORRECT TAD BITWRD+SLICE\r
+ MQA / OR THE TIMEWORD AND THE BIT\r
+ DCA% ITIMWR / AND PUSH BACK\r
+ ADDR MQAC / RESET AC AND MQ\r
+ ORG .-2; DLD; ORG .+1\r
+ JMP% TRIGGD / AND RETURN!\r
+/\r
+OVRTRI, 0 / HANDLES STRIGG OVERFLOWES\r
+/ HLT / EITHER HALT OR -1 IS INDEX INTO BITWRD TABLE\r
+ CLA CMA / -1 --> AC\r
+ MQL / -1 --> MQ\r
+ JMP% OVRTRI /\r
+\f ORG FSMPLE+400\r
+ADSETU, 0 /SET UP ROUTINE\r
+ SWAB / SWITCH EAE TO MODE B (USED FOR HARD FPP12)\r
+ TADZ CURBUF /GET FIELD OF BUFFER\r
+ JMS MAKCDF /MAKE 3 BITS FLD INTO CDF\r
+ DCAZ CURBUF\r
+ TADZ CURBUF\r
+ DCA% ABUFCDF+1 /SAVE IN SAMPLER CODE\r
+ TADZ CURBUF+1 /SET SAMPLER BUFFER POINTER\r
+ DCAZ PBUFF\r
+ TADZ NXTBUF /GET FIELD OF ALTERNATE BUFFER\r
+ JMS MAKCDF\r
+ DCAZ NXTBUF\r
+ TAD BUFSIZ /SET INITIAL COUNT\r
+ DCA% ASAMCNT+1\r
+ TAD ISTAT1+1\r
+ DCAZ CURSTT / INSERT ADR. OF ACTUAL STATUS WORD\r
+ TAD ISTAT2+1\r
+ DCAZ NXTSTT / AND THE ADR. OF NEXT STATUS WORD\r
+ ADDR NPOINT+1 / SINCE FPP AND EAE HAVE DIFFERENT HIGH ORDER AND LOW ORDER\r
+ ORG .-2; DLD; ORG .+1 / WORD ORDER IN MEMORY\r
+ SWP\r
+ ADDR NPOINT+1 / WE HAVE TO CHANGE IT\r
+ ORG .-2; DST; ORG .+1\r
+ ADDR TIMWRD\r
+ ORG .-2; DDZ; ORG .+1 / CLEAR THE STRIGG TIME WORDS\r
+ ADDR TIMWRD+1\r
+ ORG .-2; DDZ; ORG .+1\r
+ ADDR CLKOVR / CLEAR CLOCK OVERFLOW COUNTER\r
+ ORG .-2; DDZ; ORG .+1\r
+ IFSW 8 <\r
+ CLA CMA /STOP THE CLOCK\r
+ IFSW 1 <\r
+ CLZE CL2DEV\r
+ IFSW 4 <\r
+ CLZE CL1DEV > >\r
+ IFNSW 1 <\r
+ CLZE!CL1DEV >\r
+ CLA\r
+ ADCL /CLEAR AD LOGIC JUST IN CASE\r
+ TAD L300 /SET AD ENABLE BITS, EXT START, AUTO INCREMENT\r
+ ADLE\r
+ TAD% JCSTART+1 /STARTING CHANNEL NUMBER\r
+ ADLM\r
+ >\r
+ IFNSW 8 <\r
+ CLEN /STOP THE CLOCK\r
+ TAD% JCSTART+1 /SET UP INITIAL SAM INSTRUCTION\r
+ TAD L100\r
+ DCA% JCSTART+1\r
+ TAD% JCSTART+1\r
+ DCA SAMINS\r
+ TAD L100 /SET FAST SAM BIT\r
+ IOF /TURN OFF INTERRUPTS IN LINC MODE\r
+ LINC /ENTER LINC MODE\r
+ ESF\r
+ PDP\r
+ JMS LNCSAM\r
+ ION\r
+ ADDR MQAC / SAVE MQ\r
+ ORG .-2; DST; ORG .+1\r
+ ADDR TIMWRD\r
+ ORG .-2; DDZ; ORG .+1\r
+ DCA TIMWRD+1 / CLEAR STRIGG TIME WORDS\r
+ ADDR CLKOVR / AND CLEAR CLOCK OVERFLOW COUNTER\r
+ ORG .-2; DDZ; ORG .+1\r
+ >\r
+ CIF CDF\r
+ JMP% ADSETU\r
+/\r
+ISTAT1, ADDR STAT1\r
+ISTAT2, ADDR STAT2\r
+JCSTAR, ADDR CSTART+2\r
+ASAMCN, ADDR SAMCNT\r
+ABUFCD, ADDR BUFCDF\r
+\f/\r
+/ MAKE THREE BITS OF AC9-11 INTO CDF\r
+/\r
+/ COMPUTE THE NUMBER OF BITS SET IN THE TRIGGER TIME WORD\r
+/\r
+CMPBIT, 0 / ON ENTRY BITSCN HOLDS THE WORD TO SCAN\r
+ CLA\r
+ TAD M14 / 12 BITS TO SCAN, PREP THE COUNTER\r
+ DCA BITLCN\r
+ DCA BITCNT / CLEAR BIT COUNTER\r
+ TAD BITSCN / TRIG TIME WORD --> AC\r
+BITLOP, RAL / SHIFT BIT INTO THE LINK\r
+ SZL\r
+ ISZ BITCNT\r
+ ISZ BITLCN\r
+ JMP BITLOP\r
+ CDF CIF 0 / HOME TO FPP \r
+ JMP% CMPBIT / FROM TRAP4\r
+/\r
+BITSCN, 0 / ON ENTRY: HOLDS THE WORD TO SCAN\r
+BITCNT, 0 / ON RETURN: HOLDS NUMBER OF BUTS SET\r
+BITLCN, 0 / LOOP COUNTER, ABOVE TWO LOCATIONS ARE ALSO USED AS INDEX REGS 0 AND 1\r
+M14, -14 / DEC -12\r
+/\r
+/\r
+MAKCDF, 0\r
+ AND L7\r
+ CLL RTL\r
+BASEX, RAL\r
+ TAD CDF0\r
+ JMP% MAKCDF\r
+/\r
+NPOINT, 0;0;0\r
+CDF0, CDF\r
+ 0;0\r
+L7, 7\r
+BUFSIZ, -377\r
+ IFSW 8 <\r
+L300, 300\r
+ >\r
+ IFNSW 8 <\r
+L100, 100\r
+ >\r
+/\r
+TEMP, 0;0;0\r
+ ORG 10*3+BASEX\r
+ 0\r
+ JA NAME+3\r
+ 0\r
+SAMRTN, JA .\r
+FP25, F 0.25\r
+XVALID, F 114. / LENGTH OF READ VALID VECTOR (MUST BE MULTIPLE OF 3)\r
+VALID, ORG .+162 / AND HERE IS THE BUFFER SPACE\r
+/\r
+/ ROUTINE TO TEST FOR VALID SAMPLE ( PACKED DATA)\r
+/\r
+PVALID, ORG .+2 /POINTER TO ACTUAL POSITION INSIDE VALID VECTOR\r
+MVALID, ORG .+2 /VALID VECTOR: LAST ADDRESS USED\r
+NVALID, ADDR VALID-1 /HOLDS ADR. OF FIRST WORD OF VALID VECTOR -1\r
+/\r
+TSTVLD, ORG .+1 / JMS TSTVLD\r
+ / SAMPLE NON VALID RETURN\r
+ / SAMPLE VALID RETURN\r
+/ ON RETURN AC=0\r
+ ISZ PVALID+1 / GET THE NEXT LOC. OF VALID VECTOR\r
+ CLA\r
+ TAD PVALID+1\r
+ TAD MVALID+1 / IF WE REACHED THE END OF THE VECTOR THEN\r
+ SPA CLA / WE RESET TO THE START ELSE\r
+ JMP L1 / CONTINUE AT L1\r
+ TAD NVALID+1\r
+ IAC\r
+ DCA PVALID+1\r
+L1, TAD% PVALID+1 / READ VALID FLAG --> AC\r
+ SNA CLA / IF THIS READ WAS VALID THEN WE INCREMENT THE BUFFER POINTER ELSE\r
+ JMP% TSTVLD / WE TAKE THE NEXT SAMPLE INTO THIS LOCATION\r
+ ISZ TSTVLD / TAKE THE NORMAL RETURN FOR VALID SAMPLE \r
+ JMP% TSTVLD\r
+\f EXTERN #ARGER\r
+ SECT THRUPT\r
+ BASE 0\r
+ STARTD\r
+ FLDA 30 /GET RETURN ADDR\r
+ FSTA SAMRTN\r
+ STARTF\r
+ FLDA 0\r
+ FSTA# TRETU\r
+ STARTD\r
+ FLDA% 0 / COMPUTE THE NUMBER OF PARAMETERS\r
+ FSUB 0\r
+ FSUB# TWO\r
+ SETX XR0\r
+ LDX 1,X1\r
+ ALN X1 / DIVIDE BY TWO\r
+ FNEG\r
+ ATX X2 / NEGATIVE NUMBER OF ARGUMENTS --> X2\r
+ FLDA 0 /GET ARG POINTER\r
+ BASE BASEX\r
+ SETB BASEX\r
+ FSTA TEMP /SAVE ARG POINTER\r
+ LDX 4700,0\r
+ FCLA\r
+ FSTA CLINT /STOP ANY SAMPLING NOW!\r
+ LDX 4701,0\r
+ IFSW 4 <\r
+ FSTA #CLINT > / DISABLE STRIGG EVENTS\r
+ LDX 4702,0\r
+ FLDA% TEMP,1 /GET BUFF1 ADDRESS\r
+ FSTA CURBUF\r
+ LDX 1,X0\r
+ JXN TH0,X2+\r
+ TRAP4 #ARGER\r
+TH0,\r
+ FLDA% TEMP,1+ /GET BUFF2 ADDR\r
+ FSTA NXTBUF\r
+ LDX 2,X0\r
+ LDX 4703,0\r
+ JXN TH1,X2+ / IF THERE ARE ONLY TWO PARAMETERS THEN\r
+ TRAP4 #ARGER / ARGUMENT ERROR # 2\r
+TH1,\r
+ FLDA% TEMP,1+ /ADDR OF PARAMETERS\r
+ FSTA PARAM / SAVE ADDR. OF PARAMETERS\r
+ STARTF\r
+ FCLA\r
+ FSTA PACK / CLEAR PACK & NTRIGG IF THERE ARE ONLY 3 PARAMS\r
+ FSTA NTRIG / DISABLE TRIGG EVENTS\r
+ FSTA TIMRAT\r
+ STARTD\r
+ JXN TH2,X2+ / IF THERE ARE 4 OR MORE PARAMETERS THEN FETCH THE LAST BUT ONE\r
+ JA TH3 / ELSE THERE ARE 3 ARGUMENTS \r
+TH2, FLDA% TEMP,X1+ / ADDR OF FOURTH ARGUMENT --> PACK\r
+ FSTA PACK\r
+ JXN TH6,X2+ / IF THERE ARE 5 PARAMETERS GOTO TH5\r
+ JA TH3 / ONLY FOUR PARAMETERS\r
+TH6, FLDA% TEMP,X1+\r
+ FSTA NTRIG / ADDR OF STRIG COUNT --> WSTRC\r
+ JXN TH10,X2+ / IF THERE ARE 5 PARAMETERS THEN THERE MUST BE A SIXTH ONE\r
+ LDX 4,X0 / FIVE PARAMETERS ARE INVALID, ARGUMENT ERR 5\r
+ TRAP4 #ARGER\r
+TH10, FLDA% TEMP,X1+\r
+ FSTA TIMRAT / INSERT RATE/SAMRAT/12 --> TIMBIT\r
+TH3,/\r
+ FLDA PARAM / RESTORE ADR. OF THIRD ARGUMENT\r
+ FSTA TEMP\r
+ STARTF\r
+ LDX 0,1\r
+ FLDA% TEMP,1 /STARTING CHANNEL\r
+ ALN 0\r
+ FSTA CSTART\r
+ FLDA% TEMP,1+ /# CHANNELS\r
+ FSTA CHNLS\r
+ FNEG\r
+ ALN 0\r
+ FSTA NCHANL\r
+ FLDA% TEMP,1+ /NUMBER OF POINTS\r
+ FNEG\r
+ ALN 0\r
+ FSTA NPOINT\r
+ FLDA PACK\r
+ JEQ TH4 / ONLY THREE PARAMETERS, CLEAR PCKSIG\r
+ FLDA% TEMP,1+\r
+ FNEG\r
+ FSUB FL1\r
+ ALN 0\r
+TH4, FSTA PCKSIG\r
+ ATX X2\r
+/\r
+TBIN0, SETX VALID / PREPARE THE VALID VECTOR\r
+ LDX 1,X0\r
+ SETX XR0\r
+ STARTD\r
+ FLDA# NVALID / TAKE CARE, THESE LOCATION ARE IN BASE PAGE!\r
+ FSTA# PVALID\r
+ FNEG\r
+ FADD PCKSIG+1\r
+ FSTA# MVALID\r
+/\r
+ FLDA PACK\r
+ JEQ TH5\r
+ FSTA TEMP\r
+ LDX -1,X1 / X2 HOLDS PCKSIG !\r
+\r
+ FLDA TBIN0\r
+ FSTA TBIN1\r
+ STARTF\r
+THL0, FLDA% TEMP,1+\r
+TBIN1, SETX VALID / XR POINTER ONTO VALID VECTOR\r
+ ATX X0 / INSERT V. VALUE INTO THE VECTOR (WORD BY WORD)\r
+ SETX TBIN1 / NOW WE INCREMENT THE POINTER ABOVE\r
+ JXN .+2,X1+ / WITH THE X INCREMENT CMD AND\r
+ SETX XR0 / RESET TO THE INDEX REGISTER SET\r
+ JXN THL0,X2+ / AND NOW WE TEST IF THE WORK IS DONE\r
+\fTH5, STARTF / CLEAR ALL 36 BITS OF FAC SINCE\r
+ FCLA / IF NTRIG.EQ.0 THEN WE DO NOT LOAD INTO THE EXPONENT\r
+ STARTD\r
+ FLDA NTRIG / PREPARE THE STRIGG EVENT INPUT \r
+ JEQ TH7 / NOTHING DESIRED, SKIP TO TH7\r
+ LDX 10,X0 / ERROR #10\r
+ IFNSW 4 < / IF THERE IS NO HANDLER THEN\r
+ JA TH9 > / WE ERROR OFF\r
+ FSTA TEMP / PUT ADDR OF TRIGG COUNT --> TEMP\r
+ STARTF\r
+ FLDA% TEMP / # OF TRIGGER INPUTS --> FAC\r
+ LDX 11,X0 / ERROR #11\r
+ JAL TH9 / IF NO FIXING POSSIBLE THE ERROR OFF!\r
+ JLT TH9 / IF TRIGGER NUMBER OUTSIDE RANGE 0 TO 3 THEN ERROR OFF\r
+ FSUB FL3 / TEST FOR UPPER LIMIT\r
+ LDX 12,X0 / ERROR #12\r
+ JGT TH9\r
+ FADD FL3\r
+TH7, STARTF / IF THERE ARE NO STRIGGS INPUT THEN WE COME HERE WITH FAC CLEARED! \r
+ FADD FL1 / ADD 1 FOR THE COUNTER OF THE IR SERVICE ROUTINE\r
+ FNEG / AND HERE WE COMPUTE THE COUNTER\r
+ SETX WSTRC / AND BUMP INTO PDP/8 CODE\r
+ ATX 0\r
+ SETX XR0 / RESET INDEX REGIS POINTER\r
+ STARTD / ADDR OF TIME RATIO --> TEMP\r
+ FLDA TIMRAT / FETCH THE TIME RATIO\r
+ JEQ TH12 / NO STRIG EVENTS DISIRED, SKIP\r
+ FSTA TEMP\r
+ STARTF\r
+ FLDA% TEMP / TIMERATIO --> FAC\r
+ FSTA TIMRAT / AND SAVE FOR SOMEBODY ELSE\r
+ LDX 13,X0 / ERROR #13\r
+ JLT TH9 / NEGATIVE PARAMETER IS NOT NICE\r
+ LDX 14,X0 / ERROR #14\r
+ JAL TH9 / WE HAVE TO FIX THE NUMBER\r
+ JA TH11\r
+TH9,/ X0 HOLDS ERROR NUMBER (10 TO 13)\r
+ TRAP4 #ARGERR / WE ERROR OFF\r
+/\r
+TH11, SETX TIMBIT / FIX THE NUMBER INTO 12 BITS\r
+ ATX 0 / FOR EAE DVI INSTRUCTION\r
+ SETX XR0\r
+/\r
+/ INDEX REGISTERS (PBUFF) 1&2 ARE STATUS WORD PNTRS!\r
+/\r
+TH12, SETX PBUFF\r
+ LDX 11,1 /INITIALIZE STATUS WORD PNTRS\r
+ LDX 14,2\r
+ FLDA FP25 /INITIALIZE STATUS WORDS\r
+ FSTA STAT1 /TO INDICATE BUFFERS\r
+ FSTA STAT2 /NOT FILLED\r
+ TRAP4 ADSETU /SET UP AD STUFF\r
+ FLDA NTRIG / HERE WE SET UP THE STRIGGE EVENT INPUT\r
+ STARTD\r
+ JEQ TH8 / IF NO TRIGG INPUTS THEN SKIP ELSE\r
+ FLDA TRGADR /\r
+ FSTA #CLINT / QUEUE THE STRIGG INTERRUPT SERVICE ROUTINE INTO THE CLOCK TERMINATION ROUTINE\r
+TH8,/\r
+ FLDA SAMADR /SET UP SAMPLER INTRPT HNDLR\r
+ FSTA CLINT\r
+ STARTF\r
+ JA SAMRTN /RETURN\r
+NAME, TEXT +THRUPT+\r
+ SETX XR0\r
+ SETB BASEX\r
+TRETU, F 0.\r
+SAMADR, ADDR FSMPLE\r
+TRGADR, ADDR FIREED / ADDR OF SCHMITT TRIGGER EVENT INTERRUPT SERVICE\r
+/\r
+XR0, 0\r
+XR1, 0 / HOLDS NUMBER OF ARGUMENTS\r
+XR2, 0\r
+XR3, 0\r
+X0= 0\r
+X1= X0+1\r
+X2= X1+1\r
+X3= X2+1\r
+ONE, 0;1;0\r
+TWO, 0;2;0\r
+FL1, F 1.\r
+FL3, F 3.\r
+PARAM,\r
+CHNLS, F 0.\r
+PCKSIG, F 0.\r
+PACK, F 0. / HOLDS ADR. OF FOURTH ARGUMENT\r
+NTRIG, F 0. / HOLDS ADDR. OF FIFTH ARGUMENT\r
+TIMRAT, F 0. /HOLDS CLOCK/SAMRAT/12, CLOCK IS RATIO OF SCHMITT TRIGGER TIMER\r
+\f/**** WORD SUBROUTINES ****\r
+/\r
+WPCNT, 0;0\r
+WC1, 0;6\r
+ BASE WDBASE\r
+WDBASE, F 0. /PNTR TO ARGS\r
+WDINDX, F 0. /INDEX TO WORD IN ARRAY\r
+WDOPER, F 0. /TARGET OR SOURCE ADDR\r
+F1, F 1.\r
+STXMJA, 0;1100-1030;0 /STX - JA\r
+WORDOP, TEXT +WORDOP+\r
+ 0\r
+WDRTN, JA .\r
+WINDEX, F 0. /INDEX REGS 0-2\r
+/\r
+ ORG 10*3+WDBASE\r
+ 0\r
+ JA WORDOP+3\r
+/\r
+/**** WGET - WORD GET ****\r
+/\r
+/ CALL WGET(BUFF1,NWORD,Y)\r
+/\r
+ ENTRY WGET\r
+WGET, JSA WDSET /INIT REGISTERS\r
+ FLDA WPCNT / LOOK IF CALLED WITH TWO PARAMETERS\r
+ JEQ W2PAR / TWO PARAMETERS ONLY, OUPUT VIA FAC\r
+ XTA 0 /GET WORD FROM BUFF1\r
+ FSTA% WDOPER /STICK IT IN X\r
+ JA WDRTN\r
+W2PAR, XTA 0\r
+ JA WDRTN\r
+/\r
+/**** WPUT - WORD PUT ****\r
+/\r
+/ CALL WPUT(BUFF1,NWORD,Y)\r
+/\r
+ ENTRY WPUT\r
+WPUT, JSA WDSET /INIT REGISTERS\r
+ FLDA% WDOPER /GET Y\r
+ ATX 0 /FIX AND STORE IN BUFF1\r
+ JA WDRTN\r
+/\r
+/ WGET & WPUT INITIALISATION\r
+/\r
+ BASE 0\r
+WDSET, 0;0\r
+ STARTD\r
+ FLDA 30 /GET RTN ADDR\r
+ FSTA WDRTN\r
+ FLDA 0 /PNTR TO ARGS\r
+ SETB WDBASE\r
+ BASE WDBASE\r
+ SETX WINDEX\r
+ FSTA WDBASE\r
+ LDX 0,1 / COMPUTE NUMBER OF PARAMETERS\r
+ FLDA% WDBASE,1 / ADR. FOLLOWING THE PARAMETER LIST --> FAC\r
+ FSUB WDBASE / SUBTRACT THE START ADR. OF PARAMETER LIST\r
+ FSUB WC1 / FAC-5 --> FAC\r
+ FSTA WPCNT / WPCNT=0 <==> TWO PARAMETERS, =2 <==> THREE PARAMETERS\r
+ FLDA% WDBASE,1+ /BUFFER ADDR\r
+ FADD STXMJA /MAKE SETX INST\r
+ FSTA WDSETX\r
+ FLDA% WDBASE,1+ /WORD INDEX ADDR\r
+ FSTA WDINDX\r
+ FLDA WPCNT / TEST IF THERE ARE MORE THAN 2 PARAMETERS\r
+ JEQ WCONT / \r
+ FLDA% WDBASE,1+ /RESULT OR VALUE ADDR\r
+ FSTA WDOPER\r
+WCONT,\r
+ STARTF\r
+ FLDA% WDINDX /WORD INDEX\r
+ FSUB F1 /COMPUT ADDR OF WORD\r
+ ALN 0\r
+ STARTD\r
+ FADDM WDSETX\r
+WDSETX, SETX 0 /MODIFIED DURING EXEC\r
+ STARTF\r
+ JA WDSET\r
+/ SUBROUTINE TO RELEASE A BUFFER BY RESETTING\r
+/ THE STATUS REGISTER\r
+/\r
+/ CALL RELEAS(N)\r
+/\r
+/ N DESIGNATES THE STATUS REGISTER, N SHOULD BE 1\r
+/ OR 2. IF N .NE. 1, 2 IS ASSUMED.\r
+/\r
+ ENTRY RELEAS\r
+ BASE 0\r
+RELEAS, STARTD\r
+ FLDA 30 /GET RTN ADDR\r
+ FSTA WDRTN\r
+ FLDA 0 /GET ARG PNTR\r
+ BASE WDBASE\r
+ SETB WDBASE\r
+ SETX WINDEX\r
+ FSTA WDBASE\r
+ LDX 1,1\r
+ FLDA% WDBASE,1 /N ADDR\r
+ FSTA WDBASE\r
+ SETX STAT1 /MODIFY STATUS VIA INDEX\r
+ STARTF\r
+ FLDA% WDBASE /N\r
+ FSUB F1 /TEST FOR NOT 1\r
+ JNE CLR2 /ASSUME STAT2\r
+ LDX -1,0 /CHANGE EXPONENT\r
+ /TO -7 TO MAKE 0.25\r
+ JA WDRTN\r
+CLR2, LDX -1,3 /STAT2 EXP TO -1\r
+ JA WDRTN\r
+\f/ COMPUTE THE NUMBER OF BITS SET IN THE TRIGGER WORD\r
+/ INTEGER FUNCTION TRGWRD\r
+/ BITCNT=TRGWRD(TIMEWORD)\r
+/\r
+ ENTRY TRGWRD\r
+ BASE 0\r
+TRGWRD, STARTD / STAY ON CALLER S BASE\r
+ FLDA 3*10\r
+ FSTA RETS / SAVE RETURN ADR.\r
+ SETX BITSCN / SET UP X REGISTER TO 8-MODE CODE\r
+ LDX 1,1 / INDEX TO FIRST ARGUMENT\r
+ FLDA% 0,1\r
+ FSTA 3\r
+ STARTF\r
+ FLDA% 3 / FIRST ARGUMENT --> FAC\r
+ ATX 0 / AND INTO 8-MODE CODE\r
+ TRAP4 CMPBIT / THE WORK IS DONE BY PDP8\r
+ XTA 1 / GET THE RESULT\r
+RETS, JA .-. / AND HOME \r
+ END\r
+\f\1a\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0
\ No newline at end of file
projects / pdp8.git / blobdiff