Commit | Line | Data |
---|---|---|
196ba1fc PH |
1 | SDS Diagnostics, using the SDS 930/940 Master Diagnostic Tape image (D930X4A.TAP)\r |
2 | \r | |
3 | Summary\r | |
4 | \r | |
5 | 930 0-16K Memory Test passed\r | |
6 | 930 16K-32K Memory Test passed\r | |
7 | 930 Instruction Test passed\r | |
8 | 930 P&S Register Test passed\r | |
9 | \r | |
10 | ---\r | |
11 | 930 0-16K Memory Test\r | |
12 | \r | |
13 | sim> att mt diag.tap\r | |
14 | sim> d a 1\r | |
15 | sim> d bpt4 1 ; stop every 1/2 cycle\r | |
16 | sim> boot mt\r | |
17 | \r | |
18 | HALT instruction, P: 00050 (STA 122,4)\r | |
19 | sim> ex a\r | |
20 | A: 00000000 ; error count\r | |
21 | sim> c\r | |
22 | \r | |
23 | HALT instruction, P: 37650 (STA 37722,4)\r | |
24 | \r | |
25 | sim> ex a\r | |
26 | A: 00000000 ; error count\r | |
27 | \r | |
28 | ---\r | |
29 | 930 16K-32K Memory Test\r | |
30 | \r | |
31 | sim> att mt diag.tap\r | |
32 | sim> d a 2\r | |
33 | sim> d bpt4 2 ; stop every 1/2 cycle\r | |
34 | sim> boot mt\r | |
35 | \r | |
36 | \r | |
37 | HALT instruction, P: 00050 (STA 6)\r | |
38 | sim> ex a\r | |
39 | A: 00000000 ; error count\r | |
40 | sim> c\r | |
41 | \r | |
42 | HALT instruction, P: 37650 (STA 37406)\r | |
43 | sim> ex a\r | |
44 | A: 00000000 ; error count\r | |
45 | sim> c\r | |
46 | \r | |
47 | ---\r | |
48 | 930 Instruction Diagnostic\r | |
49 | \r | |
50 | sim> att mt diag.tap\r | |
51 | sim> d a 3\r | |
52 | sim> br 17 ; catch start of diagnostic\r | |
53 | sim> boot mt\r | |
54 | \r | |
55 | Breakpoint, P: 00017 (BRR 12,2)\r | |
56 | sim> nobr 17\r | |
57 | sim> br 112 ; catch end of diagnostic\r | |
58 | sim> c\r | |
59 | \r | |
60 | Breakpoint, P: 00112 (BRU 3)\r | |
61 | \r | |
62 | ---\r | |
63 | 930 P&S Register Test\r | |
64 | \r | |
65 | sim> att mt diag.tap\r | |
66 | sim> d a 4\r | |
67 | sim> br 60 ; catch end of pass\r | |
68 | sim> boot mt\r | |
69 | \r | |
70 | Breakpoint, P: 00060 (BRU 22)\r | |
71 | \r | |
72 | ---\r | |
73 | Bugs\r | |
74 | \r | |
75 | 1. IO: Channel WAR not cleared after memory store\r | |
76 | 2. IO: dev_map should contain _flags, not _v_flags\r | |
77 | 3. SYS: Errors in system tables\r | |
78 | 4. SYS: Character conversion table had 0 (space) as illegal, should be -1\r | |
79 | 5. IO: Channel CPW calculation wrong for 12b mode\r | |
80 | 6. RAD, DSK, MT: Instruction masks wrong for RAD, DSK, MT\r | |
81 | 7. IO: Missing subscripts in dev_disp references\r | |
82 | 8. RAD: typos referencing DSK\r | |
83 | 9. IO: SKS 3 call incorrect\r | |
84 | 10. DRM: Drum track mask width incorrect\r | |
85 | 11. CPU: Memory management trap left reason in bogus state, stopped simulator\r | |
86 | 12. CPU: Interrupts require api_lvl as well as api_lvlhi, like PDP-10, PDP-15\r | |
87 | 13. CPU: Bug in find interrupt request\r | |
88 | 14. CPU: Interrupt priority scheme recoded for left to right priority\r | |
89 | 15. CPU: overflow test coded backwards\r | |
90 | 16. CPU: Rotates operate mod 48, not with upper limit of 48 (manual incorrect)\r | |
91 | 17. CPU: RSH not handling >= 48 correctly\r | |
92 | 18. CPU: CNA is 2's complement not 1's complement\r | |
93 | 19. CPU: MUL failed to mask cross product correctly\r | |
94 | 20. CPU: EM2, EM3 test using wrong 'channel'\r | |
95 | 21. CPU: EM3 test tested EM2 instead\r | |
96 | 22. CPU: POP must save EM2, EM3 like BRM (manual incorrect)\r | |
97 | 23. CPU: Shifts need special EA calculation, direct cycles using 9b indexing\r | |
98 | 24. CPU: Shifts ignore addr<13:14>\r | |
99 | 25. CPU: Diagnostic uses undefined shift 'normalize cyclic'\r | |
100 | 26. CPU: Divide 2'c complement of AB leaves B<23> unchanged\r | |
101 | 27. CPU: Divide overflow test requires special cases for divd.h == divr\r | |
102 | 28. CPU: Divide uses non-restoring algorithm\r | |
103 | 29. CPU: Channel terminate output must be deferred until channel buffer clears\r | |
104 | 30. CPU: Channel terminate output to magtape is convert to scan, must be\r | |
105 | handled in channel logic\r | |
106 | 31. SYS: duplicate entries for shifts\r | |
107 | 32. SYS: mask for shifts did not include indirect flag\r | |
108 | 33. MUX: Genie/SDS use inverted meanings for line enable flag\r | |
109 | 34. MT: missing fseek before write eof\r | |
110 | 35. MT: displayed characters only 7b wide instead of 8b\r | |
111 | 36. CPU: EOD 20000 used by diagnostic (EM change is NOP)\r | |
112 | 37. CPU: SKD sets all 24b of X, not just exponent\r | |
113 | 38. CPU: reset should not clear A, B, X\r |