First Commit of my working state

[simh.git] / AltairZ80 / flashwriter2.c

/*************************************************************************\r
 *                                                                       *\r
 * $Id: flashwriter2.c 1753 2008-01-02 16:36:47Z Hharte $                *\r
 *                                                                       *\r
 * Copyright (c) 2007-2008 Howard M. Harte.                              *\r
 * http:/*www.hartetec.com                                               *\r
 *                                                                       *\r
 * Permission is hereby granted, free of charge, to any person obtaining *\r
 * a copy of this software and associated documentation files (the       *\r
 * "Software"), to deal in the Software without restriction, including   *\r
 * without limitation the rights to use, copy, modify, merge, publish,   *\r
 * distribute, sublicense, and/or sell copies of the Software, and to    *\r
 * permit persons to whom the Software is furnished to do so, subject to *\r
 * the following conditions:                                             *\r
 *                                                                       *\r
 * The above copyright notice and this permission notice shall be        *\r
 * included in all copies or substantial portions of the Software.       *\r
 *                                                                       *\r
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,       *\r
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF    *\r
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND                 *\r
 * NONINFRINGEMENT. IN NO EVENT SHALL HOWARD M. HARTE BE LIABLE FOR ANY  *\r
 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,  *\r
 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE     *\r
 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.                *\r
 *                                                                       *\r
 * Except as contained in this notice, the name of Howard M. Harte shall *\r
 * not be used in advertising or otherwise to promote the sale, use or   *\r
 * other dealings in this Software without prior written authorization   *\r
 * Howard M. Harte.                                                      *\r
 *                                                                       *\r
 * SIMH Interface based on altairz80_hdsk.c, by Peter Schorn.            *\r
 *                                                                       *\r
 * Module Description:                                                   *\r
 *     Vector Graphic, Inc. FlashWriter II module for SIMH               *\r
 *                                                                       *\r
 * Environment:                                                          *\r
 *     User mode only                                                    *\r
 *                                                                       *\r
 *************************************************************************/\r
\r
/*#define DBG_MSG*/\r
\r
#include "altairz80_defs.h"\r
\r
#if defined (_WIN32)\r
#include <windows.h>\r
#else\r
#include "sim_sock.h"\r
#endif\r
\r
#include "sim_tmxr.h"\r
\r
#ifdef DBG_MSG\r
#define DBG_PRINT(args) printf args\r
#else\r
#define DBG_PRINT(args)\r
#endif\r
\r
\r
extern int32 sio0s(const int32 port, const int32 io, const int32 data);\r
extern int32 sio0d(const int32 port, const int32 io, const int32 data);\r
extern uint32 sim_map_resource(uint32 baseaddr, uint32 size, uint32 resource_type,\r
        int32 (*routine)(const int32, const int32, const int32), uint8 unmap);\r
\r
static char ansibuf[10];\r
\r
#define FW2_MAX_BOARDS          4\r
#define UNIT_V_FW2_VERBOSE      (UNIT_V_UF + 1) /* verbose mode, i.e. show error messages   */\r
#define UNIT_FW2_VERBOSE        (1 << UNIT_V_FW2_VERBOSE)\r
#define FW2_CAPACITY            (2048)          /* FlashWriter II Memory Size               */\r
\r
typedef struct {\r
    UNIT  *uptr;            /* UNIT pointer */\r
    uint8 cur_FL_Row;       /* Current Flashwriter Row */\r
    uint8 cur_FL_Col;       /* Current Flashwriter Column */\r
    uint8 FL_Row;\r
    uint8 FL_Col;\r
    uint8 reversevideo;     /* Flag set if reverse video is currently on */\r
    uint8 M[FW2_CAPACITY];  /* FlashWriter 2K Video Memory */\r
} FW2_INFO;\r
\r
static FW2_INFO *fw2_info[4];\r
static uint8 port_map[4] = { 0x11, 0x15, 0x17, 0x19 };\r
\r
static int32 fw2dev(const int32 Addr, const int32 rw, const int32 data);\r
static t_stat fw2_reset(DEVICE *dptr);\r
static t_stat fw2_attach(UNIT *uptr, char *cptr);\r
static t_stat fw2_detach(UNIT *uptr);\r
static uint8 FW2_Read(const uint32 Addr);\r
static uint8 FW2_Write(const uint32 Addr, uint8 cData);\r
static t_stat get_base_address(char *cptr, uint32 *baseaddr);\r
\r
static int32 FWIITrace = FALSE;\r
\r
static UNIT fw2_unit[] = {\r
    { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, FW2_CAPACITY) },\r
    { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, FW2_CAPACITY) },\r
    { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, FW2_CAPACITY) },\r
    { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, FW2_CAPACITY) }\r
};\r
\r
static REG fw2_reg[] = {\r
    { DRDATA (FWIITRACE,  FWIITrace, 8), },\r
    { NULL }\r
};\r
\r
static MTAB fw2_mod[] = {\r
    /* quiet, no warning messages       */\r
    { UNIT_FW2_VERBOSE, 0,                  "QUIET",    "QUIET", NULL   },\r
    /* verbose, show warning messages   */\r
    { UNIT_FW2_VERBOSE, UNIT_FW2_VERBOSE,   "VERBOSE",  "VERBOSE", NULL },\r
    { 0 }\r
};\r
\r
DEVICE fw2_dev = {\r
    "FWII", fw2_unit, fw2_reg, fw2_mod,\r
    FW2_MAX_BOARDS, 10, 31, 1, FW2_MAX_BOARDS, FW2_MAX_BOARDS,\r
    NULL, NULL, &fw2_reset,\r
    NULL, &fw2_attach, &fw2_detach,\r
    NULL, 0, 0,\r
    NULL, NULL, NULL\r
};\r
\r
/* Reset routine */\r
static t_stat fw2_reset(DEVICE *dptr)\r
{\r
    return SCPE_OK;\r
}\r
\r
/* Attach routine */\r
static t_stat fw2_attach(UNIT *uptr, char *cptr)\r
{\r
    t_stat r;\r
    unsigned int i = 0;\r
    uint32 baseaddr;\r
    char *tptr;\r
\r
    r = get_base_address(cptr, &baseaddr);\r
    if(r != SCPE_OK)    /* error?*/\r
        return r;\r
\r
    DBG_PRINT(("%s\n", __FUNCTION__));\r
\r
    for(i = 0; i < FW2_MAX_BOARDS; i++) {\r
        if(&fw2_dev.units[i] == uptr) {\r
            if(uptr->flags & UNIT_FW2_VERBOSE) {\r
                printf("Attaching unit %d\n at %04x", i, baseaddr);\r
            }\r
            break;\r
        }\r
    }\r
\r
    fw2_info[i] = calloc(1, sizeof(FW2_INFO));\r
    fw2_info[i]->uptr = uptr;\r
    fw2_info[i]->uptr->u3 = baseaddr;\r
\r
    if(sim_map_resource(baseaddr, FW2_CAPACITY, RESOURCE_TYPE_MEMORY, &fw2dev, FALSE) != 0) {\r
        printf("%s: error mapping MEM resource at 0x%04x\n", __FUNCTION__, baseaddr);\r
        return SCPE_ARG;\r
    }\r
\r
    if(sim_map_resource(0x00, 1, RESOURCE_TYPE_IO, &sio0s, FALSE) != 0) {\r
        printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, 0x00);\r
        return SCPE_ARG;\r
    }\r
\r
    if(sim_map_resource(0x01, 1, RESOURCE_TYPE_IO, &sio0d, FALSE) != 0) {\r
        printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, 0x01);\r
        return SCPE_ARG;\r
    }\r
\r
    tptr = (char *) malloc (strlen (cptr) + 3); /* get string buf */\r
    if (tptr == NULL) return SCPE_MEM;          /* no more mem? */\r
    sprintf(tptr, "0x%04x", baseaddr);          /* copy base address */\r
    uptr->filename = tptr;                      /* save */\r
    uptr->flags = uptr->flags | UNIT_ATT;\r
    return SCPE_OK;\r
}\r
\r
\r
/* Detach routine */\r
static t_stat fw2_detach(UNIT *uptr)\r
{\r
    uint8 i;\r
\r
    DBG_PRINT(("%s\n", __FUNCTION__));\r
\r
    for(i = 0; i < FW2_MAX_BOARDS; i++) {\r
        if(&fw2_dev.units[i] == uptr) {\r
            break;\r
        }\r
    }\r
\r
    if (i >= FW2_MAX_BOARDS) return SCPE_ARG;\r
\r
    /* Disconnect FlashWriter2: unmap memory and I/O resources */\r
    sim_map_resource(fw2_info[i]->uptr->u3, FW2_CAPACITY, RESOURCE_TYPE_MEMORY, &fw2dev, TRUE);\r
    sim_map_resource(0x00, 1, RESOURCE_TYPE_IO, &sio0s, TRUE);\r
    sim_map_resource(0x01, 1, RESOURCE_TYPE_IO, &sio0d, TRUE);\r
\r
    if(fw2_info[i]) {\r
        free(fw2_info[1]);\r
    }\r
\r
    free (uptr->filename);                  /* free base address string */\r
    uptr->filename = NULL;\r
    uptr->flags = uptr->flags & ~UNIT_ATT;  /* not attached */\r
    return SCPE_OK;\r
}\r
\r
static t_stat get_base_address(char *cptr, uint32 *baseaddr) {\r
    uint32 b;\r
    sscanf(cptr, "%x", &b);\r
    if(b & (FW2_CAPACITY-1)) {\r
        printf("FWII must be on a %d-byte boundary.\n", FW2_CAPACITY);\r
        return SCPE_ARG;\r
    }\r
    *baseaddr = b & ~(FW2_CAPACITY-1);\r
    return SCPE_OK;\r
}\r
\r
extern int32 getBankSelect(void);\r
\r
/* This is the main entry point into the Flashwriter2 emulation. */\r
static int32 fw2dev(const int32 Addr, const int32 rw, const int32 data)\r
{\r
    int32 bank = getBankSelect();\r
    if(bank == 0) {\r
    if(rw == 0) { /* Read */\r
        return(FW2_Read(Addr));\r
    } else {    /* Write */\r
        return(FW2_Write(Addr, data));\r
    }\r
    } else return 0xff;\r
}\r
\r
\r
static uint8 FW2_Write(const uint32 Addr, uint8 Value)\r
{\r
    FW2_INFO *fw2 = NULL;\r
    uint8 FL_Row;\r
    uint8 FL_Col;\r
    uint32 baseaddr = 0;\r
    uint8 i;\r
    uint8 outchar;\r
    uint8 port;\r
\r
    for(i = 0; i < FW2_MAX_BOARDS; i++) {\r
        if(fw2_info[i] != NULL) {\r
            baseaddr = fw2_info[i]->uptr->u3;\r
            if((Addr >= baseaddr) && (Addr < (baseaddr + FW2_CAPACITY))) {\r
                break;\r
            }\r
        }\r
    }\r
\r
    if(i == FW2_MAX_BOARDS) {\r
        return 0;\r
    }\r
\r
    fw2 = fw2_info[i];\r
    port = port_map[i];\r
\r
    fw2->M[Addr - baseaddr] = Value;\r
\r
    /* Only print if it is in the visible part of the Flashwriter memory */\r
    if((Addr >= baseaddr) && (Addr < (baseaddr + (80 * 24)))) {\r
        FL_Col = ((Addr-baseaddr) % 80) + 1;\r
        FL_Row = ((Addr-baseaddr) / 80) + 1;\r
\r
        if(Value & 0x80) { /* reverse video */\r
            if(fw2->reversevideo == 0) {\r
                fw2->reversevideo = 1;\r
                sprintf(ansibuf, "\x1b[07m");\r
                for(i=0;i<strlen(ansibuf);i++) {\r
                    sio0d(port, 1, ansibuf[i]);\r
                }\r
            }\r
        } else {\r
            if(fw2->reversevideo == 1) {\r
                fw2->reversevideo = 0;\r
                sprintf(ansibuf, "\x1b[00m");\r
                for(i=0;i<strlen(ansibuf);i++) {\r
                    sio0d(port, 1, ansibuf[i]);\r
                }\r
            }\r
        }\r
\r
        outchar = Value & 0x7F;\r
        if(outchar < ' ') {\r
            outchar = 'O';\r
        }\r
        if(outchar == 0x7F) { /* this is supposed to be a square Block character on FW2 */\r
            outchar = 'X';\r
        }\r
\r
        if((fw2->cur_FL_Row == FL_Row) && (FL_Col == fw2->cur_FL_Col + 1)) {\r
            sio0d(port, 1, outchar);\r
        } else {\r
            /* ESC[#;#H */\r
            sprintf(ansibuf, "\x1b[%d;%dH%c", FL_Row, FL_Col, outchar);\r
            for(i=0;i<strlen(ansibuf);i++) {\r
                sio0d(port, 1, ansibuf[i]);\r
            }\r
        }\r
        fw2->cur_FL_Col = FL_Col;\r
        fw2->cur_FL_Row = FL_Row;\r
    }\r
\r
    return(1);\r
}\r
\r
\r
static uint8 FW2_Read(const uint32 Addr)\r
{\r
    uint32 baseaddr = 0;\r
    uint8 i;\r
\r
    for(i = 0; i < FW2_MAX_BOARDS; i++) {\r
        if(fw2_info[i] != NULL) {\r
            baseaddr = fw2_info[i]->uptr->u3;\r
            if((Addr >= baseaddr) && (Addr < (baseaddr + FW2_CAPACITY))) {\r
                break;\r
            }\r
        }\r
    }\r
\r
    if(i == FW2_MAX_BOARDS) {\r
        return 0xFF;\r
    }\r
\r
    return(fw2_info[i]->M[Addr - baseaddr]);\r
}\r