First Commit of my working state

[simh.git] / AltairZ80 / insnsd.c

/* This file auto-generated from insns.dat by insns.pl - don't edit it */\r
\r
#include "nasm.h"\r
#include "insns.h"\r
\r
static struct itemplate instrux[] = {\r
    {I_AAA, 0, {0,0,0}, "\1\x37", IF_8086},\r
    {I_AAD, 0, {0,0,0}, "\2\xD5\x0A", IF_8086},\r
    {I_AAD, 1, {IMMEDIATE,0,0}, "\1\xD5\24", IF_8086|IF_SB},\r
    {I_AAM, 0, {0,0,0}, "\2\xD4\x0A", IF_8086},\r
    {I_AAM, 1, {IMMEDIATE,0,0}, "\1\xD4\24", IF_8086|IF_SB},\r
    {I_AAS, 0, {0,0,0}, "\1\x3F", IF_8086},\r
    {I_ADC, 2, {MEMORY,REG8,0}, "\300\1\x10\101", IF_8086|IF_SM},\r
    {I_ADC, 2, {REG8,REG8,0}, "\1\x10\101", IF_8086},\r
    {I_ADC, 2, {MEMORY,REG16,0}, "\320\300\1\x11\101", IF_8086|IF_SM},\r
    {I_ADC, 2, {REG16,REG16,0}, "\320\1\x11\101", IF_8086},\r
    {I_ADC, 2, {MEMORY,REG32,0}, "\321\300\1\x11\101", IF_386|IF_SM},\r
    {I_ADC, 2, {REG32,REG32,0}, "\321\1\x11\101", IF_386},\r
    {I_ADC, 2, {REG8,MEMORY,0}, "\301\1\x12\110", IF_8086|IF_SM},\r
    {I_ADC, 2, {REG8,REG8,0}, "\1\x12\110", IF_8086},\r
    {I_ADC, 2, {REG16,MEMORY,0}, "\320\301\1\x13\110", IF_8086|IF_SM},\r
    {I_ADC, 2, {REG16,REG16,0}, "\320\1\x13\110", IF_8086},\r
    {I_ADC, 2, {REG32,MEMORY,0}, "\321\301\1\x13\110", IF_386|IF_SM},\r
    {I_ADC, 2, {REG32,REG32,0}, "\321\1\x13\110", IF_386},\r
    {I_ADC, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\202\15", IF_8086},\r
    {I_ADC, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\202\15", IF_386},\r
    {I_ADC, 2, {REG_AL,IMMEDIATE,0}, "\1\x14\21", IF_8086|IF_SM},\r
    {I_ADC, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x15\31", IF_8086|IF_SM},\r
    {I_ADC, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x15\41", IF_386|IF_SM},\r
    {I_ADC, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\202\21", IF_8086|IF_SM},\r
    {I_ADC, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\202\131", IF_8086|IF_SM},\r
    {I_ADC, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\202\141", IF_386|IF_SM},\r
    {I_ADC, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\202\21", IF_8086|IF_SM},\r
    {I_ADC, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\202\131", IF_8086|IF_SM},\r
    {I_ADC, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\202\141", IF_386|IF_SM},\r
    {I_ADD, 2, {MEMORY,REG8,0}, "\300\17\101", IF_8086|IF_SM},\r
    {I_ADD, 2, {REG8,REG8,0}, "\17\101", IF_8086},\r
    {I_ADD, 2, {MEMORY,REG16,0}, "\320\300\1\x01\101", IF_8086|IF_SM},\r
    {I_ADD, 2, {REG16,REG16,0}, "\320\1\x01\101", IF_8086},\r
    {I_ADD, 2, {MEMORY,REG32,0}, "\321\300\1\x01\101", IF_386|IF_SM},\r
    {I_ADD, 2, {REG32,REG32,0}, "\321\1\x01\101", IF_386},\r
    {I_ADD, 2, {REG8,MEMORY,0}, "\301\1\x02\110", IF_8086|IF_SM},\r
    {I_ADD, 2, {REG8,REG8,0}, "\1\x02\110", IF_8086},\r
    {I_ADD, 2, {REG16,MEMORY,0}, "\320\301\1\x03\110", IF_8086|IF_SM},\r
    {I_ADD, 2, {REG16,REG16,0}, "\320\1\x03\110", IF_8086},\r
    {I_ADD, 2, {REG32,MEMORY,0}, "\321\301\1\x03\110", IF_386|IF_SM},\r
    {I_ADD, 2, {REG32,REG32,0}, "\321\1\x03\110", IF_386},\r
    {I_ADD, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\200\15", IF_8086},\r
    {I_ADD, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\200\15", IF_386},\r
    {I_ADD, 2, {REG_AL,IMMEDIATE,0}, "\1\x04\21", IF_8086|IF_SM},\r
    {I_ADD, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x05\31", IF_8086|IF_SM},\r
    {I_ADD, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x05\41", IF_386|IF_SM},\r
    {I_ADD, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\200\21", IF_8086|IF_SM},\r
    {I_ADD, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\200\131", IF_8086|IF_SM},\r
    {I_ADD, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\200\141", IF_386|IF_SM},\r
    {I_ADD, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\200\21", IF_8086|IF_SM},\r
    {I_ADD, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\200\131", IF_8086|IF_SM},\r
    {I_ADD, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\200\141", IF_386|IF_SM},\r
    {I_AND, 2, {MEMORY,REG8,0}, "\300\1\x20\101", IF_8086|IF_SM},\r
    {I_AND, 2, {REG8,REG8,0}, "\1\x20\101", IF_8086},\r
    {I_AND, 2, {MEMORY,REG16,0}, "\320\300\1\x21\101", IF_8086|IF_SM},\r
    {I_AND, 2, {REG16,REG16,0}, "\320\1\x21\101", IF_8086},\r
    {I_AND, 2, {MEMORY,REG32,0}, "\321\300\1\x21\101", IF_386|IF_SM},\r
    {I_AND, 2, {REG32,REG32,0}, "\321\1\x21\101", IF_386},\r
    {I_AND, 2, {REG8,MEMORY,0}, "\301\1\x22\110", IF_8086|IF_SM},\r
    {I_AND, 2, {REG8,REG8,0}, "\1\x22\110", IF_8086},\r
    {I_AND, 2, {REG16,MEMORY,0}, "\320\301\1\x23\110", IF_8086|IF_SM},\r
    {I_AND, 2, {REG16,REG16,0}, "\320\1\x23\110", IF_8086},\r
    {I_AND, 2, {REG32,MEMORY,0}, "\321\301\1\x23\110", IF_386|IF_SM},\r
    {I_AND, 2, {REG32,REG32,0}, "\321\1\x23\110", IF_386},\r
    {I_AND, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\204\15", IF_8086},\r
    {I_AND, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\204\15", IF_386},\r
    {I_AND, 2, {REG_AL,IMMEDIATE,0}, "\1\x24\21", IF_8086|IF_SM},\r
    {I_AND, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x25\31", IF_8086|IF_SM},\r
    {I_AND, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x25\41", IF_386|IF_SM},\r
    {I_AND, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\204\21", IF_8086|IF_SM},\r
    {I_AND, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\204\131", IF_8086|IF_SM},\r
    {I_AND, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\204\141", IF_386|IF_SM},\r
    {I_AND, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\204\21", IF_8086|IF_SM},\r
    {I_AND, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\204\131", IF_8086|IF_SM},\r
    {I_AND, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\204\141", IF_386|IF_SM},\r
    {I_ARPL, 2, {MEMORY,REG16,0}, "\300\1\x63\101", IF_286|IF_PROT|IF_SM},\r
    {I_ARPL, 2, {REG16,REG16,0}, "\1\x63\101", IF_286|IF_PROT},\r
    {I_BOUND, 2, {REG16,MEMORY,0}, "\320\301\1\x62\110", IF_186},\r
    {I_BOUND, 2, {REG32,MEMORY,0}, "\321\301\1\x62\110", IF_386},\r
    {I_BSF, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xBC\110", IF_386|IF_SM},\r
    {I_BSF, 2, {REG16,REG16,0}, "\320\2\x0F\xBC\110", IF_386},\r
    {I_BSF, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xBC\110", IF_386|IF_SM},\r
    {I_BSF, 2, {REG32,REG32,0}, "\321\2\x0F\xBC\110", IF_386},\r
    {I_BSR, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xBD\110", IF_386|IF_SM},\r
    {I_BSR, 2, {REG16,REG16,0}, "\320\2\x0F\xBD\110", IF_386},\r
    {I_BSR, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xBD\110", IF_386|IF_SM},\r
    {I_BSR, 2, {REG32,REG32,0}, "\321\2\x0F\xBD\110", IF_386},\r
    {I_BSWAP, 1, {REG32,0,0}, "\321\1\x0F\10\xC8", IF_486},\r
    {I_BT, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xA3\101", IF_386|IF_SM},\r
    {I_BT, 2, {REG16,REG16,0}, "\320\2\x0F\xA3\101", IF_386},\r
    {I_BT, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xA3\101", IF_386|IF_SM},\r
    {I_BT, 2, {REG32,REG32,0}, "\321\2\x0F\xA3\101", IF_386},\r
    {I_BT, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\2\x0F\xBA\204\25", IF_386|IF_SB},\r
    {I_BT, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\2\x0F\xBA\204\25", IF_386|IF_SB},\r
    {I_BTC, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xBB\101", IF_386|IF_SM},\r
    {I_BTC, 2, {REG16,REG16,0}, "\320\2\x0F\xBB\101", IF_386},\r
    {I_BTC, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xBB\101", IF_386|IF_SM},\r
    {I_BTC, 2, {REG32,REG32,0}, "\321\2\x0F\xBB\101", IF_386},\r
    {I_BTC, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\2\x0F\xBA\207\25", IF_386|IF_SB},\r
    {I_BTC, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\2\x0F\xBA\207\25", IF_386|IF_SB},\r
    {I_BTR, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xB3\101", IF_386|IF_SM},\r
    {I_BTR, 2, {REG16,REG16,0}, "\320\2\x0F\xB3\101", IF_386},\r
    {I_BTR, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xB3\101", IF_386|IF_SM},\r
    {I_BTR, 2, {REG32,REG32,0}, "\321\2\x0F\xB3\101", IF_386},\r
    {I_BTR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\2\x0F\xBA\206\25", IF_386|IF_SB},\r
    {I_BTR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\2\x0F\xBA\206\25", IF_386|IF_SB},\r
    {I_BTS, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xAB\101", IF_386|IF_SM},\r
    {I_BTS, 2, {REG16,REG16,0}, "\320\2\x0F\xAB\101", IF_386},\r
    {I_BTS, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xAB\101", IF_386|IF_SM},\r
    {I_BTS, 2, {REG32,REG32,0}, "\321\2\x0F\xAB\101", IF_386},\r
    {I_BTS, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\2\x0F\xBA\205\25", IF_386|IF_SB},\r
    {I_BTS, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\2\x0F\xBA\205\25", IF_386|IF_SB},\r
    {I_CALL, 1, {IMMEDIATE,0,0}, "\322\1\xE8\64", IF_8086},\r
    {I_CALL, 1, {IMMEDIATE|NEAR,0,0}, "\322\1\xE8\64", IF_8086},\r
    {I_CALL, 1, {IMMEDIATE|BITS16,0,0}, "\320\1\xE8\64", IF_8086},\r
    {I_CALL, 1, {IMMEDIATE|BITS16|NEAR,0,0}, "\320\1\xE8\64", IF_8086},\r
    {I_CALL, 1, {IMMEDIATE|BITS32,0,0}, "\321\1\xE8\64", IF_386},\r
    {I_CALL, 1, {IMMEDIATE|BITS32|NEAR,0,0}, "\321\1\xE8\64", IF_386},\r
    {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE,0}, "\322\1\x9A\35\30", IF_8086},\r
    {I_CALL, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0}, "\320\1\x9A\31\30", IF_8086},\r
    {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0}, "\320\1\x9A\31\30", IF_8086},\r
    {I_CALL, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0}, "\321\1\x9A\41\30", IF_386},\r
    {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0}, "\321\1\x9A\41\30", IF_386},\r
    {I_CALL, 1, {MEMORY|FAR,0,0}, "\322\300\1\xFF\203", IF_8086},\r
    {I_CALL, 1, {MEMORY|BITS16|FAR,0,0}, "\320\300\1\xFF\203", IF_8086},\r
    {I_CALL, 1, {MEMORY|BITS32|FAR,0,0}, "\321\300\1\xFF\203", IF_386},\r
    {I_CALL, 1, {MEMORY|NEAR,0,0}, "\322\300\1\xFF\202", IF_8086},\r
    {I_CALL, 1, {MEMORY|BITS16|NEAR,0,0}, "\320\300\1\xFF\202", IF_8086},\r
    {I_CALL, 1, {MEMORY|BITS32|NEAR,0,0}, "\321\300\1\xFF\202", IF_386},\r
    {I_CALL, 1, {REG16,0,0}, "\320\300\1\xFF\202", IF_8086},\r
    {I_CALL, 1, {REG32,0,0}, "\321\300\1\xFF\202", IF_386},\r
    {I_CALL, 1, {MEMORY,0,0}, "\322\300\1\xFF\202", IF_8086},\r
    {I_CALL, 1, {MEMORY|BITS16,0,0}, "\320\300\1\xFF\202", IF_8086},\r
    {I_CALL, 1, {MEMORY|BITS32,0,0}, "\321\300\1\xFF\202", IF_386},\r
    {I_CBW, 0, {0,0,0}, "\320\1\x98", IF_8086},\r
    {I_CDQ, 0, {0,0,0}, "\321\1\x99", IF_386},\r
    {I_CLC, 0, {0,0,0}, "\1\xF8", IF_8086},\r
    {I_CLD, 0, {0,0,0}, "\1\xFC", IF_8086},\r
    {I_CLI, 0, {0,0,0}, "\1\xFA", IF_8086},\r
    {I_CLTS, 0, {0,0,0}, "\2\x0F\x06", IF_286|IF_PRIV},\r
    {I_CMC, 0, {0,0,0}, "\1\xF5", IF_8086},\r
    {I_CMP, 2, {MEMORY,REG8,0}, "\300\1\x38\101", IF_8086|IF_SM},\r
    {I_CMP, 2, {REG8,REG8,0}, "\1\x38\101", IF_8086},\r
    {I_CMP, 2, {MEMORY,REG16,0}, "\320\300\1\x39\101", IF_8086|IF_SM},\r
    {I_CMP, 2, {REG16,REG16,0}, "\320\1\x39\101", IF_8086},\r
    {I_CMP, 2, {MEMORY,REG32,0}, "\321\300\1\x39\101", IF_386|IF_SM},\r
    {I_CMP, 2, {REG32,REG32,0}, "\321\1\x39\101", IF_386},\r
    {I_CMP, 2, {REG8,MEMORY,0}, "\301\1\x3A\110", IF_8086|IF_SM},\r
    {I_CMP, 2, {REG8,REG8,0}, "\1\x3A\110", IF_8086},\r
    {I_CMP, 2, {REG16,MEMORY,0}, "\320\301\1\x3B\110", IF_8086|IF_SM},\r
    {I_CMP, 2, {REG16,REG16,0}, "\320\1\x3B\110", IF_8086},\r
    {I_CMP, 2, {REG32,MEMORY,0}, "\321\301\1\x3B\110", IF_386|IF_SM},\r
    {I_CMP, 2, {REG32,REG32,0}, "\321\1\x3B\110", IF_386},\r
    {I_CMP, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\207\15", IF_8086},\r
    {I_CMP, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\207\15", IF_386},\r
    {I_CMP, 2, {REG_AL,IMMEDIATE,0}, "\1\x3C\21", IF_8086|IF_SM},\r
    {I_CMP, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x3D\31", IF_8086|IF_SM},\r
    {I_CMP, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x3D\41", IF_386|IF_SM},\r
    {I_CMP, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\207\21", IF_8086|IF_SM},\r
    {I_CMP, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\207\131", IF_8086|IF_SM},\r
    {I_CMP, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\207\141", IF_386|IF_SM},\r
    {I_CMP, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\207\21", IF_8086|IF_SM},\r
    {I_CMP, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\207\131", IF_8086|IF_SM},\r
    {I_CMP, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\207\141", IF_386|IF_SM},\r
    {I_CMPSB, 0, {0,0,0}, "\332\1\xA6", IF_8086},\r
    {I_CMPSD, 0, {0,0,0}, "\332\321\1\xA7", IF_386},\r
    {I_CMPSW, 0, {0,0,0}, "\332\320\1\xA7", IF_8086},\r
    {I_CMPXCHG, 2, {MEMORY,REG8,0}, "\300\2\x0F\xB0\101", IF_PENT|IF_SM},\r
    {I_CMPXCHG, 2, {REG8,REG8,0}, "\2\x0F\xB0\101", IF_PENT},\r
    {I_CMPXCHG, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xB1\101", IF_PENT|IF_SM},\r
    {I_CMPXCHG, 2, {REG16,REG16,0}, "\320\2\x0F\xB1\101", IF_PENT},\r
    {I_CMPXCHG, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xB1\101", IF_PENT|IF_SM},\r
    {I_CMPXCHG, 2, {REG32,REG32,0}, "\321\2\x0F\xB1\101", IF_PENT},\r
    {I_CMPXCHG486, 2, {MEMORY,REG8,0}, "\300\2\x0F\xA6\101", IF_486|IF_SM|IF_UNDOC},\r
    {I_CMPXCHG486, 2, {REG8,REG8,0}, "\2\x0F\xA6\101", IF_486|IF_UNDOC},\r
    {I_CMPXCHG486, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xA7\101", IF_486|IF_SM|IF_UNDOC},\r
    {I_CMPXCHG486, 2, {REG16,REG16,0}, "\320\2\x0F\xA7\101", IF_486|IF_UNDOC},\r
    {I_CMPXCHG486, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xA7\101", IF_486|IF_SM|IF_UNDOC},\r
    {I_CMPXCHG486, 2, {REG32,REG32,0}, "\321\2\x0F\xA7\101", IF_486|IF_UNDOC},\r
    {I_CMPXCHG8B, 1, {MEMORY,0,0}, "\300\2\x0F\xC7\201", IF_PENT},\r
    {I_CPUID, 0, {0,0,0}, "\2\x0F\xA2", IF_PENT},\r
    {I_CWD, 0, {0,0,0}, "\320\1\x99", IF_8086},\r
    {I_CWDE, 0, {0,0,0}, "\321\1\x98", IF_386},\r
    {I_DAA, 0, {0,0,0}, "\1\x27", IF_8086},\r
    {I_DAS, 0, {0,0,0}, "\1\x2F", IF_8086},\r
    {I_DEC, 1, {REG16,0,0}, "\320\10\x48", IF_8086},\r
    {I_DEC, 1, {REG32,0,0}, "\321\10\x48", IF_386},\r
    {I_DEC, 1, {REGMEM|BITS8,0,0}, "\300\1\xFE\201", IF_8086},\r
    {I_DEC, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xFF\201", IF_8086},\r
    {I_DEC, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xFF\201", IF_386},\r
    {I_DIV, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\206", IF_8086},\r
    {I_DIV, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\206", IF_8086},\r
    {I_DIV, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\206", IF_386},\r
    {I_EMMS, 0, {0,0,0}, "\2\x0F\x77", IF_PENT|IF_MMX},\r
    {I_ENTER, 2, {IMMEDIATE,IMMEDIATE,0}, "\1\xC8\30\25", IF_186},\r
    {I_EQU, 1, {IMMEDIATE,0,0}, "\0", IF_8086},\r
    {I_EQU, 2, {IMMEDIATE|COLON,IMMEDIATE,0}, "\0", IF_8086},\r
    {I_F2XM1, 0, {0,0,0}, "\2\xD9\xF0", IF_8086|IF_FPU},\r
    {I_FABS, 0, {0,0,0}, "\2\xD9\xE1", IF_8086|IF_FPU},\r
    {I_FADD, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\200", IF_8086|IF_FPU},\r
    {I_FADD, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\200", IF_8086|IF_FPU},\r
    {I_FADD, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xC0", IF_8086|IF_FPU},\r
    {I_FADD, 1, {FPUREG,0,0}, "\1\xD8\10\xC0", IF_8086|IF_FPU},\r
    {I_FADD, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xC0", IF_8086|IF_FPU},\r
    {I_FADD, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xC0", IF_8086|IF_FPU},\r
    {I_FADDP, 1, {FPUREG,0,0}, "\1\xDE\10\xC0", IF_8086|IF_FPU},\r
    {I_FADDP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xC0", IF_8086|IF_FPU},\r
    {I_FBLD, 1, {MEMORY|BITS80,0,0}, "\300\1\xDF\204", IF_8086|IF_FPU},\r
    {I_FBLD, 1, {MEMORY,0,0}, "\300\1\xDF\204", IF_8086|IF_FPU},\r
    {I_FBSTP, 1, {MEMORY|BITS80,0,0}, "\300\1\xDF\206", IF_8086|IF_FPU},\r
    {I_FBSTP, 1, {MEMORY,0,0}, "\300\1\xDF\206", IF_8086|IF_FPU},\r
    {I_FCHS, 0, {0,0,0}, "\2\xD9\xE0", IF_8086|IF_FPU},\r
    {I_FCLEX, 0, {0,0,0}, "\3\x9B\xDB\xE2", IF_8086|IF_FPU},\r
    {I_FCMOVB, 1, {FPUREG,0,0}, "\1\xDA\10\xC0", IF_P6|IF_FPU},\r
    {I_FCMOVB, 2, {FPU0,FPUREG,0}, "\1\xDA\11\xC0", IF_P6|IF_FPU},\r
    {I_FCMOVBE, 1, {FPUREG,0,0}, "\1\xDA\10\xD0", IF_P6|IF_FPU},\r
    {I_FCMOVBE, 2, {FPU0,FPUREG,0}, "\1\xDA\11\xD0", IF_P6|IF_FPU},\r
    {I_FCMOVE, 1, {FPUREG,0,0}, "\1\xDA\10\xC8", IF_P6|IF_FPU},\r
    {I_FCMOVE, 2, {FPU0,FPUREG,0}, "\1\xDA\11\xC8", IF_P6|IF_FPU},\r
    {I_FCMOVNB, 1, {FPUREG,0,0}, "\1\xDB\10\xC0", IF_P6|IF_FPU},\r
    {I_FCMOVNB, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xC0", IF_P6|IF_FPU},\r
    {I_FCMOVNBE, 1, {FPUREG,0,0}, "\1\xDB\10\xD0", IF_P6|IF_FPU},\r
    {I_FCMOVNBE, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xD0", IF_P6|IF_FPU},\r
    {I_FCMOVNE, 1, {FPUREG,0,0}, "\1\xDB\10\xC8", IF_P6|IF_FPU},\r
    {I_FCMOVNE, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xC8", IF_P6|IF_FPU},\r
    {I_FCMOVNU, 1, {FPUREG,0,0}, "\1\xDB\10\xD8", IF_P6|IF_FPU},\r
    {I_FCMOVNU, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xD8", IF_P6|IF_FPU},\r
    {I_FCMOVU, 1, {FPUREG,0,0}, "\1\xDA\10\xD8", IF_P6|IF_FPU},\r
    {I_FCMOVU, 2, {FPU0,FPUREG,0}, "\1\xDA\11\xD8", IF_P6|IF_FPU},\r
    {I_FCOM, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\202", IF_8086|IF_FPU},\r
    {I_FCOM, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\202", IF_8086|IF_FPU},\r
    {I_FCOM, 1, {FPUREG,0,0}, "\1\xD8\10\xD0", IF_8086|IF_FPU},\r
    {I_FCOM, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xD0", IF_8086|IF_FPU},\r
    {I_FCOMI, 1, {FPUREG,0,0}, "\1\xDB\10\xF0", IF_P6|IF_FPU},\r
    {I_FCOMI, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xF0", IF_P6|IF_FPU},\r
    {I_FCOMIP, 1, {FPUREG,0,0}, "\1\xDF\10\xF0", IF_P6|IF_FPU},\r
    {I_FCOMIP, 2, {FPU0,FPUREG,0}, "\1\xDF\11\xF0", IF_P6|IF_FPU},\r
    {I_FCOMP, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\203", IF_8086|IF_FPU},\r
    {I_FCOMP, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\203", IF_8086|IF_FPU},\r
    {I_FCOMP, 1, {FPUREG,0,0}, "\1\xD8\10\xD8", IF_8086|IF_FPU},\r
    {I_FCOMP, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xD8", IF_8086|IF_FPU},\r
    {I_FCOMPP, 0, {0,0,0}, "\2\xDE\xD9", IF_8086|IF_FPU},\r
    {I_FCOS, 0, {0,0,0}, "\2\xD9\xFF", IF_386|IF_FPU},\r
    {I_FDECSTP, 0, {0,0,0}, "\2\xD9\xF6", IF_8086|IF_FPU},\r
    {I_FDISI, 0, {0,0,0}, "\3\x9B\xDB\xE1", IF_8086|IF_FPU},\r
    {I_FDIV, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\206", IF_8086|IF_FPU},\r
    {I_FDIV, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\206", IF_8086|IF_FPU},\r
    {I_FDIV, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xF8", IF_8086|IF_FPU},\r
    {I_FDIV, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xF8", IF_8086|IF_FPU},\r
    {I_FDIV, 1, {FPUREG,0,0}, "\1\xD8\10\xF0", IF_8086|IF_FPU},\r
    {I_FDIV, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xF0", IF_8086|IF_FPU},\r
    {I_FDIVP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xF8", IF_8086|IF_FPU},\r
    {I_FDIVP, 1, {FPUREG,0,0}, "\1\xDE\10\xF8", IF_8086|IF_FPU},\r
    {I_FDIVR, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\207", IF_8086|IF_FPU},\r
    {I_FDIVR, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\207", IF_8086|IF_FPU},\r
    {I_FDIVR, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xF0", IF_8086|IF_FPU},\r
    {I_FDIVR, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xF0", IF_8086|IF_FPU},\r
    {I_FDIVR, 1, {FPUREG,0,0}, "\1\xD8\10\xF8", IF_8086|IF_FPU},\r
    {I_FDIVR, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xF8", IF_8086|IF_FPU},\r
    {I_FDIVRP, 1, {FPUREG,0,0}, "\1\xDE\10\xF0", IF_8086|IF_FPU},\r
    {I_FDIVRP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xF0", IF_8086|IF_FPU},\r
    {I_FEMMS, 0, {0,0,0}, "\2\x0F\x0E", IF_PENT|IF_3DNOW},\r
    {I_FENI, 0, {0,0,0}, "\3\x9B\xDB\xE0", IF_8086|IF_FPU},\r
    {I_FFREE, 1, {FPUREG,0,0}, "\1\xDD\10\xC0", IF_8086|IF_FPU},\r
    {I_FFREEP, 1, {FPUREG,0,0}, "\1\xDF\10\xC0", IF_286|IF_FPU|IF_UNDOC},\r
    {I_FIADD, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\200", IF_8086|IF_FPU},\r
    {I_FIADD, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\200", IF_8086|IF_FPU},\r
    {I_FICOM, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\202", IF_8086|IF_FPU},\r
    {I_FICOM, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\202", IF_8086|IF_FPU},\r
    {I_FICOMP, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\203", IF_8086|IF_FPU},\r
    {I_FICOMP, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\203", IF_8086|IF_FPU},\r
    {I_FIDIV, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\206", IF_8086|IF_FPU},\r
    {I_FIDIV, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\206", IF_8086|IF_FPU},\r
    {I_FIDIVR, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\207", IF_8086|IF_FPU},\r
    {I_FIDIVR, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\207", IF_8086|IF_FPU},\r
    {I_FILD, 1, {MEMORY|BITS32,0,0}, "\300\1\xDB\200", IF_8086|IF_FPU},\r
    {I_FILD, 1, {MEMORY|BITS16,0,0}, "\300\1\xDF\200", IF_8086|IF_FPU},\r
    {I_FILD, 1, {MEMORY|BITS64,0,0}, "\300\1\xDF\205", IF_8086|IF_FPU},\r
    {I_FIMUL, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\201", IF_8086|IF_FPU},\r
    {I_FIMUL, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\201", IF_8086|IF_FPU},\r
    {I_FINCSTP, 0, {0,0,0}, "\2\xD9\xF7", IF_8086|IF_FPU},\r
    {I_FINIT, 0, {0,0,0}, "\3\x9B\xDB\xE3", IF_8086|IF_FPU},\r
    {I_FIST, 1, {MEMORY|BITS32,0,0}, "\300\1\xDB\202", IF_8086|IF_FPU},\r
    {I_FIST, 1, {MEMORY|BITS16,0,0}, "\300\1\xDF\202", IF_8086|IF_FPU},\r
    {I_FISTP, 1, {MEMORY|BITS32,0,0}, "\300\1\xDB\203", IF_8086|IF_FPU},\r
    {I_FISTP, 1, {MEMORY|BITS16,0,0}, "\300\1\xDF\203", IF_8086|IF_FPU},\r
    {I_FISTP, 1, {MEMORY|BITS64,0,0}, "\300\1\xDF\207", IF_8086|IF_FPU},\r
    {I_FISTTP, 1, {MEMORY|BITS32,0,0}, "\300\1\xDD\201", IF_PRESCOTT|IF_FPU},\r
    {I_FISTTP, 1, {MEMORY|BITS16,0,0}, "\300\1\xDB\201", IF_PRESCOTT|IF_FPU},\r
    {I_FISTTP, 1, {MEMORY|BITS64,0,0}, "\300\1\xDF\201", IF_PRESCOTT|IF_FPU},\r
    {I_FISUB, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\204", IF_8086|IF_FPU},\r
    {I_FISUB, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\204", IF_8086|IF_FPU},\r
    {I_FISUBR, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\205", IF_8086|IF_FPU},\r
    {I_FISUBR, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\205", IF_8086|IF_FPU},\r
    {I_FLD, 1, {MEMORY|BITS32,0,0}, "\300\1\xD9\200", IF_8086|IF_FPU},\r
    {I_FLD, 1, {MEMORY|BITS64,0,0}, "\300\1\xDD\200", IF_8086|IF_FPU},\r
    {I_FLD, 1, {MEMORY|BITS80,0,0}, "\300\1\xDB\205", IF_8086|IF_FPU},\r
    {I_FLD, 1, {FPUREG,0,0}, "\1\xD9\10\xC0", IF_8086|IF_FPU},\r
    {I_FLD1, 0, {0,0,0}, "\2\xD9\xE8", IF_8086|IF_FPU},\r
    {I_FLDCW, 1, {MEMORY,0,0}, "\300\1\xD9\205", IF_8086|IF_FPU|IF_SW},\r
    {I_FLDENV, 1, {MEMORY,0,0}, "\300\1\xD9\204", IF_8086|IF_FPU},\r
    {I_FLDL2E, 0, {0,0,0}, "\2\xD9\xEA", IF_8086|IF_FPU},\r
    {I_FLDL2T, 0, {0,0,0}, "\2\xD9\xE9", IF_8086|IF_FPU},\r
    {I_FLDLG2, 0, {0,0,0}, "\2\xD9\xEC", IF_8086|IF_FPU},\r
    {I_FLDLN2, 0, {0,0,0}, "\2\xD9\xED", IF_8086|IF_FPU},\r
    {I_FLDPI, 0, {0,0,0}, "\2\xD9\xEB", IF_8086|IF_FPU},\r
    {I_FLDZ, 0, {0,0,0}, "\2\xD9\xEE", IF_8086|IF_FPU},\r
    {I_FMUL, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\201", IF_8086|IF_FPU},\r
    {I_FMUL, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\201", IF_8086|IF_FPU},\r
    {I_FMUL, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xC8", IF_8086|IF_FPU},\r
    {I_FMUL, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xC8", IF_8086|IF_FPU},\r
    {I_FMUL, 1, {FPUREG,0,0}, "\1\xD8\10\xC8", IF_8086|IF_FPU},\r
    {I_FMUL, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xC8", IF_8086|IF_FPU},\r
    {I_FMULP, 1, {FPUREG,0,0}, "\1\xDE\10\xC8", IF_8086|IF_FPU},\r
    {I_FMULP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xC8", IF_8086|IF_FPU},\r
    {I_FNCLEX, 0, {0,0,0}, "\2\xDB\xE2", IF_8086|IF_FPU},\r
    {I_FNDISI, 0, {0,0,0}, "\2\xDB\xE1", IF_8086|IF_FPU},\r
    {I_FNENI, 0, {0,0,0}, "\2\xDB\xE0", IF_8086|IF_FPU},\r
    {I_FNINIT, 0, {0,0,0}, "\2\xDB\xE3", IF_8086|IF_FPU},\r
    {I_FNOP, 0, {0,0,0}, "\2\xD9\xD0", IF_8086|IF_FPU},\r
    {I_FNSAVE, 1, {MEMORY,0,0}, "\300\1\xDD\206", IF_8086|IF_FPU},\r
    {I_FNSTCW, 1, {MEMORY,0,0}, "\300\1\xD9\207", IF_8086|IF_FPU|IF_SW},\r
    {I_FNSTENV, 1, {MEMORY,0,0}, "\300\1\xD9\206", IF_8086|IF_FPU},\r
    {I_FNSTSW, 1, {MEMORY,0,0}, "\300\1\xDD\207", IF_8086|IF_FPU|IF_SW},\r
    {I_FNSTSW, 1, {REG_AX,0,0}, "\2\xDF\xE0", IF_286|IF_FPU},\r
    {I_FPATAN, 0, {0,0,0}, "\2\xD9\xF3", IF_8086|IF_FPU},\r
    {I_FPREM, 0, {0,0,0}, "\2\xD9\xF8", IF_8086|IF_FPU},\r
    {I_FPREM1, 0, {0,0,0}, "\2\xD9\xF5", IF_386|IF_FPU},\r
    {I_FPTAN, 0, {0,0,0}, "\2\xD9\xF2", IF_8086|IF_FPU},\r
    {I_FRNDINT, 0, {0,0,0}, "\2\xD9\xFC", IF_8086|IF_FPU},\r
    {I_FRSTOR, 1, {MEMORY,0,0}, "\300\1\xDD\204", IF_8086|IF_FPU},\r
    {I_FSAVE, 1, {MEMORY,0,0}, "\300\2\x9B\xDD\206", IF_8086|IF_FPU},\r
    {I_FSCALE, 0, {0,0,0}, "\2\xD9\xFD", IF_8086|IF_FPU},\r
    {I_FSETPM, 0, {0,0,0}, "\2\xDB\xE4", IF_286|IF_FPU},\r
    {I_FSIN, 0, {0,0,0}, "\2\xD9\xFE", IF_386|IF_FPU},\r
    {I_FSINCOS, 0, {0,0,0}, "\2\xD9\xFB", IF_386|IF_FPU},\r
    {I_FSQRT, 0, {0,0,0}, "\2\xD9\xFA", IF_8086|IF_FPU},\r
    {I_FST, 1, {MEMORY|BITS32,0,0}, "\300\1\xD9\202", IF_8086|IF_FPU},\r
    {I_FST, 1, {MEMORY|BITS64,0,0}, "\300\1\xDD\202", IF_8086|IF_FPU},\r
    {I_FST, 1, {FPUREG,0,0}, "\1\xDD\10\xD0", IF_8086|IF_FPU},\r
    {I_FSTCW, 1, {MEMORY,0,0}, "\300\2\x9B\xD9\207", IF_8086|IF_FPU|IF_SW},\r
    {I_FSTENV, 1, {MEMORY,0,0}, "\300\2\x9B\xD9\206", IF_8086|IF_FPU},\r
    {I_FSTP, 1, {MEMORY|BITS32,0,0}, "\300\1\xD9\203", IF_8086|IF_FPU},\r
    {I_FSTP, 1, {MEMORY|BITS64,0,0}, "\300\1\xDD\203", IF_8086|IF_FPU},\r
    {I_FSTP, 1, {MEMORY|BITS80,0,0}, "\300\1\xDB\207", IF_8086|IF_FPU},\r
    {I_FSTP, 1, {FPUREG,0,0}, "\1\xDD\10\xD8", IF_8086|IF_FPU},\r
    {I_FSTSW, 1, {MEMORY,0,0}, "\300\2\x9B\xDD\207", IF_8086|IF_FPU|IF_SW},\r
    {I_FSTSW, 1, {REG_AX,0,0}, "\3\x9B\xDF\xE0", IF_286|IF_FPU},\r
    {I_FSUB, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\204", IF_8086|IF_FPU},\r
    {I_FSUB, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\204", IF_8086|IF_FPU},\r
    {I_FSUB, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xE8", IF_8086|IF_FPU},\r
    {I_FSUB, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xE8", IF_8086|IF_FPU},\r
    {I_FSUB, 1, {FPUREG,0,0}, "\1\xD8\10\xE0", IF_8086|IF_FPU},\r
    {I_FSUB, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xE0", IF_8086|IF_FPU},\r
    {I_FSUBP, 1, {FPUREG,0,0}, "\1\xDE\10\xE8", IF_8086|IF_FPU},\r
    {I_FSUBP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xE8", IF_8086|IF_FPU},\r
    {I_FSUBR, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\205", IF_8086|IF_FPU},\r
    {I_FSUBR, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\205", IF_8086|IF_FPU},\r
    {I_FSUBR, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xE0", IF_8086|IF_FPU},\r
    {I_FSUBR, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xE0", IF_8086|IF_FPU},\r
    {I_FSUBR, 1, {FPUREG,0,0}, "\1\xD8\10\xE8", IF_8086|IF_FPU},\r
    {I_FSUBR, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xE8", IF_8086|IF_FPU},\r
    {I_FSUBRP, 1, {FPUREG,0,0}, "\1\xDE\10\xE0", IF_8086|IF_FPU},\r
    {I_FSUBRP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xE0", IF_8086|IF_FPU},\r
    {I_FTST, 0, {0,0,0}, "\2\xD9\xE4", IF_8086|IF_FPU},\r
    {I_FUCOM, 1, {FPUREG,0,0}, "\1\xDD\10\xE0", IF_386|IF_FPU},\r
    {I_FUCOM, 2, {FPU0,FPUREG,0}, "\1\xDD\11\xE0", IF_386|IF_FPU},\r
    {I_FUCOMI, 1, {FPUREG,0,0}, "\1\xDB\10\xE8", IF_P6|IF_FPU},\r
    {I_FUCOMI, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xE8", IF_P6|IF_FPU},\r
    {I_FUCOMIP, 1, {FPUREG,0,0}, "\1\xDF\10\xE8", IF_P6|IF_FPU},\r
    {I_FUCOMIP, 2, {FPU0,FPUREG,0}, "\1\xDF\11\xE8", IF_P6|IF_FPU},\r
    {I_FUCOMP, 1, {FPUREG,0,0}, "\1\xDD\10\xE8", IF_386|IF_FPU},\r
    {I_FUCOMP, 2, {FPU0,FPUREG,0}, "\1\xDD\11\xE8", IF_386|IF_FPU},\r
    {I_FUCOMPP, 0, {0,0,0}, "\2\xDA\xE9", IF_386|IF_FPU},\r
    {I_FXAM, 0, {0,0,0}, "\2\xD9\xE5", IF_8086|IF_FPU},\r
    {I_FXCH, 0, {0,0,0}, "\2\xD9\xC9", IF_8086|IF_FPU},\r
    {I_FXCH, 1, {FPUREG,0,0}, "\1\xD9\10\xC8", IF_8086|IF_FPU},\r
    {I_FXCH, 2, {FPUREG,FPU0,0}, "\1\xD9\10\xC8", IF_8086|IF_FPU},\r
    {I_FXCH, 2, {FPU0,FPUREG,0}, "\1\xD9\11\xC8", IF_8086|IF_FPU},\r
    {I_FXTRACT, 0, {0,0,0}, "\2\xD9\xF4", IF_8086|IF_FPU},\r
    {I_FYL2X, 0, {0,0,0}, "\2\xD9\xF1", IF_8086|IF_FPU},\r
    {I_FYL2XP1, 0, {0,0,0}, "\2\xD9\xF9", IF_8086|IF_FPU},\r
    {I_HLT, 0, {0,0,0}, "\1\xF4", IF_8086|IF_PRIV},\r
    {I_IDIV, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\207", IF_8086},\r
    {I_IDIV, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\207", IF_8086},\r
    {I_IDIV, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\207", IF_386},\r
    {I_IMUL, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\205", IF_8086},\r
    {I_IMUL, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\205", IF_8086},\r
    {I_IMUL, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\205", IF_386},\r
    {I_IMUL, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xAF\110", IF_386|IF_SM},\r
    {I_IMUL, 2, {REG16,REG16,0}, "\320\2\x0F\xAF\110", IF_386},\r
    {I_IMUL, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xAF\110", IF_386|IF_SM},\r
    {I_IMUL, 2, {REG32,REG32,0}, "\321\2\x0F\xAF\110", IF_386},\r
    {I_IMUL, 3, {REG16,MEMORY,IMMEDIATE|BITS8}, "\320\301\1\x6B\110\16", IF_186|IF_SM},\r
    {I_IMUL, 3, {REG16,MEMORY,IMMEDIATE|BITS16}, "\320\301\1\x69\110\32", IF_186|IF_SM},\r
    {I_IMUL, 3, {REG16,REG16,IMMEDIATE|BITS8}, "\320\1\x6B\110\16", IF_186},\r
    {I_IMUL, 3, {REG16,REG16,IMMEDIATE|BITS16}, "\320\1\x69\110\32", IF_186},\r
    {I_IMUL, 3, {REG32,MEMORY,IMMEDIATE|BITS8}, "\321\301\1\x6B\110\16", IF_386|IF_SM},\r
    {I_IMUL, 3, {REG32,MEMORY,IMMEDIATE|BITS32}, "\321\301\1\x69\110\42", IF_386|IF_SM},\r
    {I_IMUL, 3, {REG32,REG32,IMMEDIATE|BITS8}, "\321\1\x6B\110\16", IF_386},\r
    {I_IMUL, 3, {REG32,REG32,IMMEDIATE|BITS32}, "\321\1\x69\110\42", IF_386},\r
    {I_IMUL, 2, {REG16,IMMEDIATE|BITS8,0}, "\320\1\x6B\100\15", IF_186},\r
    {I_IMUL, 2, {REG16,IMMEDIATE|BITS16,0}, "\320\1\x69\100\31", IF_186},\r
    {I_IMUL, 2, {REG32,IMMEDIATE|BITS8,0}, "\321\1\x6B\100\15", IF_386},\r
    {I_IMUL, 2, {REG32,IMMEDIATE|BITS32,0}, "\321\1\x69\100\41", IF_386},\r
    {I_IN, 2, {REG_AL,IMMEDIATE,0}, "\1\xE4\25", IF_8086|IF_SB},\r
    {I_IN, 2, {REG_AX,IMMEDIATE,0}, "\320\1\xE5\25", IF_8086|IF_SB},\r
    {I_IN, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\xE5\25", IF_386|IF_SB},\r
    {I_IN, 2, {REG_AL,REG_DX,0}, "\1\xEC", IF_8086},\r
    {I_IN, 2, {REG_AX,REG_DX,0}, "\320\1\xED", IF_8086},\r
    {I_IN, 2, {REG_EAX,REG_DX,0}, "\321\1\xED", IF_386},\r
    {I_INC, 1, {REG16,0,0}, "\320\10\x40", IF_8086},\r
    {I_INC, 1, {REG32,0,0}, "\321\10\x40", IF_386},\r
    {I_INC, 1, {REGMEM|BITS8,0,0}, "\300\1\xFE\200", IF_8086},\r
    {I_INC, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xFF\200", IF_8086},\r
    {I_INC, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xFF\200", IF_386},\r
    {I_INSB, 0, {0,0,0}, "\1\x6C", IF_186},\r
    {I_INSD, 0, {0,0,0}, "\321\1\x6D", IF_386},\r
    {I_INSW, 0, {0,0,0}, "\320\1\x6D", IF_186},\r
    {I_INT, 1, {IMMEDIATE,0,0}, "\1\xCD\24", IF_8086|IF_SB},\r
    {I_INT1, 0, {0,0,0}, "\1\xF1", IF_386},\r
    {I_INT3, 0, {0,0,0}, "\1\xCC", IF_8086},\r
    {I_INTO, 0, {0,0,0}, "\1\xCE", IF_8086},\r
    {I_INVD, 0, {0,0,0}, "\2\x0F\x08", IF_486|IF_PRIV},\r
    {I_INVLPG, 1, {MEMORY,0,0}, "\300\2\x0F\x01\207", IF_486|IF_PRIV},\r
    {I_IRET, 0, {0,0,0}, "\322\1\xCF", IF_8086},\r
    {I_IRETD, 0, {0,0,0}, "\321\1\xCF", IF_386},\r
    {I_IRETW, 0, {0,0,0}, "\320\1\xCF", IF_8086},\r
    {I_JCXZ, 1, {IMMEDIATE,0,0}, "\310\1\xE3\50", IF_8086},\r
    {I_JECXZ, 1, {IMMEDIATE,0,0}, "\311\1\xE3\50", IF_386},\r
    {I_JMP, 1, {IMMEDIATE|SHORT,0,0}, "\1\xEB\50", IF_8086},\r
    {I_JMP, 1, {IMMEDIATE,0,0}, "\322\1\xE9\64", IF_8086},\r
    {I_JMP, 1, {IMMEDIATE|BITS16,0,0}, "\320\1\xE9\64", IF_8086},\r
    {I_JMP, 1, {IMMEDIATE|BITS32,0,0}, "\321\1\xE9\64", IF_386},\r
    {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE,0}, "\322\1\xEA\35\30", IF_8086},\r
    {I_JMP, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0}, "\320\1\xEA\31\30", IF_8086},\r
    {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0}, "\320\1\xEA\31\30", IF_8086},\r
    {I_JMP, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0}, "\321\1\xEA\41\30", IF_386},\r
    {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0}, "\321\1\xEA\41\30", IF_386},\r
    {I_JMP, 1, {MEMORY|FAR,0,0}, "\322\300\1\xFF\205", IF_8086},\r
    {I_JMP, 1, {MEMORY|BITS16|FAR,0,0}, "\320\300\1\xFF\205", IF_8086},\r
    {I_JMP, 1, {MEMORY|BITS32|FAR,0,0}, "\321\300\1\xFF\205", IF_386},\r
    {I_JMP, 1, {MEMORY|NEAR,0,0}, "\322\300\1\xFF\204", IF_8086},\r
    {I_JMP, 1, {MEMORY|BITS16|NEAR,0,0}, "\320\300\1\xFF\204", IF_8086},\r
    {I_JMP, 1, {MEMORY|BITS32|NEAR,0,0}, "\321\300\1\xFF\204", IF_386},\r
    {I_JMP, 1, {REG16,0,0}, "\320\300\1\xFF\204", IF_8086},\r
    {I_JMP, 1, {REG32,0,0}, "\321\300\1\xFF\204", IF_386},\r
    {I_JMP, 1, {MEMORY,0,0}, "\322\300\1\xFF\204", IF_8086},\r
    {I_JMP, 1, {MEMORY|BITS16,0,0}, "\320\300\1\xFF\204", IF_8086},\r
    {I_JMP, 1, {MEMORY|BITS32,0,0}, "\321\300\1\xFF\204", IF_386},\r
    {I_JMPE, 1, {IMMEDIATE,0,0}, "\322\2\x0F\xB8\64", IF_IA64},\r
    {I_JMPE, 1, {IMMEDIATE|BITS16,0,0}, "\320\2\x0F\xB8\64", IF_IA64},\r
    {I_JMPE, 1, {IMMEDIATE|BITS32,0,0}, "\321\2\x0F\xB8\64", IF_IA64},\r
    {I_JMPE, 1, {REGMEM|BITS16,0,0}, "\320\2\x0F\x00\206", IF_IA64},\r
    {I_JMPE, 1, {REGMEM|BITS32,0,0}, "\321\2\x0F\x00\206", IF_IA64},\r
    {I_LAHF, 0, {0,0,0}, "\1\x9F", IF_8086},\r
    {I_LAR, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\x02\110", IF_286|IF_PROT|IF_SM},\r
    {I_LAR, 2, {REG16,REG16,0}, "\320\2\x0F\x02\110", IF_286|IF_PROT},\r
    {I_LAR, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\x02\110", IF_386|IF_PROT|IF_SM},\r
    {I_LAR, 2, {REG32,REG32,0}, "\321\2\x0F\x02\110", IF_386|IF_PROT},\r
    {I_LDS, 2, {REG16,MEMORY,0}, "\320\301\1\xC5\110", IF_8086},\r
    {I_LDS, 2, {REG32,MEMORY,0}, "\321\301\1\xC5\110", IF_386},\r
    {I_LEA, 2, {REG16,MEMORY,0}, "\320\301\1\x8D\110", IF_8086},\r
    {I_LEA, 2, {REG32,MEMORY,0}, "\321\301\1\x8D\110", IF_386},\r
    {I_LEAVE, 0, {0,0,0}, "\1\xC9", IF_186},\r
    {I_LES, 2, {REG16,MEMORY,0}, "\320\301\1\xC4\110", IF_8086},\r
    {I_LES, 2, {REG32,MEMORY,0}, "\321\301\1\xC4\110", IF_386},\r
    {I_LFS, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xB4\110", IF_386},\r
    {I_LFS, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xB4\110", IF_386},\r
    {I_LGDT, 1, {MEMORY,0,0}, "\300\2\x0F\x01\202", IF_286|IF_PRIV},\r
    {I_LGS, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xB5\110", IF_386},\r
    {I_LGS, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xB5\110", IF_386},\r
    {I_LIDT, 1, {MEMORY,0,0}, "\300\2\x0F\x01\203", IF_286|IF_PRIV},\r
    {I_LLDT, 1, {MEMORY,0,0}, "\300\1\x0F\17\202", IF_286|IF_PROT|IF_PRIV},\r
    {I_LLDT, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\202", IF_286|IF_PROT|IF_PRIV},\r
    {I_LLDT, 1, {REG16,0,0}, "\1\x0F\17\202", IF_286|IF_PROT|IF_PRIV},\r
    {I_LMSW, 1, {MEMORY,0,0}, "\300\2\x0F\x01\206", IF_286|IF_PRIV},\r
    {I_LMSW, 1, {MEMORY|BITS16,0,0}, "\300\2\x0F\x01\206", IF_286|IF_PRIV},\r
    {I_LMSW, 1, {REG16,0,0}, "\2\x0F\x01\206", IF_286|IF_PRIV},\r
    {I_LOADALL, 0, {0,0,0}, "\2\x0F\x07", IF_386|IF_UNDOC},\r
    {I_LOADALL286, 0, {0,0,0}, "\2\x0F\x05", IF_286|IF_UNDOC},\r
    {I_LODSB, 0, {0,0,0}, "\1\xAC", IF_8086},\r
    {I_LODSD, 0, {0,0,0}, "\321\1\xAD", IF_386},\r
    {I_LODSW, 0, {0,0,0}, "\320\1\xAD", IF_8086},\r
    {I_LOOP, 1, {IMMEDIATE,0,0}, "\312\1\xE2\50", IF_8086},\r
    {I_LOOP, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE2\50", IF_8086},\r
    {I_LOOP, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE2\50", IF_386},\r
    {I_LOOPE, 1, {IMMEDIATE,0,0}, "\312\1\xE1\50", IF_8086},\r
    {I_LOOPE, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE1\50", IF_8086},\r
    {I_LOOPE, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE1\50", IF_386},\r
    {I_LOOPNE, 1, {IMMEDIATE,0,0}, "\312\1\xE0\50", IF_8086},\r
    {I_LOOPNE, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE0\50", IF_8086},\r
    {I_LOOPNE, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE0\50", IF_386},\r
    {I_LOOPNZ, 1, {IMMEDIATE,0,0}, "\312\1\xE0\50", IF_8086},\r
    {I_LOOPNZ, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE0\50", IF_8086},\r
    {I_LOOPNZ, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE0\50", IF_386},\r
    {I_LOOPZ, 1, {IMMEDIATE,0,0}, "\312\1\xE1\50", IF_8086},\r
    {I_LOOPZ, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE1\50", IF_8086},\r
    {I_LOOPZ, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE1\50", IF_386},\r
    {I_LSL, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\x03\110", IF_286|IF_PROT|IF_SM},\r
    {I_LSL, 2, {REG16,REG16,0}, "\320\2\x0F\x03\110", IF_286|IF_PROT},\r
    {I_LSL, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\x03\110", IF_386|IF_PROT|IF_SM},\r
    {I_LSL, 2, {REG32,REG32,0}, "\321\2\x0F\x03\110", IF_386|IF_PROT},\r
    {I_LSS, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xB2\110", IF_386},\r
    {I_LSS, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xB2\110", IF_386},\r
    {I_LTR, 1, {MEMORY,0,0}, "\300\1\x0F\17\203", IF_286|IF_PROT|IF_PRIV},\r
    {I_LTR, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\203", IF_286|IF_PROT|IF_PRIV},\r
    {I_LTR, 1, {REG16,0,0}, "\1\x0F\17\203", IF_286|IF_PROT|IF_PRIV},\r
    {I_MONITOR, 0, {0,0,0}, "\3\x0F\x01\xC8", IF_PRESCOTT},\r
    {I_MOV, 2, {MEMORY,REG_SREG,0}, "\300\1\x8C\101", IF_8086|IF_SM},\r
    {I_MOV, 2, {REG16,REG_SREG,0}, "\320\1\x8C\101", IF_8086},\r
    {I_MOV, 2, {REG32,REG_SREG,0}, "\321\1\x8C\101", IF_386},\r
    {I_MOV, 2, {REG_SREG,MEMORY,0}, "\301\1\x8E\110", IF_8086|IF_SM},\r
    {I_MOV, 2, {REG_SREG,REG16,0}, "\1\x8E\110", IF_8086},\r
    {I_MOV, 2, {REG_SREG,REG32,0}, "\1\x8E\110", IF_386},\r
    {I_MOV, 2, {REG_AL,MEM_OFFS,0}, "\301\1\xA0\45", IF_8086|IF_SM},\r
    {I_MOV, 2, {REG_AX,MEM_OFFS,0}, "\301\320\1\xA1\45", IF_8086|IF_SM},\r
    {I_MOV, 2, {REG_EAX,MEM_OFFS,0}, "\301\321\1\xA1\45", IF_386|IF_SM},\r
    {I_MOV, 2, {MEM_OFFS,REG_AL,0}, "\300\1\xA2\44", IF_8086|IF_SM},\r
    {I_MOV, 2, {MEM_OFFS,REG_AX,0}, "\300\320\1\xA3\44", IF_8086|IF_SM},\r
    {I_MOV, 2, {MEM_OFFS,REG_EAX,0}, "\300\321\1\xA3\44", IF_386|IF_SM},\r
    {I_MOV, 2, {REG32,REG_CREG,0}, "\2\x0F\x20\101", IF_386|IF_PRIV},\r
    {I_MOV, 2, {REG32,REG_DREG,0}, "\2\x0F\x21\101", IF_386|IF_PRIV},\r
    {I_MOV, 2, {REG32,REG_TREG,0}, "\2\x0F\x24\101", IF_386|IF_PRIV},\r
    {I_MOV, 2, {REG_CREG,REG32,0}, "\2\x0F\x22\110", IF_386|IF_PRIV},\r
    {I_MOV, 2, {REG_DREG,REG32,0}, "\2\x0F\x23\110", IF_386|IF_PRIV},\r
    {I_MOV, 2, {REG_TREG,REG32,0}, "\2\x0F\x26\110", IF_386|IF_PRIV},\r
    {I_MOV, 2, {MEMORY,REG8,0}, "\300\1\x88\101", IF_8086|IF_SM},\r
    {I_MOV, 2, {REG8,REG8,0}, "\1\x88\101", IF_8086},\r
    {I_MOV, 2, {MEMORY,REG16,0}, "\320\300\1\x89\101", IF_8086|IF_SM},\r
    {I_MOV, 2, {REG16,REG16,0}, "\320\1\x89\101", IF_8086},\r
    {I_MOV, 2, {MEMORY,REG32,0}, "\321\300\1\x89\101", IF_386|IF_SM},\r
    {I_MOV, 2, {REG32,REG32,0}, "\321\1\x89\101", IF_386},\r
    {I_MOV, 2, {REG8,MEMORY,0}, "\301\1\x8A\110", IF_8086|IF_SM},\r
    {I_MOV, 2, {REG8,REG8,0}, "\1\x8A\110", IF_8086},\r
    {I_MOV, 2, {REG16,MEMORY,0}, "\320\301\1\x8B\110", IF_8086|IF_SM},\r
    {I_MOV, 2, {REG16,REG16,0}, "\320\1\x8B\110", IF_8086},\r
    {I_MOV, 2, {REG32,MEMORY,0}, "\321\301\1\x8B\110", IF_386|IF_SM},\r
    {I_MOV, 2, {REG32,REG32,0}, "\321\1\x8B\110", IF_386},\r
    {I_MOV, 2, {REG8,IMMEDIATE,0}, "\10\xB0\21", IF_8086|IF_SM},\r
    {I_MOV, 2, {REG16,IMMEDIATE,0}, "\320\10\xB8\31", IF_8086|IF_SM},\r
    {I_MOV, 2, {REG32,IMMEDIATE,0}, "\321\10\xB8\41", IF_386|IF_SM},\r
    {I_MOV, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC6\200\21", IF_8086|IF_SM},\r
    {I_MOV, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC7\200\31", IF_8086|IF_SM},\r
    {I_MOV, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC7\200\41", IF_386|IF_SM},\r
    {I_MOV, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\xC6\200\21", IF_8086|IF_SM},\r
    {I_MOV, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\1\xC7\200\31", IF_8086|IF_SM},\r
    {I_MOV, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\1\xC7\200\41", IF_386|IF_SM},\r
    {I_MOVD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x6E\110", IF_PENT|IF_MMX|IF_SD},\r
    {I_MOVD, 2, {MMXREG,REG32,0}, "\2\x0F\x6E\110", IF_PENT|IF_MMX},\r
    {I_MOVD, 2, {MEMORY,MMXREG,0}, "\300\2\x0F\x7E\101", IF_PENT|IF_MMX|IF_SD},\r
    {I_MOVD, 2, {REG32,MMXREG,0}, "\2\x0F\x7E\101", IF_PENT|IF_MMX},\r
    {I_MOVQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x6F\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_MOVQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x6F\110", IF_PENT|IF_MMX},\r
    {I_MOVQ, 2, {MEMORY,MMXREG,0}, "\300\2\x0F\x7F\101", IF_PENT|IF_MMX|IF_SM},\r
    {I_MOVQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x7F\101", IF_PENT|IF_MMX},\r
    {I_MOVSB, 0, {0,0,0}, "\1\xA4", IF_8086},\r
    {I_MOVSD, 0, {0,0,0}, "\321\1\xA5", IF_386},\r
    {I_MOVSW, 0, {0,0,0}, "\320\1\xA5", IF_8086},\r
    {I_MOVSX, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xBE\110", IF_386|IF_SB},\r
    {I_MOVSX, 2, {REG16,REG8,0}, "\320\2\x0F\xBE\110", IF_386},\r
    {I_MOVSX, 2, {REG32,REGMEM|BITS8,0}, "\321\301\2\x0F\xBE\110", IF_386},\r
    {I_MOVSX, 2, {REG32,REGMEM|BITS16,0}, "\321\301\2\x0F\xBF\110", IF_386},\r
    {I_MOVZX, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xB6\110", IF_386|IF_SB},\r
    {I_MOVZX, 2, {REG16,REG8,0}, "\320\2\x0F\xB6\110", IF_386},\r
    {I_MOVZX, 2, {REG32,REGMEM|BITS8,0}, "\321\301\2\x0F\xB6\110", IF_386},\r
    {I_MOVZX, 2, {REG32,REGMEM|BITS16,0}, "\321\301\2\x0F\xB7\110", IF_386},\r
    {I_MUL, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\204", IF_8086},\r
    {I_MUL, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\204", IF_8086},\r
    {I_MUL, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\204", IF_386},\r
    {I_MWAIT, 0, {0,0,0}, "\3\x0F\x01\xC9", IF_PRESCOTT},\r
    {I_NEG, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\203", IF_8086},\r
    {I_NEG, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\203", IF_8086},\r
    {I_NEG, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\203", IF_386},\r
    {I_NOP, 0, {0,0,0}, "\1\x90", IF_8086},\r
    {I_NOT, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\202", IF_8086},\r
    {I_NOT, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\202", IF_8086},\r
    {I_NOT, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\202", IF_386},\r
    {I_OR, 2, {MEMORY,REG8,0}, "\300\1\x08\101", IF_8086|IF_SM},\r
    {I_OR, 2, {REG8,REG8,0}, "\1\x08\101", IF_8086},\r
    {I_OR, 2, {MEMORY,REG16,0}, "\320\300\1\x09\101", IF_8086|IF_SM},\r
    {I_OR, 2, {REG16,REG16,0}, "\320\1\x09\101", IF_8086},\r
    {I_OR, 2, {MEMORY,REG32,0}, "\321\300\1\x09\101", IF_386|IF_SM},\r
    {I_OR, 2, {REG32,REG32,0}, "\321\1\x09\101", IF_386},\r
    {I_OR, 2, {REG8,MEMORY,0}, "\301\1\x0A\110", IF_8086|IF_SM},\r
    {I_OR, 2, {REG8,REG8,0}, "\1\x0A\110", IF_8086},\r
    {I_OR, 2, {REG16,MEMORY,0}, "\320\301\1\x0B\110", IF_8086|IF_SM},\r
    {I_OR, 2, {REG16,REG16,0}, "\320\1\x0B\110", IF_8086},\r
    {I_OR, 2, {REG32,MEMORY,0}, "\321\301\1\x0B\110", IF_386|IF_SM},\r
    {I_OR, 2, {REG32,REG32,0}, "\321\1\x0B\110", IF_386},\r
    {I_OR, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\201\15", IF_8086},\r
    {I_OR, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\201\15", IF_386},\r
    {I_OR, 2, {REG_AL,IMMEDIATE,0}, "\1\x0C\21", IF_8086|IF_SM},\r
    {I_OR, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x0D\31", IF_8086|IF_SM},\r
    {I_OR, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x0D\41", IF_386|IF_SM},\r
    {I_OR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\201\21", IF_8086|IF_SM},\r
    {I_OR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\201\131", IF_8086|IF_SM},\r
    {I_OR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\201\141", IF_386|IF_SM},\r
    {I_OR, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\201\21", IF_8086|IF_SM},\r
    {I_OR, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\201\131", IF_8086|IF_SM},\r
    {I_OR, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\201\141", IF_386|IF_SM},\r
    {I_OUT, 2, {IMMEDIATE,REG_AL,0}, "\1\xE6\24", IF_8086|IF_SB},\r
    {I_OUT, 2, {IMMEDIATE,REG_AX,0}, "\320\1\xE7\24", IF_8086|IF_SB},\r
    {I_OUT, 2, {IMMEDIATE,REG_EAX,0}, "\321\1\xE7\24", IF_386|IF_SB},\r
    {I_OUT, 2, {REG_DX,REG_AL,0}, "\1\xEE", IF_8086},\r
    {I_OUT, 2, {REG_DX,REG_AX,0}, "\320\1\xEF", IF_8086},\r
    {I_OUT, 2, {REG_DX,REG_EAX,0}, "\321\1\xEF", IF_386},\r
    {I_OUTSB, 0, {0,0,0}, "\1\x6E", IF_186},\r
    {I_OUTSD, 0, {0,0,0}, "\321\1\x6F", IF_386},\r
    {I_OUTSW, 0, {0,0,0}, "\320\1\x6F", IF_186},\r
    {I_PACKSSDW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x6B\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PACKSSDW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x6B\110", IF_PENT|IF_MMX},\r
    {I_PACKSSWB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x63\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PACKSSWB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x63\110", IF_PENT|IF_MMX},\r
    {I_PACKUSWB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x67\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PACKUSWB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x67\110", IF_PENT|IF_MMX},\r
    {I_PADDB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFC\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PADDB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFC\110", IF_PENT|IF_MMX},\r
    {I_PADDD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFE\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PADDD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFE\110", IF_PENT|IF_MMX},\r
    {I_PADDSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEC\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PADDSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEC\110", IF_PENT|IF_MMX},\r
    {I_PADDSIW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x51\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r
    {I_PADDSIW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x51\110", IF_PENT|IF_MMX|IF_CYRIX},\r
    {I_PADDSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xED\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PADDSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xED\110", IF_PENT|IF_MMX},\r
    {I_PADDUSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDC\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PADDUSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDC\110", IF_PENT|IF_MMX},\r
    {I_PADDUSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDD\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PADDUSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDD\110", IF_PENT|IF_MMX},\r
    {I_PADDW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFD\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PADDW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFD\110", IF_PENT|IF_MMX},\r
    {I_PAND, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDB\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PAND, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDB\110", IF_PENT|IF_MMX},\r
    {I_PANDN, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDF\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PANDN, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDF\110", IF_PENT|IF_MMX},\r
    {I_PAVEB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x50\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r
    {I_PAVEB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x50\110", IF_PENT|IF_MMX|IF_CYRIX},\r
    {I_PAVGUSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xBF", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PAVGUSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xBF", IF_PENT|IF_3DNOW},\r
    {I_PCMPEQB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x74\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PCMPEQB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x74\110", IF_PENT|IF_MMX},\r
    {I_PCMPEQD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x76\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PCMPEQD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x76\110", IF_PENT|IF_MMX},\r
    {I_PCMPEQW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x75\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PCMPEQW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x75\110", IF_PENT|IF_MMX},\r
    {I_PCMPGTB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x64\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PCMPGTB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x64\110", IF_PENT|IF_MMX},\r
    {I_PCMPGTD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x66\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PCMPGTD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x66\110", IF_PENT|IF_MMX},\r
    {I_PCMPGTW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x65\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PCMPGTW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x65\110", IF_PENT|IF_MMX},\r
    {I_PDISTIB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x54\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r
    {I_PF2ID, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x1D", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PF2ID, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x1D", IF_PENT|IF_3DNOW},\r
    {I_PFACC, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xAE", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PFACC, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xAE", IF_PENT|IF_3DNOW},\r
    {I_PFADD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x9E", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PFADD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x9E", IF_PENT|IF_3DNOW},\r
    {I_PFCMPEQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xB0", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PFCMPEQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xB0", IF_PENT|IF_3DNOW},\r
    {I_PFCMPGE, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x90", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PFCMPGE, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x90", IF_PENT|IF_3DNOW},\r
    {I_PFCMPGT, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xA0", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PFCMPGT, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xA0", IF_PENT|IF_3DNOW},\r
    {I_PFMAX, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xA4", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PFMAX, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xA4", IF_PENT|IF_3DNOW},\r
    {I_PFMIN, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x94", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PFMIN, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x94", IF_PENT|IF_3DNOW},\r
    {I_PFMUL, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xB4", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PFMUL, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xB4", IF_PENT|IF_3DNOW},\r
    {I_PFRCP, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x96", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PFRCP, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x96", IF_PENT|IF_3DNOW},\r
    {I_PFRCPIT1, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xA6", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PFRCPIT1, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xA6", IF_PENT|IF_3DNOW},\r
    {I_PFRCPIT2, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xB6", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PFRCPIT2, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xB6", IF_PENT|IF_3DNOW},\r
    {I_PFRSQIT1, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xA7", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PFRSQIT1, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xA7", IF_PENT|IF_3DNOW},\r
    {I_PFRSQRT, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x97", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PFRSQRT, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x97", IF_PENT|IF_3DNOW},\r
    {I_PFSUB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x9A", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PFSUB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x9A", IF_PENT|IF_3DNOW},\r
    {I_PFSUBR, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xAA", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PFSUBR, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xAA", IF_PENT|IF_3DNOW},\r
    {I_PI2FD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x0D", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PI2FD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x0D", IF_PENT|IF_3DNOW},\r
    {I_PMACHRIW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5E\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r
    {I_PMADDWD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF5\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PMADDWD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF5\110", IF_PENT|IF_MMX},\r
    {I_PMAGW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x52\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r
    {I_PMAGW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x52\110", IF_PENT|IF_MMX|IF_CYRIX},\r
    {I_PMULHRIW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5D\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r
    {I_PMULHRIW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x5D\110", IF_PENT|IF_MMX|IF_CYRIX},\r
    {I_PMULHRWA, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\1\xB7", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PMULHRWA, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\1\xB7", IF_PENT|IF_3DNOW},\r
    {I_PMULHRWC, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x59\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r
    {I_PMULHRWC, 2, {MMXREG,MMXREG,0}, "\2\x0F\x59\110", IF_PENT|IF_MMX|IF_CYRIX},\r
    {I_PMULHW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE5\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PMULHW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE5\110", IF_PENT|IF_MMX},\r
    {I_PMULLW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD5\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PMULLW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD5\110", IF_PENT|IF_MMX},\r
    {I_PMVGEZB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5C\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r
    {I_PMVLZB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5B\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r
    {I_PMVNZB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5A\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r
    {I_PMVZB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x58\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r
    {I_POP, 1, {REG16,0,0}, "\320\10\x58", IF_8086},\r
    {I_POP, 1, {REG32,0,0}, "\321\10\x58", IF_386},\r
    {I_POP, 1, {REGMEM|BITS16,0,0}, "\320\300\1\x8F\200", IF_8086},\r
    {I_POP, 1, {REGMEM|BITS32,0,0}, "\321\300\1\x8F\200", IF_386},\r
    {I_POP, 1, {REG_DESS,0,0}, "\4", IF_8086},\r
    {I_POP, 1, {REG_FSGS,0,0}, "\1\x0F\5", IF_386},\r
    {I_POPA, 0, {0,0,0}, "\322\1\x61", IF_186},\r
    {I_POPAD, 0, {0,0,0}, "\321\1\x61", IF_386},\r
    {I_POPAW, 0, {0,0,0}, "\320\1\x61", IF_186},\r
    {I_POPF, 0, {0,0,0}, "\322\1\x9D", IF_8086},\r
    {I_POPFD, 0, {0,0,0}, "\321\1\x9D", IF_386},\r
    {I_POPFW, 0, {0,0,0}, "\320\1\x9D", IF_8086},\r
    {I_POR, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEB\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_POR, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEB\110", IF_PENT|IF_MMX},\r
    {I_PREFETCH, 1, {MEMORY,0,0}, "\2\x0F\x0D\200", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PREFETCHW, 1, {MEMORY,0,0}, "\2\x0F\x0D\201", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PSLLD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF2\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PSLLD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF2\110", IF_PENT|IF_MMX},\r
    {I_PSLLD, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x72\206\25", IF_PENT|IF_MMX},\r
    {I_PSLLQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF3\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PSLLQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF3\110", IF_PENT|IF_MMX},\r
    {I_PSLLQ, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x73\206\25", IF_PENT|IF_MMX},\r
    {I_PSLLW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF1\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PSLLW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF1\110", IF_PENT|IF_MMX},\r
    {I_PSLLW, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x71\206\25", IF_PENT|IF_MMX},\r
    {I_PSRAD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE2\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PSRAD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE2\110", IF_PENT|IF_MMX},\r
    {I_PSRAD, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x72\204\25", IF_PENT|IF_MMX},\r
    {I_PSRAW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE1\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PSRAW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE1\110", IF_PENT|IF_MMX},\r
    {I_PSRAW, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x71\204\25", IF_PENT|IF_MMX},\r
    {I_PSRLD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD2\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PSRLD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD2\110", IF_PENT|IF_MMX},\r
    {I_PSRLD, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x72\202\25", IF_PENT|IF_MMX},\r
    {I_PSRLQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD3\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PSRLQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD3\110", IF_PENT|IF_MMX},\r
    {I_PSRLQ, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x73\202\25", IF_PENT|IF_MMX},\r
    {I_PSRLW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD1\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PSRLW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD1\110", IF_PENT|IF_MMX},\r
    {I_PSRLW, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x71\202\25", IF_PENT|IF_MMX},\r
    {I_PSUBB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF8\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PSUBB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF8\110", IF_PENT|IF_MMX},\r
    {I_PSUBD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFA\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PSUBD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFA\110", IF_PENT|IF_MMX},\r
    {I_PSUBSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE8\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PSUBSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE8\110", IF_PENT|IF_MMX},\r
    {I_PSUBSIW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x55\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX},\r
    {I_PSUBSIW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x55\110", IF_PENT|IF_MMX|IF_CYRIX},\r
    {I_PSUBSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE9\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PSUBSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE9\110", IF_PENT|IF_MMX},\r
    {I_PSUBUSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD8\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PSUBUSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD8\110", IF_PENT|IF_MMX},\r
    {I_PSUBUSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD9\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PSUBUSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD9\110", IF_PENT|IF_MMX},\r
    {I_PSUBW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF9\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PSUBW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF9\110", IF_PENT|IF_MMX},\r
    {I_PUNPCKHBW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x68\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PUNPCKHBW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x68\110", IF_PENT|IF_MMX},\r
    {I_PUNPCKHDQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x6A\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PUNPCKHDQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x6A\110", IF_PENT|IF_MMX},\r
    {I_PUNPCKHWD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x69\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PUNPCKHWD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x69\110", IF_PENT|IF_MMX},\r
    {I_PUNPCKLBW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x60\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PUNPCKLBW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x60\110", IF_PENT|IF_MMX},\r
    {I_PUNPCKLDQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x62\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PUNPCKLDQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x62\110", IF_PENT|IF_MMX},\r
    {I_PUNPCKLWD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x61\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PUNPCKLWD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x61\110", IF_PENT|IF_MMX},\r
    {I_PUSH, 1, {REG16,0,0}, "\320\10\x50", IF_8086},\r
    {I_PUSH, 1, {REG32,0,0}, "\321\10\x50", IF_386},\r
    {I_PUSH, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xFF\206", IF_8086},\r
    {I_PUSH, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xFF\206", IF_386},\r
    {I_PUSH, 1, {REG_CS,0,0}, "\6", IF_8086},\r
    {I_PUSH, 1, {REG_DESS,0,0}, "\6", IF_8086},\r
    {I_PUSH, 1, {REG_FSGS,0,0}, "\1\x0F\7", IF_386},\r
    {I_PUSH, 1, {IMMEDIATE|BITS8,0,0}, "\1\x6A\14", IF_186},\r
    {I_PUSH, 1, {IMMEDIATE|BITS16,0,0}, "\320\133\1\x68\130", IF_186},\r
    {I_PUSH, 1, {IMMEDIATE|BITS32,0,0}, "\321\143\1\x68\140", IF_386},\r
    {I_PUSH, 1, {IMMEDIATE,0,0}, "\1\x68\34", IF_186},\r
    {I_PUSHA, 0, {0,0,0}, "\322\1\x60", IF_186},\r
    {I_PUSHAD, 0, {0,0,0}, "\321\1\x60", IF_386},\r
    {I_PUSHAW, 0, {0,0,0}, "\320\1\x60", IF_186},\r
    {I_PUSHF, 0, {0,0,0}, "\322\1\x9C", IF_8086},\r
    {I_PUSHFD, 0, {0,0,0}, "\321\1\x9C", IF_386},\r
    {I_PUSHFW, 0, {0,0,0}, "\320\1\x9C", IF_8086},\r
    {I_PXOR, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEF\110", IF_PENT|IF_MMX|IF_SM},\r
    {I_PXOR, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEF\110", IF_PENT|IF_MMX},\r
    {I_RCL, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\202", IF_8086},\r
    {I_RCL, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\202", IF_8086},\r
    {I_RCL, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\202\25", IF_186|IF_SB},\r
    {I_RCL, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\202", IF_8086},\r
    {I_RCL, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\202", IF_8086},\r
    {I_RCL, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\202\25", IF_186|IF_SB},\r
    {I_RCL, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\202", IF_386},\r
    {I_RCL, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\202", IF_386},\r
    {I_RCL, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\202\25", IF_386|IF_SB},\r
    {I_RCR, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\203", IF_8086},\r
    {I_RCR, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\203", IF_8086},\r
    {I_RCR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\203\25", IF_186|IF_SB},\r
    {I_RCR, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\203", IF_8086},\r
    {I_RCR, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\203", IF_8086},\r
    {I_RCR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\203\25", IF_186|IF_SB},\r
    {I_RCR, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\203", IF_386},\r
    {I_RCR, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\203", IF_386},\r
    {I_RCR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\203\25", IF_386|IF_SB},\r
    {I_RDSHR, 1, {REGMEM|BITS32,0,0}, "\321\300\2\x0F\x36\200", IF_P6|IF_CYRIX|IF_SMM},\r
    {I_RDMSR, 0, {0,0,0}, "\2\x0F\x32", IF_PENT|IF_PRIV},\r
    {I_RDPMC, 0, {0,0,0}, "\2\x0F\x33", IF_P6},\r
    {I_RDTSC, 0, {0,0,0}, "\2\x0F\x31", IF_PENT},\r
    {I_RESB, 1, {IMMEDIATE,0,0}, "\340", IF_8086},\r
    {I_RET, 0, {0,0,0}, "\1\xC3", IF_8086},\r
    {I_RET, 1, {IMMEDIATE,0,0}, "\1\xC2\30", IF_8086|IF_SW},\r
    {I_RETF, 0, {0,0,0}, "\1\xCB", IF_8086},\r
    {I_RETF, 1, {IMMEDIATE,0,0}, "\1\xCA\30", IF_8086|IF_SW},\r
    {I_RETN, 0, {0,0,0}, "\1\xC3", IF_8086},\r
    {I_RETN, 1, {IMMEDIATE,0,0}, "\1\xC2\30", IF_8086|IF_SW},\r
    {I_ROL, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\200", IF_8086},\r
    {I_ROL, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\200", IF_8086},\r
    {I_ROL, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\200\25", IF_186|IF_SB},\r
    {I_ROL, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\200", IF_8086},\r
    {I_ROL, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\200", IF_8086},\r
    {I_ROL, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\200\25", IF_186|IF_SB},\r
    {I_ROL, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\200", IF_386},\r
    {I_ROL, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\200", IF_386},\r
    {I_ROL, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\200\25", IF_386|IF_SB},\r
    {I_ROR, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\201", IF_8086},\r
    {I_ROR, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\201", IF_8086},\r
    {I_ROR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\201\25", IF_186|IF_SB},\r
    {I_ROR, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\201", IF_8086},\r
    {I_ROR, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\201", IF_8086},\r
    {I_ROR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\201\25", IF_186|IF_SB},\r
    {I_ROR, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\201", IF_386},\r
    {I_ROR, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\201", IF_386},\r
    {I_ROR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\201\25", IF_386|IF_SB},\r
    {I_RSDC, 2, {REG_SREG,MEMORY|BITS80,0}, "\301\2\x0F\x79\110", IF_486|IF_CYRIX|IF_SMM},\r
    {I_RSLDT, 1, {MEMORY|BITS80,0,0}, "\300\2\x0F\x7B\200", IF_486|IF_CYRIX|IF_SMM},\r
    {I_RSM, 0, {0,0,0}, "\2\x0F\xAA", IF_PENT|IF_SMM},\r
    {I_RSTS, 1, {MEMORY|BITS80,0,0}, "\300\2\x0F\x7D\200", IF_486|IF_CYRIX|IF_SMM},\r
    {I_SAHF, 0, {0,0,0}, "\1\x9E", IF_8086},\r
    {I_SALC, 0, {0,0,0}, "\1\xD6", IF_8086|IF_UNDOC},\r
    {I_SAR, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\207", IF_8086},\r
    {I_SAR, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\207", IF_8086},\r
    {I_SAR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\207\25", IF_186|IF_SB},\r
    {I_SAR, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\207", IF_8086},\r
    {I_SAR, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\207", IF_8086},\r
    {I_SAR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\207\25", IF_186|IF_SB},\r
    {I_SAR, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\207", IF_386},\r
    {I_SAR, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\207", IF_386},\r
    {I_SAR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\207\25", IF_386|IF_SB},\r
    {I_SBB, 2, {MEMORY,REG8,0}, "\300\1\x18\101", IF_8086|IF_SM},\r
    {I_SBB, 2, {REG8,REG8,0}, "\1\x18\101", IF_8086},\r
    {I_SBB, 2, {MEMORY,REG16,0}, "\320\300\1\x19\101", IF_8086|IF_SM},\r
    {I_SBB, 2, {REG16,REG16,0}, "\320\1\x19\101", IF_8086},\r
    {I_SBB, 2, {MEMORY,REG32,0}, "\321\300\1\x19\101", IF_386|IF_SM},\r
    {I_SBB, 2, {REG32,REG32,0}, "\321\1\x19\101", IF_386},\r
    {I_SBB, 2, {REG8,MEMORY,0}, "\301\1\x1A\110", IF_8086|IF_SM},\r
    {I_SBB, 2, {REG8,REG8,0}, "\1\x1A\110", IF_8086},\r
    {I_SBB, 2, {REG16,MEMORY,0}, "\320\301\1\x1B\110", IF_8086|IF_SM},\r
    {I_SBB, 2, {REG16,REG16,0}, "\320\1\x1B\110", IF_8086},\r
    {I_SBB, 2, {REG32,MEMORY,0}, "\321\301\1\x1B\110", IF_386|IF_SM},\r
    {I_SBB, 2, {REG32,REG32,0}, "\321\1\x1B\110", IF_386},\r
    {I_SBB, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\203\15", IF_8086},\r
    {I_SBB, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\203\15", IF_386},\r
    {I_SBB, 2, {REG_AL,IMMEDIATE,0}, "\1\x1C\21", IF_8086|IF_SM},\r
    {I_SBB, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x1D\31", IF_8086|IF_SM},\r
    {I_SBB, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x1D\41", IF_386|IF_SM},\r
    {I_SBB, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\203\21", IF_8086|IF_SM},\r
    {I_SBB, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\203\131", IF_8086|IF_SM},\r
    {I_SBB, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\203\141", IF_386|IF_SM},\r
    {I_SBB, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\203\21", IF_8086|IF_SM},\r
    {I_SBB, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\203\131", IF_8086|IF_SM},\r
    {I_SBB, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\203\141", IF_386|IF_SM},\r
    {I_SCASB, 0, {0,0,0}, "\332\1\xAE", IF_8086},\r
    {I_SCASD, 0, {0,0,0}, "\332\321\1\xAF", IF_386},\r
    {I_SCASW, 0, {0,0,0}, "\332\320\1\xAF", IF_8086},\r
    {I_SGDT, 1, {MEMORY,0,0}, "\300\2\x0F\x01\200", IF_286},\r
    {I_SHL, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\204", IF_8086},\r
    {I_SHL, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\204", IF_8086},\r
    {I_SHL, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\204\25", IF_186|IF_SB},\r
    {I_SHL, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\204", IF_8086},\r
    {I_SHL, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\204", IF_8086},\r
    {I_SHL, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\204\25", IF_186|IF_SB},\r
    {I_SHL, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\204", IF_386},\r
    {I_SHL, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\204", IF_386},\r
    {I_SHL, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\204\25", IF_386|IF_SB},\r
    {I_SHLD, 3, {MEMORY,REG16,IMMEDIATE}, "\300\320\2\x0F\xA4\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r
    {I_SHLD, 3, {REG16,REG16,IMMEDIATE}, "\320\2\x0F\xA4\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r
    {I_SHLD, 3, {MEMORY,REG32,IMMEDIATE}, "\300\321\2\x0F\xA4\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r
    {I_SHLD, 3, {REG32,REG32,IMMEDIATE}, "\321\2\x0F\xA4\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r
    {I_SHLD, 3, {MEMORY,REG16,REG_CL}, "\300\320\2\x0F\xA5\101", IF_386|IF_SM},\r
    {I_SHLD, 3, {REG16,REG16,REG_CL}, "\320\2\x0F\xA5\101", IF_386},\r
    {I_SHLD, 3, {MEMORY,REG32,REG_CL}, "\300\321\2\x0F\xA5\101", IF_386|IF_SM},\r
    {I_SHLD, 3, {REG32,REG32,REG_CL}, "\321\2\x0F\xA5\101", IF_386},\r
    {I_SHR, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\205", IF_8086},\r
    {I_SHR, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\205", IF_8086},\r
    {I_SHR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\205\25", IF_186|IF_SB},\r
    {I_SHR, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\205", IF_8086},\r
    {I_SHR, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\205", IF_8086},\r
    {I_SHR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\205\25", IF_186|IF_SB},\r
    {I_SHR, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\205", IF_386},\r
    {I_SHR, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\205", IF_386},\r
    {I_SHR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\205\25", IF_386|IF_SB},\r
    {I_SHRD, 3, {MEMORY,REG16,IMMEDIATE}, "\300\320\2\x0F\xAC\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r
    {I_SHRD, 3, {REG16,REG16,IMMEDIATE}, "\320\2\x0F\xAC\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r
    {I_SHRD, 3, {MEMORY,REG32,IMMEDIATE}, "\300\321\2\x0F\xAC\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r
    {I_SHRD, 3, {REG32,REG32,IMMEDIATE}, "\321\2\x0F\xAC\101\26", IF_386|IF_SM2|IF_SB|IF_AR2},\r
    {I_SHRD, 3, {MEMORY,REG16,REG_CL}, "\300\320\2\x0F\xAD\101", IF_386|IF_SM},\r
    {I_SHRD, 3, {REG16,REG16,REG_CL}, "\320\2\x0F\xAD\101", IF_386},\r
    {I_SHRD, 3, {MEMORY,REG32,REG_CL}, "\300\321\2\x0F\xAD\101", IF_386|IF_SM},\r
    {I_SHRD, 3, {REG32,REG32,REG_CL}, "\321\2\x0F\xAD\101", IF_386},\r
    {I_SIDT, 1, {MEMORY,0,0}, "\300\2\x0F\x01\201", IF_286},\r
    {I_SLDT, 1, {MEMORY,0,0}, "\300\1\x0F\17\200", IF_286},\r
    {I_SLDT, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\200", IF_286},\r
    {I_SLDT, 1, {REG16,0,0}, "\320\1\x0F\17\200", IF_286},\r
    {I_SLDT, 1, {REG32,0,0}, "\321\1\x0F\17\200", IF_386},\r
    {I_SMI, 0, {0,0,0}, "\1\xF1", IF_386|IF_UNDOC},\r
    {I_SMINT, 0, {0,0,0}, "\2\x0F\x38", IF_P6|IF_CYRIX},\r
    {I_SMSW, 1, {MEMORY,0,0}, "\300\2\x0F\x01\204", IF_286},\r
    {I_SMSW, 1, {MEMORY|BITS16,0,0}, "\300\2\x0F\x01\204", IF_286},\r
    {I_SMSW, 1, {REG16,0,0}, "\320\2\x0F\x01\204", IF_286},\r
    {I_SMSW, 1, {REG32,0,0}, "\321\2\x0F\x01\204", IF_386},\r
    {I_STC, 0, {0,0,0}, "\1\xF9", IF_8086},\r
    {I_STD, 0, {0,0,0}, "\1\xFD", IF_8086},\r
    {I_STI, 0, {0,0,0}, "\1\xFB", IF_8086},\r
    {I_STOSB, 0, {0,0,0}, "\1\xAA", IF_8086},\r
    {I_STOSD, 0, {0,0,0}, "\321\1\xAB", IF_386},\r
    {I_STOSW, 0, {0,0,0}, "\320\1\xAB", IF_8086},\r
    {I_STR, 1, {MEMORY,0,0}, "\300\1\x0F\17\201", IF_286|IF_PROT},\r
    {I_STR, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\201", IF_286|IF_PROT},\r
    {I_STR, 1, {REG16,0,0}, "\320\1\x0F\17\201", IF_286|IF_PROT},\r
    {I_STR, 1, {REG32,0,0}, "\321\1\x0F\17\201", IF_386|IF_PROT},\r
    {I_SUB, 2, {MEMORY,REG8,0}, "\300\1\x28\101", IF_8086|IF_SM},\r
    {I_SUB, 2, {REG8,REG8,0}, "\1\x28\101", IF_8086},\r
    {I_SUB, 2, {MEMORY,REG16,0}, "\320\300\1\x29\101", IF_8086|IF_SM},\r
    {I_SUB, 2, {REG16,REG16,0}, "\320\1\x29\101", IF_8086},\r
    {I_SUB, 2, {MEMORY,REG32,0}, "\321\300\1\x29\101", IF_386|IF_SM},\r
    {I_SUB, 2, {REG32,REG32,0}, "\321\1\x29\101", IF_386},\r
    {I_SUB, 2, {REG8,MEMORY,0}, "\301\1\x2A\110", IF_8086|IF_SM},\r
    {I_SUB, 2, {REG8,REG8,0}, "\1\x2A\110", IF_8086},\r
    {I_SUB, 2, {REG16,MEMORY,0}, "\320\301\1\x2B\110", IF_8086|IF_SM},\r
    {I_SUB, 2, {REG16,REG16,0}, "\320\1\x2B\110", IF_8086},\r
    {I_SUB, 2, {REG32,MEMORY,0}, "\321\301\1\x2B\110", IF_386|IF_SM},\r
    {I_SUB, 2, {REG32,REG32,0}, "\321\1\x2B\110", IF_386},\r
    {I_SUB, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\205\15", IF_8086},\r
    {I_SUB, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\205\15", IF_386},\r
    {I_SUB, 2, {REG_AL,IMMEDIATE,0}, "\1\x2C\21", IF_8086|IF_SM},\r
    {I_SUB, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x2D\31", IF_8086|IF_SM},\r
    {I_SUB, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x2D\41", IF_386|IF_SM},\r
    {I_SUB, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\205\21", IF_8086|IF_SM},\r
    {I_SUB, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\205\131", IF_8086|IF_SM},\r
    {I_SUB, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\205\141", IF_386|IF_SM},\r
    {I_SUB, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\205\21", IF_8086|IF_SM},\r
    {I_SUB, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\205\131", IF_8086|IF_SM},\r
    {I_SUB, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\205\141", IF_386|IF_SM},\r
    {I_SVDC, 2, {MEMORY|BITS80,REG_SREG,0}, "\300\2\x0F\x78\101", IF_486|IF_CYRIX|IF_SMM},\r
    {I_SVLDT, 1, {MEMORY|BITS80,0,0}, "\300\2\x0F\x7A\200", IF_486|IF_CYRIX|IF_SMM},\r
    {I_SVTS, 1, {MEMORY|BITS80,0,0}, "\300\2\x0F\x7C\200", IF_486|IF_CYRIX|IF_SMM},\r
    {I_SYSCALL, 0, {0,0,0}, "\2\x0F\x05", IF_P6|IF_AMD},\r
    {I_SYSENTER, 0, {0,0,0}, "\2\x0F\x34", IF_P6},\r
    {I_SYSEXIT, 0, {0,0,0}, "\2\x0F\x35", IF_P6|IF_PRIV},\r
    {I_SYSRET, 0, {0,0,0}, "\2\x0F\x07", IF_P6|IF_PRIV|IF_AMD},\r
    {I_TEST, 2, {MEMORY,REG8,0}, "\300\1\x84\101", IF_8086|IF_SM},\r
    {I_TEST, 2, {REG8,REG8,0}, "\1\x84\101", IF_8086},\r
    {I_TEST, 2, {MEMORY,REG16,0}, "\320\300\1\x85\101", IF_8086|IF_SM},\r
    {I_TEST, 2, {REG16,REG16,0}, "\320\1\x85\101", IF_8086},\r
    {I_TEST, 2, {MEMORY,REG32,0}, "\321\300\1\x85\101", IF_386|IF_SM},\r
    {I_TEST, 2, {REG32,REG32,0}, "\321\1\x85\101", IF_386},\r
    {I_TEST, 2, {REG8,MEMORY,0}, "\301\1\x84\110", IF_8086|IF_SM},\r
    {I_TEST, 2, {REG16,MEMORY,0}, "\320\301\1\x85\110", IF_8086|IF_SM},\r
    {I_TEST, 2, {REG32,MEMORY,0}, "\321\301\1\x85\110", IF_386|IF_SM},\r
    {I_TEST, 2, {REG_AL,IMMEDIATE,0}, "\1\xA8\21", IF_8086|IF_SM},\r
    {I_TEST, 2, {REG_AX,IMMEDIATE,0}, "\320\1\xA9\31", IF_8086|IF_SM},\r
    {I_TEST, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\xA9\41", IF_386|IF_SM},\r
    {I_TEST, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xF6\200\21", IF_8086|IF_SM},\r
    {I_TEST, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xF7\200\31", IF_8086|IF_SM},\r
    {I_TEST, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xF7\200\41", IF_386|IF_SM},\r
    {I_TEST, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\xF6\200\21", IF_8086|IF_SM},\r
    {I_TEST, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\1\xF7\200\31", IF_8086|IF_SM},\r
    {I_TEST, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\1\xF7\200\41", IF_386|IF_SM},\r
    {I_UD0, 0, {0,0,0}, "\2\x0F\xFF", IF_286|IF_UNDOC},\r
    {I_UD1, 0, {0,0,0}, "\2\x0F\xB9", IF_286|IF_UNDOC},\r
    {I_UD2, 0, {0,0,0}, "\2\x0F\x0B", IF_286},\r
    {I_UMOV, 2, {MEMORY,REG8,0}, "\300\2\x0F\x10\101", IF_386|IF_UNDOC|IF_SM},\r
    {I_UMOV, 2, {REG8,REG8,0}, "\2\x0F\x10\101", IF_386|IF_UNDOC},\r
    {I_UMOV, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\x11\101", IF_386|IF_UNDOC|IF_SM},\r
    {I_UMOV, 2, {REG16,REG16,0}, "\320\2\x0F\x11\101", IF_386|IF_UNDOC},\r
    {I_UMOV, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\x11\101", IF_386|IF_UNDOC|IF_SM},\r
    {I_UMOV, 2, {REG32,REG32,0}, "\321\2\x0F\x11\101", IF_386|IF_UNDOC},\r
    {I_UMOV, 2, {REG8,MEMORY,0}, "\301\2\x0F\x12\110", IF_386|IF_UNDOC|IF_SM},\r
    {I_UMOV, 2, {REG8,REG8,0}, "\2\x0F\x12\110", IF_386|IF_UNDOC},\r
    {I_UMOV, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\x13\110", IF_386|IF_UNDOC|IF_SM},\r
    {I_UMOV, 2, {REG16,REG16,0}, "\320\2\x0F\x13\110", IF_386|IF_UNDOC},\r
    {I_UMOV, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\x13\110", IF_386|IF_UNDOC|IF_SM},\r
    {I_UMOV, 2, {REG32,REG32,0}, "\321\2\x0F\x13\110", IF_386|IF_UNDOC},\r
    {I_VERR, 1, {MEMORY,0,0}, "\300\1\x0F\17\204", IF_286|IF_PROT},\r
    {I_VERR, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\204", IF_286|IF_PROT},\r
    {I_VERR, 1, {REG16,0,0}, "\1\x0F\17\204", IF_286|IF_PROT},\r
    {I_VERW, 1, {MEMORY,0,0}, "\300\1\x0F\17\205", IF_286|IF_PROT},\r
    {I_VERW, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\205", IF_286|IF_PROT},\r
    {I_VERW, 1, {REG16,0,0}, "\1\x0F\17\205", IF_286|IF_PROT},\r
    {I_WAIT, 0, {0,0,0}, "\1\x9B", IF_8086},\r
    {I_FWAIT, 0, {0,0,0}, "\1\x9B", IF_8086},\r
    {I_WBINVD, 0, {0,0,0}, "\2\x0F\x09", IF_486|IF_PRIV},\r
    {I_WRSHR, 1, {REGMEM|BITS32,0,0}, "\321\300\2\x0F\x37\200", IF_P6|IF_CYRIX|IF_SMM},\r
    {I_WRMSR, 0, {0,0,0}, "\2\x0F\x30", IF_PENT|IF_PRIV},\r
    {I_XADD, 2, {MEMORY,REG8,0}, "\300\2\x0F\xC0\101", IF_486|IF_SM},\r
    {I_XADD, 2, {REG8,REG8,0}, "\2\x0F\xC0\101", IF_486},\r
    {I_XADD, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xC1\101", IF_486|IF_SM},\r
    {I_XADD, 2, {REG16,REG16,0}, "\320\2\x0F\xC1\101", IF_486},\r
    {I_XADD, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xC1\101", IF_486|IF_SM},\r
    {I_XADD, 2, {REG32,REG32,0}, "\321\2\x0F\xC1\101", IF_486},\r
    {I_XCHG, 2, {REG_AX,REG16,0}, "\320\11\x90", IF_8086},\r
    {I_XCHG, 2, {REG_EAX,REG32,0}, "\321\11\x90", IF_386},\r
    {I_XCHG, 2, {REG16,REG_AX,0}, "\320\10\x90", IF_8086},\r
    {I_XCHG, 2, {REG32,REG_EAX,0}, "\321\10\x90", IF_386},\r
    {I_XCHG, 2, {REG8,MEMORY,0}, "\301\1\x86\110", IF_8086|IF_SM},\r
    {I_XCHG, 2, {REG8,REG8,0}, "\1\x86\110", IF_8086},\r
    {I_XCHG, 2, {REG16,MEMORY,0}, "\320\301\1\x87\110", IF_8086|IF_SM},\r
    {I_XCHG, 2, {REG16,REG16,0}, "\320\1\x87\110", IF_8086},\r
    {I_XCHG, 2, {REG32,MEMORY,0}, "\321\301\1\x87\110", IF_386|IF_SM},\r
    {I_XCHG, 2, {REG32,REG32,0}, "\321\1\x87\110", IF_386},\r
    {I_XCHG, 2, {MEMORY,REG8,0}, "\300\1\x86\101", IF_8086|IF_SM},\r
    {I_XCHG, 2, {REG8,REG8,0}, "\1\x86\101", IF_8086},\r
    {I_XCHG, 2, {MEMORY,REG16,0}, "\320\300\1\x87\101", IF_8086|IF_SM},\r
    {I_XCHG, 2, {REG16,REG16,0}, "\320\1\x87\101", IF_8086},\r
    {I_XCHG, 2, {MEMORY,REG32,0}, "\321\300\1\x87\101", IF_386|IF_SM},\r
    {I_XCHG, 2, {REG32,REG32,0}, "\321\1\x87\101", IF_386},\r
    {I_XLATB, 0, {0,0,0}, "\1\xD7", IF_8086},\r
    {I_XLAT, 0, {0,0,0}, "\1\xD7", IF_8086},\r
    {I_XOR, 2, {MEMORY,REG8,0}, "\300\1\x30\101", IF_8086|IF_SM},\r
    {I_XOR, 2, {REG8,REG8,0}, "\1\x30\101", IF_8086},\r
    {I_XOR, 2, {MEMORY,REG16,0}, "\320\300\1\x31\101", IF_8086|IF_SM},\r
    {I_XOR, 2, {REG16,REG16,0}, "\320\1\x31\101", IF_8086},\r
    {I_XOR, 2, {MEMORY,REG32,0}, "\321\300\1\x31\101", IF_386|IF_SM},\r
    {I_XOR, 2, {REG32,REG32,0}, "\321\1\x31\101", IF_386},\r
    {I_XOR, 2, {REG8,MEMORY,0}, "\301\1\x32\110", IF_8086|IF_SM},\r
    {I_XOR, 2, {REG8,REG8,0}, "\1\x32\110", IF_8086},\r
    {I_XOR, 2, {REG16,MEMORY,0}, "\320\301\1\x33\110", IF_8086|IF_SM},\r
    {I_XOR, 2, {REG16,REG16,0}, "\320\1\x33\110", IF_8086},\r
    {I_XOR, 2, {REG32,MEMORY,0}, "\321\301\1\x33\110", IF_386|IF_SM},\r
    {I_XOR, 2, {REG32,REG32,0}, "\321\1\x33\110", IF_386},\r
    {I_XOR, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\206\15", IF_8086},\r
    {I_XOR, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\206\15", IF_386},\r
    {I_XOR, 2, {REG_AL,IMMEDIATE,0}, "\1\x34\21", IF_8086|IF_SM},\r
    {I_XOR, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x35\31", IF_8086|IF_SM},\r
    {I_XOR, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x35\41", IF_386|IF_SM},\r
    {I_XOR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\206\21", IF_8086|IF_SM},\r
    {I_XOR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\134\1\x81\206\131", IF_8086|IF_SM},\r
    {I_XOR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\144\1\x81\206\141", IF_386|IF_SM},\r
    {I_XOR, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\206\21", IF_8086|IF_SM},\r
    {I_XOR, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\134\1\x81\206\131", IF_8086|IF_SM},\r
    {I_XOR, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\144\1\x81\206\141", IF_386|IF_SM},\r
    {I_XSTORE, 0, {0,0,0}, "\3\x0F\xA7\xC0", IF_P6|IF_CYRIX},\r
    {I_CMOVcc, 2, {REG16,MEMORY,0}, "\320\301\1\x0F\330\x40\110", IF_P6|IF_SM},\r
    {I_CMOVcc, 2, {REG16,REG16,0}, "\320\1\x0F\330\x40\110", IF_P6},\r
    {I_CMOVcc, 2, {REG32,MEMORY,0}, "\321\301\1\x0F\330\x40\110", IF_P6|IF_SM},\r
    {I_CMOVcc, 2, {REG32,REG32,0}, "\321\1\x0F\330\x40\110", IF_P6},\r
    {I_Jcc, 1, {IMMEDIATE|NEAR,0,0}, "\322\1\x0F\330\x80\64", IF_386},\r
    {I_Jcc, 1, {IMMEDIATE|BITS16|NEAR,0,0}, "\320\1\x0F\330\x80\64", IF_386},\r
    {I_Jcc, 1, {IMMEDIATE|BITS32|NEAR,0,0}, "\321\1\x0F\330\x80\64", IF_386},\r
    {I_Jcc, 1, {IMMEDIATE,0,0}, "\330\x70\50", IF_8086},\r
    {I_SETcc, 1, {MEMORY,0,0}, "\300\1\x0F\330\x90\200", IF_386|IF_SB},\r
    {I_SETcc, 1, {REG8,0,0}, "\300\1\x0F\330\x90\200", IF_386},\r
    {I_ADDPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x58\110", IF_KATMAI|IF_SSE},\r
    {I_ADDPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x58\110", IF_KATMAI|IF_SSE},\r
    {I_ADDSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x58\110", IF_KATMAI|IF_SSE},\r
    {I_ADDSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x58\110", IF_KATMAI|IF_SSE},\r
    {I_ANDNPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x55\110", IF_KATMAI|IF_SSE},\r
    {I_ANDNPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x55\110", IF_KATMAI|IF_SSE},\r
    {I_ANDPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x54\110", IF_KATMAI|IF_SSE},\r
    {I_ANDPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x54\110", IF_KATMAI|IF_SSE},\r
    {I_CMPEQPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x00", IF_KATMAI|IF_SSE},\r
    {I_CMPEQPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x00", IF_KATMAI|IF_SSE},\r
    {I_CMPEQSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x00", IF_KATMAI|IF_SSE},\r
    {I_CMPEQSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x00", IF_KATMAI|IF_SSE},\r
    {I_CMPLEPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x02", IF_KATMAI|IF_SSE},\r
    {I_CMPLEPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x02", IF_KATMAI|IF_SSE},\r
    {I_CMPLESS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x02", IF_KATMAI|IF_SSE},\r
    {I_CMPLESS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x02", IF_KATMAI|IF_SSE},\r
    {I_CMPLTPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x01", IF_KATMAI|IF_SSE},\r
    {I_CMPLTPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x01", IF_KATMAI|IF_SSE},\r
    {I_CMPLTSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x01", IF_KATMAI|IF_SSE},\r
    {I_CMPLTSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x01", IF_KATMAI|IF_SSE},\r
    {I_CMPNEQPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x04", IF_KATMAI|IF_SSE},\r
    {I_CMPNEQPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x04", IF_KATMAI|IF_SSE},\r
    {I_CMPNEQSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x04", IF_KATMAI|IF_SSE},\r
    {I_CMPNEQSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x04", IF_KATMAI|IF_SSE},\r
    {I_CMPNLEPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x06", IF_KATMAI|IF_SSE},\r
    {I_CMPNLEPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x06", IF_KATMAI|IF_SSE},\r
    {I_CMPNLESS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x06", IF_KATMAI|IF_SSE},\r
    {I_CMPNLESS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x06", IF_KATMAI|IF_SSE},\r
    {I_CMPNLTPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x05", IF_KATMAI|IF_SSE},\r
    {I_CMPNLTPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x05", IF_KATMAI|IF_SSE},\r
    {I_CMPNLTSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x05", IF_KATMAI|IF_SSE},\r
    {I_CMPNLTSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x05", IF_KATMAI|IF_SSE},\r
    {I_CMPORDPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x07", IF_KATMAI|IF_SSE},\r
    {I_CMPORDPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x07", IF_KATMAI|IF_SSE},\r
    {I_CMPORDSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x07", IF_KATMAI|IF_SSE},\r
    {I_CMPORDSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x07", IF_KATMAI|IF_SSE},\r
    {I_CMPUNORDPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\xC2\110\1\x03", IF_KATMAI|IF_SSE},\r
    {I_CMPUNORDPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\xC2\110\1\x03", IF_KATMAI|IF_SSE},\r
    {I_CMPUNORDSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xC2\110\1\x03", IF_KATMAI|IF_SSE},\r
    {I_CMPUNORDSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xC2\110\1\x03", IF_KATMAI|IF_SSE},\r
    {I_CMPPS, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\331\2\x0F\xC2\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r
    {I_CMPPS, 3, {XMMREG,XMMREG,IMMEDIATE}, "\331\2\x0F\xC2\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r
    {I_CMPSS, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\333\2\x0F\xC2\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r
    {I_CMPSS, 3, {XMMREG,XMMREG,IMMEDIATE}, "\333\2\x0F\xC2\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r
    {I_COMISS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x2F\110", IF_KATMAI|IF_SSE},\r
    {I_COMISS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x2F\110", IF_KATMAI|IF_SSE},\r
    {I_CVTPI2PS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x2A\110", IF_KATMAI|IF_SSE|IF_MMX},\r
    {I_CVTPI2PS, 2, {XMMREG,MMXREG,0}, "\331\2\x0F\x2A\110", IF_KATMAI|IF_SSE|IF_MMX},\r
    {I_CVTPS2PI, 2, {MMXREG,MEMORY,0}, "\301\331\2\x0F\x2D\110", IF_KATMAI|IF_SSE|IF_MMX},\r
    {I_CVTPS2PI, 2, {MMXREG,XMMREG,0}, "\331\2\x0F\x2D\110", IF_KATMAI|IF_SSE|IF_MMX},\r
    {I_CVTSI2SS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x2A\110", IF_KATMAI|IF_SSE|IF_SD|IF_AR1},\r
    {I_CVTSI2SS, 2, {XMMREG,REG32,0}, "\333\2\x0F\x2A\110", IF_KATMAI|IF_SSE},\r
    {I_CVTSS2SI, 2, {REG32,MEMORY,0}, "\301\333\2\x0F\x2D\110", IF_KATMAI|IF_SSE},\r
    {I_CVTSS2SI, 2, {REG32,XMMREG,0}, "\333\2\x0F\x2D\110", IF_KATMAI|IF_SSE},\r
    {I_CVTTPS2PI, 2, {MMXREG,MEMORY,0}, "\301\331\2\x0F\x2C\110", IF_KATMAI|IF_SSE|IF_MMX},\r
    {I_CVTTPS2PI, 2, {MMXREG,XMMREG,0}, "\331\2\x0F\x2C\110", IF_KATMAI|IF_SSE|IF_MMX},\r
    {I_CVTTSS2SI, 2, {REG32,MEMORY,0}, "\301\333\2\x0F\x2C\110", IF_KATMAI|IF_SSE},\r
    {I_CVTTSS2SI, 2, {REG32,XMMREG,0}, "\333\2\x0F\x2C\110", IF_KATMAI|IF_SSE},\r
    {I_DIVPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x5E\110", IF_KATMAI|IF_SSE},\r
    {I_DIVPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x5E\110", IF_KATMAI|IF_SSE},\r
    {I_DIVSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5E\110", IF_KATMAI|IF_SSE},\r
    {I_DIVSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5E\110", IF_KATMAI|IF_SSE},\r
    {I_LDMXCSR, 1, {MEMORY,0,0}, "\300\2\x0F\xAE\202", IF_KATMAI|IF_SSE|IF_SD},\r
    {I_MAXPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x5F\110", IF_KATMAI|IF_SSE},\r
    {I_MAXPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x5F\110", IF_KATMAI|IF_SSE},\r
    {I_MAXSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5F\110", IF_KATMAI|IF_SSE},\r
    {I_MAXSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5F\110", IF_KATMAI|IF_SSE},\r
    {I_MINPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x5D\110", IF_KATMAI|IF_SSE},\r
    {I_MINPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x5D\110", IF_KATMAI|IF_SSE},\r
    {I_MINSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5D\110", IF_KATMAI|IF_SSE},\r
    {I_MINSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5D\110", IF_KATMAI|IF_SSE},\r
    {I_MOVAPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x28\110", IF_KATMAI|IF_SSE},\r
    {I_MOVAPS, 2, {MEMORY,XMMREG,0}, "\300\2\x0F\x29\101", IF_KATMAI|IF_SSE},\r
    {I_MOVAPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x28\110", IF_KATMAI|IF_SSE},\r
    {I_MOVAPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x29\101", IF_KATMAI|IF_SSE},\r
    {I_MOVHPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x16\110", IF_KATMAI|IF_SSE},\r
    {I_MOVHPS, 2, {MEMORY,XMMREG,0}, "\300\2\x0F\x17\101", IF_KATMAI|IF_SSE},\r
    {I_MOVLHPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x16\110", IF_KATMAI|IF_SSE},\r
    {I_MOVLPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x12\110", IF_KATMAI|IF_SSE},\r
    {I_MOVLPS, 2, {MEMORY,XMMREG,0}, "\300\2\x0F\x13\101", IF_KATMAI|IF_SSE},\r
    {I_MOVHLPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x12\110", IF_KATMAI|IF_SSE},\r
    {I_MOVMSKPS, 2, {REG32,XMMREG,0}, "\2\x0F\x50\110", IF_KATMAI|IF_SSE},\r
    {I_MOVNTPS, 2, {MEMORY,XMMREG,0}, "\300\2\x0F\x2B\101", IF_KATMAI|IF_SSE},\r
    {I_MOVSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x10\110", IF_KATMAI|IF_SSE},\r
    {I_MOVSS, 2, {MEMORY,XMMREG,0}, "\300\333\2\x0F\x11\101", IF_KATMAI|IF_SSE},\r
    {I_MOVSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x10\110", IF_KATMAI|IF_SSE},\r
    {I_MOVSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x11\101", IF_KATMAI|IF_SSE},\r
    {I_MOVUPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x10\110", IF_KATMAI|IF_SSE},\r
    {I_MOVUPS, 2, {MEMORY,XMMREG,0}, "\300\331\2\x0F\x11\101", IF_KATMAI|IF_SSE},\r
    {I_MOVUPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x10\110", IF_KATMAI|IF_SSE},\r
    {I_MOVUPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x11\101", IF_KATMAI|IF_SSE},\r
    {I_MULPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x59\110", IF_KATMAI|IF_SSE},\r
    {I_MULPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x59\110", IF_KATMAI|IF_SSE},\r
    {I_MULSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x59\110", IF_KATMAI|IF_SSE},\r
    {I_MULSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x59\110", IF_KATMAI|IF_SSE},\r
    {I_ORPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x56\110", IF_KATMAI|IF_SSE},\r
    {I_ORPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x56\110", IF_KATMAI|IF_SSE},\r
    {I_RCPPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x53\110", IF_KATMAI|IF_SSE},\r
    {I_RCPPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x53\110", IF_KATMAI|IF_SSE},\r
    {I_RCPSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x53\110", IF_KATMAI|IF_SSE},\r
    {I_RCPSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x53\110", IF_KATMAI|IF_SSE},\r
    {I_RSQRTPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x52\110", IF_KATMAI|IF_SSE},\r
    {I_RSQRTPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x52\110", IF_KATMAI|IF_SSE},\r
    {I_RSQRTSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x52\110", IF_KATMAI|IF_SSE},\r
    {I_RSQRTSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x52\110", IF_KATMAI|IF_SSE},\r
    {I_SHUFPS, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\2\x0F\xC6\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r
    {I_SHUFPS, 3, {XMMREG,XMMREG,IMMEDIATE}, "\2\x0F\xC6\110\26", IF_KATMAI|IF_SSE|IF_SB|IF_AR2},\r
    {I_SQRTPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x51\110", IF_KATMAI|IF_SSE},\r
    {I_SQRTPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x51\110", IF_KATMAI|IF_SSE},\r
    {I_SQRTSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x51\110", IF_KATMAI|IF_SSE},\r
    {I_SQRTSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x51\110", IF_KATMAI|IF_SSE},\r
    {I_STMXCSR, 1, {MEMORY,0,0}, "\300\2\x0F\xAE\203", IF_KATMAI|IF_SSE|IF_SD},\r
    {I_SUBPS, 2, {XMMREG,MEMORY,0}, "\301\331\2\x0F\x5C\110", IF_KATMAI|IF_SSE},\r
    {I_SUBPS, 2, {XMMREG,XMMREG,0}, "\331\2\x0F\x5C\110", IF_KATMAI|IF_SSE},\r
    {I_SUBSS, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5C\110", IF_KATMAI|IF_SSE},\r
    {I_SUBSS, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5C\110", IF_KATMAI|IF_SSE},\r
    {I_UCOMISS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x2E\110", IF_KATMAI|IF_SSE},\r
    {I_UCOMISS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x2E\110", IF_KATMAI|IF_SSE},\r
    {I_UNPCKHPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x15\110", IF_KATMAI|IF_SSE},\r
    {I_UNPCKHPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x15\110", IF_KATMAI|IF_SSE},\r
    {I_UNPCKLPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x14\110", IF_KATMAI|IF_SSE},\r
    {I_UNPCKLPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x14\110", IF_KATMAI|IF_SSE},\r
    {I_XORPS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x57\110", IF_KATMAI|IF_SSE},\r
    {I_XORPS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x57\110", IF_KATMAI|IF_SSE},\r
    {I_FXRSTOR, 1, {MEMORY,0,0}, "\300\2\x0F\xAE\201", IF_P6|IF_SSE|IF_FPU},\r
    {I_FXSAVE, 1, {MEMORY,0,0}, "\300\2\x0F\xAE\200", IF_P6|IF_SSE|IF_FPU},\r
    {I_PREFETCHNTA, 1, {MEMORY,0,0}, "\300\2\x0F\x18\200", IF_KATMAI},\r
    {I_PREFETCHT0, 1, {MEMORY,0,0}, "\300\2\x0F\x18\201", IF_KATMAI},\r
    {I_PREFETCHT1, 1, {MEMORY,0,0}, "\300\2\x0F\x18\202", IF_KATMAI},\r
    {I_PREFETCHT2, 1, {MEMORY,0,0}, "\300\2\x0F\x18\203", IF_KATMAI},\r
    {I_SFENCE, 0, {0,0,0}, "\3\x0F\xAE\xF8", IF_KATMAI},\r
    {I_MASKMOVQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF7\110", IF_KATMAI|IF_MMX},\r
    {I_MOVNTQ, 2, {MEMORY,MMXREG,0}, "\300\2\x0F\xE7\101", IF_KATMAI|IF_MMX|IF_SM},\r
    {I_PAVGB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE0\110", IF_KATMAI|IF_MMX},\r
    {I_PAVGB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE0\110", IF_KATMAI|IF_MMX|IF_SM},\r
    {I_PAVGW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE3\110", IF_KATMAI|IF_MMX},\r
    {I_PAVGW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE3\110", IF_KATMAI|IF_MMX|IF_SM},\r
    {I_PEXTRW, 3, {REG32,MMXREG,IMMEDIATE}, "\2\x0F\xC5\110\26", IF_KATMAI|IF_MMX|IF_SB|IF_AR2},\r
    {I_PINSRW, 3, {MMXREG,REG16,IMMEDIATE}, "\2\x0F\xC4\110\26", IF_KATMAI|IF_MMX|IF_SB|IF_AR2},\r
    {I_PINSRW, 3, {MMXREG,MEMORY,IMMEDIATE}, "\301\2\x0F\xC4\110\26", IF_KATMAI|IF_MMX|IF_SB|IF_AR2},\r
    {I_PMAXSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEE\110", IF_KATMAI|IF_MMX},\r
    {I_PMAXSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEE\110", IF_KATMAI|IF_MMX|IF_SM},\r
    {I_PMAXUB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDE\110", IF_KATMAI|IF_MMX},\r
    {I_PMAXUB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDE\110", IF_KATMAI|IF_MMX|IF_SM},\r
    {I_PMINSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEA\110", IF_KATMAI|IF_MMX},\r
    {I_PMINSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEA\110", IF_KATMAI|IF_MMX|IF_SM},\r
    {I_PMINUB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDA\110", IF_KATMAI|IF_MMX},\r
    {I_PMINUB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDA\110", IF_KATMAI|IF_MMX|IF_SM},\r
    {I_PMOVMSKB, 2, {REG32,MMXREG,0}, "\2\x0F\xD7\110", IF_KATMAI|IF_MMX},\r
    {I_PMULHUW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE4\110", IF_KATMAI|IF_MMX},\r
    {I_PMULHUW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE4\110", IF_KATMAI|IF_MMX|IF_SM},\r
    {I_PSADBW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF6\110", IF_KATMAI|IF_MMX},\r
    {I_PSADBW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF6\110", IF_KATMAI|IF_MMX|IF_SM},\r
    {I_PSHUFW, 3, {MMXREG,MMXREG,IMMEDIATE}, "\2\x0F\x70\110\22", IF_KATMAI|IF_MMX|IF_SB|IF_AR2},\r
    {I_PSHUFW, 3, {MMXREG,MEMORY,IMMEDIATE}, "\301\2\x0F\x70\110\22", IF_KATMAI|IF_MMX|IF_SM2|IF_SB|IF_AR2},\r
    {I_PF2IW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x1C", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PF2IW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x1C", IF_PENT|IF_3DNOW},\r
    {I_PFNACC, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x8A", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PFNACC, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x8A", IF_PENT|IF_3DNOW},\r
    {I_PFPNACC, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x8E", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PFPNACC, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x8E", IF_PENT|IF_3DNOW},\r
    {I_PI2FW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\x0C", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PI2FW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\x0C", IF_PENT|IF_3DNOW},\r
    {I_PSWAPD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x0F\110\01\xBB", IF_PENT|IF_3DNOW|IF_SM},\r
    {I_PSWAPD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x0F\110\01\xBB", IF_PENT|IF_3DNOW},\r
    {I_MASKMOVDQU, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF7\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CLFLUSH, 1, {MEMORY,0,0}, "\300\2\x0F\xAE\207", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVNTDQ, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\xE7\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_MOVNTI, 2, {MEMORY,REG32,0}, "\300\2\x0F\xC3\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_MOVNTPD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x2B\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PAUSE, 0, {0,0,0}, "\333\1\x90", IF_WILLAMETTE|IF_SSE2},\r
    {I_LFENCE, 0, {0,0,0}, "\3\x0F\xAE\xE8", IF_WILLAMETTE|IF_SSE2},\r
    {I_MFENCE, 0, {0,0,0}, "\3\x0F\xAE\xF0", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVD, 2, {XMMREG,REG32,0}, "\3\x66\x0F\x6E\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVD, 2, {REG32,XMMREG,0}, "\3\x66\x0F\x7E\101", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x7E\101", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6E\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVDQA, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x6F\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVDQA, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x7F\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_MOVDQA, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6F\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_MOVDQA, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x7F\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVDQU, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x6F\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVDQU, 2, {MEMORY,XMMREG,0}, "\333\300\2\x0F\x7F\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_MOVDQU, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x6F\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_MOVDQU, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x7F\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVDQ2Q, 2, {MMXREG,XMMREG,0}, "\3\xF2\x0F\xD6\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVQ, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x7E\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD6\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVQ, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\xD6\101", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVQ, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x7E\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVQ2DQ, 2, {XMMREG,MMXREG,0}, "\333\2\x0F\xD6\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PACKSSWB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x63\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PACKSSWB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x63\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PACKSSDW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x6B\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PACKSSDW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6B\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PACKUSWB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x67\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PACKUSWB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x67\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PADDB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xFC\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PADDB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xFC\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PADDW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xFD\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PADDW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xFD\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PADDD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xFE\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PADDD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xFE\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PADDQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD4\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PADDQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD4\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PADDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD4\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PADDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD4\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PADDSB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xEC\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PADDSB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xEC\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PADDSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xED\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PADDSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xED\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PADDUSB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDC\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PADDUSB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDC\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PADDUSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDD\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PADDUSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDD\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PAND, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDB\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PAND, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDB\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PANDN, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDF\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PANDN, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDF\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PAVGB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE0\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PAVGB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE0\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PAVGW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE3\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PAVGW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE3\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PCMPEQB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x74\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PCMPEQB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x74\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PCMPEQW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x75\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PCMPEQW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x75\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PCMPEQD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x76\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PCMPEQD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x76\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PCMPGTB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x64\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PCMPGTB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x64\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PCMPGTW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x65\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PCMPGTW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x65\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PCMPGTD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x66\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PCMPGTD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x66\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PEXTRW, 3, {REG32,XMMREG,IMMEDIATE}, "\3\x66\x0F\xC5\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r
    {I_PINSRW, 3, {XMMREG,REG16,IMMEDIATE}, "\3\x66\x0F\xC4\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r
    {I_PINSRW, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\3\x66\x0F\xC4\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r
    {I_PMADDWD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF5\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PMADDWD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF5\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PMAXSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xEE\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PMAXSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xEE\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PMAXUB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDE\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PMAXUB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDE\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PMINSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xEA\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PMINSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xEA\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PMINUB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xDA\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PMINUB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xDA\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PMOVMSKB, 2, {REG32,XMMREG,0}, "\3\x66\x0F\xD7\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PMULHUW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE4\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PMULHUW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE4\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PMULHW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE5\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PMULHW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE5\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PMULLW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD5\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PMULLW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD5\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PMULUDQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF4\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PMULUDQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF4\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PMULUDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF4\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PMULUDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF4\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_POR, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xEB\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_POR, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xEB\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSADBW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF6\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSADBW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF6\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSHUFD, 3, {XMMREG,XMMREG,IMMEDIATE}, "\3\x66\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r
    {I_PSHUFD, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\3\x66\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},\r
    {I_PSHUFHW, 3, {XMMREG,XMMREG,IMMEDIATE}, "\333\2\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r
    {I_PSHUFHW, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\333\2\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},\r
    {I_PSHUFLW, 3, {XMMREG,XMMREG,IMMEDIATE}, "\3\xF2\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r
    {I_PSHUFLW, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\3\xF2\x0F\x70\110\22", IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},\r
    {I_PSLLDQ, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x73\207\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r
    {I_PSLLW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF1\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSLLW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF1\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSLLW, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x71\206\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r
    {I_PSLLD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF2\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSLLD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF2\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSLLD, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x72\206\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r
    {I_PSLLQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF3\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSLLQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF3\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSLLQ, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x73\206\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r
    {I_PSRAW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE1\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSRAW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE1\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSRAW, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x71\204\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r
    {I_PSRAD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE2\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSRAD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE2\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSRAD, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x72\204\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r
    {I_PSRLDQ, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x73\203\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r
    {I_PSRLW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD1\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSRLW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD1\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSRLW, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x71\202\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r
    {I_PSRLD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD2\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSRLD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD2\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSRLD, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x72\202\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r
    {I_PSRLQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD3\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSRLQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD3\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSRLQ, 2, {XMMREG,IMMEDIATE,0}, "\3\x66\x0F\x73\202\25", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},\r
    {I_PSUBB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF8\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSUBB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF8\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSUBW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xF9\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSUBW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xF9\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSUBD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xFA\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSUBD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xFA\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSUBQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFB\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSUBQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFB\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSUBQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xFB\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSUBQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xFB\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSUBSB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE8\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSUBSB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE8\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSUBSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE9\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSUBSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE9\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSUBUSB, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD8\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSUBUSB, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD8\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PSUBUSW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD9\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PSUBUSW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD9\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PUNPCKHBW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x68\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PUNPCKHBW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x68\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PUNPCKHWD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x69\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PUNPCKHWD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x69\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PUNPCKHDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6A\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PUNPCKHDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x6A\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PUNPCKHQDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x6D\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PUNPCKHQDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6D\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PUNPCKLBW, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x60\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PUNPCKLBW, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x60\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PUNPCKLWD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x61\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PUNPCKLWD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x61\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PUNPCKLDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x62\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PUNPCKLDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x62\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PUNPCKLQDQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x6C\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_PUNPCKLQDQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x6C\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PXOR, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xEF\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_PXOR, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xEF\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_ADDPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\x58\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_ADDPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\x58\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_ADDSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\x58\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_ADDSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\x58\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_ANDNPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\x55\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_ANDNPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\x55\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_ANDPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\x54\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_ANDPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\x54\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_CMPEQPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x00", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_CMPEQPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x00", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPEQSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x00", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPEQSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x00", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPLEPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x02", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_CMPLEPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x02", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPLESD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x02", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPLESD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x02", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPLTPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x01", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_CMPLTPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x01", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPLTSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x01", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPLTSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x01", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPNEQPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x04", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_CMPNEQPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x04", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPNEQSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x04", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPNEQSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x04", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPNLEPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x06", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_CMPNLEPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x06", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPNLESD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x06", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPNLESD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x06", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPNLTPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x05", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_CMPNLTPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x05", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPNLTSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x05", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPNLTSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x05", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPORDPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x07", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_CMPORDPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x07", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPORDSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x07", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPORDSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x07", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPUNORDPD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\xC2\110\1\x03", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_CMPUNORDPD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\xC2\110\1\x03", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPUNORDSD, 2, {XMMREG,MEMORY,0}, "\301\331\3\xF2\x0F\xC2\110\1\x03", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPUNORDSD, 2, {XMMREG,XMMREG,0}, "\331\3\xF2\x0F\xC2\110\1\x03", IF_WILLAMETTE|IF_SSE2},\r
    {I_CMPPD, 3, {XMMREG,XMMREG,IMMEDIATE}, "\331\3\x66\x0F\xC2\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r
    {I_CMPPD, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\331\3\x66\x0F\xC2\110\26", IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},\r
    {I_CMPSD, 3, {XMMREG,XMMREG,IMMEDIATE}, "\331\3\xF2\x0F\xC2\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r
    {I_CMPSD, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\331\3\xF2\x0F\xC2\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r
    {I_COMISD, 2, {XMMREG,XMMREG,0}, "\331\3\x66\x0F\x2F\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_COMISD, 2, {XMMREG,MEMORY,0}, "\301\331\3\x66\x0F\x2F\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTDQ2PD, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTDQ2PD, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTDQ2PS, 2, {XMMREG,XMMREG,0}, "\2\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTDQ2PS, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_CVTPD2DQ, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTPD2DQ, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_CVTPD2PI, 2, {MMXREG,XMMREG,0}, "\3\x66\x0F\x2D\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTPD2PI, 2, {MMXREG,MEMORY,0}, "\301\3\x66\x0F\x2D\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTPD2PS, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTPD2PS, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_CVTPI2PD, 2, {XMMREG,MMXREG,0}, "\3\x66\x0F\x2A\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTPI2PD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x2A\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTPS2DQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTPS2DQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_CVTPS2PD, 2, {XMMREG,XMMREG,0}, "\2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTPS2PD, 2, {XMMREG,MEMORY,0}, "\301\2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTSD2SI, 2, {REG32,XMMREG,0}, "\3\xF2\x0F\x2D\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTSD2SI, 2, {REG32,MEMORY,0}, "\301\3\xF2\x0F\x2D\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTSD2SS, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTSD2SS, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTSI2SD, 2, {XMMREG,REG32,0}, "\3\xF2\x0F\x2A\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTSI2SD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x2A\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTSS2SD, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTSS2SD, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5A\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTTPD2PI, 2, {MMXREG,XMMREG,0}, "\3\x66\x0F\x2C\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTTPD2PI, 2, {MMXREG,MEMORY,0}, "\301\3\x66\x0F\x2C\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTTPD2DQ, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTTPD2DQ, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xE6\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_CVTTPS2DQ, 2, {XMMREG,XMMREG,0}, "\333\2\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTTPS2DQ, 2, {XMMREG,MEMORY,0}, "\301\333\2\x0F\x5B\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_CVTTSD2SI, 2, {REG32,XMMREG,0}, "\3\xF2\x0F\x2C\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_CVTTSD2SI, 2, {REG32,MEMORY,0}, "\301\3\xF2\x0F\x2C\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_DIVPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5E\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_DIVPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5E\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_DIVSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x5E\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_DIVSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x5E\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MAXPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5F\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MAXPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5F\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_MAXSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x5F\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MAXSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x5F\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MINPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5D\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MINPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5D\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_MINSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x5D\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MINSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x5D\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVAPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x28\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVAPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x29\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVAPD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x29\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_MOVAPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x28\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_MOVHPD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x17\101", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVHPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x16\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVLPD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x13\101", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVLPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x12\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVMSKPD, 2, {REG32,XMMREG,0}, "\3\x66\x0F\x50\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x10\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x11\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVSD, 2, {MEMORY,XMMREG,0}, "\300\3\xF2\x0F\x11\101", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x10\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVUPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x10\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVUPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x11\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MOVUPD, 2, {MEMORY,XMMREG,0}, "\300\3\x66\x0F\x11\101", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_MOVUPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x10\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_MULPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x59\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MULPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x59\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_MULSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x59\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_MULSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x59\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_ORPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x56\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_ORPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x56\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_SHUFPD, 3, {XMMREG,XMMREG,IMMEDIATE}, "\3\x66\x0F\xC6\110\26", IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},\r
    {I_SHUFPD, 3, {XMMREG,MEMORY,IMMEDIATE}, "\301\3\x66\x0F\xC6\110\26", IF_WILLAMETTE|IF_SSE2|IF_SM|IF_SB|IF_AR2},\r
    {I_SQRTPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x51\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_SQRTPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x51\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_SQRTSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x51\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_SQRTSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x51\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_SUBPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x5C\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_SUBPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x5C\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_SUBSD, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x5C\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_SUBSD, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x5C\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_UCOMISD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x2E\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_UCOMISD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x2E\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_UNPCKHPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x15\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_UNPCKHPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x15\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_UNPCKLPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x14\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_UNPCKLPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x14\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_XORPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x57\110", IF_WILLAMETTE|IF_SSE2},\r
    {I_XORPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x57\110", IF_WILLAMETTE|IF_SSE2|IF_SM},\r
    {I_ADDSUBPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\xD0\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r
    {I_ADDSUBPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\xD0\110", IF_PRESCOTT|IF_SSE3},\r
    {I_ADDSUBPS, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\xD0\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r
    {I_ADDSUBPS, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\xD0\110", IF_PRESCOTT|IF_SSE3},\r
    {I_HADDPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x7C\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r
    {I_HADDPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x7C\110", IF_PRESCOTT|IF_SSE3},\r
    {I_HADDPS, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x7C\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r
    {I_HADDPS, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x7C\110", IF_PRESCOTT|IF_SSE3},\r
    {I_HSUBPD, 2, {XMMREG,MEMORY,0}, "\301\3\x66\x0F\x7D\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r
    {I_HSUBPD, 2, {XMMREG,XMMREG,0}, "\3\x66\x0F\x7D\110", IF_PRESCOTT|IF_SSE3},\r
    {I_HSUBPS, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x7D\110", IF_PRESCOTT|IF_SSE3|IF_SM},\r
    {I_HSUBPS, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x7D\110", IF_PRESCOTT|IF_SSE3},\r
    {I_LDDQU, 2, {XMMREG,MEMORY,0}, "\3\xF2\x0F\xF0\110", IF_PRESCOTT|IF_SSE3},\r
    {I_MOVDDUP, 2, {XMMREG,MEMORY,0}, "\301\3\xF2\x0F\x12\110", IF_PRESCOTT|IF_SSE3},\r
    {I_MOVDDUP, 2, {XMMREG,XMMREG,0}, "\3\xF2\x0F\x12\110", IF_PRESCOTT|IF_SSE3},\r
    {I_MOVSHDUP, 2, {XMMREG,MEMORY,0}, "\301\3\xF3\x0F\x16\110", IF_PRESCOTT|IF_SSE3},\r
    {I_MOVSHDUP, 2, {XMMREG,XMMREG,0}, "\3\xF3\x0F\x16\110", IF_PRESCOTT|IF_SSE3},\r
    {I_MOVSLDUP, 2, {XMMREG,MEMORY,0}, "\301\3\xF3\x0F\x12\110", IF_PRESCOTT|IF_SSE3},\r
    {I_MOVSLDUP, 2, {XMMREG,XMMREG,0}, "\3\xF3\x0F\x12\110", IF_PRESCOTT|IF_SSE3},\r
    ITEMPLATE_END\r
};\r
\r
static struct itemplate *itable_00[] = {\r
    instrux + 29,\r
    instrux + 30,\r
    NULL\r
};\r
\r
static struct itemplate *itable_01[] = {\r
    instrux + 31,\r
    instrux + 32,\r
    instrux + 33,\r
    instrux + 34,\r
    NULL\r
};\r
\r
static struct itemplate *itable_02[] = {\r
    instrux + 35,\r
    instrux + 36,\r
    NULL\r
};\r
\r
static struct itemplate *itable_03[] = {\r
    instrux + 37,\r
    instrux + 38,\r
    instrux + 39,\r
    instrux + 40,\r
    NULL\r
};\r
\r
static struct itemplate *itable_04[] = {\r
    instrux + 43,\r
    NULL\r
};\r
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static struct itemplate *itable_05[] = {\r
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};\r
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static struct itemplate *itable_06[] = {\r
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};\r
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static struct itemplate *itable_07[] = {\r
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};\r
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static struct itemplate *itable_08[] = {\r
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};\r
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static struct itemplate *itable_09[] = {\r
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};\r
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static struct itemplate *itable_0A[] = {\r
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};\r
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static struct itemplate *itable_0B[] = {\r
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};\r
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static struct itemplate *itable_0C[] = {\r
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};\r
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static struct itemplate *itable_0D[] = {\r
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};\r
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static struct itemplate *itable_0E[] = {\r
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};\r
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};\r
\r
static struct itemplate *itable_10[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_11[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_12[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_13[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_14[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_15[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_16[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_17[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_18[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_19[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_1A[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_1B[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_1C[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_1D[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_1E[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_1F[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_20[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_21[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_22[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_23[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_24[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_25[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_26[] = {\r
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};\r
\r
static struct itemplate *itable_27[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_28[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_29[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_2A[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_2B[] = {\r
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    instrux + 947,\r
    instrux + 948,\r
    NULL\r
};\r
\r
static struct itemplate *itable_2C[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_2D[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_2E[] = {\r
    NULL\r
};\r
\r
static struct itemplate *itable_2F[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_30[] = {\r
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    NULL\r
};\r
\r
static struct itemplate *itable_31[] = {\r
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    instrux + 1039,\r
    instrux + 1040,\r
    NULL\r
};\r
\r
static struct itemplate *itable_32[] = {\r
    instrux + 1041,\r
    instrux + 1042,\r
    NULL\r
};\r
\r
static struct itemplate *itable_33[] = {\r
    instrux + 1043,\r
    instrux + 1044,\r
    instrux + 1045,\r
    instrux + 1046,\r
    NULL\r
};\r
\r
static struct itemplate *itable_34[] = {\r
    instrux + 1049,\r
    NULL\r
};\r
\r
static struct itemplate *itable_35[] = {\r
    instrux + 1050,\r
    instrux + 1051,\r
    NULL\r
};\r
\r
static struct itemplate *itable_36[] = {\r
    NULL\r
};\r
\r
static struct itemplate *itable_37[] = {\r
    instrux + 0,\r
    NULL\r
};\r
\r
static struct itemplate *itable_38[] = {\r
    instrux + 141,\r
    instrux + 142,\r
    NULL\r
};\r
\r
static struct itemplate *itable_39[] = {\r
    instrux + 143,\r
    instrux + 144,\r
    instrux + 145,\r
    instrux + 146,\r
    NULL\r
};\r
\r
static struct itemplate *itable_3A[] = {\r
    instrux + 147,\r
    instrux + 148,\r
    NULL\r
};\r
\r
static struct itemplate *itable_3B[] = {\r
    instrux + 149,\r
    instrux + 150,\r
    instrux + 151,\r
    instrux + 152,\r
    NULL\r
};\r
\r
static struct itemplate *itable_3C[] = {\r
    instrux + 155,\r
    NULL\r
};\r
\r
static struct itemplate *itable_3D[] = {\r
    instrux + 156,\r
    instrux + 157,\r
    NULL\r
};\r
\r
static struct itemplate *itable_3E[] = {\r
    NULL\r
};\r
\r
static struct itemplate *itable_3F[] = {\r
    instrux + 5,\r
    NULL\r
};\r
\r
static struct itemplate *itable_40[] = {\r
    instrux + 411,\r
    instrux + 412,\r
    NULL\r
};\r
\r
static struct itemplate *itable_41[] = {\r
    instrux + 411,\r
    instrux + 412,\r
    NULL\r
};\r
\r
static struct itemplate *itable_42[] = {\r
    instrux + 411,\r
    instrux + 412,\r
    NULL\r
};\r
\r
static struct itemplate *itable_43[] = {\r
    instrux + 411,\r
    instrux + 412,\r
    NULL\r
};\r
\r
static struct itemplate *itable_44[] = {\r
    instrux + 411,\r
    instrux + 412,\r
    NULL\r
};\r
\r
static struct itemplate *itable_45[] = {\r
    instrux + 411,\r
    instrux + 412,\r
    NULL\r
};\r
\r
static struct itemplate *itable_46[] = {\r
    instrux + 411,\r
    instrux + 412,\r
    NULL\r
};\r
\r
static struct itemplate *itable_47[] = {\r
    instrux + 411,\r
    instrux + 412,\r
    NULL\r
};\r
\r
static struct itemplate *itable_48[] = {\r
    instrux + 185,\r
    instrux + 186,\r
    NULL\r
};\r
\r
static struct itemplate *itable_49[] = {\r
    instrux + 185,\r
    instrux + 186,\r
    NULL\r
};\r
\r
static struct itemplate *itable_4A[] = {\r
    instrux + 185,\r
    instrux + 186,\r
    NULL\r
};\r
\r
static struct itemplate *itable_4B[] = {\r
    instrux + 185,\r
    instrux + 186,\r
    NULL\r
};\r
\r
static struct itemplate *itable_4C[] = {\r
    instrux + 185,\r
    instrux + 186,\r
    NULL\r
};\r
\r
static struct itemplate *itable_4D[] = {\r
    instrux + 185,\r
    instrux + 186,\r
    NULL\r
};\r
\r
static struct itemplate *itable_4E[] = {\r
    instrux + 185,\r
    instrux + 186,\r
    NULL\r
};\r
\r
static struct itemplate *itable_4F[] = {\r
    instrux + 185,\r
    instrux + 186,\r
    NULL\r
};\r
\r
static struct itemplate *itable_50[] = {\r
    instrux + 774,\r
    instrux + 775,\r
    NULL\r
};\r
\r
static struct itemplate *itable_51[] = {\r
    instrux + 774,\r
    instrux + 775,\r
    NULL\r
};\r
\r
static struct itemplate *itable_52[] = {\r
    instrux + 774,\r
    instrux + 775,\r
    NULL\r
};\r
\r
static struct itemplate *itable_53[] = {\r
    instrux + 774,\r
    instrux + 775,\r
    NULL\r
};\r
\r
static struct itemplate *itable_54[] = {\r
    instrux + 774,\r
    instrux + 775,\r
    NULL\r
};\r
\r
static struct itemplate *itable_55[] = {\r
    instrux + 774,\r
    instrux + 775,\r
    NULL\r
};\r
\r
static struct itemplate *itable_56[] = {\r
    instrux + 774,\r
    instrux + 775,\r
    NULL\r
};\r
\r
static struct itemplate *itable_57[] = {\r
    instrux + 774,\r
    instrux + 775,\r
    NULL\r
};\r
\r
static struct itemplate *itable_58[] = {\r
    instrux + 706,\r
    instrux + 707,\r
    NULL\r
};\r
\r
static struct itemplate *itable_59[] = {\r
    instrux + 706,\r
    instrux + 707,\r
    NULL\r
};\r
\r
static struct itemplate *itable_5A[] = {\r
    instrux + 706,\r
    instrux + 707,\r
    NULL\r
};\r
\r
static struct itemplate *itable_5B[] = {\r
    instrux + 706,\r
    instrux + 707,\r
    NULL\r
};\r
\r
static struct itemplate *itable_5C[] = {\r
    instrux + 706,\r
    instrux + 707,\r
    NULL\r
};\r
\r
static struct itemplate *itable_5D[] = {\r
    instrux + 706,\r
    instrux + 707,\r
    NULL\r
};\r
\r
static struct itemplate *itable_5E[] = {\r
    instrux + 706,\r
    instrux + 707,\r
    NULL\r
};\r
\r
static struct itemplate *itable_5F[] = {\r
    instrux + 706,\r
    instrux + 707,\r
    NULL\r
};\r
\r
static struct itemplate *itable_60[] = {\r
    instrux + 785,\r
    instrux + 786,\r
    instrux + 787,\r
    NULL\r
};\r
\r
static struct itemplate *itable_61[] = {\r
    instrux + 712,\r
    instrux + 713,\r
    instrux + 714,\r
    NULL\r
};\r
\r
static struct itemplate *itable_62[] = {\r
    instrux + 77,\r
    instrux + 78,\r
    NULL\r
};\r
\r
static struct itemplate *itable_63[] = {\r
    instrux + 75,\r
    instrux + 76,\r
    NULL\r
};\r
\r
static struct itemplate *itable_64[] = {\r
    NULL\r
};\r
\r
static struct itemplate *itable_65[] = {\r
    NULL\r
};\r
\r
static struct itemplate *itable_66[] = {\r
    instrux + 1234,\r
    instrux + 1236,\r
    instrux + 1238,\r
    instrux + 1242,\r
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    instrux + 1511,\r
    instrux + 1512,\r
    instrux + 1513,\r
    instrux + 1514,\r
    instrux + 1515,\r
    instrux + 1516,\r
    instrux + 1519,\r
    instrux + 1520,\r
    instrux + 1523,\r
    instrux + 1524,\r
    instrux + 1525,\r
    instrux + 1526,\r
    instrux + 1527,\r
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    instrux + 1531,\r
    instrux + 1532,\r
    instrux + 1535,\r
    instrux + 1536,\r
    instrux + 1539,\r
    instrux + 1540,\r
    NULL\r
};\r
\r
static struct itemplate *itable_67[] = {\r
    NULL\r
};\r
\r
static struct itemplate *itable_68[] = {\r
    instrux + 782,\r
    instrux + 783,\r
    instrux + 784,\r
    NULL\r
};\r
\r
static struct itemplate *itable_69[] = {\r
    instrux + 394,\r
    instrux + 396,\r
    instrux + 398,\r
    instrux + 400,\r
    instrux + 402,\r
    instrux + 404,\r
    NULL\r
};\r
\r
static struct itemplate *itable_6A[] = {\r
    instrux + 781,\r
    NULL\r
};\r
\r
static struct itemplate *itable_6B[] = {\r
    instrux + 393,\r
    instrux + 395,\r
    instrux + 397,\r
    instrux + 399,\r
    instrux + 401,\r
    instrux + 403,\r
    NULL\r
};\r
\r
static struct itemplate *itable_6C[] = {\r
    instrux + 416,\r
    NULL\r
};\r
\r
static struct itemplate *itable_6D[] = {\r
    instrux + 417,\r
    instrux + 418,\r
    NULL\r
};\r
\r
static struct itemplate *itable_6E[] = {\r
    instrux + 607,\r
    NULL\r
};\r
\r
static struct itemplate *itable_6F[] = {\r
    instrux + 608,\r
    instrux + 609,\r
    NULL\r
};\r
\r
static struct itemplate *itable_70[] = {\r
    instrux + 1066,\r
    NULL\r
};\r
\r
static struct itemplate *itable_71[] = {\r
    instrux + 1066,\r
    NULL\r
};\r
\r
static struct itemplate *itable_72[] = {\r
    instrux + 1066,\r
    NULL\r
};\r
\r
static struct itemplate *itable_73[] = {\r
    instrux + 1066,\r
    NULL\r
};\r
\r
static struct itemplate *itable_74[] = {\r
    instrux + 1066,\r
    NULL\r
};\r
\r
static struct itemplate *itable_75[] = {\r
    instrux + 1066,\r
    NULL\r
};\r
\r
static struct itemplate *itable_76[] = {\r
    instrux + 1066,\r
    NULL\r
};\r
\r
static struct itemplate *itable_77[] = {\r
    instrux + 1066,\r
    NULL\r
};\r
\r
static struct itemplate *itable_78[] = {\r
    instrux + 1066,\r
    NULL\r
};\r
\r
static struct itemplate *itable_79[] = {\r
    instrux + 1066,\r
    NULL\r
};\r
\r
static struct itemplate *itable_7A[] = {\r
    instrux + 1066,\r
    NULL\r
};\r
\r
static struct itemplate *itable_7B[] = {\r
    instrux + 1066,\r
    NULL\r
};\r
\r
static struct itemplate *itable_7C[] = {\r
    instrux + 1066,\r
    NULL\r
};\r
\r
static struct itemplate *itable_7D[] = {\r
    instrux + 1066,\r
    NULL\r
};\r
\r
static struct itemplate *itable_7E[] = {\r
    instrux + 1066,\r
    NULL\r
};\r
\r
static struct itemplate *itable_7F[] = {\r
    instrux + 1066,\r
    NULL\r
};\r
\r
static struct itemplate *itable_80[] = {\r
    instrux + 23,\r
    instrux + 26,\r
    instrux + 46,\r
    instrux + 49,\r
    instrux + 69,\r
    instrux + 72,\r
    instrux + 158,\r
    instrux + 161,\r
    instrux + 595,\r
    instrux + 598,\r
    instrux + 872,\r
    instrux + 875,\r
    instrux + 954,\r
    instrux + 957,\r
    instrux + 1052,\r
    instrux + 1055,\r
    NULL\r
};\r
\r
static struct itemplate *itable_81[] = {\r
    instrux + 24,\r
    instrux + 25,\r
    instrux + 27,\r
    instrux + 28,\r
    instrux + 47,\r
    instrux + 48,\r
    instrux + 50,\r
    instrux + 51,\r
    instrux + 70,\r
    instrux + 71,\r
    instrux + 73,\r
    instrux + 74,\r
    instrux + 159,\r
    instrux + 160,\r
    instrux + 162,\r
    instrux + 163,\r
    instrux + 596,\r
    instrux + 597,\r
    instrux + 599,\r
    instrux + 600,\r
    instrux + 873,\r
    instrux + 874,\r
    instrux + 876,\r
    instrux + 877,\r
    instrux + 955,\r
    instrux + 956,\r
    instrux + 958,\r
    instrux + 959,\r
    instrux + 1053,\r
    instrux + 1054,\r
    instrux + 1056,\r
    instrux + 1057,\r
    NULL\r
};\r
\r
static struct itemplate *itable_82[] = {\r
    NULL\r
};\r
\r
static struct itemplate *itable_83[] = {\r
    instrux + 18,\r
    instrux + 19,\r
    instrux + 41,\r
    instrux + 42,\r
    instrux + 64,\r
    instrux + 65,\r
    instrux + 153,\r
    instrux + 154,\r
    instrux + 590,\r
    instrux + 591,\r
    instrux + 867,\r
    instrux + 868,\r
    instrux + 949,\r
    instrux + 950,\r
    instrux + 1047,\r
    instrux + 1048,\r
    NULL\r
};\r
\r
static struct itemplate *itable_84[] = {\r
    instrux + 967,\r
    instrux + 968,\r
    instrux + 973,\r
    NULL\r
};\r
\r
static struct itemplate *itable_85[] = {\r
    instrux + 969,\r
    instrux + 970,\r
    instrux + 971,\r
    instrux + 972,\r
    instrux + 974,\r
    instrux + 975,\r
    NULL\r
};\r
\r
static struct itemplate *itable_86[] = {\r
    instrux + 1021,\r
    instrux + 1022,\r
    instrux + 1027,\r
    instrux + 1028,\r
    NULL\r
};\r
\r
static struct itemplate *itable_87[] = {\r
    instrux + 1023,\r
    instrux + 1024,\r
    instrux + 1025,\r
    instrux + 1026,\r
    instrux + 1029,\r
    instrux + 1030,\r
    instrux + 1031,\r
    instrux + 1032,\r
    NULL\r
};\r
\r
static struct itemplate *itable_88[] = {\r
    instrux + 527,\r
    instrux + 528,\r
    NULL\r
};\r
\r
static struct itemplate *itable_89[] = {\r
    instrux + 529,\r
    instrux + 530,\r
    instrux + 531,\r
    instrux + 532,\r
    NULL\r
};\r
\r
static struct itemplate *itable_8A[] = {\r
    instrux + 533,\r
    instrux + 534,\r
    NULL\r
};\r
\r
static struct itemplate *itable_8B[] = {\r
    instrux + 535,\r
    instrux + 536,\r
    instrux + 537,\r
    instrux + 538,\r
    NULL\r
};\r
\r
static struct itemplate *itable_8C[] = {\r
    instrux + 509,\r
    instrux + 510,\r
    instrux + 511,\r
    NULL\r
};\r
\r
static struct itemplate *itable_8D[] = {\r
    instrux + 462,\r
    instrux + 463,\r
    NULL\r
};\r
\r
static struct itemplate *itable_8E[] = {\r
    instrux + 512,\r
    instrux + 513,\r
    instrux + 514,\r
    NULL\r
};\r
\r
static struct itemplate *itable_8F[] = {\r
    instrux + 708,\r
    instrux + 709,\r
    NULL\r
};\r
\r
static struct itemplate *itable_90[] = {\r
    instrux + 574,\r
    instrux + 1017,\r
    instrux + 1018,\r
    instrux + 1019,\r
    instrux + 1020,\r
    instrux + 1239,\r
    NULL\r
};\r
\r
static struct itemplate *itable_91[] = {\r
    instrux + 1017,\r
    instrux + 1018,\r
    instrux + 1019,\r
    instrux + 1020,\r
    NULL\r
};\r
\r
static struct itemplate *itable_92[] = {\r
    instrux + 1017,\r
    instrux + 1018,\r
    instrux + 1019,\r
    instrux + 1020,\r
    NULL\r
};\r
\r
static struct itemplate *itable_93[] = {\r
    instrux + 1017,\r
    instrux + 1018,\r
    instrux + 1019,\r
    instrux + 1020,\r
    NULL\r
};\r
\r
static struct itemplate *itable_94[] = {\r
    instrux + 1017,\r
    instrux + 1018,\r
    instrux + 1019,\r
    instrux + 1020,\r
    NULL\r
};\r
\r
static struct itemplate *itable_95[] = {\r
    instrux + 1017,\r
    instrux + 1018,\r
    instrux + 1019,\r
    instrux + 1020,\r
    NULL\r
};\r
\r
static struct itemplate *itable_96[] = {\r
    instrux + 1017,\r
    instrux + 1018,\r
    instrux + 1019,\r
    instrux + 1020,\r
    NULL\r
};\r
\r
static struct itemplate *itable_97[] = {\r
    instrux + 1017,\r
    instrux + 1018,\r
    instrux + 1019,\r
    instrux + 1020,\r
    NULL\r
};\r
\r
static struct itemplate *itable_98[] = {\r
    instrux + 134,\r
    instrux + 182,\r
    NULL\r
};\r
\r
static struct itemplate *itable_99[] = {\r
    instrux + 135,\r
    instrux + 181,\r
    NULL\r
};\r
\r
static struct itemplate *itable_9A[] = {\r
    instrux + 118,\r
    instrux + 119,\r
    instrux + 120,\r
    instrux + 121,\r
    instrux + 122,\r
    NULL\r
};\r
\r
static struct itemplate *itable_9B[] = {\r
    instrux + 212,\r
    instrux + 244,\r
    instrux + 262,\r
    instrux + 281,\r
    instrux + 331,\r
    instrux + 340,\r
    instrux + 341,\r
    instrux + 346,\r
    instrux + 347,\r
    instrux + 1006,\r
    instrux + 1007,\r
    NULL\r
};\r
\r
static struct itemplate *itable_9C[] = {\r
    instrux + 788,\r
    instrux + 789,\r
    instrux + 790,\r
    NULL\r
};\r
\r
static struct itemplate *itable_9D[] = {\r
    instrux + 715,\r
    instrux + 716,\r
    instrux + 717,\r
    NULL\r
};\r
\r
static struct itemplate *itable_9E[] = {\r
    instrux + 844,\r
    NULL\r
};\r
\r
static struct itemplate *itable_9F[] = {\r
    instrux + 455,\r
    NULL\r
};\r
\r
static struct itemplate *itable_A0[] = {\r
    instrux + 515,\r
    NULL\r
};\r
\r
static struct itemplate *itable_A1[] = {\r
    instrux + 516,\r
    instrux + 517,\r
    NULL\r
};\r
\r
static struct itemplate *itable_A2[] = {\r
    instrux + 518,\r
    NULL\r
};\r
\r
static struct itemplate *itable_A3[] = {\r
    instrux + 519,\r
    instrux + 520,\r
    NULL\r
};\r
\r
static struct itemplate *itable_A4[] = {\r
    instrux + 556,\r
    NULL\r
};\r
\r
static struct itemplate *itable_A5[] = {\r
    instrux + 557,\r
    instrux + 558,\r
    NULL\r
};\r
\r
static struct itemplate *itable_A6[] = {\r
    instrux + 164,\r
    NULL\r
};\r
\r
static struct itemplate *itable_A7[] = {\r
    instrux + 165,\r
    instrux + 166,\r
    NULL\r
};\r
\r
static struct itemplate *itable_A8[] = {\r
    instrux + 976,\r
    NULL\r
};\r
\r
static struct itemplate *itable_A9[] = {\r
    instrux + 977,\r
    instrux + 978,\r
    NULL\r
};\r
\r
static struct itemplate *itable_AA[] = {\r
    instrux + 930,\r
    NULL\r
};\r
\r
static struct itemplate *itable_AB[] = {\r
    instrux + 931,\r
    instrux + 932,\r
    NULL\r
};\r
\r
static struct itemplate *itable_AC[] = {\r
    instrux + 481,\r
    NULL\r
};\r
\r
static struct itemplate *itable_AD[] = {\r
    instrux + 482,\r
    instrux + 483,\r
    NULL\r
};\r
\r
static struct itemplate *itable_AE[] = {\r
    instrux + 878,\r
    NULL\r
};\r
\r
static struct itemplate *itable_AF[] = {\r
    instrux + 879,\r
    instrux + 880,\r
    NULL\r
};\r
\r
static struct itemplate *itable_B0[] = {\r
    instrux + 539,\r
    NULL\r
};\r
\r
static struct itemplate *itable_B1[] = {\r
    instrux + 539,\r
    NULL\r
};\r
\r
static struct itemplate *itable_B2[] = {\r
    instrux + 539,\r
    NULL\r
};\r
\r
static struct itemplate *itable_B3[] = {\r
    instrux + 539,\r
    NULL\r
};\r
\r
static struct itemplate *itable_B4[] = {\r
    instrux + 539,\r
    NULL\r
};\r
\r
static struct itemplate *itable_B5[] = {\r
    instrux + 539,\r
    NULL\r
};\r
\r
static struct itemplate *itable_B6[] = {\r
    instrux + 539,\r
    NULL\r
};\r
\r
static struct itemplate *itable_B7[] = {\r
    instrux + 539,\r
    NULL\r
};\r
\r
static struct itemplate *itable_B8[] = {\r
    instrux + 540,\r
    instrux + 541,\r
    NULL\r
};\r
\r
static struct itemplate *itable_B9[] = {\r
    instrux + 540,\r
    instrux + 541,\r
    NULL\r
};\r
\r
static struct itemplate *itable_BA[] = {\r
    instrux + 540,\r
    instrux + 541,\r
    NULL\r
};\r
\r
static struct itemplate *itable_BB[] = {\r
    instrux + 540,\r
    instrux + 541,\r
    NULL\r
};\r
\r
static struct itemplate *itable_BC[] = {\r
    instrux + 540,\r
    instrux + 541,\r
    NULL\r
};\r
\r
static struct itemplate *itable_BD[] = {\r
    instrux + 540,\r
    instrux + 541,\r
    NULL\r
};\r
\r
static struct itemplate *itable_BE[] = {\r
    instrux + 540,\r
    instrux + 541,\r
    NULL\r
};\r
\r
static struct itemplate *itable_BF[] = {\r
    instrux + 540,\r
    instrux + 541,\r
    NULL\r
};\r
\r
static struct itemplate *itable_C0[] = {\r
    instrux + 795,\r
    instrux + 804,\r
    instrux + 824,\r
    instrux + 833,\r
    instrux + 848,\r
    instrux + 884,\r
    instrux + 901,\r
    NULL\r
};\r
\r
static struct itemplate *itable_C1[] = {\r
    instrux + 798,\r
    instrux + 801,\r
    instrux + 807,\r
    instrux + 810,\r
    instrux + 827,\r
    instrux + 830,\r
    instrux + 836,\r
    instrux + 839,\r
    instrux + 851,\r
    instrux + 854,\r
    instrux + 887,\r
    instrux + 890,\r
    instrux + 904,\r
    instrux + 907,\r
    NULL\r
};\r
\r
static struct itemplate *itable_C2[] = {\r
    instrux + 817,\r
    instrux + 821,\r
    NULL\r
};\r
\r
static struct itemplate *itable_C3[] = {\r
    instrux + 816,\r
    instrux + 820,\r
    NULL\r
};\r
\r
static struct itemplate *itable_C4[] = {\r
    instrux + 465,\r
    instrux + 466,\r
    NULL\r
};\r
\r
static struct itemplate *itable_C5[] = {\r
    instrux + 460,\r
    instrux + 461,\r
    NULL\r
};\r
\r
static struct itemplate *itable_C6[] = {\r
    instrux + 542,\r
    instrux + 545,\r
    NULL\r
};\r
\r
static struct itemplate *itable_C7[] = {\r
    instrux + 543,\r
    instrux + 544,\r
    instrux + 546,\r
    instrux + 547,\r
    NULL\r
};\r
\r
static struct itemplate *itable_C8[] = {\r
    instrux + 194,\r
    NULL\r
};\r
\r
static struct itemplate *itable_C9[] = {\r
    instrux + 464,\r
    NULL\r
};\r
\r
static struct itemplate *itable_CA[] = {\r
    instrux + 819,\r
    NULL\r
};\r
\r
static struct itemplate *itable_CB[] = {\r
    instrux + 818,\r
    NULL\r
};\r
\r
static struct itemplate *itable_CC[] = {\r
    instrux + 421,\r
    NULL\r
};\r
\r
static struct itemplate *itable_CD[] = {\r
    instrux + 419,\r
    NULL\r
};\r
\r
static struct itemplate *itable_CE[] = {\r
    instrux + 422,\r
    NULL\r
};\r
\r
static struct itemplate *itable_CF[] = {\r
    instrux + 425,\r
    instrux + 426,\r
    instrux + 427,\r
    NULL\r
};\r
\r
static struct itemplate *itable_D0[] = {\r
    instrux + 793,\r
    instrux + 802,\r
    instrux + 822,\r
    instrux + 831,\r
    instrux + 846,\r
    instrux + 882,\r
    instrux + 899,\r
    NULL\r
};\r
\r
static struct itemplate *itable_D1[] = {\r
    instrux + 796,\r
    instrux + 799,\r
    instrux + 805,\r
    instrux + 808,\r
    instrux + 825,\r
    instrux + 828,\r
    instrux + 834,\r
    instrux + 837,\r
    instrux + 849,\r
    instrux + 852,\r
    instrux + 885,\r
    instrux + 888,\r
    instrux + 902,\r
    instrux + 905,\r
    NULL\r
};\r
\r
static struct itemplate *itable_D2[] = {\r
    instrux + 794,\r
    instrux + 803,\r
    instrux + 823,\r
    instrux + 832,\r
    instrux + 847,\r
    instrux + 883,\r
    instrux + 900,\r
    NULL\r
};\r
\r
static struct itemplate *itable_D3[] = {\r
    instrux + 797,\r
    instrux + 800,\r
    instrux + 806,\r
    instrux + 809,\r
    instrux + 826,\r
    instrux + 829,\r
    instrux + 835,\r
    instrux + 838,\r
    instrux + 850,\r
    instrux + 853,\r
    instrux + 886,\r
    instrux + 889,\r
    instrux + 903,\r
    instrux + 906,\r
    NULL\r
};\r
\r
static struct itemplate *itable_D4[] = {\r
    instrux + 3,\r
    instrux + 4,\r
    NULL\r
};\r
\r
static struct itemplate *itable_D5[] = {\r
    instrux + 1,\r
    instrux + 2,\r
    NULL\r
};\r
\r
static struct itemplate *itable_D6[] = {\r
    instrux + 845,\r
    NULL\r
};\r
\r
static struct itemplate *itable_D7[] = {\r
    instrux + 1033,\r
    instrux + 1034,\r
    NULL\r
};\r
\r
static struct itemplate *itable_D8[] = {\r
    instrux + 199,\r
    instrux + 202,\r
    instrux + 204,\r
    instrux + 229,\r
    instrux + 231,\r
    instrux + 232,\r
    instrux + 237,\r
    instrux + 239,\r
    instrux + 240,\r
    instrux + 245,\r
    instrux + 249,\r
    instrux + 250,\r
    instrux + 253,\r
    instrux + 257,\r
    instrux + 258,\r
    instrux + 307,\r
    instrux + 311,\r
    instrux + 312,\r
    instrux + 348,\r
    instrux + 352,\r
    instrux + 353,\r
    instrux + 356,\r
    instrux + 360,\r
    instrux + 361,\r
    NULL\r
};\r
\r
static struct itemplate *itable_D9[] = {\r
    instrux + 197,\r
    instrux + 198,\r
    instrux + 211,\r
    instrux + 242,\r
    instrux + 243,\r
    instrux + 280,\r
    instrux + 294,\r
    instrux + 297,\r
    instrux + 298,\r
    instrux + 299,\r
    instrux + 300,\r
    instrux + 301,\r
    instrux + 302,\r
    instrux + 303,\r
    instrux + 304,\r
    instrux + 305,\r
    instrux + 306,\r
    instrux + 319,\r
    instrux + 321,\r
    instrux + 322,\r
    instrux + 325,\r
    instrux + 326,\r
    instrux + 327,\r
    instrux + 328,\r
    instrux + 329,\r
    instrux + 332,\r
    instrux + 334,\r
    instrux + 335,\r
    instrux + 336,\r
    instrux + 337,\r
    instrux + 342,\r
    instrux + 364,\r
    instrux + 374,\r
    instrux + 375,\r
    instrux + 376,\r
    instrux + 377,\r
    instrux + 378,\r
    instrux + 379,\r
    instrux + 380,\r
    instrux + 381,\r
    NULL\r
};\r
\r
static struct itemplate *itable_DA[] = {\r
    instrux + 213,\r
    instrux + 214,\r
    instrux + 215,\r
    instrux + 216,\r
    instrux + 217,\r
    instrux + 218,\r
    instrux + 227,\r
    instrux + 228,\r
    instrux + 265,\r
    instrux + 267,\r
    instrux + 269,\r
    instrux + 271,\r
    instrux + 273,\r
    instrux + 278,\r
    instrux + 290,\r
    instrux + 292,\r
    instrux + 373,\r
    NULL\r
};\r
\r
static struct itemplate *itable_DB[] = {\r
    instrux + 219,\r
    instrux + 220,\r
    instrux + 221,\r
    instrux + 222,\r
    instrux + 223,\r
    instrux + 224,\r
    instrux + 225,\r
    instrux + 226,\r
    instrux + 233,\r
    instrux + 234,\r
    instrux + 275,\r
    instrux + 282,\r
    instrux + 284,\r
    instrux + 288,\r
    instrux + 296,\r
    instrux + 315,\r
    instrux + 316,\r
    instrux + 317,\r
    instrux + 318,\r
    instrux + 333,\r
    instrux + 344,\r
    instrux + 367,\r
    instrux + 368,\r
    NULL\r
};\r
\r
static struct itemplate *itable_DC[] = {\r
    instrux + 200,\r
    instrux + 201,\r
    instrux + 203,\r
    instrux + 230,\r
    instrux + 238,\r
    instrux + 246,\r
    instrux + 247,\r
    instrux + 248,\r
    instrux + 254,\r
    instrux + 255,\r
    instrux + 256,\r
    instrux + 308,\r
    instrux + 309,\r
    instrux + 310,\r
    instrux + 349,\r
    instrux + 350,\r
    instrux + 351,\r
    instrux + 357,\r
    instrux + 358,\r
    instrux + 359,\r
    NULL\r
};\r
\r
static struct itemplate *itable_DD[] = {\r
    instrux + 263,\r
    instrux + 287,\r
    instrux + 295,\r
    instrux + 320,\r
    instrux + 323,\r
    instrux + 330,\r
    instrux + 338,\r
    instrux + 339,\r
    instrux + 343,\r
    instrux + 345,\r
    instrux + 365,\r
    instrux + 366,\r
    instrux + 371,\r
    instrux + 372,\r
    NULL\r
};\r
\r
static struct itemplate *itable_DE[] = {\r
    instrux + 205,\r
    instrux + 206,\r
    instrux + 241,\r
    instrux + 251,\r
    instrux + 252,\r
    instrux + 259,\r
    instrux + 260,\r
    instrux + 266,\r
    instrux + 268,\r
    instrux + 270,\r
    instrux + 272,\r
    instrux + 274,\r
    instrux + 279,\r
    instrux + 291,\r
    instrux + 293,\r
    instrux + 313,\r
    instrux + 314,\r
    instrux + 354,\r
    instrux + 355,\r
    instrux + 362,\r
    instrux + 363,\r
    NULL\r
};\r
\r
static struct itemplate *itable_DF[] = {\r
    instrux + 207,\r
    instrux + 208,\r
    instrux + 209,\r
    instrux + 210,\r
    instrux + 235,\r
    instrux + 236,\r
    instrux + 264,\r
    instrux + 276,\r
    instrux + 277,\r
    instrux + 283,\r
    instrux + 285,\r
    instrux + 286,\r
    instrux + 289,\r
    instrux + 324,\r
    instrux + 369,\r
    instrux + 370,\r
    NULL\r
};\r
\r
static struct itemplate *itable_E0[] = {\r
    instrux + 490,\r
    instrux + 491,\r
    instrux + 492,\r
    instrux + 493,\r
    instrux + 494,\r
    instrux + 495,\r
    NULL\r
};\r
\r
static struct itemplate *itable_E1[] = {\r
    instrux + 487,\r
    instrux + 488,\r
    instrux + 489,\r
    instrux + 496,\r
    instrux + 497,\r
    instrux + 498,\r
    NULL\r
};\r
\r
static struct itemplate *itable_E2[] = {\r
    instrux + 484,\r
    instrux + 485,\r
    instrux + 486,\r
    NULL\r
};\r
\r
static struct itemplate *itable_E3[] = {\r
    instrux + 428,\r
    instrux + 429,\r
    NULL\r
};\r
\r
static struct itemplate *itable_E4[] = {\r
    instrux + 405,\r
    NULL\r
};\r
\r
static struct itemplate *itable_E5[] = {\r
    instrux + 406,\r
    instrux + 407,\r
    NULL\r
};\r
\r
static struct itemplate *itable_E6[] = {\r
    instrux + 601,\r
    NULL\r
};\r
\r
static struct itemplate *itable_E7[] = {\r
    instrux + 602,\r
    instrux + 603,\r
    NULL\r
};\r
\r
static struct itemplate *itable_E8[] = {\r
    instrux + 112,\r
    instrux + 113,\r
    instrux + 114,\r
    instrux + 115,\r
    instrux + 116,\r
    instrux + 117,\r
    NULL\r
};\r
\r
static struct itemplate *itable_E9[] = {\r
    instrux + 431,\r
    instrux + 432,\r
    instrux + 433,\r
    NULL\r
};\r
\r
static struct itemplate *itable_EA[] = {\r
    instrux + 434,\r
    instrux + 435,\r
    instrux + 436,\r
    instrux + 437,\r
    instrux + 438,\r
    NULL\r
};\r
\r
static struct itemplate *itable_EB[] = {\r
    instrux + 430,\r
    NULL\r
};\r
\r
static struct itemplate *itable_EC[] = {\r
    instrux + 408,\r
    NULL\r
};\r
\r
static struct itemplate *itable_ED[] = {\r
    instrux + 409,\r
    instrux + 410,\r
    NULL\r
};\r
\r
static struct itemplate *itable_EE[] = {\r
    instrux + 604,\r
    NULL\r
};\r
\r
static struct itemplate *itable_EF[] = {\r
    instrux + 605,\r
    instrux + 606,\r
    NULL\r
};\r
\r
static struct itemplate *itable_F0[] = {\r
    NULL\r
};\r
\r
static struct itemplate *itable_F1[] = {\r
    instrux + 420,\r
    instrux + 921,\r
    NULL\r
};\r
\r
static struct itemplate *itable_F2[] = {\r
    instrux + 1254,\r
    instrux + 1336,\r
    instrux + 1337,\r
    instrux + 1402,\r
    instrux + 1403,\r
    instrux + 1410,\r
    instrux + 1411,\r
    instrux + 1414,\r
    instrux + 1415,\r
    instrux + 1418,\r
    instrux + 1419,\r
    instrux + 1422,\r
    instrux + 1423,\r
    instrux + 1426,\r
    instrux + 1427,\r
    instrux + 1430,\r
    instrux + 1431,\r
    instrux + 1434,\r
    instrux + 1435,\r
    instrux + 1438,\r
    instrux + 1439,\r
    instrux + 1442,\r
    instrux + 1443,\r
    instrux + 1450,\r
    instrux + 1451,\r
    instrux + 1462,\r
    instrux + 1463,\r
    instrux + 1464,\r
    instrux + 1465,\r
    instrux + 1466,\r
    instrux + 1467,\r
    instrux + 1476,\r
    instrux + 1477,\r
    instrux + 1480,\r
    instrux + 1481,\r
    instrux + 1484,\r
    instrux + 1485,\r
    instrux + 1488,\r
    instrux + 1489,\r
    instrux + 1499,\r
    instrux + 1500,\r
    instrux + 1501,\r
    instrux + 1502,\r
    instrux + 1509,\r
    instrux + 1510,\r
    instrux + 1517,\r
    instrux + 1518,\r
    instrux + 1521,\r
    instrux + 1522,\r
    instrux + 1533,\r
    instrux + 1534,\r
    instrux + 1537,\r
    instrux + 1538,\r
    instrux + 1541,\r
    instrux + 1542,\r
    instrux + 1543,\r
    instrux + 1544,\r
    instrux + 1545,\r
    NULL\r
};\r
\r
static struct itemplate *itable_F3[] = {\r
    instrux + 1546,\r
    instrux + 1547,\r
    instrux + 1548,\r
    instrux + 1549,\r
    NULL\r
};\r
\r
static struct itemplate *itable_F4[] = {\r
    instrux + 382,\r
    NULL\r
};\r
\r
static struct itemplate *itable_F5[] = {\r
    instrux + 140,\r
    NULL\r
};\r
\r
static struct itemplate *itable_F6[] = {\r
    instrux + 190,\r
    instrux + 383,\r
    instrux + 386,\r
    instrux + 567,\r
    instrux + 571,\r
    instrux + 575,\r
    instrux + 979,\r
    instrux + 982,\r
    NULL\r
};\r
\r
static struct itemplate *itable_F7[] = {\r
    instrux + 191,\r
    instrux + 192,\r
    instrux + 384,\r
    instrux + 385,\r
    instrux + 387,\r
    instrux + 388,\r
    instrux + 568,\r
    instrux + 569,\r
    instrux + 572,\r
    instrux + 573,\r
    instrux + 576,\r
    instrux + 577,\r
    instrux + 980,\r
    instrux + 981,\r
    instrux + 983,\r
    instrux + 984,\r
    NULL\r
};\r
\r
static struct itemplate *itable_F8[] = {\r
    instrux + 136,\r
    NULL\r
};\r
\r
static struct itemplate *itable_F9[] = {\r
    instrux + 927,\r
    NULL\r
};\r
\r
static struct itemplate *itable_FA[] = {\r
    instrux + 138,\r
    NULL\r
};\r
\r
static struct itemplate *itable_FB[] = {\r
    instrux + 929,\r
    NULL\r
};\r
\r
static struct itemplate *itable_FC[] = {\r
    instrux + 137,\r
    NULL\r
};\r
\r
static struct itemplate *itable_FD[] = {\r
    instrux + 928,\r
    NULL\r
};\r
\r
static struct itemplate *itable_FE[] = {\r
    instrux + 187,\r
    instrux + 413,\r
    NULL\r
};\r
\r
static struct itemplate *itable_FF[] = {\r
    instrux + 123,\r
    instrux + 124,\r
    instrux + 125,\r
    instrux + 126,\r
    instrux + 127,\r
    instrux + 128,\r
    instrux + 129,\r
    instrux + 130,\r
    instrux + 131,\r
    instrux + 132,\r
    instrux + 133,\r
    instrux + 188,\r
    instrux + 189,\r
    instrux + 414,\r
    instrux + 415,\r
    instrux + 439,\r
    instrux + 440,\r
    instrux + 441,\r
    instrux + 442,\r
    instrux + 443,\r
    instrux + 444,\r
    instrux + 445,\r
    instrux + 446,\r
    instrux + 447,\r
    instrux + 448,\r
    instrux + 449,\r
    instrux + 776,\r
    instrux + 777,\r
    NULL\r
};\r
\r
struct itemplate **itable[] = {\r
    itable_00,\r
    itable_01,\r
    itable_02,\r
    itable_03,\r
    itable_04,\r
    itable_05,\r
    itable_06,\r
    itable_07,\r
    itable_08,\r
    itable_09,\r
    itable_0A,\r
    itable_0B,\r
    itable_0C,\r
    itable_0D,\r
    itable_0E,\r
    itable_0F,\r
    itable_10,\r
    itable_11,\r
    itable_12,\r
    itable_13,\r
    itable_14,\r
    itable_15,\r
    itable_16,\r
    itable_17,\r
    itable_18,\r
    itable_19,\r
    itable_1A,\r
    itable_1B,\r
    itable_1C,\r
    itable_1D,\r
    itable_1E,\r
    itable_1F,\r
    itable_20,\r
    itable_21,\r
    itable_22,\r
    itable_23,\r
    itable_24,\r
    itable_25,\r
    itable_26,\r
    itable_27,\r
    itable_28,\r
    itable_29,\r
    itable_2A,\r
    itable_2B,\r
    itable_2C,\r
    itable_2D,\r
    itable_2E,\r
    itable_2F,\r
    itable_30,\r
    itable_31,\r
    itable_32,\r
    itable_33,\r
    itable_34,\r
    itable_35,\r
    itable_36,\r
    itable_37,\r
    itable_38,\r
    itable_39,\r
    itable_3A,\r
    itable_3B,\r
    itable_3C,\r
    itable_3D,\r
    itable_3E,\r
    itable_3F,\r
    itable_40,\r
    itable_41,\r
    itable_42,\r
    itable_43,\r
    itable_44,\r
    itable_45,\r
    itable_46,\r
    itable_47,\r
    itable_48,\r
    itable_49,\r
    itable_4A,\r
    itable_4B,\r
    itable_4C,\r
    itable_4D,\r
    itable_4E,\r
    itable_4F,\r
    itable_50,\r
    itable_51,\r
    itable_52,\r
    itable_53,\r
    itable_54,\r
    itable_55,\r
    itable_56,\r
    itable_57,\r
    itable_58,\r
    itable_59,\r
    itable_5A,\r
    itable_5B,\r
    itable_5C,\r
    itable_5D,\r
    itable_5E,\r
    itable_5F,\r
    itable_60,\r
    itable_61,\r
    itable_62,\r
    itable_63,\r
    itable_64,\r
    itable_65,\r
    itable_66,\r
    itable_67,\r
    itable_68,\r
    itable_69,\r
    itable_6A,\r
    itable_6B,\r
    itable_6C,\r
    itable_6D,\r
    itable_6E,\r
    itable_6F,\r
    itable_70,\r
    itable_71,\r
    itable_72,\r
    itable_73,\r
    itable_74,\r
    itable_75,\r
    itable_76,\r
    itable_77,\r
    itable_78,\r
    itable_79,\r
    itable_7A,\r
    itable_7B,\r
    itable_7C,\r
    itable_7D,\r
    itable_7E,\r
    itable_7F,\r
    itable_80,\r
    itable_81,\r
    itable_82,\r
    itable_83,\r
    itable_84,\r
    itable_85,\r
    itable_86,\r
    itable_87,\r
    itable_88,\r
    itable_89,\r
    itable_8A,\r
    itable_8B,\r
    itable_8C,\r
    itable_8D,\r
    itable_8E,\r
    itable_8F,\r
    itable_90,\r
    itable_91,\r
    itable_92,\r
    itable_93,\r
    itable_94,\r
    itable_95,\r
    itable_96,\r
    itable_97,\r
    itable_98,\r
    itable_99,\r
    itable_9A,\r
    itable_9B,\r
    itable_9C,\r
    itable_9D,\r
    itable_9E,\r
    itable_9F,\r
    itable_A0,\r
    itable_A1,\r
    itable_A2,\r
    itable_A3,\r
    itable_A4,\r
    itable_A5,\r
    itable_A6,\r
    itable_A7,\r
    itable_A8,\r
    itable_A9,\r
    itable_AA,\r
    itable_AB,\r
    itable_AC,\r
    itable_AD,\r
    itable_AE,\r
    itable_AF,\r
    itable_B0,\r
    itable_B1,\r
    itable_B2,\r
    itable_B3,\r
    itable_B4,\r
    itable_B5,\r
    itable_B6,\r
    itable_B7,\r
    itable_B8,\r
    itable_B9,\r
    itable_BA,\r
    itable_BB,\r
    itable_BC,\r
    itable_BD,\r
    itable_BE,\r
    itable_BF,\r
    itable_C0,\r
    itable_C1,\r
    itable_C2,\r
    itable_C3,\r
    itable_C4,\r
    itable_C5,\r
    itable_C6,\r
    itable_C7,\r
    itable_C8,\r
    itable_C9,\r
    itable_CA,\r
    itable_CB,\r
    itable_CC,\r
    itable_CD,\r
    itable_CE,\r
    itable_CF,\r
    itable_D0,\r
    itable_D1,\r
    itable_D2,\r
    itable_D3,\r
    itable_D4,\r
    itable_D5,\r
    itable_D6,\r
    itable_D7,\r
    itable_D8,\r
    itable_D9,\r
    itable_DA,\r
    itable_DB,\r
    itable_DC,\r
    itable_DD,\r
    itable_DE,\r
    itable_DF,\r
    itable_E0,\r
    itable_E1,\r
    itable_E2,\r
    itable_E3,\r
    itable_E4,\r
    itable_E5,\r
    itable_E6,\r
    itable_E7,\r
    itable_E8,\r
    itable_E9,\r
    itable_EA,\r
    itable_EB,\r
    itable_EC,\r
    itable_ED,\r
    itable_EE,\r
    itable_EF,\r
    itable_F0,\r
    itable_F1,\r
    itable_F2,\r
    itable_F3,\r
    itable_F4,\r
    itable_F5,\r
    itable_F6,\r
    itable_F7,\r
    itable_F8,\r
    itable_F9,\r
    itable_FA,\r
    itable_FB,\r
    itable_FC,\r
    itable_FD,\r
    itable_FE,\r
    itable_FF,\r
};\r