[simh.git] / AltairZ80 / s100_mdriveh.c

/*************************************************************************\r
 *                                                                       *\r
 * $Id: s100_mdriveh.c 1773 2008-01-11 05:46:19Z hharte $                *\r
 *                                                                       *\r
 * Copyright (c) 2007-2008 Howard M. Harte.                              *\r
 * http://www.hartetec.com                                               *\r
 *                                                                       *\r
 * Permission is hereby granted, free of charge, to any person obtaining *\r
 * a copy of this software and associated documentation files (the       *\r
 * "Software"), to deal in the Software without restriction, including   *\r
 * without limitation the rights to use, copy, modify, merge, publish,   *\r
 * distribute, sublicense, and/or sell copies of the Software, and to    *\r
 * permit persons to whom the Software is furnished to do so, subject to *\r
 * the following conditions:                                             *\r
 *                                                                       *\r
 * The above copyright notice and this permission notice shall be        *\r
 * included in all copies or substantial portions of the Software.       *\r
 *                                                                       *\r
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,       *\r
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF    *\r
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND                 *\r
 * NONINFRINGEMENT. IN NO EVENT SHALL HOWARD M. HARTE BE LIABLE FOR ANY  *\r
 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,  *\r
 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE     *\r
 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.                *\r
 *                                                                       *\r
 * Except as contained in this notice, the name of Howard M. Harte shall *\r
 * not be used in advertising or otherwise to promote the sale, use or   *\r
 * other dealings in this Software without prior written authorization   *\r
 * Howard M. Harte.                                                      *\r
 *                                                                       *\r
 * SIMH Interface based on altairz80_hdsk.c, by Peter Schorn.            *\r
 *                                                                       *\r
 * Module Description:                                                   *\r
 *     CompuPro M-DRIVE/H Controller module for SIMH.                    *\r
 *                                                                       *\r
 * Environment:                                                          *\r
 *     User mode only                                                    *\r
 *                                                                       *\r
 *************************************************************************/\r
\r
/*#define DBG_MSG */\r
\r
#include "altairz80_defs.h"\r
\r
#if defined (_WIN32)\r
#include <windows.h>\r
#endif\r
\r
#ifdef DBG_MSG\r
#define DBG_PRINT(args) printf args\r
#else\r
#define DBG_PRINT(args)\r
#endif\r
\r
#define SEEK_MSG    0x01\r
#define RD_DATA_MSG 0x08\r
#define WR_DATA_MSG 0x10\r
#define VERBOSE_MSG 0x80\r
\r
#define MDRIVEH_MAX_DRIVES    8\r
\r
typedef struct {\r
    PNP_INFO    pnp;    /* Plug and Play */\r
    uint32 dma_addr;    /* DMA Transfer Address */\r
    UNIT uptr[MDRIVEH_MAX_DRIVES];\r
    uint8 *storage[MDRIVEH_MAX_DRIVES];\r
} MDRIVEH_INFO;\r
\r
static MDRIVEH_INFO mdriveh_info_data = { { 0x0, 0, 0xC6, 2 } };\r
static MDRIVEH_INFO *mdriveh_info = &mdriveh_info_data;\r
\r
extern uint32 PCX;\r
extern t_stat set_iobase(UNIT *uptr, int32 val, char *cptr, void *desc);\r
extern t_stat show_iobase(FILE *st, UNIT *uptr, int32 val, void *desc);\r
extern uint32 sim_map_resource(uint32 baseaddr, uint32 size, uint32 resource_type,\r
        int32 (*routine)(const int32, const int32, const int32), uint8 unmap);\r
\r
extern REG *sim_PC;\r
\r
#define UNIT_V_MDRIVEH_WLK      (UNIT_V_UF + 0) /* write locked                             */\r
#define UNIT_MDRIVEH_WLK        (1 << UNIT_V_MDRIVEH_WLK)\r
#define UNIT_V_MDRIVEH_VERBOSE  (UNIT_V_UF + 1) /* verbose mode, i.e. show error messages   */\r
#define UNIT_MDRIVEH_VERBOSE    (1 << UNIT_V_MDRIVEH_VERBOSE)\r
#define MDRIVEH_CAPACITY        (512 * 1000)    /* Default M-DRIVE/H Capacity               */\r
#define MDRIVEH_NONE            0\r
\r
static t_stat mdriveh_reset(DEVICE *mdriveh_dev);\r
static int32 mdrivehdev(const int32 port, const int32 io, const int32 data);\r
static uint8 MDRIVEH_Read(const uint32 Addr);\r
static uint8 MDRIVEH_Write(const uint32 Addr, uint8 cData);\r
\r
static int32 trace_level = 0;       /* Disable all tracing by default */\r
\r
static UNIT mdriveh_unit[] = {\r
    { UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_ROABLE, MDRIVEH_CAPACITY) },\r
    { UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_DIS + UNIT_ROABLE, MDRIVEH_CAPACITY) },\r
    { UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_DIS + UNIT_ROABLE, MDRIVEH_CAPACITY) },\r
    { UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_DIS + UNIT_ROABLE, MDRIVEH_CAPACITY) },\r
    { UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_DIS + UNIT_ROABLE, MDRIVEH_CAPACITY) },\r
    { UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_DIS + UNIT_ROABLE, MDRIVEH_CAPACITY) },\r
    { UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_DIS + UNIT_ROABLE, MDRIVEH_CAPACITY) },\r
    { UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_DIS + UNIT_ROABLE, MDRIVEH_CAPACITY) }\r
};\r
\r
static REG mdriveh_reg[] = {\r
    { HRDATA (TRACELEVEL, trace_level, 16), },\r
    { NULL }\r
};\r
\r
static MTAB mdriveh_mod[] = {\r
    { MTAB_XTD|MTAB_VDV,    0,                      "IOBASE",   "IOBASE",   &set_iobase, &show_iobase, NULL },\r
    { UNIT_MDRIVEH_WLK,     0,                      "WRTENB",   "WRTENB",   NULL  },\r
    { UNIT_MDRIVEH_WLK,     UNIT_MDRIVEH_WLK,       "WRTLCK",   "WRTLCK",   NULL  },\r
    /* quiet, no warning messages       */\r
    { UNIT_MDRIVEH_VERBOSE, 0,                      "QUIET",    "QUIET",    NULL   },\r
    /* verbose, show warning messages   */\r
    { UNIT_MDRIVEH_VERBOSE, UNIT_MDRIVEH_VERBOSE,   "VERBOSE",  "VERBOSE",  NULL },\r
    { 0 }\r
};\r
\r
DEVICE mdriveh_dev = {\r
    "MDRIVEH", mdriveh_unit, mdriveh_reg, mdriveh_mod,\r
    MDRIVEH_MAX_DRIVES, 10, 31, 1, MDRIVEH_MAX_DRIVES, MDRIVEH_MAX_DRIVES,\r
    NULL, NULL, &mdriveh_reset,\r
    NULL, NULL, NULL,\r
    &mdriveh_info_data, (DEV_DISABLE | DEV_DIS), 0,\r
    NULL, NULL, NULL\r
};\r
\r
\r
/* Reset routine */\r
static t_stat mdriveh_reset(DEVICE *dptr)\r
{\r
    uint8 i;\r
    PNP_INFO *pnp = (PNP_INFO *)dptr->ctxt;\r
\r
    if(dptr->flags & DEV_DIS) { /* Disconnect ROM and I/O Ports */\r
        sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &mdrivehdev, TRUE);\r
    } else {\r
        /* Connect MDRIVEH at base address */\r
        if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &mdrivehdev, FALSE) != 0) {\r
            printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);\r
            return SCPE_ARG;\r
        }\r
    }\r
\r
    for(i=0; i<MDRIVEH_MAX_DRIVES; i++) {\r
        mdriveh_info->uptr[i] = dptr->units[i];\r
        if((dptr->flags & DEV_DIS) || (dptr->units[i].flags & UNIT_DIS)) {\r
            if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE)\r
                printf("MDRIVEH: Unit %d disabled", i);\r
            if(mdriveh_info->storage[i] != NULL) {\r
                if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE)\r
                    printf(", freed 0x%p\n", mdriveh_info->storage[i]);\r
                free(mdriveh_info->storage[i]);\r
                mdriveh_info->storage[i] = NULL;\r
            } else if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE) {\r
                printf(".\n");\r
            }\r
        } else {\r
            if(mdriveh_info->storage[i] == NULL) {\r
                mdriveh_info->storage[i] = calloc(1, 524288);\r
            }\r
            if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE)\r
                printf("MDRIVEH: Unit %d enabled, 512K at 0x%p\n", i, mdriveh_info->storage[i]);\r
        }\r
    }\r
\r
    return SCPE_OK;\r
}\r
\r
static int32 mdrivehdev(const int32 port, const int32 io, const int32 data)\r
{\r
    DBG_PRINT(("MDRIVEH: " ADDRESS_FORMAT " IO %s, Port %02x" NLP, PCX, io ? "WR" : "RD", port));\r
    if(io) {\r
        MDRIVEH_Write(port, data);\r
        return 0;\r
    } else {\r
        return(MDRIVEH_Read(port));\r
    }\r
}\r
\r
#define MDRIVEH_DATA    0   /* R=Drive Status Register / W=DMA Address Register */\r
#define MDRIVEH_ADDR    1   /* R=Unused / W=Motor Control Register */\r
\r
static uint8 MDRIVEH_Read(const uint32 Addr)\r
{\r
    uint8 cData;\r
    uint8 unit;\r
    uint32 offset;\r
\r
    cData = 0xFF;   /* default is High-Z Data */\r
\r
    switch(Addr & 0x1) {\r
        case MDRIVEH_ADDR:\r
            TRACE_PRINT(VERBOSE_MSG, ("MDRIVEH: " ADDRESS_FORMAT " RD Addr = 0x%02x" NLP,\r
                PCX, cData));\r
            break;\r
        case MDRIVEH_DATA:\r
            unit = (mdriveh_info->dma_addr & 0x380000) >> 19;\r
            offset = mdriveh_info->dma_addr & 0x7FFFF;\r
\r
            if(mdriveh_info->storage[unit] != NULL) {\r
                cData = mdriveh_info->storage[unit][offset];\r
            }\r
\r
            TRACE_PRINT(RD_DATA_MSG, ("MDRIVEH: " ADDRESS_FORMAT " RD Data [%x:%05x] = 0x%02x" NLP,\r
                PCX, unit, offset, cData));\r
\r
            /* Increment M-DRIVE/H Data Address */\r
            mdriveh_info->dma_addr++;\r
            mdriveh_info->dma_addr &= 0x3FFFFF;\r
            break;\r
    }\r
\r
    return (cData);\r
}\r
\r
static uint8 MDRIVEH_Write(const uint32 Addr, uint8 cData)\r
{\r
    uint8 result = 0;\r
    uint8 unit;\r
    uint32 offset;\r
\r
    switch(Addr & 0x1) {\r
        case MDRIVEH_ADDR:\r
            mdriveh_info->dma_addr <<= 8;\r
            mdriveh_info->dma_addr &= 0x003FFF00;\r
            mdriveh_info->dma_addr |= cData;\r
            TRACE_PRINT(SEEK_MSG, ("MDRIVEH: " ADDRESS_FORMAT " DMA Address=%06x" NLP,\r
                PCX, mdriveh_info->dma_addr));\r
            break;\r
        case MDRIVEH_DATA:\r
            unit = (mdriveh_info->dma_addr & 0x380000) >> 19;\r
            offset = mdriveh_info->dma_addr & 0x7FFFF;\r
\r
            if(mdriveh_info->storage[unit] != NULL) {\r
                if(mdriveh_info->uptr[unit].flags & UNIT_MDRIVEH_WLK) {\r
                    TRACE_PRINT(WR_DATA_MSG, ("MDRIVEH: " ADDRESS_FORMAT " WR Data [%x:%05x] = Unit Write Locked" NLP,\r
                        PCX, unit, offset));\r
                } else {\r
                    TRACE_PRINT(WR_DATA_MSG, ("MDRIVEH: " ADDRESS_FORMAT " WR Data [%x:%05x] = 0x%02x" NLP,\r
                        PCX, unit, offset, cData));\r
                    mdriveh_info->storage[unit][offset] = cData;\r
                }\r
            } else {\r
                TRACE_PRINT(WR_DATA_MSG, ("MDRIVEH: " ADDRESS_FORMAT " WR Data [%x:%05x] = Unit OFFLINE" NLP,\r
                    PCX, unit, offset));\r
            }\r
\r
            /* Increment M-DRIVE/H Data Address */\r
            mdriveh_info->dma_addr++;\r
            mdriveh_info->dma_addr &= 0x3FFFFF;\r
            break;\r
    }\r
\r
    return (result);\r
}\r
\r
Commit	Line	Data
196ba1fc PH	1	/*************************************************************************\r
	2	* *\r
	3	* $Id: s100_mdriveh.c 1773 2008-01-11 05:46:19Z hharte $ *\r
	4	* *\r
	5	* Copyright (c) 2007-2008 Howard M. Harte. *\r
	6	* http://www.hartetec.com *\r
	7	* *\r
	8	* Permission is hereby granted, free of charge, to any person obtaining *\r
	9	* a copy of this software and associated documentation files (the *\r
	10	* "Software"), to deal in the Software without restriction, including *\r
	11	* without limitation the rights to use, copy, modify, merge, publish, *\r
	12	* distribute, sublicense, and/or sell copies of the Software, and to *\r
	13	* permit persons to whom the Software is furnished to do so, subject to *\r
	14	* the following conditions: *\r
	15	* *\r
	16	* The above copyright notice and this permission notice shall be *\r
	17	* included in all copies or substantial portions of the Software. *\r
	18	* *\r
	19	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, *\r
	20	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF *\r
	21	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND *\r
	22	* NONINFRINGEMENT. IN NO EVENT SHALL HOWARD M. HARTE BE LIABLE FOR ANY *\r
	23	* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, *\r
	24	* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE *\r
	25	* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. *\r
	26	* *\r
	27	* Except as contained in this notice, the name of Howard M. Harte shall *\r
	28	* not be used in advertising or otherwise to promote the sale, use or *\r
	29	* other dealings in this Software without prior written authorization *\r
	30	* Howard M. Harte. *\r
	31	* *\r
	32	* SIMH Interface based on altairz80_hdsk.c, by Peter Schorn. *\r
	33	* *\r
	34	* Module Description: *\r
	35	* CompuPro M-DRIVE/H Controller module for SIMH. *\r
	36	* *\r
	37	* Environment: *\r
	38	* User mode only *\r
	39	* *\r
	40	*************************************************************************/\r
	41	\r
	42	/#define DBG_MSG /\r
	43	\r
	44	#include "altairz80_defs.h"\r
	45	\r
	46	#if defined (_WIN32)\r
	47	#include <windows.h>\r
	48	#endif\r
	49	\r
	50	#ifdef DBG_MSG\r
	51	#define DBG_PRINT(args) printf args\r
	52	#else\r
	53	#define DBG_PRINT(args)\r
	54	#endif\r
	55	\r
	56	#define SEEK_MSG 0x01\r
	57	#define RD_DATA_MSG 0x08\r
	58	#define WR_DATA_MSG 0x10\r
	59	#define VERBOSE_MSG 0x80\r
	60	\r
	61	#define MDRIVEH_MAX_DRIVES 8\r
	62	\r
	63	typedef struct {\r
	64	PNP_INFO pnp; /* Plug and Play */\r
65	uint32 dma_addr; /* DMA Transfer Address */\r
66	UNIT uptr[MDRIVEH_MAX_DRIVES];\r
67	uint8 *storage[MDRIVEH_MAX_DRIVES];\r
68	} MDRIVEH_INFO;\r
69	\r
70	static MDRIVEH_INFO mdriveh_info_data = { { 0x0, 0, 0xC6, 2 } };\r
71	static MDRIVEH_INFO *mdriveh_info = &mdriveh_info_data;\r
72	\r
73	extern uint32 PCX;\r
74	extern t_stat set_iobase(UNIT uptr, int32 val, char cptr, void *desc);\r
75	extern t_stat show_iobase(FILE st, UNIT uptr, int32 val, void *desc);\r
76	extern uint32 sim_map_resource(uint32 baseaddr, uint32 size, uint32 resource_type,\r
77	int32 (*routine)(const int32, const int32, const int32), uint8 unmap);\r
78	\r
79	extern REG *sim_PC;\r
80	\r
81	#define UNIT_V_MDRIVEH_WLK (UNIT_V_UF + 0) /* write locked */\r
82	#define UNIT_MDRIVEH_WLK (1 << UNIT_V_MDRIVEH_WLK)\r
83	#define UNIT_V_MDRIVEH_VERBOSE (UNIT_V_UF + 1) /* verbose mode, i.e. show error messages */\r
84	#define UNIT_MDRIVEH_VERBOSE (1 << UNIT_V_MDRIVEH_VERBOSE)\r
85	#define MDRIVEH_CAPACITY (512 * 1000) /* Default M-DRIVE/H Capacity */\r
86	#define MDRIVEH_NONE 0\r
87	\r
88	static t_stat mdriveh_reset(DEVICE *mdriveh_dev);\r
89	static int32 mdrivehdev(const int32 port, const int32 io, const int32 data);\r
90	static uint8 MDRIVEH_Read(const uint32 Addr);\r
91	static uint8 MDRIVEH_Write(const uint32 Addr, uint8 cData);\r
92	\r
93	static int32 trace_level = 0; /* Disable all tracing by default */\r
94	\r
95	static UNIT mdriveh_unit[] = {\r
96	{ UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_ROABLE, MDRIVEH_CAPACITY) },\r
97	{ UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_DIS + UNIT_ROABLE, MDRIVEH_CAPACITY) },\r
98	{ UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_DIS + UNIT_ROABLE, MDRIVEH_CAPACITY) },\r
99	{ UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_DIS + UNIT_ROABLE, MDRIVEH_CAPACITY) },\r
100	{ UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_DIS + UNIT_ROABLE, MDRIVEH_CAPACITY) },\r
101	{ UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_DIS + UNIT_ROABLE, MDRIVEH_CAPACITY) },\r
102	{ UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_DIS + UNIT_ROABLE, MDRIVEH_CAPACITY) },\r
103	{ UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_DIS + UNIT_ROABLE, MDRIVEH_CAPACITY) }\r
104	};\r
105	\r
106	static REG mdriveh_reg[] = {\r
107	{ HRDATA (TRACELEVEL, trace_level, 16), },\r
108	{ NULL }\r
109	};\r
110	\r
111	static MTAB mdriveh_mod[] = {\r
112	{ MTAB_XTD\|MTAB_VDV, 0, "IOBASE", "IOBASE", &set_iobase, &show_iobase, NULL },\r
113	{ UNIT_MDRIVEH_WLK, 0, "WRTENB", "WRTENB", NULL },\r
114	{ UNIT_MDRIVEH_WLK, UNIT_MDRIVEH_WLK, "WRTLCK", "WRTLCK", NULL },\r
115	/* quiet, no warning messages */\r
116	{ UNIT_MDRIVEH_VERBOSE, 0, "QUIET", "QUIET", NULL },\r
117	/* verbose, show warning messages */\r
118	{ UNIT_MDRIVEH_VERBOSE, UNIT_MDRIVEH_VERBOSE, "VERBOSE", "VERBOSE", NULL },\r
119	{ 0 }\r
120	};\r
121	\r
122	DEVICE mdriveh_dev = {\r
123	"MDRIVEH", mdriveh_unit, mdriveh_reg, mdriveh_mod,\r
124	MDRIVEH_MAX_DRIVES, 10, 31, 1, MDRIVEH_MAX_DRIVES, MDRIVEH_MAX_DRIVES,\r
125	NULL, NULL, &mdriveh_reset,\r
126	NULL, NULL, NULL,\r
127	&mdriveh_info_data, (DEV_DISABLE \| DEV_DIS), 0,\r
128	NULL, NULL, NULL\r
129	};\r
130	\r
131	\r
132	/* Reset routine */\r
133	static t_stat mdriveh_reset(DEVICE *dptr)\r
134	{\r
135	uint8 i;\r
136	PNP_INFO pnp = (PNP_INFO )dptr->ctxt;\r
137	\r
138	if(dptr->flags & DEV_DIS) { /* Disconnect ROM and I/O Ports */\r
139	sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &mdrivehdev, TRUE);\r
140	} else {\r
141	/* Connect MDRIVEH at base address */\r
142	if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &mdrivehdev, FALSE) != 0) {\r
143	printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);\r
144	return SCPE_ARG;\r
145	}\r
146	}\r
147	\r
148	for(i=0; i<MDRIVEH_MAX_DRIVES; i++) {\r
149	mdriveh_info->uptr[i] = dptr->units[i];\r
150	if((dptr->flags & DEV_DIS) \|\| (dptr->units[i].flags & UNIT_DIS)) {\r
151	if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE)\r
152	printf("MDRIVEH: Unit %d disabled", i);\r
153	if(mdriveh_info->storage[i] != NULL) {\r
154	if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE)\r
155	printf(", freed 0x%p\n", mdriveh_info->storage[i]);\r
156	free(mdriveh_info->storage[i]);\r
157	mdriveh_info->storage[i] = NULL;\r
158	} else if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE) {\r
159	printf(".\n");\r
160	}\r
161	} else {\r
162	if(mdriveh_info->storage[i] == NULL) {\r
163	mdriveh_info->storage[i] = calloc(1, 524288);\r
164	}\r
165	if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE)\r
166	printf("MDRIVEH: Unit %d enabled, 512K at 0x%p\n", i, mdriveh_info->storage[i]);\r
167	}\r
168	}\r
169	\r
170	return SCPE_OK;\r
171	}\r
172	\r
173	static int32 mdrivehdev(const int32 port, const int32 io, const int32 data)\r
174	{\r
175	DBG_PRINT(("MDRIVEH: " ADDRESS_FORMAT " IO %s, Port %02x" NLP, PCX, io ? "WR" : "RD", port));\r
176	if(io) {\r
177	MDRIVEH_Write(port, data);\r
178	return 0;\r
179	} else {\r
180	return(MDRIVEH_Read(port));\r
181	}\r
182	}\r
183	\r
184	#define MDRIVEH_DATA 0 /* R=Drive Status Register / W=DMA Address Register */\r
185	#define MDRIVEH_ADDR 1 /* R=Unused / W=Motor Control Register */\r
186	\r
187	static uint8 MDRIVEH_Read(const uint32 Addr)\r
188	{\r
189	uint8 cData;\r
190	uint8 unit;\r
191	uint32 offset;\r
192	\r
193	cData = 0xFF; /* default is High-Z Data */\r
194	\r
195	switch(Addr & 0x1) {\r
196	case MDRIVEH_ADDR:\r
197	TRACE_PRINT(VERBOSE_MSG, ("MDRIVEH: " ADDRESS_FORMAT " RD Addr = 0x%02x" NLP,\r
198	PCX, cData));\r
199	break;\r
200	case MDRIVEH_DATA:\r
201	unit = (mdriveh_info->dma_addr & 0x380000) >> 19;\r
202	offset = mdriveh_info->dma_addr & 0x7FFFF;\r
203	\r
204	if(mdriveh_info->storage[unit] != NULL) {\r
205	cData = mdriveh_info->storage[unit][offset];\r
206	}\r
207	\r
208	TRACE_PRINT(RD_DATA_MSG, ("MDRIVEH: " ADDRESS_FORMAT " RD Data [%x:%05x] = 0x%02x" NLP,\r
209	PCX, unit, offset, cData));\r
210	\r
211	/* Increment M-DRIVE/H Data Address */\r
212	mdriveh_info->dma_addr++;\r
213	mdriveh_info->dma_addr &= 0x3FFFFF;\r
214	break;\r
215	}\r
216	\r
217	return (cData);\r
218	}\r
219	\r
220	static uint8 MDRIVEH_Write(const uint32 Addr, uint8 cData)\r
221	{\r
222	uint8 result = 0;\r
223	uint8 unit;\r
224	uint32 offset;\r
225	\r
226	switch(Addr & 0x1) {\r
227	case MDRIVEH_ADDR:\r
228	mdriveh_info->dma_addr <<= 8;\r
229	mdriveh_info->dma_addr &= 0x003FFF00;\r
230	mdriveh_info->dma_addr \|= cData;\r
231	TRACE_PRINT(SEEK_MSG, ("MDRIVEH: " ADDRESS_FORMAT " DMA Address=%06x" NLP,\r
232	PCX, mdriveh_info->dma_addr));\r
233	break;\r
234	case MDRIVEH_DATA:\r
235	unit = (mdriveh_info->dma_addr & 0x380000) >> 19;\r
236	offset = mdriveh_info->dma_addr & 0x7FFFF;\r
237	\r
238	if(mdriveh_info->storage[unit] != NULL) {\r
239	if(mdriveh_info->uptr[unit].flags & UNIT_MDRIVEH_WLK) {\r
240	TRACE_PRINT(WR_DATA_MSG, ("MDRIVEH: " ADDRESS_FORMAT " WR Data [%x:%05x] = Unit Write Locked" NLP,\r
241	PCX, unit, offset));\r
242	} else {\r
243	TRACE_PRINT(WR_DATA_MSG, ("MDRIVEH: " ADDRESS_FORMAT " WR Data [%x:%05x] = 0x%02x" NLP,\r
244	PCX, unit, offset, cData));\r
245	mdriveh_info->storage[unit][offset] = cData;\r
246	}\r
247	} else {\r
248	TRACE_PRINT(WR_DATA_MSG, ("MDRIVEH: " ADDRESS_FORMAT " WR Data [%x:%05x] = Unit OFFLINE" NLP,\r
249	PCX, unit, offset));\r
250	}\r
251	\r
252	/* Increment M-DRIVE/H Data Address */\r
253	mdriveh_info->dma_addr++;\r
254	mdriveh_info->dma_addr &= 0x3FFFFF;\r
255	break;\r
256	}\r
257	\r
258	return (result);\r
259	}\r
260	\r