First Commit of my working state

[simh.git] / AltairZ80 / s100_selchan.c

/*************************************************************************\r
 *                                                                       *\r
 * $Id: s100_selchan.c 1771 2008-01-09 07:10:46Z hharte $                *\r
 *                                                                       *\r
 * Copyright (c) 2007-2008 Howard M. Harte.                              *\r
 * http://www.hartetec.com                                               *\r
 *                                                                       *\r
 * Permission is hereby granted, free of charge, to any person obtaining *\r
 * a copy of this software and associated documentation files (the       *\r
 * "Software"), to deal in the Software without restriction, including   *\r
 * without limitation the rights to use, copy, modify, merge, publish,   *\r
 * distribute, sublicense, and/or sell copies of the Software, and to    *\r
 * permit persons to whom the Software is furnished to do so, subject to *\r
 * the following conditions:                                             *\r
 *                                                                       *\r
 * The above copyright notice and this permission notice shall be        *\r
 * included in all copies or substantial portions of the Software.       *\r
 *                                                                       *\r
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,       *\r
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF    *\r
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND                 *\r
 * NONINFRINGEMENT. IN NO EVENT SHALL HOWARD M. HARTE BE LIABLE FOR ANY  *\r
 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,  *\r
 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE     *\r
 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.                *\r
 *                                                                       *\r
 * Except as contained in this notice, the name of Howard M. Harte shall *\r
 * not be used in advertising or otherwise to promote the sale, use or   *\r
 * other dealings in this Software without prior written authorization   *\r
 * Howard M. Harte.                                                      *\r
 *                                                                       *\r
 * SIMH Interface based on altairz80_hdsk.c, by Peter Schorn.            *\r
 *                                                                       *\r
 * Module Description:                                                   *\r
 *     CompuPro Selector Channel module for SIMH.                        *\r
 *                                                                       *\r
 * Environment:                                                          *\r
 *     User mode only                                                    *\r
 *                                                                       *\r
 *************************************************************************/\r
\r
/*#define DBG_MSG */\r
\r
#include "altairz80_defs.h"\r
\r
#if defined (_WIN32)\r
#include <windows.h>\r
#endif\r
\r
#ifdef DBG_MSG\r
#define DBG_PRINT(args) printf args\r
#else\r
#define DBG_PRINT(args)\r
#endif\r
\r
#define TRACE_MSG   0x01\r
#define DMA_MSG     0x02\r
\r
#define SELCHAN_MAX_DRIVES    1\r
\r
#define UNIT_V_SELCHAN_VERBOSE     (UNIT_V_UF + 1) /* verbose mode, i.e. show error messages   */\r
#define UNIT_SELCHAN_VERBOSE       (1 << UNIT_V_SELCHAN_VERBOSE)\r
\r
typedef struct {\r
    PNP_INFO    pnp;    /* Plug and Play */\r
    uint32  selchan;    /* Selector Channel Register */\r
    uint32  dma_addr;   /* DMA Transfer Address */\r
    uint32  dma_mode;   /* DMA Mode register */\r
    uint8   reg_cnt;    /* Counter for selchan register */\r
} SELCHAN_INFO;\r
\r
static SELCHAN_INFO selchan_info_data = { { 0x0, 0, 0xF0, 1 } };\r
static SELCHAN_INFO *selchan_info = &selchan_info_data;\r
int32 selchan_dma(uint8 *buf, uint32 len);\r
\r
extern t_stat set_iobase(UNIT *uptr, int32 val, char *cptr, void *desc);\r
extern t_stat show_iobase(FILE *st, UNIT *uptr, int32 val, void *desc);\r
extern uint32 sim_map_resource(uint32 baseaddr, uint32 size, uint32 resource_type,\r
        int32 (*routine)(const int32, const int32, const int32), uint8 unmap);\r
extern uint32 PCX;\r
extern REG *sim_PC;\r
\r
/* These are needed for DMA.  PIO Mode has not been implemented yet. */\r
extern void PutBYTEWrapper(const uint32 Addr, const uint32 Value);\r
extern uint8 GetBYTEWrapper(const uint32 Addr);\r
\r
static t_stat selchan_reset(DEVICE *selchan_dev);\r
\r
static int32 selchandev(const int32 port, const int32 io, const int32 data);\r
\r
static int32 trace_level    = 0;        /* Disable all tracing by default */\r
\r
static UNIT selchan_unit[] = {\r
    { UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_ROABLE, 0) }\r
};\r
\r
static REG selchan_reg[] = {\r
    { HRDATA (TRACELEVEL,   trace_level,           16), },\r
    { NULL }\r
};\r
\r
static MTAB selchan_mod[] = {\r
    { MTAB_XTD|MTAB_VDV,    0,                      "IOBASE",   "IOBASE",   &set_iobase, &show_iobase, NULL },\r
    /* quiet, no warning messages       */\r
    { UNIT_SELCHAN_VERBOSE, 0,                      "QUIET",    "QUIET",    NULL },\r
    /* verbose, show warning messages   */\r
    { UNIT_SELCHAN_VERBOSE, UNIT_SELCHAN_VERBOSE,   "VERBOSE",  "VERBOSE",  NULL },\r
    { 0 }\r
};\r
\r
DEVICE selchan_dev = {\r
    "SELCHAN", selchan_unit, selchan_reg, selchan_mod,\r
    SELCHAN_MAX_DRIVES, 10, 31, 1, SELCHAN_MAX_DRIVES, SELCHAN_MAX_DRIVES,\r
    NULL, NULL, &selchan_reset,\r
    NULL, NULL, NULL,\r
    &selchan_info_data, (DEV_DISABLE | DEV_DIS), 0,\r
    NULL, NULL, NULL\r
};\r
\r
/* Reset routine */\r
static t_stat selchan_reset(DEVICE *dptr)\r
{\r
    PNP_INFO *pnp = (PNP_INFO *)dptr->ctxt;\r
\r
    if(dptr->flags & DEV_DIS) { /* Disconnect I/O Ports */\r
        sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &selchandev, TRUE);\r
    } else {\r
        /* Connect SELCHAN at base address */\r
        if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &selchandev, FALSE) != 0) {\r
            printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);\r
            return SCPE_ARG;\r
        }\r
    }\r
    return SCPE_OK;\r
}\r
\r
#define SELCHAN_MODE_WRITE  0x80    /* Selector Channel Memory or I/O Write */\r
#define SELCHAN_MODE_IO     0x40    /* Set if I/O Access, otherwise memory */\r
#define SELCHAN_MODE_CNT_UP 0x20    /* Set = DMA Address Count Up, otherwise down. (Mem only */\r
#define SELCHAN_MODE_WAIT   0x10    /* Insert one wait state. */\r
#define SELCHAN_MODE_DMA_MASK   0x0F    /* Mask for DMA Priority field */\r
\r
static int32 selchandev(const int32 port, const int32 io, const int32 data)\r
{\r
    DBG_PRINT(("SELCHAN: IO %s, Port %02x" NLP, io ? "WR" : "RD", port));\r
    if(io) {\r
        selchan_info->selchan <<= 8;\r
        selchan_info->selchan &= 0xFFFFFF00;\r
        selchan_info->selchan |= data;\r
\r
        selchan_info->dma_addr = (selchan_info->selchan & 0xFFFFF00) >> 8;\r
        selchan_info->dma_mode = (selchan_info->selchan & 0xFF);\r
\r
        selchan_info->reg_cnt ++;\r
\r
        if(selchan_info->reg_cnt == 4) {\r
            TRACE_PRINT(TRACE_MSG, ("SELCHAN: " ADDRESS_FORMAT " DMA=0x%06x, Mode=0x%02x (%s, %s, %s)" NLP,\r
                PCX,\r
                selchan_info->dma_addr,\r
                selchan_info->dma_mode,\r
                selchan_info->dma_mode & SELCHAN_MODE_WRITE ? "WR" : "RD",\r
                selchan_info->dma_mode & SELCHAN_MODE_IO ? "I/O" : "MEM",\r
                selchan_info->dma_mode & SELCHAN_MODE_IO ? "FIX" : selchan_info->dma_mode & SELCHAN_MODE_CNT_UP ? "INC" : "DEC"));\r
        }\r
\r
        return 0;\r
    } else {\r
        TRACE_PRINT(TRACE_MSG, ("SELCHAN: " ADDRESS_FORMAT " Reset" NLP, PCX));\r
        selchan_info->reg_cnt = 0;\r
        return(0xFF);\r
    }\r
}\r
\r
int32 selchan_dma(uint8 *buf, uint32 len)\r
{\r
    uint32 i;\r
\r
    if(selchan_info->reg_cnt != 4) {\r
        printf("SELCHAN: " ADDRESS_FORMAT " Programming error: selector channel disabled." NLP,\r
            PCX);\r
        return (-1);\r
    }\r
\r
    if(selchan_info->dma_mode & SELCHAN_MODE_IO)\r
    {\r
        printf("SELCHAN: " ADDRESS_FORMAT " I/O Not supported" NLP, PCX);\r
        return (-1);\r
    } else {\r
        TRACE_PRINT(DMA_MSG, ("SELCHAN: " ADDRESS_FORMAT " DMA %s Transfer, len=%d" NLP,\r
            PCX,\r
            (selchan_info->dma_mode & SELCHAN_MODE_WRITE) ? "WR" : "RD", len));\r
        for(i=0;i<len;i++) {\r
            if(selchan_info->dma_mode & SELCHAN_MODE_WRITE) {\r
                PutBYTEWrapper(selchan_info->dma_addr + i, buf[i]);\r
            } else {\r
                buf[i] = GetBYTEWrapper(selchan_info->dma_addr + i);\r
            }\r
        }\r
\r
        if(selchan_info->dma_mode & SELCHAN_MODE_CNT_UP) {\r
            selchan_info->dma_addr += i;\r
        } else {\r
            selchan_info->dma_addr -= i;\r
        }\r
    }\r
\r
    return(0);\r
}\r