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[simh.git] / HP2100 / hp2100_diag.txt
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PH		 1 SIMH/HP 21XX DIAGNOSTICS PERFORMANCE\r
2 ====================================\r
3 Last update: 2008-05-10\r
4\r
5\r
6The HP 24396 diagnostic suite has been run against the SIMH HP 21xx simulation.\r
7Diagnostic programs were obtained from two magnetic tapes, HP 24396-13601 Rev.\r
81713 and Rev. 2326, plus a few standalone paper tapes. For each diagnostic, the\r
9recommended standard tests were selected, plus any available optional tests that\r
10broadened the test coverage.\r
11\r
12Except where noted in the individual diagnostic reports, the test system\r
13configuration is the default SIMH configuration with these alterations:\r
14\r
15 * All I/O devices are enabled.\r
16 * The CPU is configured as a 1000-E with 128KW of memory.\r
17\r
18Detailed diagnostic configuration, operation, and results are given after the\r
19summary table. These may be used to duplicate the diagnostic results.\r
20\r
21\r
22The results of the diagnostic runs are summarized below:\r
23\r
24 Date SIMH\r
25 DSN Diagnostic Name Code Vers. Result\r
26------ --------------------------------------- ---- ----- -------------\r
27000200 Diagnostic Configurator Pretest 1627 3.2-3 Passed\r
28\r
29101100 Memory Reference Instruction Group 1624 3.2-3 Passed\r
30101001 Alter-Skip Instruction Group 1431 3.2-3 Passed\r
31101002 Shift-Rotate Instruction Group 1431 3.2-3 Passed\r
32102200 Core Memory (2100/16/15/14) 1624 3.3-0 Passed\r
33102104 Semiconductor Memory (21MX) 1644 3.2-3 Passed\r
34\r
35101004 EAU Instruction Group 1431 3.2-3 Passed\r
36101207 Floating Point Instruction Group 1551 3.2-3 Passed\r
37102001 Memory Protect 1431 3.7-0 Passed\r
38102002 Memory Parity Check 1431 - No simulation\r
39102305 Memory Protect/Parity Error 1705 3.3-0 Partial\r
40\r
41101206 Power Fail/Auto Restart 1635 - No simulation\r
42141203 I/O Instruction Group - I/O Extender 2326 3.2-3 Passed\r
43143300 General Purpose Register 1813 3.2-3 Passed\r
44101105 Direct Memory Access (2114/15/16) 1502 3.7-0 Passed\r
45101220 Direct Memory Access (2100/21MX) 1705 3.2-3 Passed\r
46\r
47101011 Extended Instruction Group (Index) 1432 3.2-3 Passed\r
48101112 Extended Instruction Group (Word, Byte) 1728 3.2-3 Passed\r
49101110 2100 Fast FORTRAN Package 1632 3.4-0 Partial\r
50101213 M/E-Series Fast FORTRAN Package 1 1822 3.4-0 Passed\r
51101114 M/E-Series Fast FORTRAN Package 2 1632 3.4-0 Passed\r
52101121 F-Series FPP/SIS/FFP 1926 3.7-0 Passed\r
53101016 2000/Access Comm Processor for 2100 1526 3.2-3 Partial\r
54\r
55102103 Memory Expansion Unit 1830 3.2-3 Passed\r
56102103 Semiconductor Memory Microcoded 21MX 1644 - No simulation\r
57103301 Time Base Generator 1830 3.2-3 Passed\r
58103115 12936 Privileged Interrupt 1643 - No simulation\r
59103105 12908/12978 WCS 256 Word 1502 - No simulation\r
60103023 13197 WCS 1024 Word 1640 - No simulation\r
61103207 12889 Hardwired Serial Interface 1717 - No simulation\r
62103122 59310 Interface Bus Interface 1728 - No simulation\r
63\r
64103003 12587 Asynchronous Data Set Interface 1552 - No simulation\r
65103110 12920 Asynchronous Multiplexer (Data) 1805 3.7-1 Passed\r
66103011 12920 Asynchronous Multiplexer (Cntl) 1444 3.7-1 Passed\r
67103012 12621 Synchronous Data Set (Receive) 1532 - No simulation\r
68103013 12622 Synchronous Data Set (Send) 1532 - No simulation\r
69103116 12967 Synchronous Interface 1438 - No simulation\r
70103017 12966 Asynchronous Data Set 1519 3.8-0 Passed\r
71103121 12968 Asynchronous Comm. Interface 1602 - No simulation\r
72103024 12821 ICD Disc Interface 1928 - No simulation\r
73\r
74104000 2600 Keyboard Display Terminal 1615 - No simulation\r
75104003 Teleprinter 1509 3.2-3 Partial\r
76144105 2762A/B Terminal (Terminet) 1546 - No simulation\r
77104007 2615 Video Terminal 1347 - No simulation\r
78104011 2640 Interactive Terminal 1502 - No simulation\r
79104012 2644 Mini Data Station (non CTU) 1542 - No simulation\r
80104013 2644 Mini Data Station (CTU Only) 1542 - No simulation\r
81104017 92900 Terminal Subsystem (3070, 40280) 1643 - No simulation\r
82\r
83105000 2610/14 Line Printer 1451 - No simulation\r
84105101 2767 Line Printer 1611 3.3-0 Passed\r
85105102 2607 Line Printer 1446 3.3-0 Passed\r
86145103 2613/17/18 Line Printer 1633 - No simulation\r
87105104 9866 Line Printer 1541 - No simulation\r
88105106 2631 Printer 1913 - No simulation\r
89105107 2635 Printing Terminal 1913 - No simulation\r
90105105 2608 Line Printer 2026 - No simulation\r
91\r
92111001 Disc File (2883) 1451 3.3-0 Partial\r
93111104 12732 Flexible Disc Subsystem 1708 - No simulation\r
94151302 7900/01 Cartridge Disc 1805 3.2-3 Partial\r
95151403 7905/06/20/25 Disc 1805 3.3-1 Partial\r
96104117 92900 Terminal Subsystem 1814 - No simulation\r
97\r
98112200 9-Track Magnetic Tape (7970, 13181/3) 2040 3.2-3 Partial\r
99112102 7/9-Track Magnetic Tape (13184 Interf.) 1629 - No simulation\r
100010000 Diagnostic Cross Link 1627 - No simulation\r
101011000 7900/05/20 Disc Initialization 1627 - No simulation\r
102146200 Paper Tape Reader/Punch 1725 3.2-3 Passed\r
103107000 Digital Plotter Interface (CALCOMP) 1540 - No simulation\r
104113100 2892 Card Reader 1537 - No simulation\r
105113001 2894 Card Reader Punch 1728 - No simulation\r
106113003 7261 Card Reader 1546 - No simulation\r
107103006 12909B PROM Writer 1420 - No simulation\r
108\r
109\r
110The following stand-alone diagnostics were run for devices not supported by the\r
11124396 suite:\r
112\r
113 Date SIMH\r
114Part Number DSN Diagnostic Name Code Vers. Result\r
115----------- ------ ------------------------------------ ---- ----- ----------\r
11613207-16001 101217 2000/Access Comm Processor for 21MX 1728 3.2-3 Passed\r
11720433-????? -- HP 3030 Magnetic Tape Subsystem -- - Not tested\r
11822682-16017 177777 HP 2100 Fixed Head Disc/Drum (277x) 1612 3.3-0 Passed\r
11924197-60001 -- 12875 Processor Interconnect Cable B 3.7-1 Passed\r
12024203-60001 -- HP2100A Cartridge Disc Memory (2871) A 3.3-0 Partial\r
121\r
122\r
123The following online diagnostics were run for devices not supported by the\r
124offline diagnostics:\r
125\r
126 Date Host Date SIMH\r
127Part Number Diagnostic Name Code Op. Sys. Code Vers. Result\r
128----------- ------------------------------- ---- -------- ---- ----- ----------\r
12992067-16013 Extended Memory Area Firmware 1805 RTE-IVB 5010 3.8-0 Passed\r
13092084-16423 Virtual Memory Area Firmware 2121 RTE-6/VM 6200 3.8-0 Passed\r
13112824-16002 Vector Instruction Set Firmware 2026 RTE-IVB 5010 3.8-0 Passed\r
13212829-16006 Vector Instruction Set Firmware 2226 RTE-6/VM 6200 3.8-0 Passed\r
13392835-16006 SIGNAL/1000 Firmware Diagnostic 2040 RTE-6/VM 6200 3.8-0 Passed\r
134\r
135\r
136The "SIMH Version" is the version number of the earliest SIMH system that was\r
137tested with the given diagnostic. Earlier versions may or may not work\r
138properly.\r
139\r
140The "Result" column indicates the level of success in passing the given\r
141diagnostic:\r
142\r
143 Term Meaning\r
144 ------------- ---------------------------------------------------------------\r
145 Passed All of the standard tests relevant to the hardware model passed\r
146 without error. Optional "utility" tests, where present, were\r
147 not run unless they broadened the test coverage.\r
148\r
149 Partial One or more of the standard tests relevant to the hardware\r
150 model were either excluded or failed as expected, due to known\r
151 limitations in the simulation, e.g., the lack of "defective\r
152 cylinder" flags in a disc simulation.\r
153\r
154 Failed One or more of the standard tests relevant to the hardware\r
155 model failed unexpectedly.\r
156\r
157 Not tested The diagnostic has not been run with the device simulation.\r
158\r
159 No simulation A simulation of the given device does not exist.\r
160\r
161See the "Test Notes" associated with each diagnostic report below for details on\r
162subsets, limitations, or errors encountered.\r
163\r
164\r
165\r
16624396 DIAGNOSTIC SUITE DETAILED EXECUTION AND RESULTS\r
167=====================================================\r
168\r
169Each execution note below presumes that the target diagnostic has been loaded.\r
170For all runs other than the diagnostic configurator pretest, the configurator\r
171was used in automatic mode to load the target diagnostic via its Diagnostic\r
172Serial Number (DSN), as follows:\r
173\r
174 sim> attach -r MSC0 24396-13601_Rev-2326.abin.tape\r
175 sim> deposit S 000000\r
176 sim> boot MSC0\r
177\r
178 HALT instruction 102077\r
179\r
180 sim> deposit A [DSN]\r
181 sim> deposit B 000000\r
182 sim> deposit S 113011\r
183 sim> reset\r
184 sim> go 100\r
185\r
186For the pretest, only the first three commands above were used to load the\r
187diagnostic configurator.\r
188\r
189\r
190\r
191--------------------------------------------\r
192DSN 000200 - Diagnostic Configurator Pretest\r
193--------------------------------------------\r
194\r
195TESTED DEVICE: CPU (hp2100_cpu.c)\r
196\r
197CONFIGURATION: sim> deposit S 000011\r
198 sim> reset\r
199 sim> go 2\r
200\r
201TEST REPORT: HALT instruction 102077\r
202\r
203TEST RESULT: Passed.\r
204\r
205\r
206\r
207-----------------------------------------------\r
208DSN 101100 - Memory Reference Instruction Group\r
209-----------------------------------------------\r
210\r
211TESTED DEVICE: CPU (hp2100_cpu.c)\r
212\r
213CONFIGURATION: sim> deposit S 000000\r
214 sim> reset\r
215 sim> go 100\r
216\r
217TEST REPORT: HALT instruction 102077\r
218\r
219TEST RESULT: Passed.\r
220\r
221\r
222\r
223------------------------------------\r
224DSN 101001 - Alter-Skip Instructions\r
225------------------------------------\r
226\r
227TESTED DEVICE: CPU (hp2100_cpu.c)\r
228\r
229CONFIGURATION: sim> deposit S 000000\r
230 sim> reset\r
231 sim> go 100\r
232\r
233TEST REPORT: HALT instruction 102077\r
234\r
235TEST RESULT: Passed.\r
236\r
237\r
238\r
239--------------------------------------\r
240DSN 101002 - Shift-Rotate Instructions\r
241--------------------------------------\r
242\r
243TESTED DEVICE: CPU (hp2100_cpu.c)\r
244\r
245CONFIGURATION: sim> deposit S 000000\r
246 sim> reset\r
247 sim> go 100\r
248\r
249TEST REPORT: HALT instruction 102077\r
250\r
251TEST RESULT: Passed.\r
252\r
253\r
254\r
255----------------------------------------\r
256DSN 102200 - Core Memory (2100/16/15/14)\r
257----------------------------------------\r
258\r
259TESTED DEVICE: CPU (hp2100_cpu.c)\r
260\r
261CONFIGURATION: sim> set CPU 2100\r
262 sim> set CPU 32K\r
263\r
264 sim> deposit S 000000\r
265 sim> reset\r
266 sim> go 100\r
267\r
268TEST REPORT: HALT instruction 102077\r
269\r
270TEST RESULT: Passed.\r
271\r
272\r
273\r
274---------------------------------\r
275DSN 102104 - Semiconductor Memory\r
276---------------------------------\r
277\r
278TESTED DEVICE: CPU (hp2100_cpu.c)\r
279\r
280CONFIGURATION: sim> deposit S 001000\r
281 sim> reset\r
282 sim> go 100\r
283\r
284 HALT instruction 102075\r
285\r
286 sim> deposit A 054777\r
287 sim> deposit S 000000\r
288 sim> reset\r
289 sim> go\r
290\r
291TEST REPORT: HALT instruction 102077\r
292\r
293TEST RESULT: Passed.\r
294\r
295TEST NOTES: The standard tests 00-10, plus optional tests 13, 14, and 16 are\r
296 executed.\r
297\r
298\r
299\r
300----------------------------------\r
301DSN 101004 - EAU Instruction Group\r
302----------------------------------\r
303\r
304TESTED DEVICE: CPU (hp2100_cpu1.c)\r
305\r
306CONFIGURATION: sim> deposit S 000000\r
307 sim> reset\r
308 sim> go 100\r
309\r
310TEST REPORT: 2100 SERIES EAU DIAGNOSTIC\r
311 END OF PASS 1\r
312\r
313 HALT instruction 102077\r
314\r
315TEST RESULT: Passed.\r
316\r
317\r
318\r
319---------------------------------------------\r
320DSN 101207 - Floating Point Instruction Group\r
321---------------------------------------------\r
322\r
323TESTED DEVICE: CPU (hp2100_cpu2.c)\r
324\r
325CONFIGURATION: sim> deposit S 000000\r
326 sim> reset\r
327 sim> go 100\r
328\r
329TEST REPORT: 2100-21MX FLOATING POINT DIAGNOSTIC\r
330 PASS 000001\r
331\r
332 HALT instruction 102077\r
333\r
334TEST RESULT: Passed.\r
335\r
336\r
337\r
338---------------------------\r
339DSN 102001 - Memory Protect\r
340---------------------------\r
341\r
342TESTED DEVICE: MP (hp2100_cpu.c)\r
343\r
344CONFIGURATION: sim> set CPU 2100\r
345 sim> set CPU 32K\r
346\r
347 sim> deposit S 000000\r
348 sim> reset\r
349 sim> go 100\r
350\r
351TEST REPORT: HP 2100 SERIES MEMORY PROTECT DIAGNOSTIC\r
352 H07. PRESS PRESET (EXT/INT), RUN\r
353\r
354 HALT instruction 102007\r
355\r
356 sim> reset\r
357 sim> go\r
358\r
359 H13. PRESS HALT, PRESET(INT), RUN\r
360 IN LESS THAN 15 SEC.\r
361\r
362 [CTRL+E]\r
363 Simulation stopped\r
364\r
365 sim> reset\r
366 sim> go\r
367\r
368 PASS 000001\r
369\r
370 HALT instruction 102077\r
371\r
372TEST RESULT: Passed.\r
373\r
374\r
375\r
376----------------------------------------\r
377DSN 102305 - Memory Protect/Parity Error\r
378----------------------------------------\r
379\r
380TESTED DEVICE: MP (hp2100_cpu.c)\r
381\r
382CONFIGURATION: sim> set LPS diag\r
383 sim> deposit S 140014\r
384 sim> reset\r
385 sim> go 100\r
386\r
387 HALT instruction 102074\r
388\r
389 sim> deposit S 001000\r
390 sim> reset\r
391 sim> go\r
392\r
393 MEMORY PROTECT-PARITY ERROR DIAGNOSTIC\r
394\r
395 HALT instruction 102075\r
396\r
397 sim> deposit A 035777\r
398 sim> deposit S 000000\r
399 sim> reset\r
400 sim> go\r
401\r
402TEST REPORT: H061 POWER DOWN COMPUTER\r
403 INSTALL JUMPERS PER TABLE 3-5 IN MOD\r
404 POWER UP COMPUTER\r
405\r
406 HALT instruction 102061\r
407\r
408 sim> set MP jsbout,intout,sel1in\r
409 sim> go\r
410\r
411 H314 PRESS HALT,PRESET AND RUN WITHIN 30 SECONDS\r
412\r
413 [CTRL+E]\r
414 Simulation stopped\r
415\r
416 sim> reset\r
417 sim> go\r
418\r
419 PASS 000001\r
420\r
421 H062 POWER DOWN COMPUTER\r
422 SET JUMPERS TO INITIAL SETTINGS\r
423 PER TABLE 3-1 IN MOD\r
424 POWER UP COMPUTER\r
425\r
426 HALT instruction 102062\r
427\r
428 sim> set MP jsbin,intin,sel1out\r
429 sim> go\r
430\r
431 HALT instruction 102077\r
432\r
433TEST RESULT: Partially passed.\r
434\r
435TEST NOTES: Test 10 is not executed. This test verifies parity error\r
436 detection. This feature is not simulated.\r
437\r
438\r
439\r
440----------------------------------\r
441DSN 141103 - I/O Instruction Group\r
442----------------------------------\r
443\r
444TESTED DEVICE: CPU (hp2100_cpu.c)\r
445\r
446CONFIGURATION: sim> set LPS diag\r
447 sim> deposit S 000014\r
448 sim> reset\r
449 sim> go 100\r
450\r
451 HALT instruction 102074\r
452\r
453 sim> deposit S 000000\r
454 sim> reset\r
455 sim> go\r
456\r
457TEST REPORT: I-O INSTRUCTION GROUP & CHANNEL OR\r
458 EXTENDER DIAGNOSTIC DSN 141103\r
459 H033 SET S-REG TO 125252, PRESS RUN\r
460\r
461 HALT instruction 102033\r
462\r
463 sim> deposit S 125252\r
464 sim> go\r
465\r
466 H033 SET S-REG TO 052525, PRESS RUN\r
467\r
468 HALT instruction 102033\r
469\r
470 sim> deposit S 052525\r
471 sim> go\r
472\r
473 H024 PRESS PRESET (EXT&INT),RUN\r
474\r
475 HALT instruction 102024\r
476\r
477 sim> reset\r
478 sim> go\r
479\r
480 PASS 000001\r
481\r
482 HALT instruction 102077\r
483\r
484TEST RESULT: Passed.\r
485\r
486\r
487\r
488-------------------------------------\r
489DSN 143300 - General Purpose Register\r
490-------------------------------------\r
491\r
492TESTED DEVICE: LPS (hp2100_lps.c)\r
493\r
494CONFIGURATION: sim> set LPS diag\r
495 sim> deposit S 000014\r
496 sim> reset\r
497 sim> go 100\r
498\r
499 HALT instruction 102074\r
500\r
501 sim> deposit S 000000\r
502 sim> reset\r
503 sim> go\r
504\r
505TEST REPORT: GENERAL PURPOSE REGISTER DIAGNOSTIC, DSN 143300\r
506 H024 PRESS PRESET (EXT&INT),RUN\r
507\r
508 HALT instruction 102024\r
509\r
510 sim> reset\r
511 sim> go\r
512\r
513 H025 BASIC I-O COMPLETED\r
514\r
515 PASS 000001\r
516\r
517 HALT instruction 102077\r
518\r
519TEST RESULT: Passed.\r
520\r
521\r
522\r
523----------------------------------------------\r
524DSN 101105 - Direct Memory Access (2114/15/16)\r
525----------------------------------------------\r
526\r
527TESTED DEVICE: DMA0/DMA1 (hp2100_cpu.c)\r
528\r
529CONFIGURATION: sim> set CPU 2116\r
530 sim> set CPU 16K\r
531 sim> set LPS diag\r
532\r
533 sim> deposit S 000014\r
534 sim> reset\r
535 sim> go 100\r
536\r
537 HALT instruction 102074\r
538\r
539 sim> deposit S 040000\r
540 sim> reset\r
541 sim> go\r
542\r
543TEST REPORT: H0. START DMA DIAGNOSTIC\r
544\r
545 HALT instruction 102027\r
546\r
547 sim> reset\r
548 sim> go\r
549\r
550 H77. END DIAGNOSTIC\r
551\r
552 HALT instruction 102077\r
553\r
554TEST RESULT: Passed.\r
555\r
556\r
557\r
558---------------------------------------------\r
559DSN 101220 - Direct Memory Access (2100/21MX)\r
560---------------------------------------------\r
561\r
562TESTED DEVICE: DCPC0/DCPC1 (hp2100_cpu.c)\r
563\r
564CONFIGURATION: sim> set LPS diag\r
565 sim> deposit S 000014\r
566 sim> reset\r
567 sim> go 100\r
568\r
569 HALT instruction 102074\r
570\r
571 sim> deposit S 000000\r
572 sim> reset\r
573 sim> go\r
574\r
575TEST REPORT: DMA-DCPC DIAGNOSTIC\r
576\r
577 H324 PRESS PRESET AND RUN\r
578\r
579 HALT instruction 107024\r
580\r
581 sim> reset\r
582 sim> go\r
583\r
584 PASS 000001\r
585\r
586 HALT instruction 102077\r
587\r
588TEST RESULT: Passed.\r
589\r
590\r
591\r
592-----------------------------------------------\r
593DSN 101011 - Extended Instruction Group (Index)\r
594-----------------------------------------------\r
595\r
596TESTED DEVICE: CPU (hp2100_cpu2.c)\r
597\r
598CONFIGURATION: sim> deposit S 000000\r
599 sim> reset\r
600 sim> go 100\r
601\r
602TEST REPORT: EIG (INDEX) DIAGNOSTIC\r
603 PASS 000001\r
604\r
605 HALT instruction 102077\r
606\r
607TEST RESULT: Passed.\r
608\r
609\r
610\r
611---------------------------------------------------------\r
612DSN 101112 - Extended Instruction Group (Word, Byte, Bit)\r
613---------------------------------------------------------\r
614\r
615TESTED DEVICE: CPU (hp2100_cpu2.c)\r
616\r
617CONFIGURATION: sim> set LPS diag\r
618 sim> deposit S 000014\r
619 sim> reset\r
620 sim> go 100\r
621\r
622 HALT instruction 102074\r
623\r
624 sim> deposit S 000000\r
625 sim> reset\r
626 sim> go\r
627\r
628TEST REPORT: EIG (WORD,BYTE,BIT) DIAGNOSTIC DSN 101112\r
629 PASS 000001\r
630\r
631 HALT instruction 102077\r
632\r
633TEST RESULT: Passed.\r
634\r
635\r
636\r
637--------------------------------------\r
638DSN 101110 - 2100 Fast FORTRAN Package\r
639--------------------------------------\r
640\r
641TESTED DEVICE: CPU (hp2100_cpu3.c)\r
642\r
643CONFIGURATION: sim> set CPU 2100\r
644 sim> set CPU 32K\r
645 sim> set CPU FFP\r
646\r
647 sim> deposit S 000013\r
648 sim> reset\r
649 sim> go 100\r
650\r
651 HALT instruction 102074\r
652\r
653 sim> deposit S 000000\r
654 sim> reset\r
655 sim> go\r
656\r
657TEST REPORT: START 2100A-S FFP DIAGNOSTIC\r
658 H030 .GOTO TEST\r
659 H050 .ENTR TEST\r
660 H060 .ENTP TEST\r
661 H100 .SETP TEST\r
662 H110 ..MAP TEST\r
663 H120 SNGL TEST\r
664 H130 DBLE TEST\r
665 H140 .XADD TEST\r
666\r
667 TEST 07\r
668 E142 NOT INTERRUPTIBLE\r
669\r
670 HALT instruction 106042\r
671\r
672 sim> go\r
673\r
674 H150 .XSUB TEST\r
675 H160 .XMPY TEST\r
676\r
677 TEST 11\r
678 E162 NOT INTERRUPTIBLE\r
679\r
680 HALT instruction 106062\r
681\r
682 sim> go\r
683\r
684 H200 .XDIV TEST\r
685 H210 .DFER TEST\r
686 H220 .XFER TEST\r
687 PASS 000001\r
688\r
689 HALT instruction 102077\r
690\r
691TEST RESULT: Partially passed.\r
692\r
693TEST NOTES: Tests 07 and 11 test the interruptibility of the .XADD and .XMPY\r
694 instructions. These features are not simulated.\r
695\r
696\r
697\r
698----------------------------------------------\r
699DSN 101213 - M/E-Series Fast FORTRAN Package 1\r
700----------------------------------------------\r
701\r
702TESTED DEVICE: CPU (hp2100_cpu3.c)\r
703\r
704CONFIGURATION: sim> set CPU FFP\r
705 sim> set LPS diag\r
706\r
707 sim> deposit S 000014\r
708 sim> reset\r
709 sim> go 100\r
710\r
711 HALT instruction 102074\r
712\r
713 sim> deposit S 000000\r
714 sim> reset\r
715 sim> go\r
716\r
717TEST REPORT: START 21MX FFP DIAGNOSTIC 1\r
718 H110 ..MAP TEST\r
719 H120 SNGL TEST\r
720 H130 DBLE TEST\r
721 H210 .DFER TEST\r
722 H220 .XFER TEST\r
723 H230 PWR2 TEST\r
724 H240 .PACK TEST\r
725 H250 FLUN TEST\r
726 H260 .XPAK TEST\r
727 H300 .XCOM TEST\r
728 H310 ..DCM TEST\r
729 H320 DDINT TEST\r
730 H330 .CFER TEST\r
731 PASS 000001\r
732\r
733 HALT instruction 102077\r
734\r
735TEST RESULT: Passed.\r
736\r
737\r
738\r
739----------------------------------------------\r
740DSN 101114 - M/E-Series Fast FORTRAN Package 2\r
741----------------------------------------------\r
742\r
743TESTED DEVICE: CPU (hp2100_cpu3.c)\r
744\r
745CONFIGURATION: sim> set CPU FFP\r
746 sim> set LPS diag\r
747\r
748 sim> deposit S 000014\r
749 sim> reset\r
750 sim> go 100\r
751\r
752 HALT instruction 102074\r
753\r
754 sim> deposit S 000000\r
755 sim> reset\r
756 sim> go\r
757\r
758TEST REPORT: START 21MX FFP DIAGNOSTIC 2\r
759 H030 .GOTO TEST\r
760 H050 .ENTR TEST\r
761 H060 .ENTP TEST\r
762 H100 .SETP TEST\r
763 H115 XADD TEST\r
764 H125 XSUB TEST\r
765 H135 XMPY TEST\r
766 H140 .XADD TEST\r
767 H150 .XSUB TEST\r
768 H160 .XMPY TEST\r
769 H200 .XDIV TEST\r
770 H215 XDIV TEST\r
771 PASS 000001\r
772\r
773 HALT instruction 102077\r
774\r
775TEST RESULT: Passed.\r
776\r
777\r
778\r
779---------------------------------\r
780DSN 101121 - F-Series FPP/SIS/FFP\r
781---------------------------------\r
782\r
783TESTED DEVICE: CPU (hp2100_cpu3.c)\r
784\r
785CONFIGURATION: sim> set CPU 1000-F\r
786 sim> set LPS diag\r
787\r
788 sim> deposit S 000014\r
789 sim> reset\r
790 sim> go 100\r
791\r
792 HALT instruction 102074\r
793\r
794 sim> deposit S 000000\r
795 sim> reset\r
796 sim> go\r
797\r
798TEST REPORT: FPP-SIS-FFP DIAGNOSTIC DSN 101121\r
799 BEGIN BASIC CONTROL TEST\r
800 OVFL TEST\r
801 CONF TEST\r
802 BASE RETN TEST\r
803 SIS1 RETN TEST\r
804 SIS2 RETN TEST\r
805 SIS3 RETN TEST\r
806 FPP1 RETN TEST\r
807 FFP2 RETN TEST\r
808 FFP3 RETN TEST\r
809 END BASIC CONTROL TEST\r
810 LONG PASSES\r
811 FIXS TEST\r
812 FIXD TEST\r
813 FLTS TEST\r
814 FLTD TEST\r
815 ADD TEST\r
816 SUB TEST\r
817 MPY TEST\r
818 DIV TEST\r
819 ACC TEST\r
820 SIS1 TEST\r
821 SIS2 TEST\r
822 SIS3 TEST\r
823 FFP1 TEST\r
824 FFP2 TEST\r
825 FFP3 TEST\r
826 PASS 00001\r
827\r
828 HALT instruction 102077\r
829\r
830TEST RESULT: Passed.\r
831\r
832\r
833\r
834------------------------------------------------\r
835DSN 101016 - 2000/Access Comm Processor for 2100\r
836------------------------------------------------\r
837\r
838TESTED DEVICE: CPU (hp2100_cpu2.c)\r
839\r
840CONFIGURATION: sim> set CPU 2100\r
841 sim> set CPU 32K\r
842 sim> set CPU IOP\r
843\r
844 sim> deposit S 000013\r
845 sim> reset\r
846 sim> go 100\r
847\r
848 HALT instruction 102074\r
849\r
850 sim> deposit S 000000\r
851 sim> reset\r
852 sim> go\r
853\r
854TEST REPORT: 2100 2000-ACCESS COMM. PROC. FIRMWARE DIAGNOSTIC\r
855 H030 CRC TEST\r
856 H040 ENQ, DEQ AND PENQ TESTS\r
857 H060 IAL TEST\r
858 H110 READF, SAVE AND RESTR TESTS\r
859 H120 LAI AND SAI TESTS\r
860 H130 PFREX TEST\r
861 H140 PFREI TEST\r
862 H150 PFRIO TEST\r
863 H160 STORE-LOAD BYTE, TRSLT\r
864 AND BYTE MOVE TEST\r
865\r
866 TEST 10\r
867 E165 TRSLT NOT INTERRUPTIBLE\r
868\r
869 HALT instruction 106065\r
870\r
871 sim> go\r
872\r
873 H230 WORD MOVE TEST\r
874\r
875 TEST 11\r
876 E234 WORD MOVE NOT INTERRUPTIBLE\r
877\r
878 HALT instruction 103034\r
879\r
880 sim> go\r
881\r
882 PASS 000001\r
883\r
884 HALT instruction 102077\r
885\r
886TEST RESULT: Partially passed.\r
887\r
888TEST NOTES: Tests 10 and 11 test the interruptibility of the TRSLT and MWORD\r
889 instructions. These features are not simulated.\r
890\r
891\r
892\r
893----------------------------------\r
894DSN 102103 - Memory Expansion Unit\r
895----------------------------------\r
896\r
897TESTED DEVICE: CPU (hp2100_cpu2.c)\r
898\r
899CONFIGURATION: sim> set LPS diag\r
900 sim> deposit S 000014\r
901 sim> reset\r
902 sim> go 100\r
903\r
904 HALT instruction 102074\r
905\r
906 sim> deposit S 001000\r
907 sim> reset\r
908 sim> go\r
909\r
910 MEMORY EXPANSION MODULE DIAGNOSTIC, DSN = 102103\r
911\r
912 HALT instruction 102075\r
913\r
914 sim> deposit A 177777\r
915 sim> deposit B 000037\r
916 sim> deposit S 000000\r
917 sim> reset\r
918 sim> go\r
919\r
920TEST REPORT: H115 PRESS HALT-PRESET-RUN IN LESS THAN 10 SECONDS\r
921\r
922 [CTRL+E]\r
923 Simulation stopped\r
924\r
925 sim> reset\r
926 sim> go\r
927\r
928 H117 PRESET TEST COMPLETE\r
929 H327 00128K OF CONTIGUOUS MEMORY INSTALLED\r
930 H024 PRESS PRESET, RUN\r
931\r
932 HALT instruction 102024\r
933\r
934 sim> reset\r
935 sim> go\r
936\r
937 H025 BI-O COMP\r
938 PASS 000001\r
939\r
940 HALT instruction 102077\r
941\r
942TEST RESULT: Passed.\r
943\r
944TEST NOTES: The standard tests 00-22 plus optional tests 23 and 24 are\r
945 executed.\r
946\r
947 Test 25 (Register Crusher Test) is not executed. This test is\r
948 designed specifically for the RAM chips present on the hardware\r
949 and isn't relevant to simulation.\r
950\r
951 Test 23 cannot be run with more than 256K of memory, or the\r
952 diagnostic will be corrupted. There is a fixed-size table in\r
953 revision 1830 that overflows if memory size is greater than\r
954 256K.\r
955\r
956\r
957\r
958--------------------------------\r
959DSN 103301 - Time Base Generator\r
960--------------------------------\r
961\r
962TESTED DEVICE: CLK (hp2100_stddev.c)\r
963\r
964CONFIGURATION: sim> set CLK diag\r
965 sim> deposit S 100013\r
966 sim> reset\r
967 sim> go 100\r
968\r
969 HALT instruction 102074\r
970\r
971 sim> deposit S 000000\r
972 sim> reset\r
973 sim> go\r
974\r
975TEST REPORT: TBG DIAGNOSTIC, DSN = 103301\r
976 H024 PRESS PRESET (EXT&INT),RUN\r
977\r
978 HALT instruction 102024\r
979\r
980 sim> reset\r
981 sim> go\r
982\r
983 H025 BI-O COMP\r
984 H030 TEST 01 IN PROGRESS\r
985 H030 TEST 02 IN PROGRESS\r
986 H030 TEST 03 IN PROGRESS\r
987 H030 TEST 04 IN PROGRESS\r
988 H030 TEST 05 IN PROGRESS\r
989 H030 TEST 06 IN PROGRESS\r
990 H030 TEST 07 IN PROGRESS\r
991 H030 TEST 10 IN PROGRESS\r
992 H030 TEST 11 IN PROGRESS\r
993 H030 TEST 12 IN PROGRESS\r
994 PASS 000001\r
995\r
996 HALT instruction 102077\r
997\r
998TEST RESULT: Passed.\r
999\r
1000\r
1001\r
1002---------------------------------------------------\r
1003DSN 103110 - 12920A Asynchronous Multiplexer (Data)\r
1004---------------------------------------------------\r
1005\r
1006TESTED DEVICE: MUX, MUXL (hp2100_mux.c)\r
1007\r
1008CONFIGURATION: sim> set MUX DIAG\r
1009 sim> deposit S 004040\r
1010 sim> reset\r
1011 sim> go 100\r
1012\r
1013 HALT instruction 102074\r
1014\r
1015 sim> deposit S 000000\r
1016 sim> reset\r
1017 sim> go\r
1018\r
1019TEST REPORT: ASYNC MULTIPLEXER DATA BOARD DIAGNOSTIC DSN 103110\r
1020 H024 PRESS PRESET (EXT&INT),RUN\r
1021\r
1022 HALT instruction 102024\r
1023\r
1024 sim> reset\r
1025 sim> go\r
1026\r
1027 H025 BI-O COMP\r
1028 PASS 000001\r
1029\r
1030 HALT instruction 102077\r
1031\r
1032TEST RESULT: Passed.\r
1033\r
1034\r
1035\r
1036---------------------------------------------------\r
1037DSN 103011 - 12920A Asynchronous Multiplexer (Cntl)\r
1038---------------------------------------------------\r
1039\r
1040TESTED DEVICE: MUXM (hp2100_mux.c)\r
1041\r
1042CONFIGURATION: sim> set MUX DIAG\r
1043 sim> deposit S 004042\r
1044 sim> reset\r
1045 sim> go 100\r
1046\r
1047 HALT instruction 102074\r
1048\r
1049 sim> deposit S 000000\r
1050 sim> reset\r
1051 sim> go\r
1052\r
1053TEST REPORT: ASYNC MULTIPLEXER CONTROL BOARD DIAGNOSTIC\r
1054 H024 PRESS PRESET (EXT&INT),RUN\r
1055\r
1056 HALT instruction 102024\r
1057\r
1058 sim> reset\r
1059 sim> go\r
1060\r
1061 H025 BI-O COMP\r
1062 PASS 000001\r
1063\r
1064 HALT instruction 102077\r
1065\r
1066TEST RESULT: Passed.\r
1067\r
1068\r
1069\r
1070----------------------------------------\r
1071DSN 103017 - 12966 Asynchronous Data Set\r
1072----------------------------------------\r
1073\r
1074TESTED DEVICE: BACI (hp2100_baci.c)\r
1075\r
1076CONFIGURATION: sim> set BACI realtime\r
1077 sim> set BACI diag\r
1078 sim> deposit S 000035\r
1079 sim> reset\r
1080 sim> go 100\r
1081\r
1082 HALT instruction 102074\r
1083\r
1084 sim> deposit S 000000\r
1085 sim> reset\r
1086 sim> go\r
1087\r
1088TEST REPORT: BUFFERED ASYNC COMM INTFC DIAG\r
1089 H024 PRESS PRESET (EXT&INT),RUN\r
1090\r
1091 HALT instruction 102024\r
1092\r
1093 sim> reset\r
1094 sim> go\r
1095\r
1096 H025 BI-O COMP\r
1097 PASS 000001\r
1098\r
1099TEST RESULT: Passed.\r
1100\r
1101\r
1102\r
1103------------------------\r
1104DSN 104003 - Teleprinter\r
1105------------------------\r
1106\r
1107TESTED DEVICE: TTY (hp2100_stddev.c)\r
1108\r
1109CONFIGURATION: sim> deposit S 000011\r
1110 sim> reset\r
1111 sim> go 100\r
1112\r
1113 HALT instruction 102074\r
1114\r
1115 sim> deposit S 001000\r
1116 sim> reset\r
1117 sim> go\r
1118\r
1119 START TTY DIAGNOSTIC\r
1120\r
1121 HALT instruction 102075\r
1122\r
1123 sim> deposit A 000373\r
1124 sim> deposit S 000000\r
1125 sim> reset\r
1126 sim> go\r
1127\r
1128TEST REPORT: H024 PRESS PRESET (EXT&INT),RUN\r
1129\r
1130 HALT instruction 102024\r
1131\r
1132 sim> reset\r
1133 sim> go\r
1134\r
1135 H025 BI-O COMP\r
1136 H030 TURN TTY PUNCH ON\r
1137 PRESS RUN\r
1138\r
1139 HALT instruction 102030\r
1140\r
1141 sim> attach TTY2 scratch.2752.punch\r
1142 sim> go\r
1143\r
1144 H045 TURN TTY PUNCH OFF\r
1145 PRESS RUN\r
1146\r
1147 HALT instruction 102045\r
1148\r
1149 sim> detach TTY2\r
1150 sim> deposit S 100000\r
1151 sim> go\r
1152\r
1153 HALT instruction 102076\r
1154\r
1155 sim> go\r
1156\r
1157 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_\r
1158 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_\r
1159 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_\r
1160 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_\r
1161 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_\r
1162 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_\r
1163 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_\r
1164 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_\r
1165 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_\r
1166 !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_\r
1167\r
1168 HALT instruction 102076\r
1169\r
1170 sim> set console WRU=003\r
1171 sim> go\r
1172\r
1173 INPUT THE FOLLOWING:\r
1174 1 2 3 4 5 6 7 8 9 0 : -\r
1175\r
1176 Q W E R T Y U I O P\r
1177\r
1178 A S D F G H J K L ;\r
1179\r
1180 Z X C V B N M , . /\r
1181\r
1182 SHIFT+\r
1183 ! " # $ % & ' ( ) * =\r
1184\r
1185 _ @ + ^ < > ?\r
1186\r
1187 CNTRL+\r
1188 WRU TAPE NTAP XOFF EOT RU BELL TAB VT FORM\r
1189\r
1190\r
1191 RBOT CR LF\r
1192\r
1193\r
1194 HALT instruction 102076\r
1195\r
1196 sim> set console WRU=005\r
1197 sim> go\r
1198\r
1199 INPUT ANY KEY\r
1200 T H I S 040 I S 040 A 040\r
1201 T E S T\r
1202\r
1203 [CTRL+E]\r
1204 Simulation stopped\r
1205\r
1206 sim> deposit S 000002\r
1207 sim> go\r
1208\r
1209 [CTRL+E]\r
1210 Simulation stopped\r
1211\r
1212 sim> deposit S 000000\r
1213 sim> go\r
1214\r
1215 H044 INPUT TERMINATED\r
1216\r
1217 ECHO MODE ANY INPUT IS ECHOED\r
1218 THIS IS A TEST\r
1219\r
1220 [CTRL+E]\r
1221 Simulation stopped\r
1222\r
1223 sim> deposit S 000002\r
1224 sim> go\r
1225\r
1226 [CTRL+E]\r
1227 Simulation stopped\r
1228\r
1229 sim> deposit S 100000\r
1230 sim> go\r
1231\r
1232 H044 INPUT TERMINATED\r
1233\r
1234 HALT instruction 102076\r
1235\r
1236 sim> deposit TTY TTIME 158000\r
1237 sim> deposit S 000000\r
1238 sim> go\r
1239\r
1240 PASS 000001\r
1241\r
1242 HALT instruction 102077\r
1243\r
1244TEST RESULT: Partially passed.\r
1245\r
1246TEST NOTES: Test 2 is not executed. This test uses the teleprinter paper\r
1247 tape reader. This feature is not simulated.\r
1248\r
1249 Test 7 is the oscillator tolerance test, so the TTY TTIME is set\r
1250 for realistic timing.\r
1251\r
1252\r
1253\r
1254------------------------------\r
1255DSN 105101 - 2767 Line Printer\r
1256------------------------------\r
1257\r
1258TESTED DEVICE: LPS (hp2100_lps.c)\r
1259\r
1260CONFIGURATION: sim> set LPS realtime\r
1261 sim> attach LPS scratch.2767.printer\r
1262 sim> deposit S 000014\r
1263 sim> reset\r
1264 sim> go 100\r
1265\r
1266 HALT instruction 102074\r
1267\r
1268 sim> deposit S 000000\r
1269 sim> reset\r
1270 sim> go\r
1271\r
1272TEST REPORT: 2767 L.P. DIAGNOSTIC\r
1273 H024 PRESS PRESET (EXT&INT),RUN\r
1274\r
1275 HALT instruction 102024\r
1276\r
1277 sim> reset\r
1278 sim> go\r
1279\r
1280 H025 BI-O COMP\r
1281 H035 TURN OFF L.P. POWER\r
1282\r
1283 HALT instruction 102035\r
1284\r
1285 sim> set LPS poweroff\r
1286 sim> go\r
1287\r
1288 H036 TURN ON L.P. POWER\r
1289\r
1290 HALT instruction 102036\r
1291\r
1292 sim> set LPS poweron\r
1293 sim> go\r
1294\r
1295 H033 PUT L.P. ON-LINE\r
1296\r
1297 HALT instruction 102033\r
1298\r
1299 sim> set LPS online\r
1300 sim> go\r
1301\r
1302 H034 MASTER CLEAR L.P.\r
1303\r
1304 HALT instruction 102034\r
1305\r
1306 sim> set LPS offline\r
1307 sim> go\r
1308\r
1309 H033 PUT L.P. ON-LINE\r
1310\r
1311 HALT instruction 102033\r
1312\r
1313 sim> set LPS online\r
1314 sim> go\r
1315\r
1316 H040 PUT L.P. OFF-LINE. TOGGLE TOP-OF-FORM SWITCH\r
1317\r
1318 HALT instruction 102040\r
1319\r
1320 sim> set LPS offline\r
1321 sim> go\r
1322\r
1323 H033 PUT L.P. ON-LINE\r
1324\r
1325 HALT instruction 102033\r
1326\r
1327 sim> set LPS online\r
1328 sim> go\r
1329\r
1330 H041 PUT L.P. OFF-LINE. TOGGLE PAPER-STEP 5 TIMES\r
1331\r
1332 HALT instruction 102041\r
1333\r
1334 sim> set LPS offline\r
1335 sim> go\r
1336\r
1337 H033 PUT L.P. ON-LINE\r
1338\r
1339 HALT instruction 102033\r
1340\r
1341 sim> set LPS online\r
1342 sim> go\r
1343\r
1344 PASS 000001\r
1345\r
1346 HALT instruction 102077\r
1347\r
1348TEST RESULT: Passed.\r
1349\r
1350TEST NOTES: The simulation provides no manual Master Clear, Top of Form, or\r
1351 Paper Step functions, so these are merely presumed above.\r
1352\r
1353\r
1354\r
1355------------------------------\r
1356DSN 105102 - 2607 Line Printer\r
1357------------------------------\r
1358\r
1359TESTED DEVICE: LPT (hp2100_lpt.c)\r
1360\r
1361CONFIGURATION: sim> attach LPT scratch.2607.printer\r
1362 sim> deposit S 100015\r
1363 sim> reset\r
1364 sim> go 100\r
1365\r
1366 HALT instruction 102074\r
1367\r
1368 sim> deposit S 001000\r
1369 sim> reset\r
1370 sim> go\r
1371\r
1372 2607 LINE PRINTER DIAGNOSTIC\r
1373\r
1374 HALT instruction 102075\r
1375\r
1376 sim> deposit A 000377\r
1377 sim> deposit S 000000\r
1378 sim> reset\r
1379 sim> go\r
1380\r
1381TEST REPORT: H024 PRESS PRESET (EXT&INT),RUN\r
1382\r
1383 HALT instruction 102024\r
1384\r
1385 sim> reset\r
1386 sim> go\r
1387\r
1388 H025 BI-O COMP\r
1389 H040 PWR OFF LP,PRESS RUN\r
1390\r
1391 HALT instruction 102040\r
1392\r
1393 sim> set LPT poweroff\r
1394 sim> go\r
1395\r
1396 H041 PWR ON LP,READY LP,PRESS RUN\r
1397\r
1398 HALT instruction 102041\r
1399\r
1400 sim> set LPT poweron\r
1401 sim> go\r
1402\r
1403 H042 PRINT SW OFF,PRESS RUN\r
1404\r
1405 HALT instruction 102042\r
1406\r
1407 sim> set LPT offline\r
1408 sim> go\r
1409\r
1410 H043 PRINT SW ON,PRESS RUN\r
1411\r
1412 HALT instruction 102043\r
1413\r
1414 sim> set LPT online\r
1415 sim> go\r
1416\r
1417 H044 OPEN PLATEN,PRESS RUN\r
1418\r
1419 HALT instruction 102044\r
1420\r
1421 sim> set LPT offline\r
1422 sim> go\r
1423\r
1424 H045 CLOSE PLATEN,PRESS RUN\r
1425\r
1426 HALT instruction 102045\r
1427\r
1428 sim> set LPT online\r
1429 sim> go\r
1430\r
1431 H046 REMOVE PAPER FROM LP,PRESS RUN\r
1432\r
1433 HALT instruction 102046\r
1434\r
1435 sim> detach LPT\r
1436 sim> go\r
1437\r
1438 H047 RESTORE PAPER IN LP, READY LP,PRESS RUN\r
1439\r
1440 HALT instruction 102047\r
1441\r
1442 sim> attach LPT scratch.2607.printer\r
1443 sim> go\r
1444\r
1445 PASS 000001\r
1446\r
1447 HALT instruction 102077\r
1448\r
1449TEST RESULT: Passed.\r
1450\r
1451TEST NOTES: The standard tests 00-07 are executed. Test 08 (operator\r
1452 design) is selected as a standard test in this diagnostic only\r
1453 and so is excluded manually.\r
1454\r
1455\r
1456\r
1457-----------------------------------------------------\r
1458DSN 111001 - HP2100A Disc File (2883) (multiple unit)\r
1459-----------------------------------------------------\r
1460\r
1461TESTED DEVICE: DQ (hp2100_dq.c)\r
1462\r
1463CONFIGURATION: sim> attach DQC0 scratch.U0.2883.disc\r
1464 sim> attach DQC1 scratch.U1.2883.disc\r
1465 sim> reset\r
1466 sim> go 100\r
1467\r
1468 H0 HP 2100 SERIES DISC FILE(2883) DIAGNOSTIC\r
1469\r
1470 H72 ENTER SELECT CODES,DMA CHANNEL IN SWITCH REGISTER,PRESS RUN\r
1471\r
1472 HALT instruction 107001\r
1473\r
1474 sim> deposit S 002411\r
1475 sim> go\r
1476\r
1477 H1 ENTER PROGRAM OPTIONS IN SWITCH REGISTER,PRESS RUN\r
1478\r
1479 HALT instruction 107077\r
1480\r
1481 sim> deposit S 000400\r
1482 sim> go\r
1483\r
1484TEST REPORT: H65 PASS 0001\r
1485 H65 PASS 0002\r
1486\r
1487 [CTRL+E]\r
1488 Simulation stopped\r
1489\r
1490TEST RESULT: Passed.\r
1491\r
1492TEST NOTES: Two passes are required to test all head/unit combinations.\r
1493\r
1494\r
1495\r
1496--------------------------------------------------------\r
1497DSN 111001 - HP2100A Disc File (2883) (user interaction)\r
1498--------------------------------------------------------\r
1499\r
1500TESTED DEVICE: DQ (hp2100_dq.c)\r
1501\r
1502CONFIGURATION: sim> attach DQC0 scratch.U0.2883.disc\r
1503 sim> reset\r
1504 sim> go 100\r
1505\r
1506 H0 HP 2100 SERIES DISC FILE(2883) DIAGNOSTIC\r
1507\r
1508 H72 ENTER SELECT CODES,DMA CHANNEL IN SWITCH REGISTER,PRESS RUN\r
1509\r
1510 HALT instruction 107001\r
1511\r
1512 sim> deposit S 002411\r
1513 sim> go\r
1514\r
1515 H1 ENTER PROGRAM OPTIONS IN SWITCH REGISTER,PRESS RUN\r
1516\r
1517 HALT instruction 107077\r
1518\r
1519 sim> deposit S 000142\r
1520 sim> go\r
1521\r
1522TEST REPORT: H66 SET FORMAT SWITCH ON UNIT 0,PUSH RUN\r
1523\r
1524 HALT instruction 102002\r
1525\r
1526 sim> go\r
1527\r
1528 H37 READ ADDRESS IN S0\r
1529 E47 DATA WORD 0000 IS 000000 SHOULD BE 100000\r
1530 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0002 UNIT 00\r
1531\r
1532 HALT instruction 102001\r
1533\r
1534 sim> go\r
1535\r
1536 H37 READ ADDRESS IN S0\r
1537 E47 DATA WORD 0000 IS 000000 SHOULD BE 100001\r
1538 H51 CYL 0001 HEAD 01 SECTOR 00 WORD COUNT 0002 UNIT 00\r
1539\r
1540 HALT instruction 102001\r
1541\r
1542 sim> go\r
1543\r
1544 H33 WRITE DEFECTIVE TRACK IN S0\r
1545 E64 STATUS IS 000000 SHOULD BE 000031\r
1546 H51 CYL 0000 HEAD 01 SECTOR 00 WORD COUNT 0128 UNIT 00\r
1547\r
1548 HALT instruction 102001\r
1549\r
1550 sim> go\r
1551\r
1552 H41 READ DEFECTIVE TRACK IN S0\r
1553 E64 STATUS IS 000000 SHOULD BE 000031\r
1554 H51 CYL 0000 HEAD 01 SECTOR 00 WORD COUNT 0128 UNIT 00\r
1555\r
1556 HALT instruction 102001\r
1557\r
1558 sim> go\r
1559\r
1560 H67 CLEAR FORMAT SWITCH ON UNIT 0,PUSH RUN\r
1561\r
1562 HALT instruction 102002\r
1563\r
1564 sim> go\r
1565\r
1566 H33 WRITE DEFECTIVE TRACK IN S0\r
1567 E64 STATUS IS 000000 SHOULD BE 000031\r
1568 H51 CYL 0000 HEAD 01 SECTOR 00 WORD COUNT 0128 UNIT 00\r
1569\r
1570 HALT instruction 102001\r
1571\r
1572 sim> go\r
1573\r
1574 H41 READ DEFECTIVE TRACK IN S0\r
1575 E64 STATUS IS 000000 SHOULD BE 000031\r
1576 H51 CYL 0000 HEAD 01 SECTOR 00 WORD COUNT 0128 UNIT 00\r
1577\r
1578 HALT instruction 102001\r
1579\r
1580 sim> go\r
1581\r
1582 H42 WRITE PROTECTED TRACK IN S0\r
1583 E64 STATUS IS 000000 SHOULD BE 000011\r
1584 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00\r
1585\r
1586 HALT instruction 102001\r
1587\r
1588 sim> go\r
1589\r
1590 H36 WRITE ADDRESS IN S0\r
1591 E64 STATUS IS 000000 SHOULD BE 000011\r
1592 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0046 UNIT 00\r
1593\r
1594 HALT instruction 102001\r
1595\r
1596 sim> go\r
1597\r
1598 H66 SET FORMAT SWITCH ON UNIT 0,PUSH RUN\r
1599\r
1600 HALT instruction 102002\r
1601\r
1602 sim> go\r
1603\r
1604 H67 CLEAR FORMAT SWITCH ON UNIT 0,PUSH RUN\r
1605\r
1606 HALT instruction 102002\r
1607\r
1608 sim> go\r
1609\r
1610 H70 DISABLE UNIT 0,PUSH RUN\r
1611\r
1612 HALT instruction 102002\r
1613\r
1614 sim> set DQC0 unloaded\r
1615 sim> go\r
1616\r
1617 H40 ENABLE UNIT 0\r
1618\r
1619 [CTRL+E]\r
1620 Simulation stopped\r
1621\r
1622 sim> set DQC0 loaded\r
1623 sim> go\r
1624\r
1625 H71 PRESS PRESET THEN PRESS RUN\r
1626\r
1627 HALT instruction 102002\r
1628\r
1629 sim> deposit S 010140\r
1630 sim> reset\r
1631 sim> go\r
1632\r
1633 H74 SHORT PASS\r
1634 H65 PASS 0001\r
1635\r
1636 HALT instruction 102077\r
1637\r
1638TEST RESULT: Partially passed.\r
1639\r
1640TEST NOTES: Step 0 tests the FORMAT OVERRIDE switch, the use of the flagged\r
1641 track bit to indicate a protected or defective track, and the\r
1642 ability to write a sector address field that differs from the\r
1643 sector location to indicate track sparing. These features are\r
1644 not simulated.\r
1645\r
1646\r
1647\r
1648----------------------------------------------------------\r
1649DSN 151302 - 7900/01 Cartridge Disc Memory (multiple unit)\r
1650----------------------------------------------------------\r
1651\r
1652TESTED DEVICE: DP (hp2100_dp.c)\r
1653\r
1654CONFIGURATION: sim> attach DPC0 scratch.U0.7900.disc\r
1655 sim> attach DPC1 scratch.U1.7900.disc\r
1656 sim> attach DPC2 scratch.U2.7900.disc\r
1657 sim> attach DPC3 scratch.U3.7900.disc\r
1658 sim> deposit S 000022\r
1659 sim> reset\r
1660 sim> go 100\r
1661\r
1662 HALT instruction 102074\r
1663\r
1664 sim> deposit S 000004\r
1665 sim> reset\r
1666 sim> go\r
1667\r
1668 H0 7900/7901 CARTRIDGE DISC MEMORY DIAGNOSTIC\r
1669 H24 CYLINDER TABLE\r
1670 000,001,002,004,008,016,032,064,128,202\r
1671 H25 WISH TO CHANGE?\r
1672 NO\r
1673\r
1674 H27 PATTERN TABLE\r
1675 000000 177777 125252 052525 007417\r
1676 170360 162745 163346 155555 022222\r
1677 H25 WISH TO CHANGE?\r
1678 NO\r
1679\r
1680 H62 TYPE A FOR HEADS 0,1;B FOR 2,3;C FOR ALTERNATELY 0,1 THEN 2,3\r
1681 C\r
1682\r
1683 H23 00020 ERRORS/PASS ALLOWED\r
1684 H25 WISH TO CHANGE?\r
1685 NO\r
1686\r
1687 H37 UNIT TABLE/ 01 DRIVE(S); 0\r
1688 H25 WISH TO CHANGE?\r
1689 YES\r
1690\r
1691 H34 ENTER UNIT NUMBERS(0-3)SEPARATED BY COMMAS\r
1692 0,1,2,3\r
1693\r
1694 H37 UNIT TABLE/ 04 DRIVE(S); 0 1 2 3\r
1695 H25 WISH TO CHANGE?\r
1696\r
1697 [CTRL+E]\r
1698 Simulation stopped\r
1699\r
1700 sim> deposit S 000000\r
1701 sim> go\r
1702\r
1703 NO\r
1704\r
1705TEST REPORT: H65 LONG PASS 0001,HEADS 0/1,UNIT 00, 0000 ERRORS\r
1706 H65 LONG PASS 0002,HEADS 0/1,UNIT 01, 0000 ERRORS\r
1707 H65 LONG PASS 0003,HEADS 0/1,UNIT 02, 0000 ERRORS\r
1708 H65 LONG PASS 0004,HEADS 0/1,UNIT 03, 0000 ERRORS,MULTI-DRIVE\r
1709 H65 LONG PASS 0005,HEADS 2/3,UNIT 00, 0000 ERRORS\r
1710 H65 LONG PASS 0006,HEADS 2/3,UNIT 01, 0000 ERRORS\r
1711 H65 LONG PASS 0007,HEADS 2/3,UNIT 02, 0000 ERRORS\r
1712 H65 LONG PASS 0008,HEADS 2/3,UNIT 03, 0000 ERRORS,MULTI-DRIVE\r
1713\r
1714 [CTRL+E]\r
1715 Simulation stopped\r
1716\r
1717TEST RESULT: Passed.\r
1718\r
1719TEST NOTES: Eight passes are required to test all head/unit combinations.\r
1720\r
1721\r
1722\r
1723-------------------------------------------------------------\r
1724DSN 151302 - 7900/01 Cartridge Disc Memory (user interaction)\r
1725-------------------------------------------------------------\r
1726\r
1727TESTED DEVICE: DP (hp2100_dp.c)\r
1728\r
1729CONFIGURATION: sim> attach DPC0 scratch.U0.7900.disc\r
1730 sim> deposit S 000022\r
1731 sim> reset\r
1732 sim> go 100\r
1733\r
1734 HALT instruction 102074\r
1735\r
1736 sim> deposit S 000160\r
1737 sim> reset\r
1738 sim> go\r
1739\r
1740TEST REPORT: H0 7900/7901 CARTRIDGE DISC MEMORY DIAGNOSTIC\r
1741 H66 SET OVERRIDE SWITCH,PUSH RUN\r
1742\r
1743 HALT instruction 102002\r
1744\r
1745 sim> go\r
1746\r
1747 H46 READ IN STEP 04\r
1748 E64 STATUS IS 000000 SHOULD BE 000010\r
1749 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00\r
1750\r
1751 HALT instruction 102001\r
1752\r
1753 sim> go\r
1754\r
1755 H22 CYCLIC CHECK IN STEP 04\r
1756 E64 STATUS IS 000000 SHOULD BE 000010\r
1757 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0001 UNIT 00\r
1758\r
1759 HALT instruction 102001\r
1760\r
1761 sim> go\r
1762\r
1763 H67 CLEAR OVERRIDE SWITCH,PUSH RUN\r
1764\r
1765 HALT instruction 102002\r
1766\r
1767 sim> go\r
1768\r
1769 H46 READ IN STEP 07\r
1770 E64 STATUS IS 000000 SHOULD BE 000031\r
1771 H51 CYL 0001 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00\r
1772\r
1773 HALT instruction 102001\r
1774\r
1775 sim> go\r
1776\r
1777 H45 WRITE IN STEP 08\r
1778 E64 STATUS IS 000000 SHOULD BE 000011\r
1779 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00\r
1780\r
1781 HALT instruction 102001\r
1782\r
1783 sim> go\r
1784\r
1785 H36 INITIALIZE DATA IN STEP 09\r
1786 E64 STATUS IS 000000 SHOULD BE 000011\r
1787 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 6144 UNIT 00\r
1788\r
1789 HALT instruction 102001\r
1790\r
1791 sim> go\r
1792\r
1793 H66 SET OVERRIDE SWITCH,PUSH RUN\r
1794\r
1795 HALT instruction 102002\r
1796\r
1797 sim> go\r
1798\r
1799 H67 CLEAR OVERRIDE SWITCH,PUSH RUN\r
1800\r
1801 HALT instruction 102002\r
1802\r
1803 sim> go\r
1804\r
1805 H70 UNLOAD UNIT 0,PUSH RUN\r
1806\r
1807 HALT instruction 102002\r
1808\r
1809 sim> set DPC0 unloaded\r
1810 sim> go\r
1811\r
1812 H40 PROTECT U/D THEN READY UNIT 0\r
1813\r
1814 [CTRL+E]\r
1815 Simulation stopped\r
1816\r
1817 sim> set DPC0 locked\r
1818 sim> set DPC0 loaded\r
1819 sim> go\r
1820\r
1821 H41 CLEAR U/D PROTECT,LOAD,PUSH RUN\r
1822\r
1823 HALT instruction 102002\r
1824\r
1825 sim> set DPC0 writeenabled\r
1826 sim> go\r
1827\r
1828 H71 PRESS PRESET(S) THEN PRESS RUN\r
1829\r
1830 HALT instruction 102002\r
1831\r
1832 sim> reset\r
1833 sim> go\r
1834\r
1835 H65 SHORT PASS 0001,HEADS 0/1,UNIT 00, 0005 ERRORS\r
1836\r
1837 [CTRL+E]\r
1838 Simulation stopped\r
1839\r
1840TEST RESULT: Partially passed.\r
1841\r
1842TEST NOTES: Steps 4, 7, 8, and 9 test the defective and protected cylinder\r
1843 bits and the FORMAT switch. These features are not simulated.\r
1844\r
1845\r
1846\r
1847-----------------------------------------------\r
1848DSN 151403 - 7905/06/20/25 Disc (multiple unit)\r
1849-----------------------------------------------\r
1850\r
1851TESTED DEVICE: DS (hp2100_ds.c)\r
1852\r
1853CONFIGURATION: sim> set DS0 7905\r
1854 sim> set DS1 7906\r
1855 sim> set DS2 7920\r
1856 sim> set DS3 7925\r
1857 sim> set DS4 7905\r
1858 sim> set DS5 7906\r
1859 sim> set DS6 7920\r
1860 sim> set DS7 7925\r
1861 sim> attach DS0 scratch.U0.7905.disc\r
1862 sim> attach DS1 scratch.U1.7906.disc\r
1863 sim> attach DS2 scratch.U2.7920.disc\r
1864 sim> attach DS3 scratch.U3.7925.disc\r
1865 sim> attach DS4 scratch.U4.7905.disc\r
1866 sim> attach DS5 scratch.U5.7906.disc\r
1867 sim> attach DS6 scratch.U6.7920.disc\r
1868 sim> attach DS7 scratch.U7.7925.disc\r
1869 sim> deposit S 000034\r
1870 sim> reset\r
1871 sim> go 100\r
1872\r
1873 HALT instruction 102074\r
1874\r
1875 sim> deposit S 000004\r
1876 sim> reset\r
1877 sim> go\r
1878\r
1879 H0 79XX/13037 DISC MEMORY DIAGNOSTIC\r
1880 H37 UNIT TABLE: 01 DRIVE(S); 0\r
1881 H25 WISH TO CHANGE?\r
1882 YES\r
1883\r
1884 H34 ENTER UNIT NUMBERS(0-7)SEPARATED BY COMMAS\r
1885 0,1,2,3,4,5,6,7\r
1886\r
1887 H37 UNIT TABLE: 08 DRIVE(S); 0 1 2 3 4 5 6 7\r
1888 H25 WISH TO CHANGE?\r
1889 NO\r
1890\r
1891 ENTER:(U)NIT,(?) ERRS,(H)EAD,(O)UTPUT,(P)ATT,(S)OFT,(C)YL,(M)CPU,(E)XIT\r
1892 H\r
1893\r
1894 H62 HEAD TABLE; UNIT 0 7905A , 02 HEAD(S) 0 1\r
1895 H62 HEAD TABLE; UNIT 1 7906A , 02 HEAD(S) 0 1\r
1896 H62 HEAD TABLE; UNIT 2 7920A , 05 HEAD(S) 0 1 2 3 4\r
1897 H62 HEAD TABLE; UNIT 3 7925A , 09 HEAD(S) 0 1 2 3 4 5 6 7 8\r
1898 H62 HEAD TABLE; UNIT 4 7905A , 02 HEAD(S) 0 1\r
1899 H62 HEAD TABLE; UNIT 5 7906A , 02 HEAD(S) 0 1\r
1900 H62 HEAD TABLE; UNIT 6 7920A , 05 HEAD(S) 0 1 2 3 4\r
1901 H62 HEAD TABLE; UNIT 7 7925A , 09 HEAD(S) 0 1 2 3 4 5 6 7 8\r
1902 H25 WISH TO CHANGE?\r
1903 YES\r
1904\r
1905 H132 TYPE UNITS YOU WISH TO CHANGE SEPERATED BY COMMAS\r
1906 0,1,4,5\r
1907\r
1908 H62 HEAD TABLE; UNIT 0 7905A , 02 HEAD(S) 0 1\r
1909 H106 ENTER HEADS SEPARATED BY COMMAS\r
1910 0,1,2\r
1911\r
1912 H62 HEAD TABLE; UNIT 0 7905A , 03 HEAD(S) 0 1 2\r
1913 H25 WISH TO CHANGE?\r
1914 NO\r
1915\r
1916 H62 HEAD TABLE; UNIT 1 7906A , 02 HEAD(S) 0 1\r
1917 H106 ENTER HEADS SEPARATED BY COMMAS\r
1918 0,1,2,3\r
1919\r
1920 H62 HEAD TABLE; UNIT 1 7906A , 04 HEAD(S) 0 1 2 3\r
1921 H25 WISH TO CHANGE?\r
1922 NO\r
1923\r
1924 H62 HEAD TABLE; UNIT 4 7905A , 02 HEAD(S) 0 1\r
1925 H106 ENTER HEADS SEPARATED BY COMMAS\r
1926 0,1,2\r
1927\r
1928 H62 HEAD TABLE; UNIT 4 7905A , 03 HEAD(S) 0 1 2\r
1929 H25 WISH TO CHANGE?\r
1930 NO\r
1931\r
1932 H62 HEAD TABLE; UNIT 5 7906A , 02 HEAD(S) 0 1\r
1933 H106 ENTER HEADS SEPARATED BY COMMAS\r
1934 0,1,2,3\r
1935\r
1936 H62 HEAD TABLE; UNIT 5 7906A , 04 HEAD(S) 0 1 2 3\r
1937 H25 WISH TO CHANGE?\r
1938 NO\r
1939\r
1940 ENTER:(U)NIT,(?) ERRS,(H)EAD,(O)UTPUT,(P)ATT,(S)OFT,(C)YL,(M)CPU,(E)XIT\r
1941 E\r
1942\r
1943TEST REPORT: H121 WARNING-FORMAT SWITCH OFF\r
1944 H65 LONG PASS 0001,HEAD 012 ,UNIT 0,0000 ERRORS-0000 SOFT\r
1945 H65 LONG PASS 0002,HEAD 0123 ,UNIT 1,0000 ERRORS-0000 SOFT\r
1946 H65 LONG PASS 0003,HEAD 01234 ,UNIT 2,0000 ERRORS-0000 SOFT\r
1947 H65 LONG PASS 0004,HEAD 012345678,UNIT 3,0000 ERRORS-0000 SOFT\r
1948 H65 LONG PASS 0005,HEAD 012 ,UNIT 4,0000 ERRORS-0000 SOFT\r
1949 H65 LONG PASS 0006,HEAD 0123 ,UNIT 5,0000 ERRORS-0000 SOFT\r
1950 H65 LONG PASS 0007,HEAD 01234 ,UNIT 6,0000 ERRORS-0000 SOFT\r
1951 H65 LONG PASS 0008,HEAD 012345678,UNIT 7,0000 ERRORS-0000 SOFT,MULTI-UNIT\r
1952\r
1953 [CTRL+E]\r
1954 Simulation stopped\r
1955\r
1956TEST RESULT: Passed.\r
1957\r
1958TEST NOTES: Eight passes are required to test all head/unit combinations.\r
1959\r
1960\r
1961\r
1962--------------------------------------------------\r
1963DSN 151403 - 7905/06/20/25 Disc (user interaction)\r
1964--------------------------------------------------\r
1965\r
1966TESTED DEVICE: DS (hp2100_ds.c)\r
1967\r
1968CONFIGURATION: sim> set DS0 7905\r
1969 sim> attach DS0 scratch.U0.7905.disc\r
1970 sim> deposit S 000034\r
1971 sim> reset\r
1972 sim> go 100\r
1973\r
1974 HALT instruction 102074\r
1975\r
1976 sim> deposit S 000120\r
1977 sim> reset\r
1978 sim> go\r
1979\r
1980 H0 79XX/13037 DISC MEMORY DIAGNOSTIC\r
1981 H37 UNIT TABLE: 01 DRIVE(S); 0\r
1982 H25 WISH TO CHANGE?\r
1983 NO\r
1984\r
1985TEST REPORT: H66 SET FORMAT SWITCH ON UNIT 0,PUSH RUN\r
1986\r
1987 HALT instruction 102002\r
1988\r
1989 sim> set DS0 format\r
1990 sim> go\r
1991\r
1992 H46 READ IN STEP 04\r
1993 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B\r
1994 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0\r
1995 SHOULD BE 0 1 0 00000 XXXX XXXX / 0 000010 0 0 0 1 0 0 0 0 0\r
1996 H137 TERMINATION STATUS IS "NORMAL COMPLET"\r
1997 START 0000/00/00-LAST 0000/00/01 WORD COUNT 00128,OLD CYL 0000,UNIT 00\r
1998\r
1999 HALT instruction 102001\r
2000\r
2001 sim> go\r
2002\r
2003 H22 VERIFY IN STEP 04\r
2004 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B\r
2005 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0\r
2006 SHOULD BE 0 1 0 00000 XXXX XXXX / 0 000010 0 0 0 1 0 0 0 0 0\r
2007 H137 TERMINATION STATUS IS "NORMAL COMPLET"\r
2008 START 0000/00/00-LAST 0001/00/00 WORD COUNT 00048,OLD CYL 0000,UNIT 00\r
2009\r
2010 HALT instruction 102001\r
2011\r
2012 sim> go\r
2013\r
2014 H67 CLEAR FORMAT SWITCH ON UNIT 0,PUSH RUN\r
2015\r
2016 HALT instruction 102002\r
2017\r
2018 sim> set DS0 noformat\r
2019 sim> go\r
2020\r
2021 H46 READ IN STEP 07\r
2022 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B\r
2023 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 0 0 0 0 0 0\r
2024 SHOULD BE 0 0 1 10001 XXXX XXXX / 0 000010 0 0 0 0 0 0 0 0 0\r
2025 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "DEFECTIVE TRK "\r
2026 START 0001/00/00-LAST 0001/00/01 WORD COUNT 00128,OLD CYL 0000,UNIT 00\r
2027\r
2028 HALT instruction 102001\r
2029\r
2030 sim> go\r
2031\r
2032 H45 WRITE IN STEP 08\r
2033 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B\r
2034 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 0 0 0 0 0 0\r
2035 SHOULD BE 0 1 0 10110 XXXX XXXX / 0 000010 0 0 0 0 0 0 0 0 0\r
2036 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "WRT PROTEC TRK"\r
2037 START 0000/00/00-LAST 0000/00/01 WORD COUNT 00128,OLD CYL 0001,UNIT 00\r
2038\r
2039 HALT instruction 102001\r
2040\r
2041 sim> go\r
2042\r
2043 H66 SET FORMAT SWITCH ON UNIT 0,PUSH RUN\r
2044\r
2045 HALT instruction 102002\r
2046\r
2047 sim> set DS0 format\r
2048 sim> go\r
2049\r
2050 H45 WRITE IN STEP 10\r
2051 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B\r
2052 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0\r
2053 SHOULD BE 0 1 0 00000 XXXX XXXX / 0 000010 0 0 0 1 0 0 0 0 0\r
2054 H137 TERMINATION STATUS IS "NORMAL COMPLET"\r
2055 START 0000/00/00-LAST 0000/00/08 WORD COUNT 01024,OLD CYL 0000,UNIT 00\r
2056\r
2057 HALT instruction 102001\r
2058\r
2059 sim> go\r
2060\r
2061 H70 UNLOAD UNIT 0,PUSH RUN\r
2062\r
2063 HALT instruction 102002\r
2064\r
2065 sim> set DS0 unloaded\r
2066 sim> go\r
2067\r
2068 H107 READY UNIT 0\r
2069\r
2070 [CTRL+E]\r
2071 Simulation stopped\r
2072\r
2073 sim> set DS0 loaded\r
2074 sim> go\r
2075\r
2076 H142 PROTECT U/D,PUSH RUN\r
2077\r
2078 HALT instruction 102002\r
2079\r
2080 sim> set DS0 locked\r
2081 sim> go\r
2082\r
2083 H143 CLEAR U/D PROTECT,PUSH RUN\r
2084\r
2085 HALT instruction 102002\r
2086\r
2087 sim> set DS0 writeenabled\r
2088 sim> go\r
2089\r
2090 H110 PRESS PRESET(S),PRESS RUN\r
2091\r
2092 HALT instruction 102002\r
2093\r
2094 sim> reset\r
2095 sim> go\r
2096\r
2097 H46 READ IN STEP 38\r
2098 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B\r
2099 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0\r
2100 SHOULD BE 0 0 0 00111 0000 0000 / 0 000010 0 0 0 X 0 0 0 0 0\r
2101 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "CYL CMP ERROR "\r
2102 START 0000/00/01-LAST 0000/00/03 WORD COUNT 00138,OLD CYL 0000,UNIT 00\r
2103\r
2104 HALT instruction 102001\r
2105\r
2106 sim> go\r
2107\r
2108 H46 READ IN STEP 39\r
2109 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B\r
2110 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0\r
2111 SHOULD BE 0 0 0 01001 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0\r
2112 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "HD/SEC CMP ERR"\r
2113 START 0000/00/01-LAST 0000/00/03 WORD COUNT 00138,OLD CYL 0000,UNIT 00\r
2114\r
2115 HALT instruction 102001\r
2116\r
2117 sim> go\r
2118\r
2119 H46 READ IN STEP 40\r
2120 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B\r
2121 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0\r
2122 SHOULD BE 0 0 0 01001 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0\r
2123 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "HD/SEC CMP ERR"\r
2124 START 0000/00/01-LAST 0000/00/03 WORD COUNT 00138,OLD CYL 0000,UNIT 00\r
2125\r
2126 HALT instruction 102001\r
2127\r
2128 sim> go\r
2129\r
2130 H46 READ IN STEP 41\r
2131 E47 DATA WORD 0065 IS 075126 SHOULD BE 030400\r
2132 E47 DATA WORD 0066 IS 000762 SHOULD BE 030400\r
2133 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B\r
2134 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0\r
2135 SHOULD BE 0 0 0 01111 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0\r
2136 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "POSS CORR DATA"\r
2137 START 0000/00/00-LAST 0000/00/03 WORD COUNT 00128,OLD CYL 0000,UNIT 00\r
2138\r
2139 HALT instruction 102001\r
2140\r
2141 sim> go\r
2142\r
2143 H46 READ IN STEP 42\r
2144 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B\r
2145 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0\r
2146 SHOULD BE 0 0 0 01000 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0\r
2147 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "UNCOR DATA ERR"\r
2148 START 0000/00/00-LAST 0000/00/03 WORD COUNT 00276,OLD CYL 0000,UNIT 00\r
2149\r
2150 HALT instruction 102001\r
2151\r
2152 sim> go\r
2153\r
2154 H22 VERIFY IN STEP 43\r
2155 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B\r
2156 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0\r
2157 SHOULD BE 0 0 1 10001 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0\r
2158 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "DEFECTIVE TRK "\r
2159 START 0016/00/00-LAST 0017/00/00 WORD COUNT 00048,OLD CYL 0128,UNIT 00\r
2160\r
2161 HALT instruction 102001\r
2162\r
2163 sim> go\r
2164\r
2165 H22 VERIFY IN STEP 43\r
2166 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B\r
2167 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0\r
2168 SHOULD BE 1 0 0 10000 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0\r
2169 H137 TERMINATION STATUS IS "NORMAL COMPLET" SHOULD BE "SPR TRK ACCESS"\r
2170 START 0128/01/00-LAST 0129/01/00 WORD COUNT 00048,OLD CYL 0016,UNIT 00\r
2171\r
2172 HALT instruction 102001\r
2173\r
2174 sim> go\r
2175\r
2176 H45 WRITE IN STEP 43\r
2177 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B\r
2178 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0\r
2179 SHOULD BE 1 0 0 00000 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0\r
2180 H137 TERMINATION STATUS IS "NORMAL COMPLET"\r
2181 START 0016/00/33-LAST 0016/00/34 WORD COUNT 00128,OLD CYL 0128,UNIT 00\r
2182\r
2183 HALT instruction 102001\r
2184\r
2185 sim> go\r
2186\r
2187 H46 READ IN STEP 43\r
2188 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B\r
2189 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0\r
2190 SHOULD BE 1 0 0 00000 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0\r
2191 H137 TERMINATION STATUS IS "NORMAL COMPLET"\r
2192 START 0016/00/33-LAST 0016/00/34 WORD COUNT 00128,OLD CYL 0016,UNIT 00\r
2193\r
2194 HALT instruction 102001\r
2195\r
2196 sim> go\r
2197\r
2198 H46 READ IN STEP 43\r
2199 E47 DATA WORD 0000 IS 156164 SHOULD BE 144300\r
2200 E47 DATA WORD 0001 IS 023302 SHOULD BE 117306\r
2201 E47 DATA WORD 0002 IS 114642 SHOULD BE 045322\r
2202 H135 S P D TSTAT XXXX UNIT / E DRTYPE X A P F DF FS SC NR B\r
2203 E64 STATUS IS 0 0 0 00000 0000 0000 / 0 000010 0 0 0 1 0 0 0 0 0\r
2204 SHOULD BE 1 0 0 00000 XXXX XXXX / 0 000010 0 0 0 X 0 0 0 0 0\r
2205 H137 TERMINATION STATUS IS "NORMAL COMPLET"\r
2206 START 0016/00/33-LAST 0016/00/34 WORD COUNT 00128,OLD CYL 0016,UNIT 00\r
2207\r
2208 HALT instruction 102001\r
2209\r
2210 sim> go\r
2211\r
2212 H65 SHORT PASS 0001,HEAD 01 ,UNIT 0,0015 ERRORS-0015 SOFT\r
2213\r
2214 [CTRL+E]\r
2215 Simulation stopped\r
2216\r
2217TEST RESULT: Partially passed.\r
2218\r
2219TEST NOTES: Steps 4, 8, and 10 test the protected cylinder bit. Step 7\r
2220 tests the defective cylinder bit. Steps 38, 39, and 40 test the\r
2221 Write Full Sector command. Steps 41 and 42 test error\r
2222 correction. Step 43 tests the spare cylinder bit and track\r
2223 sparing. These features are not simulated.\r
2224\r
2225\r
2226\r
2227-------------------------------------------------\r
2228DSN 112200 - 9-Track Magnetic Tape (7970B, 13181)\r
2229-------------------------------------------------\r
2230\r
2231DEVICE: MS (hp2100_ms.c)\r
2232\r
2233CONFIGURATION: sim> detach MSC0\r
2234 sim> set MSC 13181A\r
2235 sim> set MSC realtime\r
2236 sim> attach MSC0 scratch.U0.7970.tape\r
2237 sim> attach MSC1 scratch.U1.7970.tape\r
2238 sim> attach MSC2 scratch.U2.7970.tape\r
2239 sim> attach MSC3 scratch.U3.7970.tape\r
2240 sim> deposit S 102030\r
2241 sim> reset\r
2242 sim> go 100\r
2243\r
2244 HALT instruction 102074\r
2245\r
2246 sim> deposit S 000217\r
2247 sim> reset\r
2248 sim> go\r
2249\r
2250TEST REPORT: 7970-13181 DIAG.\r
2251 H024 PRESS PRESET (EXT&INT),RUN\r
2252\r
2253 HALT instruction 102024\r
2254\r
2255 sim> reset\r
2256 sim> go\r
2257\r
2258 H025 BI-O COMP\r
2259 H025 FOR DATA CH\r
2260 H024 PRESS PRESET (EXT&INT),RUN\r
2261\r
2262 HALT instruction 102024\r
2263\r
2264 sim> reset\r
2265 sim> go\r
2266\r
2267 H025 BI-O COMP\r
2268 H025 FOR CMND CH\r
2269 H154 UNIT 000000\r
2270 H034 UNIT ON-LINE\r
2271 H155 STATUS IS 0 000 000 001 000 000\r
2272 H154 UNIT 000001\r
2273 H034 UNIT ON-LINE\r
2274 H155 STATUS IS 0 000 000 001 000 000\r
2275 H154 UNIT 000002\r
2276 H034 UNIT ON-LINE\r
2277 H155 STATUS IS 0 000 000 001 000 000\r
2278 H154 UNIT 000003\r
2279 H034 UNIT ON-LINE\r
2280 H155 STATUS IS 0 000 000 001 000 000\r
2281\r
2282 H154 UNIT 000000\r
2283 H102 RECORD 000117\r
2284 H054 COMMAND 000061\r
2285 H155 STATUS IS 0 000 000 000 000 000\r
2286 H155 AND SHOULD BE 0 000 000 000 000 000\r
2287\r
2288 TEST 23\r
2289 E135 LRCC ERROR\r
2290\r
2291 HALT instruction 106035\r
2292\r
2293 sim> go\r
2294\r
2295 H154 UNIT 000000\r
2296 H102 RECORD 000117\r
2297 H054 COMMAND 000061\r
2298 H155 STATUS IS 0 000 000 000 000 000\r
2299 H155 AND SHOULD BE 0 000 000 000 000 000\r
2300 E141 CRCC ERROR\r
2301\r
2302 HALT instruction 106041\r
2303\r
2304 sim> go\r
2305\r
2306 H126 EXCHANGE REELS\r
2307\r
2308 HALT instruction 106026\r
2309\r
2310 sim> attach MSC0 scratch.U3.7970.tape\r
2311 sim> attach MSC1 scratch.U2.7970.tape\r
2312 sim> attach MSC2 scratch.U1.7970.tape\r
2313 sim> attach MSC3 scratch.U0.7970.tape\r
2314 sim> go\r
2315\r
2316 H127 SET SW 13 TO LOOP\r
2317\r
2318 HALT instruction 106027\r
2319\r
2320 sim> go\r
2321\r
2322 H130 REMOVE WRITE RING\r
2323\r
2324 HALT instruction 106030\r
2325\r
2326 sim> set MSC0 locked\r
2327 sim> go\r
2328\r
2329 H131 REPLACE WRITE RING\r
2330\r
2331 HALT instruction 106031\r
2332\r
2333 sim> set MSC0 writeenabled\r
2334 sim> go\r
2335\r
2336 H137 PUT TAPE UNIT ON-LINE\r
2337\r
2338 HALT instruction 106037\r
2339\r
2340 sim> set MSC0 online\r
2341 sim> go\r
2342\r
2343 H137 PUT TAPE UNIT ON-LINE\r
2344\r
2345 HALT instruction 106037\r
2346\r
2347 sim> set MSC1 online\r
2348 sim> go\r
2349\r
2350 H137 PUT TAPE UNIT ON-LINE\r
2351\r
2352 HALT instruction 106037\r
2353\r
2354 sim> set MSC2 online\r
2355 sim> go\r
2356\r
2357 H137 PUT TAPE UNIT ON-LINE\r
2358\r
2359 HALT instruction 106037\r
2360\r
2361 sim> set MSC3 online\r
2362 sim> go\r
2363\r
2364 PASS 000001\r
2365\r
2366 HALT instruction 102077\r
2367\r
2368TEST RESULT: Partially passed.\r
2369\r
2370TEST NOTES: Test 23 verifies the LRCC and CRCC values obtained from the\r
2371 interface. These features are not simulated. (Setting bit 7 of\r
2372 the S register during configuration eliminates most LRCC/CRCC\r
2373 checks but does not inhibit test 23.)\r
2374\r
2375 If test 34 is selected manually, E065 WRITE ERROR will occur.\r
2376 This is due to the implementation of the tape simulation\r
2377 library. Test 34 writes data in a single record until a data\r
2378 error or EOT occurs (conceivably 20+ megabytes for the largest\r
2379 reel size at 800 bpi). Because the tape simulation library\r
2380 writes complete records, the 7970 simulator must use a data\r
2381 buffer to accumulate the entire record before calling\r
2382 "sim_tape_wrrecf" to write the record. The simulator uses a\r
2383 data buffer of 32768 words. When the buffer is full,\r
2384 parity-error status is returned to the program.\r
2385\r
2386\r
2387\r
2388-------------------------------------------------\r
2389DSN 112200 - 9-Track Magnetic Tape (7970E, 13183)\r
2390-------------------------------------------------\r
2391\r
2392DEVICE: MS (hp2100_ms.c)\r
2393\r
2394CONFIGURATION: sim> detach MSC0\r
2395 sim> set MSC 13183A\r
2396 sim> set MSC realtime\r
2397 sim> attach MSC0 scratch.U0.7970.tape\r
2398 sim> attach MSC1 scratch.U1.7970.tape\r
2399 sim> attach MSC2 scratch.U2.7970.tape\r
2400 sim> attach MSC3 scratch.U3.7970.tape\r
2401 sim> deposit S 104030\r
2402 sim> reset\r
2403 sim> go 100\r
2404\r
2405 HALT instruction 102074\r
2406\r
2407 sim> deposit S 000017\r
2408 sim> reset\r
2409 sim> go\r
2410\r
2411TEST REPORT: 7970-13183 DIAG.\r
2412 H024 PRESS PRESET (EXT&INT),RUN\r
2413\r
2414 HALT instruction 102024\r
2415\r
2416 sim> reset\r
2417 sim> go\r
2418\r
2419 H025 BI-O COMP\r
2420 H025 FOR DATA CH\r
2421 H024 PRESS PRESET (EXT&INT),RUN\r
2422\r
2423 HALT instruction 102024\r
2424\r
2425 sim> reset\r
2426 sim> go\r
2427\r
2428 H025 BI-O COMP\r
2429 H025 FOR CMND CH\r
2430 H154 UNIT 000000\r
2431 H034 UNIT ON-LINE\r
2432 H155 STATUS IS 1 000 000 001 000 000\r
2433 H154 UNIT 000001\r
2434 H034 UNIT ON-LINE\r
2435 H155 STATUS IS 1 010 000 001 000 000\r
2436 H154 UNIT 000002\r
2437 H034 UNIT ON-LINE\r
2438 H155 STATUS IS 1 100 000 001 000 000\r
2439 H154 UNIT 000003\r
2440 H034 UNIT ON-LINE\r
2441 H155 STATUS IS 1 110 000 001 000 000\r
2442\r
2443 H126 EXCHANGE REELS\r
2444\r
2445 HALT instruction 106026\r
2446\r
2447 sim> attach MSC0 scratch.U3.7970.tape\r
2448 sim> attach MSC1 scratch.U2.7970.tape\r
2449 sim> attach MSC2 scratch.U1.7970.tape\r
2450 sim> attach MSC3 scratch.U0.7970.tape\r
2451 sim> go\r
2452\r
2453 H127 SET SW 13 TO LOOP\r
2454\r
2455 HALT instruction 106027\r
2456\r
2457 sim> go\r
2458\r
2459 H130 REMOVE WRITE RING\r
2460\r
2461 HALT instruction 106030\r
2462\r
2463 sim> set MSC0 locked\r
2464 sim> go\r
2465\r
2466 H131 REPLACE WRITE RING\r
2467\r
2468 HALT instruction 106031\r
2469\r
2470 sim> set MSC0 writeenabled\r
2471 sim> go\r
2472\r
2473 H137 PUT TAPE UNIT ON-LINE\r
2474\r
2475 HALT instruction 106037\r
2476\r
2477 sim> set MSC0 online\r
2478 sim> go\r
2479\r
2480 H137 PUT TAPE UNIT ON-LINE\r
2481\r
2482 HALT instruction 106037\r
2483\r
2484 sim> set MSC1 online\r
2485 sim> go\r
2486\r
2487 H137 PUT TAPE UNIT ON-LINE\r
2488\r
2489 HALT instruction 106037\r
2490\r
2491 sim> set MSC2 online\r
2492 sim> go\r
2493\r
2494 H137 PUT TAPE UNIT ON-LINE\r
2495\r
2496 HALT instruction 106037\r
2497\r
2498 sim> set MSC3 online\r
2499 sim> go\r
2500\r
2501 PASS 000001\r
2502\r
2503 HALT instruction 102077\r
2504\r
2505TEST RESULT: Passed.\r
2506\r
2507\r
2508\r
2509------------------------------------\r
2510DSN 146200 - Paper Tape Reader/Punch\r
2511------------------------------------\r
2512\r
2513TESTED DEVICE: PTR and PTP (hp2100_stddev.c)\r
2514\r
2515CONFIGURATION: sim> deposit S 001012\r
2516 sim> reset\r
2517 sim> go 100\r
2518\r
2519 HALT instruction 102074\r
2520\r
2521 sim> deposit S 001000\r
2522 sim> reset\r
2523 sim> go\r
2524\r
2525 PAPER TAPE READER AND PUNCH DIAGNOSTIC DSN 146200\r
2526\r
2527 HALT instruction 102075\r
2528\r
2529 sim> deposit A 000200\r
2530 sim> reset\r
2531 sim> go\r
2532\r
2533 H060 TO MAKE LOOP, PUNCH ON AND RUN\r
2534\r
2535 HALT instruction 102060\r
2536\r
2537 sim> attach PTP loop.2895.punch\r
2538 sim> go\r
2539\r
2540 PASS 000001\r
2541\r
2542 HALT instruction 102077\r
2543\r
2544 sim> detach PTP\r
2545 sim> deposit S 001000\r
2546 sim> reset\r
2547 sim> go 2000\r
2548\r
2549 PAPER TAPE READER AND PUNCH DIAGNOSTIC DSN 146200\r
2550\r
2551 HALT instruction 102075\r
2552\r
2553 sim> deposit A 003177\r
2554 sim> deposit S 000000\r
2555 sim> reset\r
2556 sim> go\r
2557\r
2558TEST REPORT: H050 BI-O ON PUNCH\r
2559 H024 PRESS PRESET (EXT&INT),RUN\r
2560\r
2561 HALT instruction 102024\r
2562\r
2563 sim> reset\r
2564 sim> go\r
2565\r
2566 H025 BI-O COMP\r
2567 H055 BI-O ON READER\r
2568 H024 PRESS PRESET (EXT&INT),RUN\r
2569\r
2570 HALT instruction 102024\r
2571\r
2572 sim> reset\r
2573 sim> go\r
2574\r
2575 H025 BI-O COMP\r
2576 H051 ALL CHARTR COMBINATIONS, PUNCH ONLY\r
2577 TURN PUNCH ON, PRESS RUN\r
2578\r
2579 HALT instruction 102051\r
2580\r
2581 sim> attach PTP scratch.2895.punch\r
2582 sim> go\r
2583\r
2584 H052 ALL CHARTR COMBINATIONS, VERIFY\r
2585 TEAR TAPE AT PUNCH, PLACE IN READER, PRESS RUN\r
2586\r
2587 HALT instruction 102052\r
2588\r
2589 sim> detach PTP\r
2590 sim> attach PTR scratch.2895.punch\r
2591 sim> go\r
2592\r
2593 H054 PLACE LOOP IN READER-PRESS RUN\r
2594 TO START READ, SET BIT0 TO 1\r
2595 TO EXIT TEST, SET BIT0 TO 0\r
2596\r
2597 HALT instruction 102054\r
2598\r
2599 sim> set PTR diag\r
2600 sim> attach PTR loop.2895.punch\r
2601 sim> deposit S 000001\r
2602 sim> go\r
2603\r
2604 [CTRL+E]\r
2605 Simulation stopped\r
2606\r
2607 sim> deposit S 000000\r
2608 sim> go\r
2609\r
2610 H054 PLACE LOOP IN READER-PRESS RUN\r
2611 TO START READ, SET BIT0 TO 1\r
2612 TO EXIT TEST, SET BIT0 TO 0\r
2613\r
2614 HALT instruction 102054\r
2615\r
2616 sim> deposit S 000001\r
2617 sim> go\r
2618\r
2619 [CTRL+E]\r
2620 Simulation stopped\r
2621\r
2622 sim> deposit PTR TIME 100\r
2623 sim> deposit PTP TIME 200\r
2624 sim> deposit S 000000\r
2625 sim> go\r
2626\r
2627 H056 TURN PUNCH ON, PRESS RUN. PUNCH ROUTINE\r
2628 WILL START. LOAD THE TAPE BEING PUNCHED\r
2629 INTO THE READER.\r
2630 TO START READ, SET BIT0 TO 1\r
2631 TO EXIT, SET BIT0 TO 0\r
2632\r
2633 HALT instruction 102056\r
2634\r
2635 sim> set PTR reader\r
2636 sim> attach PTR scratch.2895.punch\r
2637 sim> attach PTP scratch.2895.punch\r
2638 sim> go\r
2639\r
2640 [CTRL+E]\r
2641 Simulation stopped\r
2642\r
2643 sim> deposit S 000001\r
2644 sim> go\r
2645\r
2646 [CTRL+E]\r
2647 Simulation stopped\r
2648\r
2649 sim> deposit S 000000\r
2650 sim> go\r
2651\r
2652 H057 TO COMPLETE, TEAR TAPE, PRESS RUN\r
2653\r
2654 HALT instruction 102057\r
2655\r
2656 sim> go\r
2657\r
2658 H063 READER SPEED TEST. PLACE LOOP IN READER\r
2659 BIT 5=0 FOR 2748-58, BIT 5=1 FOR 2737. PRESS RUN.\r
2660\r
2661 HALT instruction 102063\r
2662\r
2663 sim> set PTR diag\r
2664 sim> attach PTR loop.2895.punch\r
2665 sim> deposit PTR TIME 3150\r
2666 sim> go\r
2667\r
2668 H066 TEST 11 COMPLETE\r
2669 H100 PUNCH SPEED TEST.\r
2670 BIT 6=0 FOR 2895 OR BIT 6=1 FOR 2753-PRESS RUN\r
2671\r
2672 HALT instruction 106000\r
2673\r
2674 sim> deposit PTP TIME 20790\r
2675 sim> go\r
2676\r
2677 H103 TEST 12 COMPLETE\r
2678 PASS 000001\r
2679\r
2680 HALT instruction 102077\r
2681\r
2682TEST RESULT: Passed.\r
2683\r
2684TEST NOTES: Test 07 is executed to punch a tape loop that is used in tests\r
2685 04, 05, and 11. Then the default tests 00-06, plus tests 11 and\r
2686 12, are executed.\r
2687\r
2688 Test 06 punches and reads the same tape concurrently (the tape\r
2689 coming out of the punch is then fed into the reader). Under\r
2690 simulation, it is necessary to delay starting the read until the\r
2691 punch buffer has been flushed to the disc. Also, this test\r
2692 depends on the reader being at least twice as fast as the punch,\r
2693 so the PTR/PTP TIME registers are adjusted accordingly.\r
2694\r
2695 Test 11 and test 12 are speed tests, so the PTR and PTP TIMEs\r
2696 are set for realistic timing.\r
2697\r
2698\r
2699\r
2700\r
2701STAND-ALONE DIAGNOSTIC DETAILED EXECUTION AND RESULTS\r
2702=====================================================\r
2703\r
2704Each execution note below presumes that the target diagnostic has been loaded.\r
2705For all runs, the diagnostic configurator was used in automatic mode to load the\r
2706target diagnostic from a paper tape image, as follows:\r
2707\r
2708 sim> attach -r MSC0 24396-13601_Rev-2326.abin.tape\r
2709 sim> deposit S 000000\r
2710 sim> boot MSC0\r
2711\r
2712 HALT instruction 102077\r
2713\r
2714 sim> attach PTR [paper-tape-image-file]\r
2715 sim> deposit S 001011\r
2716 sim> reset\r
2717 sim> go 100\r
2718\r
2719\r
2720\r
2721------------------------------------------------\r
2722DSN 101217 - 2000/Access Comm Processor for 21MX\r
2723------------------------------------------------\r
2724\r
2725TESTED DEVICE: CPU (hp2100_cpu2.c)\r
2726\r
2727BINARY TAPE: 13207-16001 Rev. 1728\r
2728\r
2729CONFIGURATION: sim> set CPU IOP\r
2730\r
2731 sim> deposit S 000013\r
2732 sim> reset\r
2733 sim> go 100\r
2734\r
2735 HALT instruction 102074\r
2736\r
2737 sim> deposit S 000000\r
2738 sim> reset\r
2739 sim> go\r
2740\r
2741TEST REPORT: 21MX 2000 COMPUTER SYSTEM COMM. PROC. FIRMWARE DIAGNOSTIC\r
2742 H030 CRC TEST\r
2743 H040 ENQ, DEQ AND PENQ TESTS\r
2744 H060 IAL TEST\r
2745 H110 INS,READF, SAVE AND RESTR TESTS\r
2746 H120 LAI AND SAI TESTS\r
2747 H130 PFREX TEST\r
2748 H140 PFREI TEST\r
2749 H150 PFRIO TEST\r
2750 PASS 000001\r
2751\r
2752 HALT instruction 102077\r
2753\r
2754TEST RESULT: Passed.\r
2755\r
2756\r
2757\r
2758--------------------------------------------\r
2759DSN (none) - HP 3030 Magnetic Tape Subsystem\r
2760--------------------------------------------\r
2761\r
2762TESTED DEVICE: MT (hp2100_mt.c)\r
2763\r
2764BINARY TAPE: None available.\r
2765\r
2766CONFIGURATION: (none)\r
2767\r
2768TEST REPORT: (none)\r
2769\r
2770TEST RESULT: Not tested.\r
2771\r
2772TEST NOTES: The limited documentation available for this unit suggests that\r
2773 the diagnostic is HP product number 20433, but no copy of this\r
2774 diagnostic has been found.\r
2775\r
2776\r
2777\r
2778-----------------------------------------------------------\r
2779DSN 177777 - HP 2100 Fixed Head Disc/Drum Diagnostic (2770)\r
2780-----------------------------------------------------------\r
2781\r
2782TESTED DEVICE: DR (hp2100_dr.c)\r
2783\r
2784BINARY TAPE: 22682-16017 Rev. 1612\r
2785\r
2786CONFIGURATION: sim> reset\r
2787 sim> go 100\r
2788\r
2789 H0 2100 SERIES FIXED HEAD DISC/DRUM DIAGNOSTIC\r
2790 ENTER SELECT CODES, CHANNELS IN SWITCH REGISTER,PUSH RUN\r
2791\r
2792 HALT instruction 107001\r
2793\r
2794 sim> set DRC 180K\r
2795 sim> set DRC trackprot=8\r
2796 sim> attach DRC0 scratch.U0.2770.disc\r
2797 sim> deposit S 002611\r
2798 sim> go\r
2799\r
2800 H1 CONFIGURATION COMPLETE\r
2801 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED,\r
2802 H70 ENTER PROGRAM OPTIONS IN SWITCH REGISTER, PUSH RUN\r
2803\r
2804 HALT instruction 107077\r
2805\r
2806 sim> deposit S 010000\r
2807 sim> go\r
2808\r
2809TEST REPORT: H12 DEVICE HAS 90 SECTORS\r
2810 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN\r
2811\r
2812 HALT instruction 102002\r
2813\r
2814 sim> set DRC unprotected\r
2815 sim> go\r
2816\r
2817 H10 SET TRACK PROTECT SWITCH TO PROTECTED,PRESS RUN\r
2818\r
2819 HALT instruction 102002\r
2820\r
2821 sim> set DRC protected\r
2822 sim> go\r
2823\r
2824 H14 DEVICE HAS 0032 TRACKS,THE FOLLOWING ARE PROTECTED:\r
2825 H63 0000 TO 0007\r
2826 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN\r
2827\r
2828 HALT instruction 102002\r
2829\r
2830 sim> set DRC unprotected\r
2831 sim> go\r
2832\r
2833 H36 PASS 0001\r
2834\r
2835 HALT instruction 102077\r
2836\r
2837TEST RESULT: Passed.\r
2838\r
2839\r
2840\r
2841---------------------------------------------------------------\r
2842DSN 177777 - HP 2100 Fixed Head Disc/Drum Diagnostic (2771-001)\r
2843---------------------------------------------------------------\r
2844\r
2845TESTED DEVICE: DR (hp2100_dr.c)\r
2846\r
2847BINARY TAPE: 22682-16017 Rev. 1612\r
2848\r
2849CONFIGURATION: sim> reset\r
2850 sim> go 100\r
2851\r
2852 H0 2100 SERIES FIXED HEAD DISC/DRUM DIAGNOSTIC\r
2853 ENTER SELECT CODES, CHANNELS IN SWITCH REGISTER,PUSH RUN\r
2854\r
2855 HALT instruction 107001\r
2856\r
2857 sim> set DRC 720K\r
2858 sim> set DRC trackprot=32\r
2859 sim> attach DRC0 scratch.U0.2771.disc\r
2860 sim> deposit S 002611\r
2861 sim> go\r
2862\r
2863 H1 CONFIGURATION COMPLETE\r
2864 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED,\r
2865 H70 ENTER PROGRAM OPTIONS IN SWITCH REGISTER, PUSH RUN\r
2866\r
2867 HALT instruction 107077\r
2868\r
2869 sim> deposit S 010000\r
2870 sim> go\r
2871\r
2872TEST REPORT: H12 DEVICE HAS 90 SECTORS\r
2873 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN\r
2874\r
2875 HALT instruction 102002\r
2876\r
2877 sim> set DRC unprotected\r
2878 sim> go\r
2879\r
2880 H10 SET TRACK PROTECT SWITCH TO PROTECTED,PRESS RUN\r
2881\r
2882 HALT instruction 102002\r
2883\r
2884 sim> set DRC protected\r
2885 sim> go\r
2886\r
2887 H14 DEVICE HAS 0128 TRACKS,THE FOLLOWING ARE PROTECTED:\r
2888 H63 0000 TO 0031\r
2889 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN\r
2890\r
2891 HALT instruction 102002\r
2892\r
2893 sim> set DRC unprotected\r
2894 sim> go\r
2895\r
2896 H36 PASS 0001\r
2897\r
2898 HALT instruction 102077\r
2899\r
2900TEST RESULT: Passed.\r
2901\r
2902\r
2903\r
2904-----------------------------------------------------------\r
2905DSN 177777 - HP 2100 Fixed Head Disc/Drum Diagnostic (2773)\r
2906-----------------------------------------------------------\r
2907\r
2908TESTED DEVICE: DR (hp2100_dr.c)\r
2909\r
2910BINARY TAPE: 22682-16017 Rev. 1612\r
2911\r
2912CONFIGURATION: sim> reset\r
2913 sim> go 100\r
2914\r
2915 H0 2100 SERIES FIXED HEAD DISC/DRUM DIAGNOSTIC\r
2916 ENTER SELECT CODES, CHANNELS IN SWITCH REGISTER,PUSH RUN\r
2917\r
2918 HALT instruction 107001\r
2919\r
2920 sim> set DRC 384K\r
2921 sim> set DRC trackprot=16\r
2922 sim> attach DRC0 scratch.U0.2773.disc\r
2923 sim> deposit S 002611\r
2924 sim> go\r
2925\r
2926 H1 CONFIGURATION COMPLETE\r
2927 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED,\r
2928 H70 ENTER PROGRAM OPTIONS IN SWITCH REGISTER, PUSH RUN\r
2929\r
2930 HALT instruction 107077\r
2931\r
2932 sim> deposit S 010000\r
2933 sim> go\r
2934\r
2935TEST REPORT: H12 DEVICE HAS 32 SECTORS\r
2936 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN\r
2937\r
2938 HALT instruction 102002\r
2939\r
2940 sim> set DRC unprotected\r
2941 sim> go\r
2942\r
2943 H10 SET TRACK PROTECT SWITCH TO PROTECTED,PRESS RUN\r
2944\r
2945 HALT instruction 102002\r
2946\r
2947 sim> set DRC protected\r
2948 sim> go\r
2949\r
2950 H14 DEVICE HAS 0192 TRACKS,THE FOLLOWING ARE PROTECTED:\r
2951 H63 0000 TO 0015\r
2952 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN\r
2953\r
2954 HALT instruction 102002\r
2955\r
2956 sim> set DRC unprotected\r
2957 sim> go\r
2958\r
2959 H36 PASS 0001\r
2960\r
2961 HALT instruction 102077\r
2962\r
2963TEST RESULT: Passed.\r
2964\r
2965\r
2966\r
2967-----------------------------------------------------------\r
2968DSN 177777 - HP 2100 Fixed Head Disc/Drum Diagnostic (2775)\r
2969-----------------------------------------------------------\r
2970\r
2971TESTED DEVICE: DR (hp2100_dr.c)\r
2972\r
2973BINARY TAPE: 22682-16017 Rev. 1612\r
2974\r
2975CONFIGURATION: sim> reset\r
2976 sim> go 100\r
2977\r
2978 H0 2100 SERIES FIXED HEAD DISC/DRUM DIAGNOSTIC\r
2979 ENTER SELECT CODES, CHANNELS IN SWITCH REGISTER,PUSH RUN\r
2980\r
2981 HALT instruction 107001\r
2982\r
2983 sim> set DRC 1536K\r
2984 sim> set DRC trackprot=64\r
2985 sim> attach DRC0 scratch.U0.2775.disc\r
2986 sim> deposit S 002611\r
2987 sim> go\r
2988\r
2989 H1 CONFIGURATION COMPLETE\r
2990 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED,\r
2991 H70 ENTER PROGRAM OPTIONS IN SWITCH REGISTER, PUSH RUN\r
2992\r
2993 HALT instruction 107077\r
2994\r
2995 sim> deposit S 010000\r
2996 sim> go\r
2997\r
2998TEST REPORT: H12 DEVICE HAS 32 SECTORS\r
2999 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN\r
3000\r
3001 HALT instruction 102002\r
3002\r
3003 sim> set DRC unprotected\r
3004 sim> go\r
3005\r
3006 H10 SET TRACK PROTECT SWITCH TO PROTECTED,PRESS RUN\r
3007\r
3008 HALT instruction 102002\r
3009\r
3010 sim> set DRC protected\r
3011 sim> go\r
3012\r
3013 H14 DEVICE HAS 0768 TRACKS,THE FOLLOWING ARE PROTECTED:\r
3014 H63 0000 TO 0063\r
3015 H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN\r
3016\r
3017 HALT instruction 102002\r
3018\r
3019 sim> set DRC unprotected\r
3020 sim> go\r
3021\r
3022 H36 PASS 0001\r
3023\r
3024 HALT instruction 102077\r
3025\r
3026TEST RESULT: Passed.\r
3027\r
3028\r
3029\r
3030-----------------------------------------------\r
3031DSN (none) - 12875 Processor Interconnect Cable\r
3032-----------------------------------------------\r
3033\r
3034TESTED DEVICE: IPLI, IPLO (hp2100_ipl.c)\r
3035\r
3036BINARY TAPE: 24197-60001 Rev. B\r
3037\r
3038CONFIGURATION: sim> set IPLI DIAG\r
3039 sim> set IPLO DIAG\r
3040 sim> deposit S 003332\r
3041 sim> reset\r
3042 sim> go 2\r
3043\r
3044 HALT instruction 107076\r
3045\r
3046 sim> deposit S 010000\r
3047 sim> reset\r
3048 sim> go\r
3049\r
3050 HALT instruction 107077\r
3051\r
3052 sim> deposit S 000000\r
3053 sim> reset\r
3054 sim> go 100\r
3055\r
3056TEST REPORT: H14. START 12875 CABLE DIAGNOSTIC\r
3057 H77. END 12875 CABLE DIAGNOSTIC\r
3058\r
3059 HALT instruction 102077\r
3060\r
3061TEST RESULT: Passed.\r
3062\r
3063\r
3064\r
3065-----------------------------------------------------------------\r
3066DSN (none) - HP2100A Cartridge Disc Memory (2871) (multiple unit)\r
3067-----------------------------------------------------------------\r
3068\r
3069TESTED DEVICE: DP (hp2100_dp.c)\r
3070\r
3071BINARY TAPE: 24203-60001 Rev. A\r
3072\r
3073CONFIGURATION: sim> set DPC 12557A\r
3074 sim> attach DPC0 scratch.U0.2871.disc\r
3075 sim> attach DPC1 scratch.U1.2871.disc\r
3076 sim> attach DPC2 scratch.U2.2871.disc\r
3077 sim> attach DPC3 scratch.U3.2871.disc\r
3078 sim> deposit S 002211\r
3079 sim> reset\r
3080 sim> go 2\r
3081\r
3082 HALT instruction 107077\r
3083\r
3084 sim> deposit S 000400\r
3085 sim> reset\r
3086 sim> go 100\r
3087\r
3088 H0 HP2100A CARTRIDGE DISC MEMORY DIAGNOSTIC\r
3089 H34 ENTER UNIT NUMBERS(0-3)SEPARATED BY COMMAS\r
3090 0,1,2,3\r
3091\r
3092 H33 RESET SWITCH 8\r
3093\r
3094 HALT instruction 102002\r
3095\r
3096 sim> deposit S 000004\r
3097 sim> go\r
3098\r
3099 H24 CYLINDER TABLE\r
3100 000,001,002,004,008,016,032,064,128,202\r
3101 H25 WISH TO ALTER TABLE?\r
3102 NO\r
3103\r
3104 H27 PATTERN TABLE\r
3105 000000 177777 125252 052525 007417\r
3106 170360 162745 163346 155555 022222\r
3107 H25 WISH TO ALTER TABLE?\r
3108 NO\r
3109\r
3110 H62 TYPE A FOR HEADS 0,1;B FOR 2,3;C FOR ALTERNATELY 0,1 THEN 2,3\r
3111 C\r
3112\r
3113 H32 RESET SWITCH 2\r
3114\r
3115 HALT instruction 102002\r
3116\r
3117 sim> deposit S 000000\r
3118 sim> reset\r
3119 sim> go 100\r
3120\r
3121TEST REPORT: H0 HP2100A CARTRIDGE DISC MEMORY DIAGNOSTIC\r
3122 H65 PASS 0001\r
3123 H65 PASS 0002\r
3124 H65 PASS 0003\r
3125 H65 PASS 0004\r
3126\r
3127 [CTRL+E]\r
3128 Simulation stopped\r
3129\r
3130TEST RESULT: Passed.\r
3131\r
3132TEST NOTES: Four passes are required to test all head/unit combinations.\r
3133\r
3134\r
3135\r
3136--------------------------------------------------------------------\r
3137DSN (none) - HP2100A Cartridge Disc Memory (2871) (user interaction)\r
3138--------------------------------------------------------------------\r
3139\r
3140TESTED DEVICE: DP (hp2100_dp.c)\r
3141\r
3142BINARY TAPE: 24203-60001 Rev. A\r
3143\r
3144CONFIGURATION: sim> set DPC 12557A\r
3145 sim> attach DPC0 scratch.U0.2871.disc\r
3146 sim> deposit S 002211\r
3147 sim> reset\r
3148 sim> go 2\r
3149\r
3150 HALT instruction 107077\r
3151\r
3152 sim> deposit S 010020\r
3153 sim> reset\r
3154 sim> go 100\r
3155\r
3156TEST REPORT: H0 HP2100A CARTRIDGE DISC MEMORY DIAGNOSTIC\r
3157 H66 SET OVERRIDE SWITCH,PUSH RUN\r
3158\r
3159 HALT instruction 102002\r
3160\r
3161 sim> go\r
3162\r
3163 H37 READ AFTER WRITE ADDRESS IN S0\r
3164 E64 STATUS IS 000000 SHOULD BE 000010\r
3165 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00\r
3166\r
3167 HALT instruction 102001\r
3168\r
3169 sim> go\r
3170\r
3171 H22 CYCLIC CHECK IN S0\r
3172 E64 STATUS IS 000000 SHOULD BE 000010\r
3173 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00\r
3174\r
3175 HALT instruction 102001\r
3176\r
3177 sim> go\r
3178\r
3179 H67 CLEAR OVERRIDE SWITCH,PUSH RUN\r
3180\r
3181 HALT instruction 102002\r
3182\r
3183 sim> go\r
3184\r
3185 H41 READ DEFECTIVE TRACK IN S0\r
3186 E64 STATUS IS 000000 SHOULD BE 000031\r
3187 H51 CYL 0001 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00\r
3188\r
3189 HALT instruction 102001\r
3190\r
3191 sim> go\r
3192\r
3193 H42 WRITE PROTECTED TRACK IN S0\r
3194 E64 STATUS IS 000000 SHOULD BE 000011\r
3195 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00\r
3196\r
3197 HALT instruction 102001\r
3198\r
3199 sim> go\r
3200\r
3201 H36 WRITE ADDRESS IN S0\r
3202 E64 STATUS IS 000000 SHOULD BE 000011\r
3203 H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 3072 UNIT 00\r
3204\r
3205 HALT instruction 102001\r
3206\r
3207 sim> go\r
3208\r
3209 H66 SET OVERRIDE SWITCH,PUSH RUN\r
3210\r
3211 HALT instruction 102002\r
3212\r
3213 sim> go\r
3214\r
3215 H67 CLEAR OVERRIDE SWITCH,PUSH RUN\r
3216\r
3217 HALT instruction 102002\r
3218\r
3219 sim> go\r
3220\r
3221 H70 UNLOCK UNIT 0,PUSH RUN\r
3222\r
3223 HALT instruction 102002\r
3224\r
3225 sim> set DPC0 unloaded\r
3226 sim> go\r
3227\r
3228 H40 READY UNIT 0\r
3229\r
3230 [CTRL+E]\r
3231 Simulation stopped\r
3232\r
3233 sim> set DPC0 loaded\r
3234 sim> go\r
3235\r
3236 H71 PRESS PRESET THEN PRESS RUN\r
3237\r
3238 HALT instruction 102002\r
3239\r
3240 sim> deposit S 000140\r
3241 sim> reset\r
3242 sim> go\r
3243\r
3244 H65 PASS 0001\r
3245\r
3246TEST RESULT: Partially passed.\r
3247\r
3248TEST NOTES: Step 0 tests the the defective and protected cylinder bits and\r
3249 the FORMAT OVERRIDE switch. These features are not simulated.\r
3250\r
3251\r
3252\r
3253\r
3254ONLINE DIAGNOSTIC DETAILED EXECUTION AND RESULTS\r
3255================================================\r
3256\r
3257Online diagnostics were run under the control of the indicated operating\r
3258systems. Unless otherwise noted, the programs were loaded with the default\r
3259configuration specified by the associated linker command file or the operating\r
3260system.\r
3261\r
3262\r
3263\r
3264------------------------------------------------\r
3265#EMA - Extended Memory Array Firmware Diagnostic\r
3266------------------------------------------------\r
3267\r
3268TESTED DEVICE: CPU (hp2100_cpu5.c)\r
3269\r
3270BINARY FILE: 92067-16013 Rev. 1805\r
3271\r
3272HOST SYSTEM: RTE-IVB Rev. 5010\r
3273\r
3274CONFIGURATION: sim> set CPU EMA\r
3275 sim> go\r
3276\r
3277TEST REPORT: EMA ON-LINE DIAGNOSTIC SUCCESSFUL COMPLETION\r
3278\r
3279TEST RESULT: Passed.\r
3280\r
3281\r
3282\r
3283------------------------------------------------\r
3284VMACK - Virtual Memory Array Firmware Diagnostic\r
3285------------------------------------------------\r
3286\r
3287TESTED DEVICE: CPU (hp2100_cpu5.c)\r
3288\r
3289BINARY FILE: 92084-16423 Rev. 2121\r
3290\r
3291HOST SYSTEM: RTE-6/VM Rev. 6200\r
3292\r
3293CONFIGURATION: sim> set CPU 1000-F\r
3294 sim> set CPU VMA\r
3295 sim> go\r
3296\r
3297TEST REPORT: VMACK - VMA FIRMWARE DIAGNOSTIC, FIRMWARE REV# 003\r
3298 VMACK - .IMAR NO ERRORS DETECTED PASS# 1\r
3299 VMACK - .JMAR NO ERRORS DETECTED PASS# 1\r
3300 VMACK - .LBP NO ERRORS DETECTED PASS# 1\r
3301 VMACK - .LBPR NO ERRORS DETECTED PASS# 1\r
3302 VMACK - .LPX NO ERRORS DETECTED PASS# 1\r
3303 VMACK - .LPXR NO ERRORS DETECTED PASS# 1\r
3304 VMACK - .PMAP NO ERRORS DETECTED PASS# 1\r
3305 VMACK - .IMAP NO ERRORS DETECTED PASS# 1\r
3306 VMACK - .JMAP NO ERRORS DETECTED PASS# 1\r
3307\r
3308TEST RESULT: Passed.\r
3309\r
3310\r
3311\r
3312--------------------------------------------------\r
3313VISOD - Vector Instruction Set Firmware Diagnostic\r
3314--------------------------------------------------\r
3315\r
3316TESTED DEVICE: CPU (hp2100_cpu7.c)\r
3317\r
3318BINARY FILE: 12824-16002 Rev. 2026\r
3319\r
3320HOST SYSTEM: RTE-IVB Rev. 5010\r
3321\r
3322CONFIGURATION: sim> set CPU 1000-F\r
3323 sim> set CPU VIS\r
3324 sim> go\r
3325\r
3326TEST REPORT: VIS ON-LINE DIAGNOSTIC SUCCESSFUL COMPLETION\r
3327\r
3328TEST RESULT: Passed.\r
3329\r
3330\r
3331\r
3332--------------------------------------------------\r
3333VISOD - Vector Instruction Set Firmware Diagnostic\r
3334--------------------------------------------------\r
3335\r
3336TESTED DEVICE: CPU (hp2100_cpu7.c)\r
3337\r
3338BINARY FILE: 12829-16006 Rev. 2226\r
3339\r
3340HOST SYSTEM: RTE-6/VM Rev. 6200\r
3341\r
3342CONFIGURATION: sim> set CPU 1000-F\r
3343 sim> set CPU VIS\r
3344 sim> go\r
3345\r
3346TEST REPORT: VIS ON-LINE DIAGNOSTIC SUCCESSFUL COMPLETION\r
3347\r
3348TEST RESULT: Passed.\r
3349\r
3350\r
3351\r
3352---------------------------------------\r
3353SDIAG - SIGNAL/1000 Firmware Diagnostic\r
3354---------------------------------------\r
3355\r
3356TESTED DEVICE: CPU (hp2100_cpu7.c)\r
3357\r
3358BINARY FILE: 92835-16006 Rev. 2040\r
3359\r
3360HOST SYSTEM: RTE-6/VM Rev. 6200\r
3361\r
3362CONFIGURATION: sim> set CPU 1000-F\r
3363 sim> set CPU VIS\r
3364 sim> set CPU SIGNAL\r
3365 sim> go\r
3366\r
3367TEST REPORT: SIGNAL/1000 FIRMWARE DIAGNOSTIC\r
3368\r
3369 SIGNAL/1000 FIRMWARE DIAGNOSTIC SUCCESSFUL COMPLETION\r
3370\r
3371TEST RESULT: Passed.\r
Magically enhanced SIMH