[simh.git] / I1401 / i1401_defs.h

/* i1401_defs.h: IBM 1401 simulator definitions\r
\r
   Copyright (c) 1993-2007, Robert M. Supnik\r
\r
   Permission is hereby granted, free of charge, to any person obtaining a\r
   copy of this software and associated documentation files (the "Software"),\r
   to deal in the Software without restriction, including without limitation\r
   the rights to use, copy, modify, merge, publish, distribute, sublicense,\r
   and/or sell copies of the Software, and to permit persons to whom the\r
   Software is furnished to do so, subject to the following conditions:\r
\r
   The above copyright notice and this permission notice shall be included in\r
   all copies or substantial portions of the Software.\r
\r
   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
   IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\r
   FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL\r
   ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
   IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
   CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
\r
   Except as contained in this notice, the name of Robert M Supnik shall not be\r
   used in advertising or otherwise to promote the sale, use or other dealings\r
   in this Software without prior written authorization from Robert M Supnik.\r
\r
   28-Jun-07    RMS     Defined character code for tape mark\r
   14-Nov-04    RMS     Added column binary support\r
   27-Oct-04    RMS     Added maximum instruction length\r
   16-Mar-03    RMS     Fixed mnemonic for MCS\r
   03-Jun-02    RMS     Added 1311 support\r
   14-Apr-99    RMS     Converted t_addr to unsigned\r
\r
   This simulator is based on the 1401 simulator written by Len Fehskens\r
   with assistance from Sarah Lee Harris and Bob Supnik. This one's for\r
   you, Len.  I am grateful to Paul Pierce and Charles Owen for their help\r
   in answering questions, gathering source material, and debugging.\r
*/\r
\r
#ifndef _I1401_DEFS_H_\r
#define _I1401_DEFS_H_  0\r
\r
#include "sim_defs.h"\r
\r
/* Simulator stop codes */\r
\r
#define STOP_NXI        1                               /* unimpl instr */\r
#define STOP_NXM        2                               /* non-exist mem */\r
#define STOP_NXD        3                               /* non-exist dev */\r
#define STOP_NOWM       4                               /* no WM under op */\r
#define STOP_INVA       5                               /* invalid A addr */\r
#define STOP_INVB       6                               /* invalid B addr */\r
#define STOP_INVL       7                               /* invalid length */\r
#define STOP_INVM       8                               /* invalid modifier */\r
#define STOP_INVBR      9                               /* invalid branch */\r
#define STOP_IBKPT      10                              /* breakpoint */\r
#define STOP_HALT       11                              /* halt */\r
#define STOP_INVMTU     12                              /* invalid MT unit */\r
#define STOP_MTZ        13                              /* MT zero lnt rec */\r
#define STOP_MTL        14                              /* MT write lock */\r
#define STOP_CCT        15                              /* inv CCT channel */\r
#define STOP_NOCD       16                              /* no cards left */\r
#define STOP_WRAP       17                              /* AS, BS mem wrap */\r
#define STOP_IOC        18                              /* I/O check */\r
#define STOP_INVDSC     19                              /* invalid disk sector */\r
#define STOP_INVDCN     20                              /* invalid disk count */\r
#define STOP_INVDSK     21                              /* invalid disk unit */\r
#define STOP_INVDFN     22                              /* invalid disk func */\r
#define STOP_INVDLN     23                              /* invalid disk reclen */\r
#define STOP_WRADIS     24                              /* write address dis */\r
#define STOP_WRCHKE     25                              /* write check error */\r
#define STOP_INVDAD     26                              /* invalid disk addr */\r
#define STOP_INVDCY     27                              /* invalid direct seek */\r
\r
/* Memory and devices */\r
\r
#define MAXMEMSIZE      16000                           /* max memory */\r
#define MEMSIZE         (cpu_unit.capac)                /* current memory */\r
#define CDR_BUF         1                               /* card rdr buffer */\r
#define CDR_WIDTH       80                              /* card rdr width */\r
#define CDP_BUF         101                             /* card punch buffer */\r
#define CDP_WIDTH       80                              /* card punch width */\r
#define CD_CBUF1        401                             /* r/p col bin buf 12-3 */\r
#define CD_CBUF2        501                             /* r/p col bin buf 4-9 */\r
#define LPT_BUF         201                             /* line print buffer */\r
#define LPT_WIDTH       132                             /* line print width */\r
#define CCT_LNT         132                             /* car ctrl length */\r
#define INQ_WIDTH       80                              /* inq term width */\r
#define ADDR_ERR(x)     (((uint32) (x)) >= MEMSIZE)\r
\r
/* Binary address format\r
\r
        <14:0>          address, with index added in\r
        <23:16>         index register memory address\r
        <25:24>         address error bits\r
*/\r
\r
#define ADDRMASK        037777                          /* addr mask */\r
#define INDEXMASK       077777                          /* addr + index mask */\r
#define V_INDEX         16\r
#define M_INDEX         0177\r
#define V_ADDRERR       24\r
#define BA              (1 << V_ADDRERR)                /* bad addr digit */\r
#define X1              (87 << V_INDEX)                 /* index reg 1 */\r
#define X2              (92 << V_INDEX)                 /* index reg 2 */\r
#define X3              (97 << V_INDEX)                 /* index reg 3 */\r
\r
/* CPU instruction control flags.  The flag definitions must be harmonized\r
   with the UNIT flag definitions used by the simulator. */\r
\r
/* Lengths */\r
\r
#define L1              0001                            /* 1: op */\r
#define L2              0002                            /* 2: op d */\r
#define L4              0004                            /* 4: op aaa */\r
#define L5              0010                            /* 5: op aaa d */\r
#define L7              0020                            /* 7: op aaa bbb */\r
#define L8              0040                            /* 8: op aaa bbb d */\r
#define MAX_L           8                               /* max length */\r
\r
/* CPU options, stored in cpu_unit.flags */\r
\r
#define MDV             (1 << (UNIT_V_UF + 0))          /* multiply/divide */\r
#define MR              (1 << (UNIT_V_UF + 1))          /* move record */\r
#define XSA             (1 << (UNIT_V_UF + 2))          /* index, store addr */\r
#define EPE             (1 << (UNIT_V_UF + 3))          /* expanded edit */\r
#define MA              (1 << (UNIT_V_UF + 4))          /* modify address */\r
#define BBE             (1 << (UNIT_V_UF + 5))          /* br bit equal */\r
#define HLE             (1 << (UNIT_V_UF + 6))          /* high/low/equal */\r
#define UNIT_MSIZE      (1 << (UNIT_V_UF + 7))          /* fake flag */\r
#define ALLOPT          (MDV + MR + XSA + EPE + MA + BBE + HLE)\r
#define STDOPT          (MDV + MR + XSA + EPE + MA + BBE + HLE)\r
\r
/* Fetch control */\r
\r
#define AREQ            (1 << (UNIT_V_UF + 8))          /* validate A */\r
#define BREQ            (1 << (UNIT_V_UF + 9))          /* validate B */\r
#define MLS             (1 << (UNIT_V_UF + 10))         /* move load store */\r
#define NOWM            (1 << (UNIT_V_UF + 11))         /* no WM at end */\r
#define HNOP            (1 << (UNIT_V_UF + 12))         /* halt or nop */\r
#define IO              (1 << (UNIT_V_UF + 13))         /* IO */\r
#define UNIT_BCD        (1 << (UNIT_V_UF + 14))         /* BCD strings */\r
\r
#if (UNIT_V_UF < 6) || ((UNIT_V_UF + 14) > 31)\r
    Definition error: flags overlap\r
#endif\r
\r
/* BCD memory character format */\r
\r
#define WM              0100                            /* word mark */\r
#define ZONE            0060                            /* zone */\r
#define  BBIT           0040                            /* 1 in valid sign */\r
#define  ABIT           0020                            /* sign (1 = +) */\r
#define DIGIT           0017                            /* digit */\r
#define CHAR            0077                            /* character */\r
\r
#define V_WM            6\r
#define V_ZONE          4\r
#define V_DIGIT         0\r
\r
/* Interesting BCD characters */\r
\r
#define BCD_BLANK       000\r
#define BCD_ONE         001\r
#define BCD_TWO         002\r
#define BCD_THREE       003\r
#define BCD_FOUR        004\r
#define BCD_FIVE        005\r
#define BCD_SIX         006\r
#define BCD_SEVEN       007\r
#define BCD_EIGHT       010\r
#define BCD_NINE        011\r
#define BCD_ZERO        012\r
#define BCD_TAPMRK      017\r
#define BCD_ALT         020\r
#define BCD_S           022\r
#define BCD_U           024\r
#define BCD_W           026\r
#define BCD_RECMRK      032\r
#define BCD_COMMA       033\r
#define BCD_PERCNT      034\r
#define BCD_WM          035\r
#define BCD_BS          036\r
#define BCD_TS          037\r
#define BCD_MINUS       040\r
#define BCD_M           044\r
#define BCD_R           051\r
#define BCD_DOLLAR      053\r
#define BCD_ASTER       054\r
#define BCD_AMPER       060\r
#define BCD_A           061\r
#define BCD_B           062\r
#define BCD_C           063\r
#define BCD_E           065\r
#define BCD_DECIMAL     073\r
#define BCD_SQUARE      074\r
#define BCD_GRPMRK      077\r
\r
/* Opcodes */\r
\r
#define OP_R            001                             /* read */\r
#define OP_W            002                             /* write */\r
#define OP_WR           003                             /* write and read */\r
#define OP_P            004                             /* punch */\r
#define OP_RP           005                             /* read and punch */\r
#define OP_WP           006                             /* write and punch */\r
#define OP_WRP          007                             /* write read punch */\r
#define OP_RF           010                             /* reader feed */\r
#define OP_PF           011                             /* punch feed */\r
#define OP_MA           013                             /* modify address */\r
#define OP_MUL          014                             /* multiply */\r
#define OP_CS           021                             /* clear storage */\r
#define OP_S            022                             /* subtract */\r
#define OP_MTF          024                             /* magtape function */\r
#define OP_BWZ          025                             /* branch wm or zone */\r
#define OP_BBE          026                             /* branch bit equal */\r
#define OP_MZ           030                             /* move zone */\r
#define OP_MCS          031                             /* move suppr zeroes */\r
#define OP_SWM          033                             /* set word mark */\r
#define OP_DIV          034                             /* divide */\r
#define OP_SS           042                             /* select stacker */\r
#define OP_LCA          043                             /* load characters */\r
#define OP_MCW          044                             /* move characters */\r
#define OP_NOP          045                             /* no op */\r
#define OP_MCM          047                             /* move to rec/grp mk */\r
#define OP_SAR          050                             /* store A register */\r
#define OP_ZS           052                             /* zero and subtract */\r
#define OP_A            061                             /* add */\r
#define OP_B            062                             /* branch */\r
#define OP_C            063                             /* compare */\r
#define OP_MN           064                             /* move numeric */\r
#define OP_MCE          065                             /* move char and edit */\r
#define OP_CC           066                             /* carriage control */\r
#define OP_SBR          070                             /* store B register */\r
#define OP_ZA           072                             /* zero and add */\r
#define OP_H            073                             /* halt */\r
#define OP_CWM          074                             /* clear word mark */\r
\r
/* I/O addresses */\r
\r
#define IO_INQ          023                             /* inquiry terminal */\r
#define IO_MT           024                             /* magtape */\r
#define IO_MTB          062                             /* binary magtape */\r
#define IO_DP           066                             /* 1311 diskpack */\r
\r
/* I/O modes */\r
\r
#define MD_NORM         0                               /* normal (move) */\r
#define MD_WM           1                               /* word mark (load) */\r
#define MD_BIN          2                               /* binary */\r
\r
/* Indicator characters */\r
\r
#define IN_UNC          000                             /* unconditional */\r
#define IN_CC9          011                             /* carr ctrl chan 9 */\r
#define IN_CC12         014                             /* carr ctrl chan 12 */\r
#define IN_UNQ          021                             /* unequal */\r
#define IN_EQU          022                             /* equal */\r
#define IN_LOW          023                             /* low */\r
#define IN_HGH          024                             /* high */\r
#define IN_DPW          025                             /* parity/compare check */\r
#define IN_LNG          026                             /* wrong lnt record */\r
#define IN_UNA          027                             /* unequal addr cmp */\r
#define IN_DSK          030                             /* disk error */\r
#define IN_OVF          031                             /* overflow */\r
#define IN_LPT          032                             /* printer error */\r
#define IN_PRO          034                             /* process check */\r
#define IN_DBY          036                             /* disk busy */\r
#define IN_END          042                             /* end indicator */\r
#define IN_TAP          043                             /* tape error */\r
#define IN_ACC          045                             /* access error */\r
#define IN_BSY          047                             /* printer busy */\r
#define IN_INR          050                             /* inquiry request */\r
#define IN_PCB          051                             /* printer carr busy */\r
#define IN_PNCH         052                             /* punch error */\r
#define IN_INC          054                             /* inquiry clear */\r
#define IN_LST          061                             /* last card */\r
#define IN_SSB          062                             /* sense switch B */\r
#define IN_SSC          063                             /* sense switch C */\r
#define IN_SSD          064                             /* sense switch D */\r
#define IN_SSE          065                             /* sense switch E */\r
#define IN_SSF          066                             /* sense switch F */\r
#define IN_SSG          067                             /* sense switch G */\r
#define IN_READ         072                             /* reader error */\r
\r
#define CRETIOE(f,c)    return ((f)? (c): SCPE_OK)\r
\r
/* Function prototypes */\r
\r
int32 bcd2ascii (int32 c, t_bool use_h);\r
int32 ascii2bcd (int32 c);\r
\r
\r
#endif\r
Commit	Line	Data
196ba1fc PH	1	/* i1401_defs.h: IBM 1401 simulator definitions\r
	2	\r
	3	Copyright (c) 1993-2007, Robert M. Supnik\r
	4	\r
	5	Permission is hereby granted, free of charge, to any person obtaining a\r
	6	copy of this software and associated documentation files (the "Software"),\r
	7	to deal in the Software without restriction, including without limitation\r
	8	the rights to use, copy, modify, merge, publish, distribute, sublicense,\r
	9	and/or sell copies of the Software, and to permit persons to whom the\r
	10	Software is furnished to do so, subject to the following conditions:\r
	11	\r
	12	The above copyright notice and this permission notice shall be included in\r
	13	all copies or substantial portions of the Software.\r
	14	\r
	15	THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
	16	IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\r
	17	FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL\r
	18	ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
	19	IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
	20	CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
	21	\r
	22	Except as contained in this notice, the name of Robert M Supnik shall not be\r
	23	used in advertising or otherwise to promote the sale, use or other dealings\r
	24	in this Software without prior written authorization from Robert M Supnik.\r
	25	\r
	26	28-Jun-07 RMS Defined character code for tape mark\r
	27	14-Nov-04 RMS Added column binary support\r
	28	27-Oct-04 RMS Added maximum instruction length\r
	29	16-Mar-03 RMS Fixed mnemonic for MCS\r
	30	03-Jun-02 RMS Added 1311 support\r
	31	14-Apr-99 RMS Converted t_addr to unsigned\r
	32	\r
	33	This simulator is based on the 1401 simulator written by Len Fehskens\r
	34	with assistance from Sarah Lee Harris and Bob Supnik. This one's for\r
	35	you, Len. I am grateful to Paul Pierce and Charles Owen for their help\r
	36	in answering questions, gathering source material, and debugging.\r
	37	*/\r
	38	\r
	39	#ifndef _I1401_DEFS_H_\r
	40	#define _I1401_DEFS_H_ 0\r
	41	\r
	42	#include "sim_defs.h"\r
	43	\r
	44	/* Simulator stop codes */\r
	45	\r
	46	#define STOP_NXI 1 /* unimpl instr */\r
	47	#define STOP_NXM 2 /* non-exist mem */\r
	48	#define STOP_NXD 3 /* non-exist dev */\r
	49	#define STOP_NOWM 4 /* no WM under op */\r
	50	#define STOP_INVA 5 /* invalid A addr */\r
	51	#define STOP_INVB 6 /* invalid B addr */\r
	52	#define STOP_INVL 7 /* invalid length */\r
	53	#define STOP_INVM 8 /* invalid modifier */\r
	54	#define STOP_INVBR 9 /* invalid branch */\r
	55	#define STOP_IBKPT 10 /* breakpoint */\r
	56	#define STOP_HALT 11 /* halt */\r
	57	#define STOP_INVMTU 12 /* invalid MT unit */\r
	58	#define STOP_MTZ 13 /* MT zero lnt rec */\r
	59	#define STOP_MTL 14 /* MT write lock */\r
	60	#define STOP_CCT 15 /* inv CCT channel */\r
	61	#define STOP_NOCD 16 /* no cards left */\r
	62	#define STOP_WRAP 17 /* AS, BS mem wrap */\r
	63	#define STOP_IOC 18 /* I/O check */\r
	64	#define STOP_INVDSC 19 /* invalid disk sector */\r
65	#define STOP_INVDCN 20 /* invalid disk count */\r
66	#define STOP_INVDSK 21 /* invalid disk unit */\r
67	#define STOP_INVDFN 22 /* invalid disk func */\r
68	#define STOP_INVDLN 23 /* invalid disk reclen */\r
69	#define STOP_WRADIS 24 /* write address dis */\r
70	#define STOP_WRCHKE 25 /* write check error */\r
71	#define STOP_INVDAD 26 /* invalid disk addr */\r
72	#define STOP_INVDCY 27 /* invalid direct seek */\r
73	\r
74	/* Memory and devices */\r
75	\r
76	#define MAXMEMSIZE 16000 /* max memory */\r
77	#define MEMSIZE (cpu_unit.capac) /* current memory */\r
78	#define CDR_BUF 1 /* card rdr buffer */\r
79	#define CDR_WIDTH 80 /* card rdr width */\r
80	#define CDP_BUF 101 /* card punch buffer */\r
81	#define CDP_WIDTH 80 /* card punch width */\r
82	#define CD_CBUF1 401 /* r/p col bin buf 12-3 */\r
83	#define CD_CBUF2 501 /* r/p col bin buf 4-9 */\r
84	#define LPT_BUF 201 /* line print buffer */\r
85	#define LPT_WIDTH 132 /* line print width */\r
86	#define CCT_LNT 132 /* car ctrl length */\r
87	#define INQ_WIDTH 80 /* inq term width */\r
88	#define ADDR_ERR(x) (((uint32) (x)) >= MEMSIZE)\r
89	\r
90	/* Binary address format\r
91	\r
92	<14:0> address, with index added in\r
93	<23:16> index register memory address\r
94	<25:24> address error bits\r
95	*/\r
96	\r
97	#define ADDRMASK 037777 /* addr mask */\r
98	#define INDEXMASK 077777 /* addr + index mask */\r
99	#define V_INDEX 16\r
100	#define M_INDEX 0177\r
101	#define V_ADDRERR 24\r
102	#define BA (1 << V_ADDRERR) /* bad addr digit */\r
103	#define X1 (87 << V_INDEX) /* index reg 1 */\r
104	#define X2 (92 << V_INDEX) /* index reg 2 */\r
105	#define X3 (97 << V_INDEX) /* index reg 3 */\r
106	\r
107	/* CPU instruction control flags. The flag definitions must be harmonized\r
108	with the UNIT flag definitions used by the simulator. */\r
109	\r
110	/* Lengths */\r
111	\r
112	#define L1 0001 /* 1: op */\r
113	#define L2 0002 /* 2: op d */\r
114	#define L4 0004 /* 4: op aaa */\r
115	#define L5 0010 /* 5: op aaa d */\r
116	#define L7 0020 /* 7: op aaa bbb */\r
117	#define L8 0040 /* 8: op aaa bbb d */\r
118	#define MAX_L 8 /* max length */\r
119	\r
120	/* CPU options, stored in cpu_unit.flags */\r
121	\r
122	#define MDV (1 << (UNIT_V_UF + 0)) /* multiply/divide */\r
123	#define MR (1 << (UNIT_V_UF + 1)) /* move record */\r
124	#define XSA (1 << (UNIT_V_UF + 2)) /* index, store addr */\r
125	#define EPE (1 << (UNIT_V_UF + 3)) /* expanded edit */\r
126	#define MA (1 << (UNIT_V_UF + 4)) /* modify address */\r
127	#define BBE (1 << (UNIT_V_UF + 5)) /* br bit equal */\r
128	#define HLE (1 << (UNIT_V_UF + 6)) /* high/low/equal */\r
129	#define UNIT_MSIZE (1 << (UNIT_V_UF + 7)) /* fake flag */\r
130	#define ALLOPT (MDV + MR + XSA + EPE + MA + BBE + HLE)\r
131	#define STDOPT (MDV + MR + XSA + EPE + MA + BBE + HLE)\r
132	\r
133	/* Fetch control */\r
134	\r
135	#define AREQ (1 << (UNIT_V_UF + 8)) /* validate A */\r
136	#define BREQ (1 << (UNIT_V_UF + 9)) /* validate B */\r
137	#define MLS (1 << (UNIT_V_UF + 10)) /* move load store */\r
138	#define NOWM (1 << (UNIT_V_UF + 11)) /* no WM at end */\r
139	#define HNOP (1 << (UNIT_V_UF + 12)) /* halt or nop */\r
140	#define IO (1 << (UNIT_V_UF + 13)) /* IO */\r
141	#define UNIT_BCD (1 << (UNIT_V_UF + 14)) /* BCD strings */\r
142	\r
143	#if (UNIT_V_UF < 6) \|\| ((UNIT_V_UF + 14) > 31)\r
144	Definition error: flags overlap\r
145	#endif\r
146	\r
147	/* BCD memory character format */\r
148	\r
149	#define WM 0100 /* word mark */\r
150	#define ZONE 0060 /* zone */\r
151	#define BBIT 0040 /* 1 in valid sign */\r
152	#define ABIT 0020 /* sign (1 = +) */\r
153	#define DIGIT 0017 /* digit */\r
154	#define CHAR 0077 /* character */\r
155	\r
156	#define V_WM 6\r
157	#define V_ZONE 4\r
158	#define V_DIGIT 0\r
159	\r
160	/* Interesting BCD characters */\r
161	\r
162	#define BCD_BLANK 000\r
163	#define BCD_ONE 001\r
164	#define BCD_TWO 002\r
165	#define BCD_THREE 003\r
166	#define BCD_FOUR 004\r
167	#define BCD_FIVE 005\r
168	#define BCD_SIX 006\r
169	#define BCD_SEVEN 007\r
170	#define BCD_EIGHT 010\r
171	#define BCD_NINE 011\r
172	#define BCD_ZERO 012\r
173	#define BCD_TAPMRK 017\r
174	#define BCD_ALT 020\r
175	#define BCD_S 022\r
176	#define BCD_U 024\r
177	#define BCD_W 026\r
178	#define BCD_RECMRK 032\r
179	#define BCD_COMMA 033\r
180	#define BCD_PERCNT 034\r
181	#define BCD_WM 035\r
182	#define BCD_BS 036\r
183	#define BCD_TS 037\r
184	#define BCD_MINUS 040\r
185	#define BCD_M 044\r
186	#define BCD_R 051\r
187	#define BCD_DOLLAR 053\r
188	#define BCD_ASTER 054\r
189	#define BCD_AMPER 060\r
190	#define BCD_A 061\r
191	#define BCD_B 062\r
192	#define BCD_C 063\r
193	#define BCD_E 065\r
194	#define BCD_DECIMAL 073\r
195	#define BCD_SQUARE 074\r
196	#define BCD_GRPMRK 077\r
197	\r
198	/* Opcodes */\r
199	\r
200	#define OP_R 001 /* read */\r
201	#define OP_W 002 /* write */\r
202	#define OP_WR 003 /* write and read */\r
203	#define OP_P 004 /* punch */\r
204	#define OP_RP 005 /* read and punch */\r
205	#define OP_WP 006 /* write and punch */\r
206	#define OP_WRP 007 /* write read punch */\r
207	#define OP_RF 010 /* reader feed */\r
208	#define OP_PF 011 /* punch feed */\r
209	#define OP_MA 013 /* modify address */\r
210	#define OP_MUL 014 /* multiply */\r
211	#define OP_CS 021 /* clear storage */\r
212	#define OP_S 022 /* subtract */\r
213	#define OP_MTF 024 /* magtape function */\r
214	#define OP_BWZ 025 /* branch wm or zone */\r
215	#define OP_BBE 026 /* branch bit equal */\r
216	#define OP_MZ 030 /* move zone */\r
217	#define OP_MCS 031 /* move suppr zeroes */\r
218	#define OP_SWM 033 /* set word mark */\r
219	#define OP_DIV 034 /* divide */\r
220	#define OP_SS 042 /* select stacker */\r
221	#define OP_LCA 043 /* load characters */\r
222	#define OP_MCW 044 /* move characters */\r
223	#define OP_NOP 045 /* no op */\r
224	#define OP_MCM 047 /* move to rec/grp mk */\r
225	#define OP_SAR 050 /* store A register */\r
226	#define OP_ZS 052 /* zero and subtract */\r
227	#define OP_A 061 /* add */\r
228	#define OP_B 062 /* branch */\r
229	#define OP_C 063 /* compare */\r
230	#define OP_MN 064 /* move numeric */\r
231	#define OP_MCE 065 /* move char and edit */\r
232	#define OP_CC 066 /* carriage control */\r
233	#define OP_SBR 070 /* store B register */\r
234	#define OP_ZA 072 /* zero and add */\r
235	#define OP_H 073 /* halt */\r
236	#define OP_CWM 074 /* clear word mark */\r
237	\r
238	/* I/O addresses */\r
239	\r
240	#define IO_INQ 023 /* inquiry terminal */\r
241	#define IO_MT 024 /* magtape */\r
242	#define IO_MTB 062 /* binary magtape */\r
243	#define IO_DP 066 /* 1311 diskpack */\r
244	\r
245	/* I/O modes */\r
246	\r
247	#define MD_NORM 0 /* normal (move) */\r
248	#define MD_WM 1 /* word mark (load) */\r
249	#define MD_BIN 2 /* binary */\r
250	\r
251	/* Indicator characters */\r
252	\r
253	#define IN_UNC 000 /* unconditional */\r
254	#define IN_CC9 011 /* carr ctrl chan 9 */\r
255	#define IN_CC12 014 /* carr ctrl chan 12 */\r
256	#define IN_UNQ 021 /* unequal */\r
257	#define IN_EQU 022 /* equal */\r
258	#define IN_LOW 023 /* low */\r
259	#define IN_HGH 024 /* high */\r
260	#define IN_DPW 025 /* parity/compare check */\r
261	#define IN_LNG 026 /* wrong lnt record */\r
262	#define IN_UNA 027 /* unequal addr cmp */\r
263	#define IN_DSK 030 /* disk error */\r
264	#define IN_OVF 031 /* overflow */\r
265	#define IN_LPT 032 /* printer error */\r
266	#define IN_PRO 034 /* process check */\r
267	#define IN_DBY 036 /* disk busy */\r
268	#define IN_END 042 /* end indicator */\r
269	#define IN_TAP 043 /* tape error */\r
270	#define IN_ACC 045 /* access error */\r
271	#define IN_BSY 047 /* printer busy */\r
272	#define IN_INR 050 /* inquiry request */\r
273	#define IN_PCB 051 /* printer carr busy */\r
274	#define IN_PNCH 052 /* punch error */\r
275	#define IN_INC 054 /* inquiry clear */\r
276	#define IN_LST 061 /* last card */\r
277	#define IN_SSB 062 /* sense switch B */\r
278	#define IN_SSC 063 /* sense switch C */\r
279	#define IN_SSD 064 /* sense switch D */\r
280	#define IN_SSE 065 /* sense switch E */\r
281	#define IN_SSF 066 /* sense switch F */\r
282	#define IN_SSG 067 /* sense switch G */\r
283	#define IN_READ 072 /* reader error */\r
284	\r
285	#define CRETIOE(f,c) return ((f)? (c): SCPE_OK)\r
286	\r
287	/* Function prototypes */\r
288	\r
289	int32 bcd2ascii (int32 c, t_bool use_h);\r
290	int32 ascii2bcd (int32 c);\r
291	\r
292	\r
293	#endif\r