First Commit of my working state

[simh.git] / NOVA / nova_pt.c

/* nova_pt.c: NOVA paper tape read/punch simulator\r
\r
   Copyright (c) 1993-2008, Robert M. Supnik\r
\r
   Permission is hereby granted, free of charge, to any person obtaining a\r
   copy of this software and associated documentation files (the "Software"),\r
   to deal in the Software without restriction, including without limitation\r
   the rights to use, copy, modify, merge, publish, distribute, sublicense,\r
   and/or sell copies of the Software, and to permit persons to whom the\r
   Software is furnished to do so, subject to the following conditions:\r
\r
   The above copyright notice and this permission notice shall be included in\r
   all copies or substantial portions of the Software.\r
\r
   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
   IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\r
   FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL\r
   ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
   IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
   CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
\r
   Except as contained in this notice, the name of Robert M Supnik shall not be\r
   used in advertising or otherwise to promote the sale, use or other dealings\r
   in this Software without prior written authorization from Robert M Supnik.\r
\r
   ptr          paper tape reader\r
   ptp          paper tape punch\r
\r
   04-Jul-07    BKR     added PTR and PTP device DISABLE capability,\r
                        added 7B/8B support PTR and PTP (default is 8B),\r
                        DEV_SET/CLR macros now used,\r
                        PTR and PTP can now be DISABLED\r
   25-Apr-03    RMS     Revised for extended file support\r
   03-Oct-02    RMS     Added DIBs\r
   30-May-02    RMS     Widened POS to 32b\r
   29-Nov-01    RMS     Added read only unit support\r
\r
\r
Notes:\r
    - data masked to 7- or 8- bits, based on 7B or 8B, default is 8-bits\r
    - register TIME is the delay between character read or write operations\r
    - register POS show the number of characters read from or sent to the PTR or PTP\r
    - register STOP_IOE determines return value issued if output to unattached PTR or PTP is attempted\r
*/\r
\r
#include "nova_defs.h"\r
\r
extern	int32	int_req, dev_busy, dev_done, dev_disable ;\r
extern	int32	SR ;\r
\r
extern	t_stat  cpu_boot(int32 unitno, DEVICE * dptr ) ;\r
\r
\r
int32 ptr_stopioe = 0, ptp_stopioe = 0;                 /* stop on error */\r
\r
int32 ptr (int32 pulse, int32 code, int32 AC);\r
int32 ptp (int32 pulse, int32 code, int32 AC);\r
t_stat ptr_svc (UNIT *uptr);\r
t_stat ptp_svc (UNIT *uptr);\r
t_stat ptr_reset (DEVICE *dptr);\r
t_stat ptp_reset (DEVICE *dptr);\r
t_stat ptr_boot (int32 unitno, DEVICE *dptr);\r
\r
\r
	/*  7 or 8 bit data mask support for either device  */\r
\r
#define UNIT_V_8B   (UNIT_V_UF + 0)                     /* 8b output */\r
#define UNIT_8B     (1 << UNIT_V_8B)\r
\r
\r
/* PTR data structures\r
\r
   ptr_dev      PTR device descriptor\r
   ptr_unit     PTR unit descriptor\r
   ptr_reg      PTR register list\r
*/\r
\r
DIB ptr_dib = { DEV_PTR, INT_PTR, PI_PTR, &ptr };\r
\r
UNIT ptr_unit = {   /* 2007-May-30, bkr */\r
    UDATA (&ptr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE+UNIT_8B, 0),\r
            SERIAL_IN_WAIT\r
    };\r
\r
REG ptr_reg[] = {\r
    { ORDATA (BUF, ptr_unit.buf, 8) },\r
    { FLDATA (BUSY, dev_busy, INT_V_PTR) },\r
    { FLDATA (DONE, dev_done, INT_V_PTR) },\r
    { FLDATA (DISABLE, dev_disable, INT_V_PTR) },\r
    { FLDATA (INT, int_req, INT_V_PTR) },\r
    { DRDATA (POS, ptr_unit.pos, T_ADDR_W), PV_LEFT },\r
    { DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT },\r
    { FLDATA (STOP_IOE, ptr_stopioe, 0) },\r
    { NULL }\r
    };\r
\r
MTAB ptr_mod[] =    /* 2007-May-30, bkr */\r
    {\r
    { UNIT_8B,       0, "7b", "7B", NULL },\r
    { UNIT_8B, UNIT_8B, "8b", "8B", NULL },\r
    {       0,       0, NULL, NULL, NULL }\r
    } ;\r
\r
DEVICE ptr_dev = {\r
    "PTR", &ptr_unit, ptr_reg, ptr_mod /* 2007-May-30, bkr */,\r
    1, 10, 31, 1, 8, 8,\r
    NULL, NULL, &ptr_reset,\r
    &ptr_boot, NULL, NULL,\r
    &ptr_dib, DEV_DISABLE   /* 2007-May-30, bkr */\r
    };\r
\r
/* PTP data structures\r
\r
   ptp_dev      PTP device descriptor\r
   ptp_unit     PTP unit descriptor\r
   ptp_reg      PTP register list\r
*/\r
\r
DIB ptp_dib = { DEV_PTP, INT_PTP, PI_PTP, &ptp };\r
\r
UNIT ptp_unit =\r
    {\r
    UDATA (&ptp_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_8B, 0), SERIAL_OUT_WAIT\r
    };\r
\r
REG ptp_reg[] = {\r
    { ORDATA (BUF, ptp_unit.buf, 8) },\r
    { FLDATA (BUSY, dev_busy, INT_V_PTP) },\r
    { FLDATA (DONE, dev_done, INT_V_PTP) },\r
    { FLDATA (DISABLE, dev_disable, INT_V_PTP) },\r
    { FLDATA (INT, int_req, INT_V_PTP) },\r
    { DRDATA (POS, ptp_unit.pos, T_ADDR_W), PV_LEFT },\r
    { DRDATA (TIME, ptp_unit.wait, 24), PV_LEFT },\r
    { FLDATA (STOP_IOE, ptp_stopioe, 0) },\r
    { NULL }\r
    };\r
\r
MTAB ptp_mod[] =\r
    {\r
    { UNIT_8B,       0, "7b", "7B", NULL },\r
    { UNIT_8B, UNIT_8B, "8b", "8B", NULL },\r
    {       0,       0, NULL, NULL, NULL }\r
    } ;\r
\r
DEVICE ptp_dev =\r
    {\r
    "PTP", &ptp_unit, ptp_reg, ptp_mod /* 2007-May-30, bkr */,\r
    1, 10, 31, 1, 8, 8,\r
    NULL, NULL, &ptp_reset,\r
    NULL, NULL, NULL,\r
    &ptp_dib, DEV_DISABLE   /* 2007-May-30, bkr */\r
    };\r
\r
\r
/* Paper tape reader: IOT routine */\r
\r
int32 ptr (int32 pulse, int32 code, int32 AC)\r
{\r
int32   iodata;\r
\r
iodata = (code == ioDIA)?\r
              ptr_unit.buf & 0377\r
            : 0;\r
switch (pulse)\r
    {                                                   /* decode IR<8:9> */\r
  case iopS:                                            /* start */\r
    DEV_SET_BUSY( INT_PTR ) ;\r
    DEV_CLR_DONE( INT_PTR ) ;\r
    DEV_UPDATE_INTR ;\r
    sim_activate (&ptr_unit, ptr_unit.wait);            /* activate unit */\r
    break;\r
\r
  case iopC:                                            /* clear */\r
    DEV_CLR_BUSY( INT_PTR ) ;\r
    DEV_CLR_DONE( INT_PTR ) ;\r
    DEV_UPDATE_INTR ;\r
    sim_cancel (&ptr_unit);                             /* deactivate unit */\r
    break;\r
    }                                                   /* end switch */\r
\r
return iodata;\r
}\r
\r
\r
/* Unit service */\r
\r
t_stat ptr_svc (UNIT *uptr)\r
{\r
int32   temp;\r
\r
if ((ptr_unit.flags & UNIT_ATT) == 0)                   /* attached? */\r
    return IORETURN (ptr_stopioe, SCPE_UNATT);\r
if ((temp = getc (ptr_unit.fileref)) == EOF) {          /* end of file? */\r
    if (feof (ptr_unit.fileref)) {\r
        if (ptr_stopioe) printf ("PTR end of file\n");\r
        else return SCPE_OK;\r
        }\r
    else perror ("PTR I/O error");\r
    clearerr (ptr_unit.fileref);\r
    return SCPE_IOERR;\r
    }\r
\r
DEV_CLR_BUSY( INT_PTR ) ;\r
DEV_SET_DONE( INT_PTR ) ;\r
DEV_UPDATE_INTR ;\r
ptr_unit.buf = temp & ((ptr_unit.flags & UNIT_8B)? 0377: 0177);\r
++(ptr_unit.pos);\r
return SCPE_OK;\r
}\r
\r
\r
/* Reset routine */\r
\r
t_stat ptr_reset (DEVICE *dptr)\r
{\r
ptr_unit.buf = 0;                                       /* <not DG compatible> */\r
DEV_CLR_BUSY( INT_PTR ) ;\r
DEV_CLR_DONE( INT_PTR ) ;\r
DEV_UPDATE_INTR ;\r
sim_cancel (&ptr_unit);                                 /* deactivate unit */\r
return SCPE_OK;\r
}\r
\r
\r
/* Boot routine */\r
\r
t_stat ptr_boot (int32 unitno, DEVICE *dptr)\r
{\r
ptr_reset( dptr ) ;\r
/*  set position to 0?  */\r
cpu_boot( unitno, dptr ) ;\r
SR = /* low-speed: no high-order bit set */ DEV_PTR ;\r
return ( SCPE_OK );\r
}    /*  end of 'ptr_boot'  */\r
\r
\r
\r
\r
\r
/* Paper tape punch: IOT routine */\r
\r
int32 ptp (int32 pulse, int32 code, int32 AC)\r
{\r
if (code == ioDOA)\r
    ptp_unit.buf = AC & 0377;\r
\r
switch (pulse)\r
    {                                                   /* decode IR<8:9> */\r
  case iopS:                                            /* start */\r
    DEV_SET_BUSY( INT_PTP ) ;\r
    DEV_CLR_DONE( INT_PTP ) ;\r
    DEV_UPDATE_INTR ;\r
    sim_activate (&ptp_unit, ptp_unit.wait);            /* activate unit */\r
    break;\r
\r
  case iopC:                                            /* clear */\r
    DEV_CLR_BUSY( INT_PTP ) ;\r
    DEV_CLR_DONE( INT_PTP ) ;\r
    DEV_UPDATE_INTR ;\r
    sim_cancel (&ptp_unit);                             /* deactivate unit */\r
    break;\r
    }                                                   /* end switch */\r
\r
return 0;\r
}\r
\r
\r
/* Unit service */\r
\r
t_stat ptp_svc (UNIT *uptr)\r
{\r
DEV_CLR_BUSY( INT_PTP ) ;\r
DEV_SET_DONE( INT_PTP ) ;\r
DEV_UPDATE_INTR ;\r
if ((ptp_unit.flags & UNIT_ATT) == 0)                   /* attached? */\r
    return IORETURN (ptp_stopioe, SCPE_UNATT);\r
if (putc ((ptp_unit.buf & ((ptp_unit.flags & UNIT_8B)? 0377: 0177)), ptp_unit.fileref) == EOF) {\r
    perror ("PTP I/O error");\r
    clearerr (ptp_unit.fileref);\r
    return SCPE_IOERR;\r
    }\r
++(ptp_unit.pos);\r
return SCPE_OK;\r
}\r
\r
\r
/* Reset routine */\r
\r
t_stat ptp_reset (DEVICE *dptr)\r
{\r
ptp_unit.buf = 0;                                       /* <not DG compatible> */\r
DEV_CLR_BUSY( INT_PTP ) ;\r
DEV_CLR_DONE( INT_PTP ) ;\r
DEV_UPDATE_INTR ;\r
sim_cancel (&ptp_unit);                                 /* deactivate unit */\r
return SCPE_OK;\r
}\r