First Commit of my working state
[simh.git] / S3 / s3_defs.h
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196ba1fc
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1/* s3_defs.h: IBM System/3 simulator definitions \r
2\r
3 Copyright (c) 2001-2005, Charles E. Owen\r
4\r
5 Permission is hereby granted, free of charge, to any person obtaining a\r
6 copy of this software and associated documentation files (the "Software"),\r
7 to deal in the Software without restriction, including without limitation\r
8 the rights to use, copy, modify, merge, publish, distribute, sublicense,\r
9 and/or sell copies of the Software, and to permit persons to whom the\r
10 Software is furnished to do so, subject to the following conditions:\r
11\r
12 The above copyright notice and this permission notice shall be included in\r
13 all copies or substantial portions of the Software.\r
14\r
15 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
16 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\r
17 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL\r
18 ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
19 IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
20 CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
21\r
22 Except as contained in this notice, the name of Charles E. Owen shall not be\r
23 used in advertising or otherwise to promote the sale, use or other dealings\r
24 in this Software without prior written authorization from Charles E. Owen.\r
25*/\r
26\r
27#include "sim_defs.h" /* simulator defns */\r
28\r
29/* Simulator stop codes */\r
30\r
31#define STOP_RSRV 1 /* must be 1 */\r
32#define STOP_HALT 2 /* HALT */\r
33#define STOP_IBKPT 3 /* breakpoint */\r
34#define STOP_INVOP 4 /* program check - invalid op */\r
35#define STOP_INVQ 5 /* Prog check - invalid Q */\r
36#define STOP_INVADDR 6 /* Prog check - invalid addr */\r
37#define STOP_INVDEV 7 /* Prog check - invalid dev cmd */\r
38#define STOP_NOCD 8 /* ATTN card reader */\r
39#define RESET_INTERRUPT 77 /* special return from SIO */\r
40\r
41/* Memory */\r
42\r
43#define MAXMEMSIZE 65536 /* max memory size */\r
44#define AMASK (MAXMEMSIZE - 1) /* logical addr mask */\r
45#define PAMASK (MAXMEMSIZE - 1) /* physical addr mask */\r
46#define MEMSIZE (cpu_unit.capac) /* actual memory size */\r
47\r
48#define MAX_DECIMAL_DIGITS 31 /* max size of a decimal number */\r
49#define CDR_WIDTH 80 /* Max card size */\r
50#define CDP_WIDTH 80 /* Punch width */\r
51#define LPT_WIDTH 132\r
52#define CCT_LNT 132\r
53\r
54#define DSK_SECTSIZE 256 /* Sector length */\r
55#define DSK_CYLSIZE 256*48 /* Cylinder length */\r
56\r
57/* I/O structure\r
58\r
59 The I/O structure is tied together by dev_table, indexed by\r
60 the device number. Each entry in dev_table consists of\r
61\r
62 level Interrupt level for device (0-7)\r
63 priority Priority for device (1-8)\r
64 routine IOT action routine\r
65*/\r
66\r
67struct ndev {\r
68 int32 level; /* interrupt level */\r
69 int32 pri; /* Device priority */\r
70 int32 (*routine)(); /* dispatch routine */\r
71};\r
72\r
73/* Structure to define operation codes */\r
74\r
75struct opdef {\r
76 char op[6]; /* Mnemonic for op */\r
77 int32 opmask; /* Bits set on in opcode */\r
78 int32 q; /* Qbyte */\r
79 int32 form; /* Forms are:\r
80 0 - 1-byte hex operand\r
81 1 - 1-byte register addr, A-Addr\r
82 2 - A-addr,B-addr,Qbyte\r
83 3 - A-addr,Qbyte\r
84 4 - da,m,n\r
85 5 - da,m,n,cc\r
86 6 - da,m,n,A-addr\r
87 7 - 1-address implict Q\r
88 8 - 2-address implict Q */\r
89 int32 group; /* Group Code:\r
90 0 - Command Format (0xFx)\r
91 1 - 1-address A (0x<C,D,E>x) \r
92 2 - 2-address (0x<0,1,2,4,5,6,8,9,A>x)\r
93 3 - 1-address B (0x<3,7,B>x) */\r
94};\r