projects / simh.git / blame
| Commit | Line | Data |
|---|---|---|
| 196ba1fc PH |
1 | $!\r |
| 2 | $! This procedure patches the base KA655.BIN Boot ROM image to work under\r | |
| 3 | $! the SIMH simulator\r | |
| 4 | $\r | |
| 5 | $! The second part of the patch adds support for Extended Memory in the \r | |
| 6 | $! simulator. A simulated system can have up to 512MB of RAM.\r | |
| 7 | $!\r | |
| 8 | $ PATCH /ABSOLUTE /NEW_VERSION /OUTPUT=cp$exe:KA655.BIN cp$src:ka655_orig.BIN\r | |
| 9 | ! CVAX Bootstrap Notes\r | |
| 10 | ! \r | |
| 11 | ! [2004c87e] - de$read_script\r | |
| 12 | ! [2004c916] - launch next test, r2 = test #, r4 = header, r5 = offset to main routine\r | |
| 13 | ! \r | |
| 14 | ! Script BA\r | |
| 15 | ! ---------\r | |
| 16 | ! \r | |
| 17 | ! Test 9D - Utility - ok\r | |
| 18 | ! Test 42 - Wait for interrupt - ok\r | |
| 19 | ! Test C6 - SSC register check - ok\r | |
| 20 | ! Test 60 [2004de37] - Serial line - requires diagnostic loopback mode and\r | |
| 21 | ! break detection - bypass\r | |
| 22 | ! 2004de99/ brw 2004e0a7\r | |
| 23 | Replace/Instruction 0DE99 = 'MOVB #03,B^76(R9)'\r | |
| 24 | 'BRW 0000E0A7'\r | |
| 25 | Exit\r | |
| 26 | ! Test 62 - QDSS disable - ok\r | |
| 27 | ! \r | |
| 28 | ! Script BC\r | |
| 29 | ! ---------\r | |
| 30 | ! \r | |
| 31 | ! 40. Test 91 - CQBIC init check - ok\r | |
| 32 | ! 39. Test 90 [2004d748] - CQBIC registers - ok\r | |
| 33 | ! 38. Test 33 [2004d54e] - CMCTL init check - ok\r | |
| 34 | ! 37. Test 32 [2004d5b0] - CMCTL registers - ok\r | |
| 35 | ! 36. Test 31 [200512d0] - CMCTL CSR setup to map memory - ok\r | |
| 36 | ! 35. Test 49 [20052a4b] - CMCTL FDM test - requires fast diagnostic mode\r | |
| 37 | ! and XMX counters - bypass\r | |
| 38 | ! 20052a55:20052a58/ nop\r | |
| 39 | Delete/Instruction 12A55 = 'BBC #26,(R9),00012A5C'\r | |
| 40 | ! 34. Test 30 [20051909] - init map - ok\r | |
| 41 | ! \r | |
| 42 | ! Script BD\r | |
| 43 | ! ---------\r | |
| 44 | ! \r | |
| 45 | ! 33. Test 52 [2004e656] - prog timer 0 - ok\r | |
| 46 | ! 32. Test 52 [2004e656] - prog timer 1 - ok\r | |
| 47 | ! 31. Test 53 [2004e918] - toy clock - ok\r | |
| 48 | ! 30. Test C1 [2004f8f1] - SSC RAM - ok\r | |
| 49 | ! 29. Test 34 [2004d4a0] - ROM - checksum off due to other patches - patch\r | |
| 50 | ! 2004d52c:2004d52d/ nop\r | |
| 51 | Delete/Instruction 0D52C = 'BNEQ 0000D531' ! 2004D52C\r | |
| 52 | ! 28. Test C5 [2004fc0e] - SSC registers - ok\r | |
| 53 | ! 27. Test 55 [2004ea8c] - interval timer - ok\r | |
| 54 | ! 26. Test 51 [2004e42d] - CFPA - ok\r | |
| 55 | ! 25. Test C7 [2004D3D3] - CBTCR<31:30> - ok\r | |
| 56 | ! 24. Test 46 [2004ef1a] - L1 cache diagnostic mode - bypass\r | |
| 57 | ! 2004ef80/ brw 2004f47a\r | |
| 58 | Replace/Instruction 0EF80 = 'MOVB #06,B^76(R9)'\r | |
| 59 | 'BRW 0000F47A' ! 2004FE80\r | |
| 60 | Exit\r | |
| 61 | ! 23. Test 35 [20050554] - L2 cache integrity test - bypass\r | |
| 62 | ! 20050554/ brw 20050a48\r | |
| 63 | Replace/Instruction 10554 = 'INSV #00,#10,#02,(R9)'\r | |
| 64 | 'BRW 00010A48' ! 20050554\r | |
| 65 | Exit\r | |
| 66 | ! 22. Test 43 [20050d65] - L1 with L2 test - bypass\r | |
| 67 | ! 20050d65/ brw 20050fca\r | |
| 68 | Replace/Instruction 10D65 = 'MOVAL B^00010D65,W^0080(R9)'\r | |
| 69 | 'BRW 00010FCA' ! 20050D65\r | |
| 70 | Exit\r | |
| 71 | ! 21. (Rerun of C2)\r | |
| 72 | ! 20. Test 4F [20051d4f] - memory data - bypass, run from ROM\r | |
| 73 | ! 20055205/ 0\r | |
| 74 | Replace/Byte 15205 = 3\r | |
| 75 | 0 ! 20055205\r | |
| 76 | Exit\r | |
| 77 | ! 20051d4f/ brw 2005163a\r | |
| 78 | Replace/Instruction 11D4F = 'MOVAL B^00011D4F,W^0080(R9)'\r | |
| 79 | 'BRW 0001163A' ! 20051D4F\r | |
| 80 | Exit\r | |
| 81 | ! 19. Test 4E [20051edb] - memory byte write - ok, run from ROM\r | |
| 82 | ! 2005521c/ 0\r | |
| 83 | Replace/Byte 1521C = 3\r | |
| 84 | 0 ! 2005521C\r | |
| 85 | Exit\r | |
| 86 | ! 18. Test 4D [20051ff3] - memory addressing - ok, run from ROM\r | |
| 87 | ! 20055233/ 0\r | |
| 88 | Replace/Byte 15233 = 3\r | |
| 89 | 0 ! 20055233\r | |
| 90 | Exit\r | |
| 91 | ! 17. Test 4C [20052190] - ECC test - bypass, run from ROM\r | |
| 92 | ! 2005524a/ 0\r | |
| 93 | Replace/Byte 1524A = 3\r | |
| 94 | 0 ! 2005524A\r | |
| 95 | Exit\r | |
| 96 | ! 20052190/ brw 2005163a\r | |
| 97 | Replace/Instruction 12190 = 'MOVAL B^00012190,W^0080(R9)'\r | |
| 98 | 'BRW 0001163A' ! 20052190\r | |
| 99 | Exit\r | |
| 100 | ! 16. Test 4B [2005264e] - masked writes with errors - bypass, run from ROM\r | |
| 101 | ! 20055261/ 0\r | |
| 102 | Replace/Byte 15261 = 3\r | |
| 103 | 0 ! 20055261\r | |
| 104 | Exit\r | |
| 105 | ! 2005264e/ brw 2005163a\r | |
| 106 | Replace/Instruction 1264E = 'MOVAL B^0001264E,W^0080(R9)'\r | |
| 107 | 'BRW 0001163A' ! 2005264E\r | |
| 108 | Exit\r | |
| 109 | ! 15. Test 4A [20052823] - single bit correction - bypass, run from ROM\r | |
| 110 | ! 20055278/ 0\r | |
| 111 | Replace/Byte 15278 = 3\r | |
| 112 | 0 ! 20055278\r | |
| 113 | Exit\r | |
| 114 | ! 20052823/ brw 2005163a\r | |
| 115 | Replace/Instruction 12823 = 'MOVAL B^00012823,W^0080(R9)'\r | |
| 116 | 'BRW 0001163A' ! 20052823\r | |
| 117 | Exit\r | |
| 118 | ! 14. Test 48 [20053062] - memory address shorts - bypass, run from ROM\r | |
| 119 | ! 2005528f/ 0\r | |
| 120 | Replace/Byte 1528F = 3\r | |
| 121 | 0 ! 2005528F\r | |
| 122 | Exit\r | |
| 123 | ! 20053062/ brw 2005163a\r | |
| 124 | Replace/Instruction 13062 = 'MOVAL B^00013062,W^0080(R9)'\r | |
| 125 | 'BRW 0001163A' ! 20053062\r | |
| 126 | Exit\r | |
| 127 | ! 13. Test 47 [200536c3] - verify refresh - run from ROM\r | |
| 128 | ! 200552aa/ 0\r | |
| 129 | Replace/Byte 152AA = 3\r | |
| 130 | 0 ! 200552AA\r | |
| 131 | Exit\r | |
| 132 | ! 12. Test 41 [] - count bad pages, relocate bit map\r | |
| 133 | ! 11. Test 44 [20050d34] - L1 with memory - bypass\r | |
| 134 | ! 20050d34/ brw 20050fca\r | |
| 135 | Replace/Instruction 10D34 = 'MOVAL B^00010D34,W^0080(R9)'\r | |
| 136 | 'BRW 00010FCA' ! 20050D34\r | |
| 137 | Exit\r | |
| 138 | ! 10. Test 36 [2004ffdf] - L2 with memory - bypass\r | |
| 139 | ! 2004ffdf/ brw 20050428\r | |
| 140 | Replace/Instruction 0FFDF = 'JSB L^0000CEFD'\r | |
| 141 | 'BRW 00010428' ! 2004FFDF\r | |
| 142 | Exit\r | |
| 143 | ! 9. Test 80 [2004d7de] - CQBIC memory - bypass last 2 subtests, run from ROM\r | |
| 144 | ! 2004dbc0/ brw 2004dd8a\r | |
| 145 | Replace/Instruction 0DBC0 = 'MOVB #1B,B^76(R9)'\r | |
| 146 | 'BRW 0000DD8A' ! 2004DBC0\r | |
| 147 | Exit\r | |
| 148 | ! 200552f6/ 0\r | |
| 149 | Replace/Byte 152F6 = 3\r | |
| 150 | 0 ! 200552F6\r | |
| 151 | Exit\r | |
| 152 | ! 8. Test 54 [] - virtual mode - ok\r | |
| 153 | ! 7. Test 34 [] - ROM in virtual mode - see previous notes\r | |
| 154 | ! 6. Test C5 [] - SSC registers in virtual mode - ok\r | |
| 155 | ! 5. Test 45 [2004ec5d] - cache, memory, CQBIC - bypass\r | |
| 156 | ! 2004ec5d/ brw 2004ee90\r | |
| 157 | Replace/Instruction 0EC5D = 'BICL2 #03,B^28(R9)'\r | |
| 158 | 'BRW 0000EE90' ! 2004EC5D\r | |
| 159 | Exit\r | |
| 160 | ! 4. Test 5A [2004eb5f] - CVAX CMCTL DAL drivers - ok\r | |
| 161 | ! 3. Test 41 [20051096] - reset board\r | |
| 162 | !\r | |
| 163 | ! ===========================================================================\r | |
| 164 | !\r | |
| 165 | !\r | |
| 166 | ! All of the above patches were done against the base ROM image extracted\r | |
| 167 | ! from a genuine MicroVAX 3900. These were all part of SIMH prior to \r | |
| 168 | ! extended memory support.\r | |
| 169 | !\r | |
| 170 | ! The Diagnostic State Variable DST$W_BITMAP_LENGTH, being 16 bits, can only\r | |
| 171 | ! describe a PFN Bitmap describing up to, but NOT including 256MB of RAM. To\r | |
| 172 | ! get to 256MB and beyond, we must correctly determine a correct bitmap size.\r | |
| 173 | ! all of the Diagnostic state space is in use, either since it is already \r | |
| 174 | ! defined, and the space beyond that is used for stack. So, we change the\r | |
| 175 | ! references to DST$W_BITMAP_LENGTH to call a subroutine to properly determine\r | |
| 176 | ! the PFN BITMAP size.\r | |
| 177 | !\r | |
| 178 | ! Most of the code which references DST$W_BITMAP_LENGTH are done from a \r | |
| 179 | ! diagnostic test routine which may be relocated to RAM before execution. \r | |
| 180 | ! The assumption of such relocating activity is that none of the relocated code \r | |
| 181 | ! references any other instructions or data in the ROM image via any PC \r | |
| 182 | ! relative addressing modes. Given this requirement, each of the above \r | |
| 183 | ! patches must be done with a JSB to an explicit ROM address. As a \r | |
| 184 | ! consequence, the patched instruction will generally be longer than the \r | |
| 185 | ! instruction which is being replaced. To cleanly affect this\r | |
| 186 | ! we must overwrite multiple instructions and incorporate the activities of\r | |
| 187 | ! each of the overwritten instructions into the target subroutine.\r | |
| 188 | ! Additionally, even without the relocation concerns, numerous places which \r | |
| 189 | ! reference these extra routines may be beyond a PC relative displacement\r | |
| 190 | ! due to the size of the ROM.\r | |
| 191 | !\r | |
| 192 | ! The KA655 ROM size is 128KB. As it turns out, the ROM image is only using\r | |
| 193 | ! approximately 105,136 bytes of the total 131072 bytes. We use this unused\r | |
| 194 | ! ROM space to store code which implements the required extra functionality\r | |
| 195 | !\r | |
| 196 | Define PATCH_BASE = 00019C00\r | |
| 197 | Define P$END = PATCH_BASE\r | |
| 198 | Define CP$K_MEMSIZE = 20080148\r | |
| 199 | Define CP$K_QBMBR = 20080010\r | |
| 200 | Define DST_BASE = 20140758\r | |
| 201 | Define CTX_BASE = 201404B2\r | |
| 202 | Define CTX$L_R2 = 8\r | |
| 203 | Define CTX$A_GPTR = 66\r | |
| 204 | Define CTX$L_ERROR_COUNT = 54\r | |
| 205 | Define CTX$L_ERROR_STATUS = 58\r | |
| 206 | Define DST$W_BITMAP_LENGTH = 20\r | |
| 207 | Define DST$A_BITMAP = 1C\r | |
| 208 | Define DST$A_BUSMAP = 24\r | |
| 209 | Define DST$W_BITMAP_CHECKSUM = 22\r | |
| 210 | Define CP$CHECKSUM_RTN = 20041C6A\r | |
| 211 | Define GUARD$S_GUARD_BLOCK = 12\r | |
| 212 | Define GUARD$l_pc = 0\r | |
| 213 | Define GUARD$a_gptr = 4\r | |
| 214 | Define GUARD$w_rmask = 8\r | |
| 215 | Define GUARD$l_save_error_count = 0A\r | |
| 216 | Define GUARD$l_save_error_status = 0E\r | |
| 217 | !\r | |
| 218 | ! This routine determines the memory size of the current system. This is\r | |
| 219 | ! done by referencing the CMCTL18 memory size register. On an older simulator\r | |
| 220 | ! or one with less than 64MB of RAM configured, this register may not exist. \r | |
| 221 | ! If it doesn't exist the machine check generated by the reference to the \r | |
| 222 | ! non-existant register is caught, and the appropriate memory size is \r | |
| 223 | ! determined from the existing PFN Bitmap size.\r | |
| 224 | !\r | |
| 225 | DEFINE GETMEMSIZE_R0 = P$End+1\r | |
| 226 | Deposit/Instruction GETMEMSIZE_R0\r | |
| 227 | ' pushr #0 '\r | |
| 228 | ' subl2 #guard$s_guard_block, sp'\r | |
| 229 | ' movw #0, B^guard$w_rmask (sp)'\r | |
| 230 | ' movab B^G$ERR, B^guard$l_pc (sp)'\r | |
| 231 | ' movl @#<ctx_base + ctx$a_gptr>, B^guard$a_gptr (sp)'\r | |
| 232 | ' movl @#<ctx_base + ctx$l_error_count>, B^guard$l_save_error_count (sp)'\r | |
| 233 | ' movl @#<ctx_base + ctx$l_error_status>, B^guard$l_save_error_status (sp)'\r | |
| 234 | ' movl sp, @#<ctx_base + ctx$a_gptr>'\r | |
| 235 | ' brb G$RD '\r | |
| 236 | 'G$ERR: movzwl @#<DST_BASE+DST$W_BITMAP_LENGTH>,R0'\r | |
| 237 | ' clrl @#<ctx_base + ctx$l_error_count>'\r | |
| 238 | ' clrl @#<ctx_base + ctx$l_error_status>'\r | |
| 239 | ' ashl #^d12,r0,r0 '\r | |
| 240 | ' brb G$DON ' \r | |
| 241 | 'G$RD: movl @#CP$K_MEMSIZE,R0 '\r | |
| 242 | 'G$DON: movl @#<ctx_base + ctx$a_gptr>, sp'\r | |
| 243 | ' movl B^guard$a_gptr (sp), @#<ctx_base + ctx$a_gptr>'\r | |
| 244 | ' movl B^guard$l_save_error_count (sp), @#<ctx_base + ctx$l_error_count>'\r | |
| 245 | ' movl B^guard$l_save_error_status (sp), @#<ctx_base + ctx$l_error_status>'\r | |
| 246 | ' addl2 #guard$s_guard_block - 2, sp'\r | |
| 247 | ' popr (sp)+ '\r | |
| 248 | 'P$End: rsb ' \r | |
| 249 | Exit\r | |
| 250 | !\r | |
| 251 | Define GETMAPENDADDR_R6 = P$End+1\r | |
| 252 | Deposit/Instruction GETMAPENDADDR_R6\r | |
| 253 | ' MOVZWL @#<DST_BASE+DST$W_BITMAP_LENGTH>,R6'\r | |
| 254 | ' BNEQ X$1 '\r | |
| 255 | ' MOVL R0, -(SP) '\r | |
| 256 | ' JSB GETMEMSIZE_R0 '\r | |
| 257 | ' ashl #-^D12,R0,R6 '\r | |
| 258 | ' MOVL (SP)+, R0 '\r | |
| 259 | 'X$1: addl @#<DST_BASE+DST$A_BITMAP>,R6'\r | |
| 260 | 'P$End: rsb '\r | |
| 261 | Exit\r | |
| 262 | \r | |
| 263 | ! DE_QDSS_ANY [2004E2A8] Uses R6 for BitMap Size\r | |
| 264 | ! 2004E390/ BSBW GETMAPSIZE_R6\r | |
| 265 | Replace/Instruction 0E390\r | |
| 266 | ' MOVZWL B^20(R9),R6 '\r | |
| 267 | ' ADDL3 R6,B^1C(R9),R6 '\r | |
| 268 | Exit\r | |
| 269 | ' JSB GETMAPENDADDR_R6 '\r | |
| 270 | Exit\r | |
| 271 | !\r | |
| 272 | !\r | |
| 273 | DEFINE GETMAPSIZEMAPADDR_STACK = P$End+1\r | |
| 274 | Deposit/Instruction GETMAPSIZEMAPADDR_STACK \r | |
| 275 | ' PUSHL @#<DST_BASE+DST$A_BITMAP>,'\r | |
| 276 | ' MOVL B^4(SP),-(SP) '\r | |
| 277 | ' MOVZWL @#<DST_BASE+DST$W_BITMAP_LENGTH>,B^8(SP)'\r | |
| 278 | ' BNEQ X$2'\r | |
| 279 | ' MOVL R0, -(SP) '\r | |
| 280 | ' JSB GETMEMSIZE_R0 '\r | |
| 281 | ' ASHL #-^D12,R0,B^0C(SP) '\r | |
| 282 | ' MOVL (SP)+, R0 '\r | |
| 283 | 'X$2: NOP '\r | |
| 284 | 'P$END: RSB'\r | |
| 285 | Exit\r | |
| 286 | \r | |
| 287 | ! CP_FIND [200419E8] Uses (SP) for BitMap Size R1 Scratch\r | |
| 288 | ! 20041A16/ BSBW GETMAPSIZE_STACK\r | |
| 289 | Replace/Instruction 01A16\r | |
| 290 | ' MOVZWL B^20(R0),-(SP) '\r | |
| 291 | ' PUSHL B^1C(R0) '\r | |
| 292 | Exit\r | |
| 293 | ' JSB GETMAPSIZEMAPADDR_STACK '\r | |
| 294 | Exit\r | |
| 295 | !\r | |
| 296 | ! CP_SCAN [200459D0] Uses R3 for BitMap Size\r | |
| 297 | DEFINE GETMBMEMSIZE_STACK = P$End+1\r | |
| 298 | Deposit/Instruction GETMBMEMSIZE_STACK\r | |
| 299 | ' MOVAB L^0000AACF,-(SP) '\r | |
| 300 | ' MOVL B^4(SP),-(SP) '\r | |
| 301 | ' MOVL R0, -(SP) '\r | |
| 302 | ' JSB GETMEMSIZE_R0 '\r | |
| 303 | ' ASHL #-^D20,R0,B^0C(SP) '\r | |
| 304 | ' MOVL (SP)+, R0 '\r | |
| 305 | ' RSB '\r | |
| 306 | 'GETMAPSIZE_R3: MOVZWL @#<DST_BASE+DST$W_BITMAP_LENGTH>,R3'\r | |
| 307 | ' BNEQ X$3'\r | |
| 308 | ' MOVL R0, -(SP) '\r | |
| 309 | ' JSB GETMEMSIZE_R0 '\r | |
| 310 | ' ASHL #-^D12,R0,R3 '\r | |
| 311 | ' MOVL (SP)+, R0 '\r | |
| 312 | 'X$3: RSB'\r | |
| 313 | 'P$END: NOP'\r | |
| 314 | Exit\r | |
| 315 | ! 20045B05/ BSBW GETMBMEMSIZE_STACK\r | |
| 316 | Replace/Instruction 05B05\r | |
| 317 | ' MOVL R8,-(SP) '\r | |
| 318 | ' MOVAB L^0000AACF,-(SP) '\r | |
| 319 | Exit\r | |
| 320 | ' JSB GETMBMEMSIZE_STACK '\r | |
| 321 | Exit\r | |
| 322 | ! 20045B80/ BSBW GETMAPSIZE_R3\r | |
| 323 | Replace/Instruction 05B80\r | |
| 324 | ' MOVZWL @#20140778,R3 '\r | |
| 325 | Exit\r | |
| 326 | ' JSB GETMAPSIZE_R3 '\r | |
| 327 | Exit\r | |
| 328 | ! DE_CQBIC_MEMORY [2004D7B2]\r | |
| 329 | DEFINE GETBITMAPPAGES_R5 = P$End+1\r | |
| 330 | Deposit/Instruction GETBITMAPPAGES_R5 \r | |
| 331 | ' MOVZWL @#<DST_BASE+DST$W_BITMAP_LENGTH>,R5'\r | |
| 332 | ' BNEQ X$4 '\r | |
| 333 | ' MOVL R0,-(SP) '\r | |
| 334 | ' JSB GETMEMSIZE_R0 '\r | |
| 335 | ' ASHL #-^D12,R0,R5 '\r | |
| 336 | ' MOVL (SP)+,R0 '\r | |
| 337 | 'X$4: ASHL #3,R5,R5 '\r | |
| 338 | ' RSB '\r | |
| 339 | 'GETBITMAPMEMSIZE_R3: MOVZWL @#<DST_BASE+DST$W_BITMAP_LENGTH>,R3'\r | |
| 340 | ' BNEQ X$5 '\r | |
| 341 | ' MOVL R0,-(SP) '\r | |
| 342 | ' JSB GETMEMSIZE_R0 '\r | |
| 343 | ' ASHL #-^D12,R0,R3 '\r | |
| 344 | ' MOVL (SP)+,R0 '\r | |
| 345 | 'X$5: ASHL #^D12,R3,R3 '\r | |
| 346 | 'P$END: RSB'\r | |
| 347 | Exit\r | |
| 348 | ! 2004D8A5/ BSBW GETMAPSIZE_R5\r | |
| 349 | Replace/Instruction 0D8A5\r | |
| 350 | ' MOVZWL B^20(R9),R5 '\r | |
| 351 | ' ASHL #03,R5,R5 '\r | |
| 352 | Exit\r | |
| 353 | ' JSB GETBITMAPPAGES_R5 '\r | |
| 354 | Exit\r | |
| 355 | ! 2004DA41/ BSBW GETMAPSIZE_R5\r | |
| 356 | Replace/Instruction 0DA41\r | |
| 357 | ' MOVZWL B^20(R9),R5 '\r | |
| 358 | ' ASHL #03,R5,R5 '\r | |
| 359 | Exit\r | |
| 360 | ' JSB GETBITMAPPAGES_R5 '\r | |
| 361 | Exit\r | |
| 362 | ! 2004DA8C/ BSBW GETMAPSIZE_R5\r | |
| 363 | Replace/Instruction 0DA8C\r | |
| 364 | ' MOVZWL B^20(R9),R5 '\r | |
| 365 | ' ASHL #03,R5,R5 '\r | |
| 366 | Exit\r | |
| 367 | ' JSB GETBITMAPPAGES_R5 '\r | |
| 368 | Exit\r | |
| 369 | ! DE_CACHE_MEM_CQBIC [2004EBF0]\r | |
| 370 | ! 2004ECD0/ BSBW GETMAPSIZE_R3\r | |
| 371 | Replace/Instruction 0ECD0\r | |
| 372 | ' MOVZWL B^20(R9),R3 '\r | |
| 373 | ' ASHL #0C,R3,R3 '\r | |
| 374 | Exit\r | |
| 375 | ' JSB GETBITMAPMEMSIZE_R3 '\r | |
| 376 | Exit\r | |
| 377 | ! CP_BOOTSTRAP\r | |
| 378 | DEFINE GET_X_PFNMAP_SIZEADDR_STACK = P$End+1\r | |
| 379 | Deposit/Instruction GET_X_PFNMAP_SIZEADDR_STACK\r | |
| 380 | ' movl B^dst$a_bitmap (r11), r2'\r | |
| 381 | ' movzwl B^dst$w_bitmap_length (r11), r1'\r | |
| 382 | ' bneq X$20 ' ! Zero Bitmap size means extended mem\r | |
| 383 | ' ashl #-^D12, @#CP$K_MEMSIZE, r1' ! Map Size = MEMSIZE/512/8\r | |
| 384 | 'X$10: brw X$70 ' ! already fixed\r | |
| 385 | 'X$20: cmpl r1, #^D16384 ' ! Original Map of 64MB?\r | |
| 386 | ' blss X$10 ' ! Too Small For Extended\r | |
| 387 | ' JSB GETMEMSIZE_R0 '\r | |
| 388 | ' ashl #-^D12, R0, r1 ' ! Map Size = MEMSIZE/512/8\r | |
| 389 | ' cmpl r1, #^D16384 '\r | |
| 390 | ' beql X$10 ' ! Normal 64MB map\r | |
| 391 | !;\r | |
| 392 | !; First move the Console Scratch Area (16KB), and the Qbus Map (32KB)\r | |
| 393 | !; to the end of physical memory.\r | |
| 394 | !;\r | |
| 395 | ' movl @#CP$K_MEMSIZE, r1 ' ! MEMSIZE\r | |
| 396 | ' subl3 #^D48*^D1024, r1, r3 ' ! New Destination Address\r | |
| 397 | ' addl #^D16384, r2 ' ! Point at end of prior Map\r | |
| 398 | ' clrl r0 ' ! Index\r | |
| 399 | 'X$63: movb (r2)[r0], (r3)[r0] ' ! Move the Console Scratch Pad and QBMRs\r | |
| 400 | ' aoblss #^D48*^D1024, r0, X$63 '\r | |
| 401 | ' movab W^4000(r3), B^DST$A_BUSMAP(r11)' ! Save Qbus Map Register Space\r | |
| 402 | ' movab W^4000(r3), @#CP$K_QBMBR' ! Save Qbus Map Register Space\r | |
| 403 | !;\r | |
| 404 | !; Fixup the boot device descriptor previously saved in the scratchpad RAM \r | |
| 405 | !;\r | |
| 406 | ' subl3 #^D512, B^DST$A_BUSMAP (r11), r1'\r | |
| 407 | ' movab B^8(r1), B^4(r1)'\r | |
| 408 | !;\r | |
| 409 | !; Now we build a new bitmap, with all bits set except for the reserved\r | |
| 410 | !; area containing the bitmap itself, and the console scratch area and\r | |
| 411 | !; the Qbus Map.\r | |
| 412 | !;\r | |
| 413 | ' ashl #-^D12, @#CP$K_MEMSIZE, r1' ! Map Size = MEMSIZE/512/8\r | |
| 414 | ' subl3 r1, r3, r2 ' ! Point at new Destination Address\r | |
| 415 | ' movl r2, B^dst$a_bitmap (r11)' ! Save Bitmap address\r | |
| 416 | ' ashl #-9, @#CP$K_MEMSIZE, r1 ' ! PFN count = MEMSIZE/512\r | |
| 417 | ' ashl #-^D12, @#CP$K_MEMSIZE, r0' ! Map Size = MEMSIZE/512/8\r | |
| 418 | ' addl #^D48*^D1024+^D511, r0 ' ! Plus other reserved page size\r | |
| 419 | ' ashl #-9, r0, r0 '\r | |
| 420 | ' subl r0, r1 ' ! Adjust for bitmap of reserved pages\r | |
| 421 | ' clrl r0 '\r | |
| 422 | ' pushl r1 ' ! Save total Bit Count\r | |
| 423 | ' ashl #-5, r1, r1 ' ! Convert limit to Longword Count\r | |
| 424 | 'X$632: movl #-1,(r2)[r0] ' ! Set bitmap entry for 32 pages\r | |
| 425 | ' aoblss r1, r0, X$632 '\r | |
| 426 | ' ashl #5, r0, r0 ' ! Convert back to Bit Count\r | |
| 427 | ' movl (SP)+, r1 ' ! Restore total Bit Count\r | |
| 428 | ' cmpl r0, r1'\r | |
| 429 | ' bgeq X$651'\r | |
| 430 | 'X$64: bbss r0, (r2), X$65 ' ! Set page bitmap entry\r | |
| 431 | 'X$65: aoblss r1, r0, X$64 ' ! Done ?\r | |
| 432 | 'X$651: ashl #-9, @#CP$K_MEMSIZE, r1 ' ! PFN count = MEMSIZE/512\r | |
| 433 | 'X$66: bbcc r0, (r2), X$67 ' ! Clear reserved page bitmap entry\r | |
| 434 | 'X$67: aoblss r1, r0, X$66 ' ! Done?\r | |
| 435 | ' clrl r0 ' ! Zero Initial checksum value\r | |
| 436 | ' ashl #-^D12, @#CP$K_MEMSIZE, r1' ! Map Size = MEMSIZE/512/8\r | |
| 437 | ' jsb @#cp$checksum_rtn ' ! Compute checksum for revised bitmap\r | |
| 438 | ' movw r0, B^dst$w_bitmap_checksum (r11)' ! save it\r | |
| 439 | ' clrw B^dst$w_bitmap_length (r11)' ! Mark as extended bitmap\r | |
| 440 | ' ashl #-^D12, @#CP$K_MEMSIZE, r1' ! Map Size = MEMSIZE/512/8\r | |
| 441 | ' movl B^dst$a_bitmap (r11), r2'\r | |
| 442 | 'X$70: jmp GETMAPSIZEMAPADDR_STACK'\r | |
| 443 | !\r | |
| 444 | 'GETMAPSIZE_CTX_R2: movzwl @#<dst_base+dst$w_bitmap_length>,@#<ctx_base+ctx$l_r2>'\r | |
| 445 | ' bneq X$71'\r | |
| 446 | ' MOVL R0, -(SP) '\r | |
| 447 | ' JSB GETMEMSIZE_R0 '\r | |
| 448 | ' ASHL #-^D12,R0,@#<ctx_base+ctx$l_r2>'\r | |
| 449 | ' MOVL (SP)+, R0 '\r | |
| 450 | 'X$71: rsb'\r | |
| 451 | Exit\r | |
| 452 | Replace/Instruction 517F = 'movzwl B^20(r11), @#201404BA'\r | |
| 453 | ' jsb GETMAPSIZE_CTX_R2 '\r | |
| 454 | Exit\r | |
| 455 | Replace/Instruction 514B\r | |
| 456 | ' MOVZWL B^20(R11),-(SP) '\r | |
| 457 | ' PUSHL B^1C(R11) '\r | |
| 458 | Exit\r | |
| 459 | ' JSB GET_X_PFNMAP_SIZEADDR_STACK'\r | |
| 460 | Exit\r | |
| 461 | !\r | |
| 462 | ! DE_MEMORY [200512AC]\r | |
| 463 | ! CP_UTIL []\r | |
| 464 | !\r | |
| 465 | ! Identify the Extended Memory Mode in the Console Banner\r | |
| 466 | ! (i.e. KA655X-B vs KA655-B)\r | |
| 467 | !\r | |
| 468 | Replace 83D8 = 00303436\r | |
| 469 | 58353536\r | |
| 470 | Exit\r | |
| 471 | Replace/Byte 83DC = 4B\r | |
| 472 | 0\r | |
| 473 | Exit\r | |
| 474 | Deposit/Instruction 1C04\r | |
| 475 | ' PUSHAB L^000083E2 '\r | |
| 476 | ' JSB GETMEMSIZE_R0 '\r | |
| 477 | ' CMPL R0, #<^D64*^D1024*^D1024>'\r | |
| 478 | ' BLEQ B$1 '\r | |
| 479 | ' MOVAB L^000083D6,(SP) '\r | |
| 480 | 'B$1: NOP '\r | |
| 481 | ' NOP '\r | |
| 482 | ' NOP '\r | |
| 483 | ' NOP '\r | |
| 484 | ' NOP '\r | |
| 485 | ' NOP '\r | |
| 486 | ' NOP '\r | |
| 487 | ' NOP '\r | |
| 488 | ' NOP '\r | |
| 489 | Exit\r | |
| 490 | !\r | |
| 491 | ! Extended Memory Patches:\r | |
| 492 | ! 9. Test 80 [2004d7de] - CQBIC memory - bypass last 2 subtests, run from ROM\r | |
| 493 | ! MP Revised to bypass tests starting at test of NXM reference through MAP\r | |
| 494 | ! 2004db2e/ brw 2004dd8a\r | |
| 495 | Replace/Instruction 0db2e = 'MOVB #17,B^76(R9)'\r | |
| 496 | 'BRW 0DD8A'\r | |
| 497 | EXIT\r | |
| 498 | !\r | |
| 499 | ! Interval Timer Patch\r | |
| 500 | ! In operational environments, Test 82 subtests 17 and 20 have been observed\r | |
| 501 | ! to ocaisionally fail. Disable the timer portion of the interval timer tests.\r | |
| 502 | ! 2004e7c1/ brw 2004e870\r | |
| 503 | Replace/Instruction 0e7c1 = 'MOVB #10,B^76(R9)'\r | |
| 504 | 'BRW 0e870'\r | |
| 505 | EXIT\r | |
| 506 | !\r | |
| 507 | UPDATE\r | |
| 508 | EXIT\r | |
| 509 | $\r |