First Commit of my working state

[simh.git] / VAX / vax780_bug_history.txt

Bugs Found And Fixed During Simulator Debug\r
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1. RP: drive clear does not clear RPDA.\r
2. TU: default formatter must be TM03.\r
3. SBI: drive 'letter' is actually a 1-based number.\r
4. MBA: drive register reads return SR<31:16> as high word.\r
5. UBA: DMA addresses must be masked to Unibus width (18b).\r
6. HK: thread used multiple times if SEEK is followed by NOP or DCLR.\r
7. HK: only DCLR clears ATA.\r
8. MEM: MS780E size declaration off-by-1.\r
9. MEM: MS780E array start off by >> 4.\r
10. MEM: CSR-C register write logic incorrect.\r
11. CIS: CMPP3/CMPP4 using wrong arguments to ReadDstr.\r
12. CPU, OCTA: CVTfi with integer overflow not setting trap if PSW<iv> = 1.\r
13. STDDEV: read of ICR was missing the call parameter.\r
14. ACBD/G: testing wrong operand register to get limit sign.\r
15. CPU: faults not clearing PSL<tp>.\r
16. ADAWI: register mode implemented incorrectly.\r
17. MOVTC: condition codes not preserved through page fault.\r
18. MOVTUC: condition codes not preserved through page fault.\r
19. MOVTUC: escape tested against untranslated rather than translated character.\r
20. CVTPT: condition code and decimal overflow calculation incorrect.\r
21. CVTPS: condition code and decimal overflow calculation incorrect.\r
22. CVTPL: if destination is register, result is stored after register updates.\r
23. CVTPL: integer overflow set <C> rather than <V>.\r
24. all decimal string: 11/780 does not validate characters in decimal strings.\r
25. EDITPC: condition codes not preserved through page fault.\r
26. EDITPC EO$INSERT: inserts sign instead of fill.\r
27. EDITPC EO$BLANK_ZERO: address off by one.\r
28. EDITPC EO$BLANK_ZERO: not testing for <C> set.\r
29. EDITPC EO$LOAD_PLUS: not skipping character if test fails.\r
30. EDITPC EO$LOAD_MINUS: not skipping character if test fails.\r
31. Compatibility mode: SXT not implemented.\r
32. Compatibility mode: XOR operands fetched in wrong order.\r
33. MNEGH: condition codes set from original sign.\r
34. MNEGH: <C> not cleared.\r
35. H_floating quad precision integer routines (add, inc, neg): carry propagation incorrect.\r
36. H_floating packup routines: test for zero used exponent not fraction.\r
37. MULH: carries out of floating accumulator lost.\r
38. DIVH: stores wrong operand as result.\r
39. POLYF/D/G: truncation after add not needed.\r
40. POLYF/D/G: early SRM requires truncation to 31b/63b, not 32b/64b.\r
41. POLYF/D/G/H: exits too early if argument is zero.\r
42. POLYD/G/H: calculates address of residual pointer result incorrectly.\r
43. POLYD/G: performs single precision rather than double precision multiply.\r
44. POLYH: fails to truncate intermediate result from 128b to 127b.\r
45. POLYF/D/G/H: internal add routine must test fraction rather than exponent to\r
    detect zero, POLYx can create "denormalized" intermediate result.\r
46. EMODH: concatenate 16b of extension operand instead of 15b.\r
47. Specifier flows: modify flows testing for read access rather than write access.\r
48. Quad/octa writes: wrong address reported on faulting cross-page writes.\r
49. Memory management: 11/780 implements access control test on first level PTE's.\r
50. LDPCTX: 11/780 implements mbz tests on PCB fields.\r
51. LDPCTX/MTPR: 11/780 validity checks PCBB, SCBB, SBR, SLR, P0BR, P0LR, P1BR, P1LR.\r
52. TMR: tmr_inc not updated in standard (100Hz) mode.\r
53. MTPR SBR/PCBB/SCBB: 11/780 only checks that bits<1:0> == 0.\r
54. MTPR xLR: 11/780 excludes bits<31:24> from mbz test.\r
55. MTPR PxBR: 11/780 only checks bits<31,1:0> == 1,00.\r
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