First Commit of my working state

[simh.git] / VAX / vax780_syslist.c

/* vax_syslist.c: VAX device list\r
\r
   Copyright (c) 1998-2006, Robert M Supnik\r
\r
   Permission is hereby granted, free of charge, to any person obtaining a\r
   copy of this software and associated documentation files (the "Software"),\r
   to deal in the Software without restriction, including without limitation\r
   the rights to use, copy, modify, merge, publish, distribute, sublicense,\r
   and/or sell copies of the Software, and to permit persons to whom the\r
   Software is furnished to do so, subject to the following conditions:\r
\r
   The above copyright notice and this permission notice shall be included in\r
   all copies or substantial portions of the Software.\r
\r
   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
   IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\r
   FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL\r
   ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
   IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
   CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
\r
   Except as contained in this notice, the name of Robert M Supnik shall not be\r
   used in advertising or otherwise to promote the sale, use or other dealings\r
   in this Software without prior written authorization from Robert M Supnik.\r
\r
   17-May-06    RMS     Added CR11/CD11 support (from John Dundas)\r
   01-Oct-04    RMS     Cloned from vax_sys.c\r
*/\r
\r
#include "vax_defs.h"\r
\r
char sim_name[] = "VAX780";\r
\r
extern DEVICE cpu_dev;\r
extern DEVICE tlb_dev;\r
extern DEVICE sbi_dev;\r
extern DEVICE mctl_dev[MCTL_NUM];\r
extern DEVICE uba_dev;\r
extern DEVICE mba_dev[MBA_NUM];\r
extern DEVICE clk_dev;\r
extern DEVICE tmr_dev;\r
extern DEVICE tti_dev, tto_dev;\r
extern DEVICE fl_dev;\r
extern DEVICE cr_dev;\r
extern DEVICE lpt_dev;\r
extern DEVICE rq_dev, rqb_dev, rqc_dev, rqd_dev;\r
extern DEVICE rl_dev;\r
extern DEVICE hk_dev;\r
extern DEVICE rp_dev;\r
extern DEVICE ry_dev;\r
extern DEVICE ts_dev;\r
extern DEVICE tq_dev;\r
extern DEVICE tu_dev;\r
extern DEVICE dz_dev;\r
extern DEVICE xu_dev, xub_dev;\r
\r
extern int32 sim_switches;\r
extern UNIT cpu_unit;\r
extern void WriteB (uint32 pa, int32 val);\r
extern void rom_wr_B (int32 pa, int32 val);\r
\r
DEVICE *sim_devices[] = { \r
    &cpu_dev,\r
    &tlb_dev,\r
    &sbi_dev,\r
    &mctl_dev[0],\r
    &mctl_dev[1],\r
    &uba_dev,\r
    &mba_dev[0],\r
    &mba_dev[1],\r
    &clk_dev,\r
    &tmr_dev,\r
    &tti_dev,\r
    &tto_dev,\r
    &fl_dev,\r
    &dz_dev,\r
    &cr_dev,\r
    &lpt_dev,\r
    &rp_dev,\r
    &rl_dev,\r
    &hk_dev,\r
    &rq_dev,\r
    &rqb_dev,\r
    &rqc_dev,\r
    &rqd_dev,\r
    &ry_dev,\r
    &tu_dev,\r
    &ts_dev,\r
    &tq_dev,\r
    &xu_dev,\r
    &xub_dev,\r
    NULL\r
    };\r
\r
/* Binary loader\r
\r
   The binary loader handles absolute system images, that is, system\r
   images linked /SYSTEM.  These are simply a byte stream, with no\r
   origin or relocation information.\r
\r
   -r           load ROM0\r
   -s           load ROM1\r
   -o           for memory, specify origin\r
*/\r
\r
t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)\r
{\r
t_stat r;\r
int32 val;\r
uint32 origin, limit;\r
\r
if (flag) return SCPE_ARG;                              /* dump? */\r
origin = 0;                                             /* memory */\r
limit = (uint32) cpu_unit.capac;\r
if (sim_switches & SWMASK ('O')) {                      /* origin? */\r
    origin = (int32) get_uint (cptr, 16, 0xFFFFFFFF, &r);\r
    if (r != SCPE_OK) return SCPE_ARG;\r
    }\r
\r
while ((val = getc (fileref)) != EOF) {                 /* read byte stream */\r
    if (sim_switches & SWMASK ('R')) {                  /* ROM0? */\r
        if (origin >= ROMSIZE) return SCPE_NXM;\r
        rom_wr_B (ROM0BASE + origin, val);\r
        }\r
    else if (sim_switches & SWMASK ('S')) {             /* ROM1? */\r
        if (origin >= ROMSIZE) return SCPE_NXM;\r
        rom_wr_B (ROM1BASE + origin, val);\r
        }\r
    else {\r
        if (origin >= limit) return SCPE_NXM;           /* NXM? */\r
        WriteB (origin, val);                           /* memory */\r
        }\r
    origin = origin + 1;\r
    }\r
return SCPE_OK;\r
}\r
\r
\r