HP2100/hp2100_cpu.h

   1 /* hp2100_cpu.h: HP 2100 CPU definitions
   2
   3    Copyright (c) 2005-2008, Robert M. Supnik
   4
   5    Permission is hereby granted, free of charge, to any person obtaining a
   6    copy of this software and associated documentation files (the "Software"),
   7    to deal in the Software without restriction, including without limitation
   8    the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9    and/or sell copies of the Software, and to permit persons to whom the
  10    Software is furnished to do so, subject to the following conditions:
  11
  12    The above copyright notice and this permission notice shall be included in
  13    all copies or substantial portions of the Software.
  14
  15    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18    ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  19    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  20    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  21
  22    Except as contained in this notice, the name of Robert M Supnik shall not
  23    be used in advertising or otherwise to promote the sale, use or other dealings
  24    in this Software without prior written authorization from Robert M Supnik.
  25
  26    24-Apr-08    JDB     Added calc_defer() prototype
  27    20-Apr-08    JDB     Added DEB_VIS and DEB_SIG debug flags
  28    26-Nov-07    JDB     Added extern sim_deb, cpu_dev, DEB flags for debug printouts
  29    05-Nov-07    JDB     Added extern intaddr, mp_viol, mp_mevff, calc_int, dev_ctl,
  30                         ReadIO, WriteIO for RTE-6/VM microcode support
  31    16-Dec-06    JDB     Added UNIT_2115 and UNIT_2114
  32    16-Oct-06    JDB     Moved ReadF to hp2100_cpu1.c
  33    26-Sep-06    JDB     Added CPU externs for microcode simulators
  34    16-Aug-06    JDB     Added UNIT_EMA for future RTE-4 EMA microcode
  35                         Added UNIT_VMA for future RTE-6 VMA and OS microcode
  36                         Added UNIT_1000_F for future F-Series support
  37    09-Aug-06    JDB     Added UNIT_DBI for double integer microcode
  38    21-Jan-05    JDB     Reorganized CPU option flags
  39    14-Jan-05    RMS     Cloned from hp2100_cpu.c
  40
  41    CPU models are broken down into family, type, and series to facilitate option
  42    validation.  Bit 3 encodes the family, bit 2 encodes the type, and bits 1:0
  43    encode the series within the type.
  44 */
  45
  46 #ifndef _HP2100_CPU_H_
  47 #define _HP2100_CPU_H_  0
  48
  49 /* CPU model definition flags */
  50
  51 #define CPU_V_SERIES    0
  52 #define CPU_V_TYPE      2
  53 #define CPU_V_FAMILY    3
  54
  55 #define FAMILY_21XX     (0 << CPU_V_FAMILY)
  56 #define FAMILY_1000     (1 << CPU_V_FAMILY)
  57
  58 #define TYPE_211X       (0 << CPU_V_TYPE)               /* 2114, 2115, 2116 */
  59 #define TYPE_2100       (1 << CPU_V_TYPE)               /* 2100A, 2100S */
  60 #define TYPE_1000MEF    (0 << CPU_V_TYPE)               /* 1000-M, 1000-E, 1000-F */
  61 #define TYPE_1000AL     (1 << CPU_V_TYPE)               /* 1000-L, A600, A700, A900, A990 */
  62
  63 #define SERIES_16       (0 << CPU_V_SERIES)             /* 211X */
  64 #define SERIES_15       (1 << CPU_V_SERIES)             /* 211X */
  65 #define SERIES_14       (2 << CPU_V_SERIES)             /* 211X */
  66 #define SERIES_00       (0 << CPU_V_SERIES)             /* 2100 */
  67 #define SERIES_M        (0 << CPU_V_SERIES)             /* 1000 */
  68 #define SERIES_E        (1 << CPU_V_SERIES)             /* 1000 */
  69 #define SERIES_F        (2 << CPU_V_SERIES)             /* 1000 */
  70
  71 /* CPU unit flags */
  72
  73 #define UNIT_M_CPU      017                             /* CPU model mask  [3:0] */
  74 #define UNIT_M_TYPE     014                             /* CPU type mask   [3:2] */
  75 #define UNIT_M_FAMILY   010                             /* CPU family mask [3:3] */
  76
  77 #define UNIT_V_CPU      (UNIT_V_UF + 0)                 /* CPU model bits 0-3 */
  78 #define UNIT_V_EAU      (UNIT_V_UF + 4)                 /* EAU installed */
  79 #define UNIT_V_FP       (UNIT_V_UF + 5)                 /* FP installed */
  80 #define UNIT_V_IOP      (UNIT_V_UF + 6)                 /* IOP installed */
  81 #define UNIT_V_DMS      (UNIT_V_UF + 7)                 /* DMS installed */
  82 #define UNIT_V_FFP      (UNIT_V_UF + 8)                 /* FFP installed */
  83 #define UNIT_V_DBI      (UNIT_V_UF + 9)                 /* DBI installed */
  84 #define UNIT_V_EMA      (UNIT_V_UF + 10)                /* RTE-4 EMA installed */
  85 #define UNIT_V_VMAOS    (UNIT_V_UF + 11)                /* RTE-6 VMA/OS installed */
  86 #define UNIT_V_VIS      (UNIT_V_UF + 12)                /* VIS installed */
  87 #define UNIT_V_SIGNAL   (UNIT_V_UF + 13)                /* SIGNAL/1000 installed */
  88 /* Future microcode expansion; reuse flags bottom-up if needed */
  89 #define UNIT_V_DS       (UNIT_V_UF + 14)                /* DS installed */
  90
  91 /* Unit models */
  92
  93 #define UNIT_MODEL_MASK (UNIT_M_CPU << UNIT_V_CPU)
  94
  95 #define UNIT_2116       ((FAMILY_21XX | TYPE_211X    | SERIES_16) << UNIT_V_CPU)
  96 #define UNIT_2115       ((FAMILY_21XX | TYPE_211X    | SERIES_15) << UNIT_V_CPU)
  97 #define UNIT_2114       ((FAMILY_21XX | TYPE_211X    | SERIES_14) << UNIT_V_CPU)
  98 #define UNIT_2100       ((FAMILY_21XX | TYPE_2100    | SERIES_00) << UNIT_V_CPU)
  99 #define UNIT_1000_M     ((FAMILY_1000 | TYPE_1000MEF | SERIES_M)  << UNIT_V_CPU)
 100 #define UNIT_1000_E     ((FAMILY_1000 | TYPE_1000MEF | SERIES_E)  << UNIT_V_CPU)
 101 #define UNIT_1000_F     ((FAMILY_1000 | TYPE_1000MEF | SERIES_F)  << UNIT_V_CPU)
 102
 103 /* Unit types */
 104
 105 #define UNIT_TYPE_MASK  (UNIT_M_TYPE << UNIT_V_CPU)
 106
 107 #define UNIT_TYPE_211X  ((FAMILY_21XX | TYPE_211X)    << UNIT_V_CPU)
 108 #define UNIT_TYPE_2100  ((FAMILY_21XX | TYPE_2100)    << UNIT_V_CPU)
 109 #define UNIT_TYPE_1000  ((FAMILY_1000 | TYPE_1000MEF) << UNIT_V_CPU)
 110
 111 /* Unit families */
 112
 113 #define UNIT_FAMILY_MASK    (UNIT_M_FAMILY << UNIT_V_CPU)
 114
 115 #define UNIT_FAMILY_21XX    (FAMILY_21XX << UNIT_V_CPU)
 116 #define UNIT_FAMILY_1000    (FAMILY_1000 << UNIT_V_CPU)
 117
 118 /* Unit accessors */
 119
 120 #define UNIT_CPU_MODEL  (cpu_unit.flags & UNIT_MODEL_MASK)
 121 #define UNIT_CPU_TYPE   (cpu_unit.flags & UNIT_TYPE_MASK)
 122 #define UNIT_CPU_FAMILY (cpu_unit.flags & UNIT_FAMILY_MASK)
 123
 124 #define CPU_MODEL_INDEX (UNIT_CPU_MODEL >> UNIT_V_CPU)
 125
 126 /* Unit features */
 127
 128 #define UNIT_EAU        (1 << UNIT_V_EAU)
 129 #define UNIT_FP         (1 << UNIT_V_FP)
 130 #define UNIT_IOP        (1 << UNIT_V_IOP)
 131 #define UNIT_DMS        (1 << UNIT_V_DMS)
 132 #define UNIT_FFP        (1 << UNIT_V_FFP)
 133 #define UNIT_DBI        (1 << UNIT_V_DBI)
 134 #define UNIT_EMA        (1 << UNIT_V_EMA)
 135 #define UNIT_VMAOS      (1 << UNIT_V_VMAOS)
 136 #define UNIT_VIS        (1 << UNIT_V_VIS)
 137 #define UNIT_DS         (1 << UNIT_V_DS)
 138 #define UNIT_SIGNAL     (1 << UNIT_V_SIGNAL)
 139
 140 #define UNIT_EMA_VMA    (UNIT_EMA | UNIT_VMAOS)
 141
 142 #define UNIT_OPTS       (UNIT_EAU | UNIT_FP    | UNIT_IOP | \
 143                          UNIT_DMS | UNIT_FFP   | UNIT_DBI | \
 144                          UNIT_EMA | UNIT_VMAOS | \
 145                          UNIT_VIS | UNIT_DS    | UNIT_SIGNAL)
 146
 147 /* "Pseudo-option" flags used only for option testing; never set into UNIT structure. */
 148
 149 #define UNIT_V_PFAIL    (UNIT_V_UF - 1)                 /* Power fail installed */
 150 #define UNIT_V_DMA      (UNIT_V_UF - 2)                 /* DMA installed */
 151 #define UNIT_V_MP       (UNIT_V_UF - 3)                 /* Memory protect installed */
 152
 153 #define UNIT_PFAIL      (1 << UNIT_V_PFAIL)
 154 #define UNIT_DMA        (1 << UNIT_V_DMA)
 155 #define UNIT_MP         (1 << UNIT_V_MP)
 156
 157 #define UNIT_NONE       0                               /* no options */
 158
 159 /* Debug flags */
 160
 161 #define DEB_OS          (1 << 0)                        /* RTE-6/VM OS firmware non-TBG processing */
 162 #define DEB_OSTBG       (1 << 1)                        /* RTE-6/VM OS firmware TBG processing */
 163 #define DEB_VMA         (1 << 2)                        /* RTE-6/VM VMA firmware instructions */
 164 #define DEB_EMA         (1 << 3)                        /* RTE-6/VM EMA firmware instructions */
 165 #define DEB_VIS         (1 << 4)                        /* E/F-Series VIS firmware instructions */
 166 #define DEB_SIG         (1 << 5)                        /* F-Series SIGNAL/1000 firmware instructions */
 167
 168 /* PC queue. */
 169
 170 #define PCQ_SIZE        64                              /* must be 2**n */
 171 #define PCQ_MASK        (PCQ_SIZE - 1)
 172 #define PCQ_ENTRY       pcq[pcq_p = (pcq_p - 1) & PCQ_MASK] = err_PC
 173
 174 /* simulator state */
 175
 176 extern FILE *sim_deb;
 177
 178 /* CPU registers */
 179
 180 extern uint16 ABREG[2];                                 /* A/B regs (use AR/BR) */
 181 extern uint32 PC;                                       /* P register */
 182 extern uint32 SR;                                       /* S register */
 183 extern uint32 MR;                                       /* M register */
 184 extern uint32 TR;                                       /* T register */
 185 extern uint32 XR;                                       /* X register */
 186 extern uint32 YR;                                       /* Y register */
 187 extern uint32 E;                                        /* E register */
 188 extern uint32 O;                                        /* O register */
 189 extern uint32 dev_ctl[2];                               /* device control */
 190
 191 /* CPU state */
 192
 193 extern uint32 err_PC;
 194 extern uint32 dms_enb;
 195 extern uint32 dms_ump;
 196 extern uint32 dms_sr;
 197 extern uint32 dms_vr;
 198 extern uint32 mp_fence;
 199 extern uint32 mp_viol;
 200 extern uint32 mp_mevff;
 201 extern uint32 iop_sp;
 202 extern uint32 ion_defer;
 203 extern uint32 intaddr;
 204 extern uint16 pcq[PCQ_SIZE];
 205 extern uint32 pcq_p;
 206 extern uint32 stop_inst;
 207 extern UNIT cpu_unit;
 208 extern DEVICE cpu_dev;
 209
 210 /* CPU functions */
 211
 212 t_stat resolve (uint32 MA, uint32 *addr, uint32 irq);
 213 uint8 ReadB (uint32 addr);
 214 uint8 ReadBA (uint32 addr);
 215 uint16 ReadW (uint32 addr);
 216 uint16 ReadWA (uint32 addr);
 217 uint16 ReadIO (uint32 addr, uint32 map);
 218 void WriteB (uint32 addr, uint32 dat);
 219 void WriteBA (uint32 addr, uint32 dat);
 220 void WriteW (uint32 addr, uint32 dat);
 221 void WriteWA (uint32 addr, uint32 dat);
 222 void WriteIO (uint32 addr, uint32 dat, uint32 map);
 223 t_stat iogrp (uint32 ir, uint32 iotrap);
 224 uint32 calc_int (void);
 225 uint32 calc_defer (void);
 226 void mp_dms_jmp (uint32 va);
 227 uint16 dms_rmap (uint32 mapi);
 228 void dms_wmap (uint32 mapi, uint32 dat);
 229 void dms_viol (uint32 va, uint32 st);
 230 uint32 dms_upd_sr (void);
 231
 232 #endif