NOVA/nova_clk.c

   1 /* nova_clk.c: NOVA real-time clock simulator
   2
   3    Copyright (c) 1993-2008, Robert M. Supnik
   4
   5    Permission is hereby granted, free of charge, to any person obtaining a
   6    copy of this software and associated documentation files (the "Software"),
   7    to deal in the Software without restriction, including without limitation
   8    the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9    and/or sell copies of the Software, and to permit persons to whom the
  10    Software is furnished to do so, subject to the following conditions:
  11
  12    The above copyright notice and this permission notice shall be included in
  13    all copies or substantial portions of the Software.
  14
  15    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18    ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  19    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  20    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  21
  22    Except as contained in this notice, the name of Robert M Supnik shall not be
  23    used in advertising or otherwise to promote the sale, use or other dealings
  24    in this Software without prior written authorization from Robert M Supnik.
  25
  26    clk          real-time clock
  27
  28    04-Jul-07    BKR     DEV_SET/CLR macros now used,
  29                         changed CLK name to RTC for DG compatiblity,
  30                         device may now bw DISABLED
  31    01-Mar-03    RMS     Added SET/SHOW CLK FREQ support
  32    03-Oct-02    RMS     Added DIB
  33    17-Sep-01    RMS     Added terminal multiplexor support
  34    17-Mar-01    RMS     Moved function prototype
  35    05-Mar-01    RMS     Added clock calibration
  36    24-Sep-97    RMS     Fixed bug in unit service (found by Charles Owen)
  37 */
  38
  39 #include "nova_defs.h"
  40
  41 extern int32 int_req, dev_busy, dev_done, dev_disable ;
  42
  43 int32 clk_sel = 0;                                      /* selected freq */
  44 int32 clk_time[4] = { 16000, 100000, 10000, 1000 };     /* freq table */
  45 int32 clk_tps[4] = { 60, 10, 100, 1000 };               /* ticks per sec */
  46 int32 clk_adj[4] = { 1, -5, 2, 20 };                    /* tmxr adjust */
  47 int32 tmxr_poll = 16000;                                /* tmxr poll */
  48
  49 int32  clk (int32 pulse, int32 code, int32 AC);
  50 t_stat clk_svc (UNIT *uptr);
  51 t_stat clk_reset (DEVICE *dptr);
  52 t_stat clk_set_freq (UNIT *uptr, int32 val, char *cptr, void *desc);
  53 t_stat clk_show_freq (FILE *st, UNIT *uptr, int32 val, void *desc);
  54
  55 /* CLK data structures
  56
  57    clk_dev      CLK device descriptor
  58    clk_unit     CLK unit descriptor
  59    clk_reg      CLK register list
  60 */
  61
  62 DIB clk_dib = { DEV_CLK, INT_CLK, PI_CLK, &clk };
  63
  64 UNIT clk_unit = { UDATA (&clk_svc, 0, 0) };
  65
  66 REG clk_reg[] = {
  67     { ORDATA (SELECT, clk_sel, 2) },
  68     { FLDATA (BUSY, dev_busy, INT_V_CLK) },
  69     { FLDATA (DONE, dev_done, INT_V_CLK) },
  70     { FLDATA (DISABLE, dev_disable, INT_V_CLK) },
  71     { FLDATA (INT, int_req, INT_V_CLK) },
  72     { DRDATA (TIME0, clk_time[0], 24), REG_NZ + PV_LEFT },
  73     { DRDATA (TIME1, clk_time[1], 24), REG_NZ + PV_LEFT },
  74     { DRDATA (TIME2, clk_time[2], 24), REG_NZ + PV_LEFT },
  75     { DRDATA (TIME3, clk_time[3], 24), REG_NZ + PV_LEFT },
  76     { DRDATA (TPS0, clk_tps[0], 6), PV_LEFT + REG_HRO },
  77     { NULL }
  78     };
  79
  80 MTAB clk_mod[] = {
  81     { MTAB_XTD|MTAB_VDV, 50, NULL, "50HZ",
  82       &clk_set_freq, NULL, NULL },
  83     { MTAB_XTD|MTAB_VDV, 60, NULL, "60HZ",
  84       &clk_set_freq, NULL, NULL },
  85     { MTAB_XTD|MTAB_VDV, 0, "LINE", NULL,
  86       NULL, &clk_show_freq, NULL },
  87     { 0 }
  88     };
  89
  90 DEVICE clk_dev = {
  91     "RTC", &clk_unit, clk_reg, clk_mod,
  92     1, 0, 0, 0, 0, 0,
  93     NULL, NULL, &clk_reset,
  94     NULL, NULL, NULL,
  95     &clk_dib, DEV_DISABLE
  96     };
  97
  98
  99 /* IOT routine */
 100
 101 int32 clk (int32 pulse, int32 code, int32 AC)
 102 {
 103 if (code == ioDOA) {                                    /* DOA */
 104     clk_sel = AC & 3;                                   /* save select */
 105     sim_rtc_init (clk_time[clk_sel]);                   /* init calibr */
 106     }
 107
 108 switch (pulse) {                                        /* decode IR<8:9> */
 109
 110   case iopS:                                            /* start */
 111     DEV_SET_BUSY( INT_CLK ) ;
 112     DEV_CLR_DONE( INT_CLK ) ;
 113     DEV_UPDATE_INTR ;
 114     if (!sim_is_active (&clk_unit))                     /* not running? */
 115         sim_activate (&clk_unit,                        /* activate */
 116             sim_rtc_init (clk_time[clk_sel]));          /* init calibr */
 117     break;
 118
 119   case iopC:                                            /* clear */
 120     DEV_CLR_BUSY( INT_CLK ) ;
 121     DEV_CLR_DONE( INT_CLK ) ;
 122     DEV_UPDATE_INTR ;
 123     sim_cancel (&clk_unit);                             /* deactivate unit */
 124     break;
 125     }                                                   /* end switch */
 126
 127 return 0;
 128 }
 129
 130 /* Unit service */
 131
 132 t_stat clk_svc (UNIT *uptr)
 133 {
 134 int32 t;
 135
 136 if ( DEV_IS_BUSY(INT_CLK) )
 137     {
 138     DEV_CLR_BUSY( INT_CLK ) ;
 139     DEV_SET_DONE( INT_CLK ) ;
 140     DEV_UPDATE_INTR ;
 141     }
 142 t = sim_rtc_calb (clk_tps[clk_sel]);                    /* calibrate delay */
 143 sim_activate (&clk_unit, t);                            /* reactivate unit */
 144 if (clk_adj[clk_sel] > 0)                               /* clk >= 60Hz? */
 145     tmxr_poll = t * clk_adj[clk_sel];                   /* poll is longer */
 146 else
 147     tmxr_poll = t / (-clk_adj[clk_sel]);                /* poll is shorter */
 148
 149 return SCPE_OK;
 150 }
 151
 152 /* Reset routine */
 153
 154 t_stat clk_reset (DEVICE *dptr)
 155 {
 156 clk_sel = 0;
 157 DEV_CLR_BUSY( INT_CLK ) ;
 158 DEV_CLR_DONE( INT_CLK ) ;
 159 DEV_UPDATE_INTR ;
 160
 161 sim_cancel (&clk_unit);                                 /* deactivate unit */
 162 tmxr_poll = clk_time[0];                                /* poll is default */
 163 return SCPE_OK;
 164 }
 165
 166 /* Set line frequency */
 167
 168 t_stat clk_set_freq (UNIT *uptr, int32 val, char *cptr, void *desc)
 169 {
 170 if (cptr) return SCPE_ARG;
 171 if ((val != 50) && (val != 60)) return SCPE_IERR;
 172 clk_tps[0] = val;
 173 return SCPE_OK;
 174 }
 175
 176 /* Show line frequency */
 177
 178 t_stat clk_show_freq (FILE *st, UNIT *uptr, int32 val, void *desc)
 179 {
 180 fprintf (st, (clk_tps[0] == 50)? "50Hz": "60Hz");
 181 return SCPE_OK;
 182 }