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First Commit of my working state
[simh.git] / PDP18B / pdp18b_defs.h
1 /* pdp18b_defs.h: 18b PDP simulator definitions
2
3 Copyright (c) 1993-2006, Robert M Supnik
4
5 Permission is hereby granted, free of charge, to any person obtaining a
6 copy of this software and associated documentation files (the "Software"),
7 to deal in the Software without restriction, including without limitation
8 the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 and/or sell copies of the Software, and to permit persons to whom the
10 Software is furnished to do so, subject to the following conditions:
11
12 The above copyright notice and this permission notice shall be included in
13 all copies or substantial portions of the Software.
14
15 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19 IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21
22 Except as contained in this notice, the name of Robert M Supnik shall not be
23 used in advertising or otherwise to promote the sale, use or other dealings
24 in this Software without prior written authorization from Robert M Supnik.
25
26 30-Oct-06 RMS Added infinite loop stop
27 14-Jan-04 RMS Revised IO device call interface
28 18-Oct-03 RMS Added DECtape off reel message
29 18-Jul-03 RMS Added FP15 support
30 Added XVM support
31 Added EAE option for PDP-4
32 25-Apr-03 RMS Revised for extended file support
33 04-Feb-03 RMS Added RB09, LP09 support
34 22-Nov-02 RMS Added PDP-4 drum support
35 05-Oct-02 RMS Added DIB structure
36 25-Jul-02 RMS Added PDP-4 DECtape support
37 10-Feb-02 RMS Added PDP-7 DECtape support
38 25-Nov-01 RMS Revised interrupt structure
39 27-May-01 RMS Added second Teletype support
40 21-Jan-01 RMS Added DECtape support
41 14-Apr-99 RMS Changed t_addr to unsigned
42 02-Jan-96 RMS Added fixed head and moving head disks
43 31-Dec-95 RMS Added memory management
44 19-Mar-95 RMS Added dynamic memory size
45
46 The author gratefully acknowledges the help of Craig St. Clair and
47 Deb Tevonian in locating archival material about the 18b PDP's, and of
48 Al Kossow and Max Burnet in making documentation and software available.
49 */
50
51 #ifndef _PDP18B_DEFS_H_
52 #define _PDP18B_DEFS_H_ 0
53
54 #include "sim_defs.h" /* simulator defns */
55
56 /* Models: only one should be defined
57
58 model memory CPU options I/O options
59
60 PDP4 8K Type 18 EAE Type 65 KSR-28 Teletype (Baudot)
61 ??Type 16 mem extension integral paper tape reader
62 Type 75 paper tape punch
63 integral real time clock
64 Type 62 line printer (Hollerith)
65 Type 550/555 DECtape
66 Type 24 serial drum
67
68 PDP7 32K Type 177 EAE Type 649 KSR-33 Teletype
69 Type 148 mem extension Type 444 paper tape reader
70 Type 75 paper tape punch
71 integral real time clock
72 Type 647B line printer (sixbit)
73 Type 550/555 DECtape
74 Type 24 serial drum
75
76 PDP9 32K KE09A EAE KSR-33 Teletype
77 KF09A auto pri intr PC09A paper tape reader and punch
78 KG09B mem extension integral real time clock
79 KP09A power detection Type 647D/E line printer (sixbit)
80 KX09A mem protection LP09 line printer (ASCII)
81 RF09/RS09 fixed head disk
82 RB09 fixed head disk
83 TC59 magnetic tape
84 TC02/TU55 DECtape
85 LT09A additional Teletypes
86
87 PDP15 128K KE15 EAE KSR-35 Teletype
88 KA15 auto pri intr PC15 paper tape reader and punch
89 KF15 power detection KW15 real time clock
90 KM15 mem protection LP09 line printer
91 KT15 mem relocation LP15 line printer
92 FP15 floating point RP15 disk pack
93 XVM option RF15/RF09 fixed head disk
94 TC59D magnetic tape
95 TC15/TU56 DECtape
96 LT15/LT19 additional Teletypes
97
98 ??Indicates not implemented. The PDP-4 manual refers to a memory
99 ??extension control; there is no documentation on it.
100 */
101
102 #if !defined (PDP4) && !defined (PDP7) && !defined (PDP9) && !defined (PDP15)
103 #define PDP15 0 /* default to PDP-15 */
104 #endif
105
106 /* Simulator stop codes */
107
108 #define STOP_RSRV 1 /* must be 1 */
109 #define STOP_HALT 2 /* HALT */
110 #define STOP_IBKPT 3 /* breakpoint */
111 #define STOP_XCT 4 /* nested XCT's */
112 #define STOP_API 5 /* invalid API int */
113 #define STOP_NONSTD 6 /* non-std dev num */
114 #define STOP_MME 7 /* mem mgt error */
115 #define STOP_FPDIS 8 /* fp inst, fpp disabled */
116 #define STOP_DTOFF 9 /* DECtape off reel */
117 #define STOP_LOOP 10 /* infinite loop */
118
119 /* Peripheral configuration */
120
121 #if defined (PDP4)
122 #define ADDRSIZE 13
123 #define KSR28 0 /* Baudot terminal */
124 #define TYPE62 0 /* Hollerith printer */
125 #define TYPE550 0 /* DECtape */
126 #define DRM 0 /* drum */
127 #elif defined (PDP7)
128 #define ADDRSIZE 15
129 #define TYPE647 0 /* sixbit printer */
130 #define TYPE550 0 /* DECtape */
131 #define DRM 0 /* drum */
132 #elif defined (PDP9)
133 #define ADDRSIZE 15
134 #define TYPE647 0 /* sixbit printer */
135 #define LP09 0 /* ASCII printer */
136 #define RB 0 /* fixed head disk */
137 #define RF 0 /* fixed head disk */
138 #define MTA 0 /* magtape */
139 #define TC02 0 /* DECtape */
140 #define TTY1 4 /* second Teletype(s) */
141 #define BRMASK 0076000 /* bounds mask */
142 #elif defined (PDP15)
143 #define ADDRSIZE 17
144 #define LP09 0 /* ASCII printer */
145 #define LP15 0 /* DMA printer */
146 #define RF 0 /* fixed head disk */
147 #define RP 0 /* disk pack */
148 #define MTA 0 /* magtape */
149 #define TC02 0 /* DECtape */
150 #define TTY1 16 /* second Teletype(s) */
151 #define BRMASK 0377400 /* bounds mask */
152 #define BRMASK_XVM 0777400 /* bounds mask, XVM */
153 #endif
154
155 /* Memory */
156
157 #define AMASK ((1 << ADDRSIZE) - 1) /* address mask */
158 #define IAMASK 077777 /* ind address mask */
159 #define BLKMASK (AMASK & (~IAMASK)) /* block mask */
160 #define MAXMEMSIZE (1 << ADDRSIZE) /* max memory size */
161 #define MEMSIZE (cpu_unit.capac) /* actual memory size */
162 #define MEM_ADDR_OK(x) (((uint32) (x)) < MEMSIZE)
163
164 /* Instructions */
165
166 #define I_V_OP 14 /* opcode */
167 #define I_M_OP 017
168 #define I_V_IND 13 /* indirect */
169 #define I_V_IDX 12 /* index */
170 #define I_IND (1 << I_V_IND)
171 #define I_IDX (1 << I_V_IDX)
172 #define B_DAMASK 017777 /* bank mode address */
173 #define B_EPCMASK (AMASK & ~B_DAMASK)
174 #define P_DAMASK 007777 /* page mode address */
175 #define P_EPCMASK (AMASK & ~P_DAMASK)
176
177 /* Memory cycles */
178
179 #define FE 0
180 #define DF 1
181 #define RD 2
182 #define WR 3
183
184 /* Memory status codes */
185
186 #define MM_OK 0
187 #define MM_ERR 1
188
189 /* Memory management relocation checks (PDP-15 KT15 and XVM only) */
190
191 #define REL_C -1 /* console */
192 #define REL_R 0 /* read */
193 #define REL_W 1 /* write */
194
195 /* Architectural constants */
196
197 #define DMASK 0777777 /* data mask */
198 #define LINK (DMASK + 1) /* link */
199 #define LACMASK (LINK | DMASK) /* link + data */
200 #define SIGN 0400000 /* sign bit */
201 #define OP_JMS 0100000 /* JMS */
202 #define OP_JMP 0600000 /* JMP */
203 #define OP_HLT 0740040 /* HLT */
204
205 /* IOT subroutine return codes */
206
207 #define IOT_V_SKP 18 /* skip */
208 #define IOT_V_REASON 19 /* reason */
209 #define IOT_SKP (1 << IOT_V_SKP)
210 #define IOT_REASON (1 << IOT_V_REASON)
211
212 #define IORETURN(f,v) ((f)? (v): SCPE_OK) /* stop on error */
213
214 /* PC change queue */
215
216 #define PCQ_SIZE 64 /* must be 2**n */
217 #define PCQ_MASK (PCQ_SIZE - 1)
218 #define PCQ_ENTRY pcq[pcq_p = (pcq_p - 1) & PCQ_MASK] = PC
219
220 /* XVM memory management registers */
221
222 #define MM_RDIS 0400000 /* reloc disabled */
223 #define MM_V_GM 15 /* G mode */
224 #define MM_M_GM 03
225 #define MM_GM (MM_M_GM << MM_V_GM)
226 #define MM_G_W0 0077777 /* virt addr width */
227 #define MM_G_W1 0177777
228 #define MM_G_W2 0777777
229 #define MM_G_W3 0377777
230 #define MM_G_B0 0060000 /* SAS base */
231 #define MM_G_B1 0160000
232 #define MM_G_B2 0760000
233 #define MM_G_B3 0360000
234 #define MM_UIOT 0040000 /* user mode IOT's */
235 #define MM_WP 0020000 /* share write prot */
236 #define MM_SH 0010000 /* share enabled */
237 #define MM_V_SLR 10 /* segment length reg */
238 #define MM_M_SLR 03
239 #define MM_SLR_L0 001000 /* SAS length */
240 #define MM_SLR_L1 002000
241 #define MM_SLR_L2 010000
242 #define MM_SLR_L3 020000
243 #define MM_SBR_MASK 01777 /* share base reg */
244 #define MM_GETGM(x) (((x) >> MM_V_GM) & MM_M_GM)
245 #define MM_GETSLR(x) (((x) >> MM_V_SLR) & MM_M_SLR)
246
247 /* Device information block */
248
249 #define DEV_MAXBLK 8 /* max dev block */
250 #define DEV_MAX 64 /* total devices */
251
252 typedef struct {
253 uint32 dev; /* base dev number */
254 uint32 num; /* number of slots */
255 int32 (*iors)(void); /* IORS responder */
256 int32 (*dsp[DEV_MAXBLK])(int32 dev, int32 pulse, int32 dat);
257 } DIB;
258
259 /* Standard device numbers */
260
261 #define DEV_PTR 001 /* paper tape reader */
262 #define DEV_PTP 002 /* paper tape punch */
263 #define DEV_TTI 003 /* console input */
264 #define DEV_TTO 004 /* console output */
265 #define DEV_TTI1 041 /* extra terminals */
266 #define DEV_TTO1 040
267 #define DEV_DRM 060 /* drum */
268 #define DEV_RP 063 /* RP15 */
269 #define DEV_LPT 065 /* line printer */
270 #define DEV_RF 070 /* RF09 */
271 #define DEV_RB 071 /* RB09 */
272 #define DEV_MT 073 /* magtape */
273 #define DEV_DTA 075 /* dectape */
274
275 /* Interrupt system
276
277 The interrupt system can be modelled on either the flag driven system
278 of the PDP-4 and PDP-7 or the API driven system of the PDP-9 and PDP-15.
279 If flag based, API is hard to implement; if API based, IORS requires
280 extra code for implementation. I've chosen an API based model.
281
282 API channel Device API priority Notes
283
284 00 software 4 4
285 01 software 5 5
286 02 software 6 6
287 03 software 7 7
288 04 TC02/TC15 1
289 05 TC59D 1
290 06 drum 1 PDP-9 only
291 07 RB09 1 PDP-9 only
292 10 paper tape reader 2
293 11 real time clock 3
294 12 power fail 0
295 13 memory parity 0
296 14 display 2
297 15 card reader 2
298 16 line printer 2
299 17 A/D converter 0
300 20 interprocessor buffer 3
301 21 360 link 3 PDP-9 only
302 22 data phone 2 PDP-15 only
303 23 RF09/RF15 1
304 24 RP15 1 PDP-15 only
305 25 plotter 1 PDP-15 only
306 26 -
307 27 -
308 30 -
309 31 -
310 32 -
311 33 -
312 34 LT15 TTO 3 PDP-15 only
313 35 LT15 TTI 3 PDP-15 only
314 36 -
315 37 -
316
317 On the PDP-9, any API level active masks PI, and PI does not mask API.
318 On the PDP-15, only the hardware API levels active mask PI, and PI masks
319 the API software levels. */
320
321 #define API_ML0 0200 /* API masks: level 0 */
322 #define API_ML1 0100
323 #define API_ML2 0040
324 #define API_ML3 0020
325 #define API_ML4 0010
326 #define API_ML5 0004
327 #define API_ML6 0002
328 #define API_ML7 0001 /* level 7 */
329
330 #if defined (PDP9) /* levels which mask PI */
331 #define API_MASKPI (API_ML0|API_ML1|API_ML2|API_ML3|API_ML4|API_ML5|API_ML6|API_ML7)
332 #else
333 #define API_MASKPI (API_ML0|API_ML1|API_ML2|API_ML3)
334 #endif
335
336 #define API_HLVL 4 /* hwre levels */
337 #define ACH_SWRE 040 /* swre int vec */
338
339 /* API level 0 */
340
341 #define INT_V_PWRFL 0 /* powerfail */
342
343 #define INT_PWRFL (1 << INT_V_PWRFL)
344
345 #define API_PWRFL 0
346
347 #define ACH_PWRFL 052
348
349 /* API level 1 */
350
351 #define INT_V_DTA 0 /* DECtape */
352 #define INT_V_MTA 1 /* magtape */
353 #define INT_V_DRM 2 /* drum */
354 #define INT_V_RF 3 /* fixed head disk */
355 #define INT_V_RP 4 /* disk pack */
356 #define INT_V_RB 5 /* RB disk */
357
358 #define INT_DTA (1 << INT_V_DTA)
359 #define INT_MTA (1 << INT_V_MTA)
360 #define INT_DRM (1 << INT_V_DRM)
361 #define INT_RF (1 << INT_V_RF)
362 #define INT_RP (1 << INT_V_RP)
363 #define INT_RB (1 << INT_V_RB)
364
365 #define API_DTA 1
366 #define API_MTA 1
367 #define API_DRM 1
368 #define API_RF 1
369 #define API_RP 1
370 #define API_RB 1
371
372 #define ACH_DTA 044
373 #define ACH_MTA 045
374 #define ACH_DRM 046
375 #define ACH_RB 047
376 #define ACH_RF 063
377 #define ACH_RP 064
378
379 /* API level 2 */
380
381 #define INT_V_PTR 0 /* paper tape reader */
382 #define INT_V_LPT 1 /* line printer */
383 #define INT_V_LPTSPC 2 /* line printer spc */
384
385 #define INT_PTR (1 << INT_V_PTR)
386 #define INT_LPT (1 << INT_V_LPT)
387 #define INT_LPTSPC (1 << INT_V_LPTSPC)
388
389 #define API_PTR 2
390 #define API_LPT 2
391 #define API_LPTSPC 2
392
393 #define ACH_PTR 050
394 #define ACH_LPT 056
395
396 /* API level 3 */
397
398 #define INT_V_CLK 0 /* clock */
399 #define INT_V_TTI1 1 /* LT15 keyboard */
400 #define INT_V_TTO1 2 /* LT15 output */
401
402 #define INT_CLK (1 << INT_V_CLK)
403 #define INT_TTI1 (1 << INT_V_TTI1)
404 #define INT_TTO1 (1 << INT_V_TTO1)
405
406 #define API_CLK 3
407 #define API_TTI1 3
408 #define API_TTO1 3
409
410 #define ACH_CLK 051
411 #define ACH_TTI1 075
412 #define ACH_TTO1 074
413
414 /* PI level */
415
416 #define INT_V_TTI 0 /* console keyboard */
417 #define INT_V_TTO 1 /* console output */
418 #define INT_V_PTP 2 /* paper tape punch */
419
420 #define INT_TTI (1 << INT_V_TTI)
421 #define INT_TTO (1 << INT_V_TTO)
422 #define INT_PTP (1 << INT_V_PTP)
423
424 #define API_TTI 4 /* PI level */
425 #define API_TTO 4
426 #define API_PTP 4
427
428 /* Interrupt macros */
429
430 #define SET_INT(dv) int_hwre[API_##dv] = int_hwre[API_##dv] | INT_##dv
431 #define CLR_INT(dv) int_hwre[API_##dv] = int_hwre[API_##dv] & ~INT_##dv
432 #define TST_INT(dv) (int_hwre[API_##dv] & INT_##dv)
433
434 /* I/O status flags for the IORS instruction
435
436 bit PDP-4 PDP-7 PDP-9 PDP-15
437
438 0 intr on intr on intr on intr on
439 1 tape rdr flag* tape rdr flag* tape rdr flag* tape rdr flag*
440 2 tape pun flag* tape pun flag* tape pun flag* tape pun flag*
441 3 keyboard flag* keyboard flag* keyboard flag* keyboard flag*
442 4 type out flag* type out flag* type out flag* type out flag*
443 5 display flag* display flag* light pen flag* light pen flag*
444 6 clk ovflo flag* clk ovflo flag* clk ovflo flag* clk ovflo flag*
445 7 clk enable flag clk enable flag clk enable flag clk enable flag
446 8 mag tape flag* mag tape flag* tape rdr empty* tape rdr empty*
447 9 card rdr col* * tape pun empty tape pun empty
448 10 card rdr ~busy DECtape flag* DECtape flag*
449 11 card rdr error magtape flag* magtape flag*
450 12 card rdr EOF disk pack flag*
451 13 card pun row* DECdisk flag* DECdisk flag*
452 14 card pun error lpt flag*
453 15 lpt flag* lpt flag* lpt flag*
454 16 lpt space flag* lpt error flag lpt error flag
455 17 drum flag* drum flag*
456 */
457
458 #define IOS_ION 0400000 /* interrupts on */
459 #define IOS_PTR 0200000 /* tape reader */
460 #define IOS_PTP 0100000 /* tape punch */
461 #define IOS_TTI 0040000 /* keyboard */
462 #define IOS_TTO 0020000 /* terminal */
463 #define IOS_LPEN 0010000 /* light pen */
464 #define IOS_CLK 0004000 /* clock */
465 #define IOS_CLKON 0002000 /* clock enable */
466 #define IOS_DTA 0000200 /* DECtape */
467 #define IOS_RP 0000040 /* disk pack */
468 #define IOS_RF 0000020 /* fixed head disk */
469 #define IOS_DRM 0000001 /* drum */
470 #if defined (PDP4) || defined (PDP7)
471 #define IOS_MTA 0001000 /* magtape */
472 #define IOS_LPT 0000004 /* line printer */
473 #define IOS_LPT1 0000002 /* line printer stat */
474 #elif defined (PDP9)
475 #define IOS_PTRERR 0001000 /* reader empty */
476 #define IOS_PTPERR 0000400 /* punch empty */
477 #define IOS_MTA 0000100 /* magtape */
478 #define IOS_LPT 0000004 /* line printer */
479 #define IOS_LPT1 0000002 /* line printer stat */
480 #elif defined (PDP15)
481 #define IOS_PTRERR 0001000 /* reader empty */
482 #define IOS_PTPERR 0000400 /* punch empty */
483 #define IOS_MTA 0000100 /* magtape */
484 #define IOS_LPT 0000010 /* line printer */
485 #define IOS_LPT1 0000000 /* not used */
486 #endif
487
488 /* Function prototypes */
489
490 t_stat set_devno (UNIT *uptr, int32 val, char *cptr, void *desc);
491 t_stat show_devno (FILE *st, UNIT *uptr, int32 val, void *desc);
492
493 #endif
Magically enhanced SIMH