PDP18B/pdp18b_rf.c

   1 /* pdp18b_rf.c: fixed head disk simulator
   2
   3    Copyright (c) 1993-2006, Robert M Supnik
   4
   5    Permission is hereby granted, free of charge, to any person obtaining a
   6    copy of this software and associated documentation files (the "Software"),
   7    to deal in the Software without restriction, including without limitation
   8    the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9    and/or sell copies of the Software, and to permit persons to whom the
  10    Software is furnished to do so, subject to the following conditions:
  11
  12    The above copyright notice and this permission notice shall be included in
  13    all copies or substantial portions of the Software.
  14
  15    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18    ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  19    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  20    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  21
  22    Except as contained in this notice, the name of Robert M Supnik shall not be
  23    used in advertising or otherwise to promote the sale, use or other dealings
  24    in this Software without prior written authorization from Robert M Supnik.
  25
  26    rf           (PDP-9) RF09/RF09
  27                 (PDP-15) RF15/RS09
  28
  29    04-Oct-06    RMS     Fixed bug, DSCD does not clear function register
  30    15-May-06    RMS     Fixed bug in autosize attach (reported by David Gesswein)
  31    14-Jan-04    RMS     Revised IO device call interface
  32                         Changed sim_fsize calling sequence
  33    26-Oct-03    RMS     Cleaned up buffer copy code
  34    26-Jul-03    RMS     Fixed bug in set size routine
  35    14-Mar-03    RMS     Fixed variable platter interaction with save/restore
  36    03-Mar-03    RMS     Fixed autosizing
  37    12-Feb-03    RMS     Removed 8 platter sizing hack
  38    05-Feb-03    RMS     Fixed decode bugs, added variable and autosizing
  39    05-Oct-02    RMS     Added DIB, dev number support
  40    06-Jan-02    RMS     Revised enable/disable support
  41    25-Nov-01    RMS     Revised interrupt structure
  42    24-Nov-01    RMS     Changed WLK to array
  43    26-Apr-01    RMS     Added device enable/disable support
  44    15-Feb-01    RMS     Fixed 3 cycle data break sequencing
  45    30-Nov-99    RMS     Added non-zero requirement to rf_time
  46    14-Apr-99    RMS     Changed t_addr to unsigned
  47
  48    The RFxx is a head-per-track disk.  It uses the multicycle data break
  49    facility.  To minimize overhead, the entire RFxx is buffered in memory.
  50
  51    Two timing parameters are provided:
  52
  53    rf_time      Interword timing.  Must be non-zero.
  54    rf_burst     Burst mode.  If 0, DMA occurs cycle by cycle; otherwise,
  55                 DMA occurs in a burst.
  56 */
  57
  58 #include "pdp18b_defs.h"
  59 #include <math.h>
  60
  61 #define UNIT_V_AUTO     (UNIT_V_UF + 0)                 /* autosize */
  62 #define UNIT_V_PLAT     (UNIT_V_UF + 1)                 /* #platters - 1 */
  63 #define UNIT_M_PLAT     07
  64 #define UNIT_PLAT       (UNIT_M_PLAT << UNIT_V_PLAT)
  65 #define UNIT_GETP(x)    ((((x) >> UNIT_V_PLAT) & UNIT_M_PLAT) + 1)
  66 #define UNIT_AUTO       (1 << UNIT_V_AUTO)
  67 #define UNIT_PLAT       (UNIT_M_PLAT << UNIT_V_PLAT)
  68
  69 /* Constants */
  70
  71 #define RF_NUMWD        2048                            /* words/track */
  72 #define RF_NUMTR        128                             /* tracks/disk */
  73 #define RF_DKSIZE       (RF_NUMTR * RF_NUMWD)           /* words/disk */
  74 #define RF_NUMDK        8                               /* disks/controller */
  75 #define RF_WMASK        (RF_NUMWD - 1)                  /* word mask */
  76 #define RF_WC           036                             /* word count */
  77 #define RF_CA           037                             /* current addr */
  78
  79 /* Function/status register */
  80
  81 #define RFS_ERR         0400000                         /* error */
  82 #define RFS_HDW         0200000                         /* hardware error */
  83 #define RFS_APE         0100000                         /* addr parity error */
  84 #define RFS_MXF         0040000                         /* missed transfer */
  85 #define RFS_WCE         0020000                         /* write check error */
  86 #define RFS_DPE         0010000                         /* data parity error */
  87 #define RFS_WLO         0004000                         /* write lock error */
  88 #define RFS_NED         0002000                         /* non-existent disk */
  89 #define RFS_DCH         0001000                         /* data chan timing */
  90 #define RFS_PGE         0000400                         /* programming error */
  91 #define RFS_DON         0000200                         /* transfer complete */
  92 #define RFS_V_FNC       1                               /* function */
  93 #define RFS_M_FNC       03
  94 #define RFS_FNC         (RFS_M_FNC << RFS_V_FNC)
  95 #define  FN_NOP         0
  96 #define  FN_READ        1
  97 #define  FN_WRITE       2
  98 #define  FN_WCHK        3
  99 #define RFS_IE          0000001                         /* interrupt enable */
 100
 101 #define RFS_CLR         0000170                         /* always clear */
 102 #define RFS_EFLGS       (RFS_HDW | RFS_APE | RFS_MXF | RFS_WCE | \
 103                                                  RFS_DPE | RFS_WLO | RFS_NED )  /* error flags */
 104 #define RFS_FR          (RFS_FNC|RFS_IE)
 105 #define GET_FNC(x)      (((x) >> RFS_V_FNC) & RFS_M_FNC)
 106 #define GET_POS(x)      ((int) fmod (sim_gtime () / ((double) (x)), \
 107                                                 ((double) RF_NUMWD)))
 108 #define RF_BUSY         (sim_is_active (&rf_unit))
 109
 110 extern int32 M[];
 111 extern int32 int_hwre[API_HLVL+1];
 112 extern UNIT cpu_unit;
 113
 114 int32 rf_sta = 0;                                       /* status register */
 115 int32 rf_da = 0;                                        /* disk address */
 116 int32 rf_dbuf = 0;                                      /* data buffer */
 117 int32 rf_wlk[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };           /* write lock */
 118 int32 rf_time = 10;                                     /* inter-word time */
 119 int32 rf_burst = 1;                                     /* burst mode flag */
 120 int32 rf_stopioe = 1;                                   /* stop on error */
 121
 122 DEVICE rf_dev;
 123 int32 rf70 (int32 dev, int32 pulse, int32 dat);
 124 int32 rf72 (int32 dev, int32 pulse, int32 dat);
 125 int32 rf_iors (void);
 126 t_stat rf_svc (UNIT *uptr);
 127 t_stat rf_reset (DEVICE *dptr);
 128 int32 rf_updsta (int32 new);
 129 t_stat rf_attach (UNIT *uptr, char *cptr);
 130 t_stat rf_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
 131
 132 /* RF data structures
 133
 134    rf_dev       RF device descriptor
 135    rf_unit      RF unit descriptor
 136    rf_reg       RF register list
 137 */
 138
 139 DIB rf_dib = { DEV_RF, 3, &rf_iors, { &rf70, NULL, &rf72 } };
 140
 141 UNIT rf_unit = {
 142     UDATA (&rf_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_BUFABLE+UNIT_MUSTBUF+UNIT_AUTO,
 143            RF_DKSIZE)
 144     };
 145
 146 REG rf_reg[] = {
 147     { ORDATA (STA, rf_sta, 18) },
 148     { ORDATA (DA, rf_da, 22) },
 149     { ORDATA (WC, M[RF_WC], 18) },
 150     { ORDATA (CA, M[RF_CA], 18) },
 151     { ORDATA (BUF, rf_dbuf, 18) },
 152     { FLDATA (INT, int_hwre[API_RF], INT_V_RF) },
 153     { BRDATA (WLK, rf_wlk, 8, 16, RF_NUMDK) },
 154     { DRDATA (TIME, rf_time, 24), PV_LEFT + REG_NZ },
 155     { FLDATA (BURST, rf_burst, 0) },
 156     { FLDATA (STOP_IOE, rf_stopioe, 0) },
 157     { DRDATA (CAPAC, rf_unit.capac, 31), PV_LEFT + REG_HRO },
 158     { ORDATA (DEVNO, rf_dib.dev, 6), REG_HRO },
 159     { NULL }
 160     };
 161
 162 MTAB rf_mod[] = {
 163     { UNIT_PLAT, (0 << UNIT_V_PLAT), NULL, "1P", &rf_set_size },
 164     { UNIT_PLAT, (1 << UNIT_V_PLAT), NULL, "2P", &rf_set_size },
 165     { UNIT_PLAT, (2 << UNIT_V_PLAT), NULL, "3P", &rf_set_size },
 166     { UNIT_PLAT, (3 << UNIT_V_PLAT), NULL, "4P", &rf_set_size },
 167     { UNIT_PLAT, (4 << UNIT_V_PLAT), NULL, "5P", &rf_set_size },
 168     { UNIT_PLAT, (5 << UNIT_V_PLAT), NULL, "6P", &rf_set_size },
 169     { UNIT_PLAT, (6 << UNIT_V_PLAT), NULL, "7P", &rf_set_size },
 170     { UNIT_PLAT, (7 << UNIT_V_PLAT), NULL, "8P", &rf_set_size },
 171     { UNIT_AUTO, UNIT_AUTO, "autosize", "AUTOSIZE", NULL },
 172     { MTAB_XTD|MTAB_VDV, 0, "DEVNO", "DEVNO", &set_devno, &show_devno },
 173     { 0 }
 174     };
 175
 176 DEVICE rf_dev = {
 177     "RF", &rf_unit, rf_reg, rf_mod,
 178     1, 8, 21, 1, 8, 18,
 179     NULL, NULL, &rf_reset,
 180     NULL, &rf_attach, NULL,
 181     &rf_dib, DEV_DISABLE
 182     };
 183
 184 /* IOT routines */
 185
 186 int32 rf70 (int32 dev, int32 pulse, int32 dat)
 187 {
 188 int32 t, sb;
 189
 190 sb = pulse & 060;                                       /* subopcode */
 191 if (pulse & 01) {
 192     if ((sb == 000) && (rf_sta & (RFS_ERR | RFS_DON)))  /* DSSF */
 193         dat = IOT_SKP | dat;
 194     else if (sb == 020) rf_reset (&rf_dev);             /* DSCC */
 195     else if (sb == 040) {                               /* DSCF */
 196         if (RF_BUSY) rf_sta = rf_sta | RFS_PGE;         /* busy inhibits */
 197         else rf_sta = rf_sta & ~(RFS_FNC | RFS_IE);     /* clear func */
 198         }
 199     }
 200 if (pulse & 02) {
 201     if (RF_BUSY) rf_sta = rf_sta | RFS_PGE;             /* busy sets PGE */
 202     else if (sb == 000) dat = dat | rf_dbuf;            /* DRBR */
 203     else if (sb == 020)                                 /* DRAL */
 204         dat = dat | (rf_da & DMASK);
 205     else if (sb == 040)                                 /* DSFX */
 206         rf_sta = rf_sta ^ (dat & (RFS_FNC | RFS_IE));   /* xor func */
 207     else if (sb == 060)                                 /* DRAH */
 208         dat = dat | (rf_da >> 18) | ((rf_sta & RFS_NED)? 010: 0);
 209     }
 210 if (pulse & 04) {
 211     if (RF_BUSY) rf_sta = rf_sta | RFS_PGE;             /* busy sets PGE */
 212     else if (sb == 000) rf_dbuf = dat & DMASK;          /* DLBR */
 213     else if (sb == 020)                                 /* DLAL */
 214         rf_da = (rf_da & ~DMASK) | (dat & DMASK);
 215     else if (sb == 040) {                               /* DSCN */
 216         rf_sta = rf_sta & ~RFS_DON;                     /* clear done */
 217         if (GET_FNC (rf_sta) != FN_NOP) {
 218             t = (rf_da & RF_WMASK) - GET_POS (rf_time); /* delta to new */
 219             if (t < 0) t = t + RF_NUMWD;                /* wrap around? */
 220             sim_activate (&rf_unit, t * rf_time);       /* schedule op */
 221             }
 222         }
 223     else if (sb == 060) {                               /* DLAH */
 224         rf_da = (rf_da & DMASK) | ((dat & 07) << 18);
 225         if ((uint32) rf_da >= rf_unit.capac)            /* for sizing */
 226             rf_updsta (RFS_NED);
 227         }
 228     }
 229 rf_updsta (0);                                          /* update status */
 230 return dat;
 231 }
 232
 233 int32 rf72 (int32 dev, int32 pulse, int32 dat)
 234 {
 235 int32 sb = pulse & 060;
 236
 237 if (pulse & 02) {
 238     if (sb == 000) dat = dat | GET_POS (rf_time) |      /* DLOK */
 239         (sim_is_active (&rf_unit)? 0400000: 0);
 240     else if (sb == 040) {                               /* DSCD */
 241         if (RF_BUSY) rf_sta = rf_sta | RFS_PGE;         /* busy inhibits */
 242         else rf_sta = rf_sta & RFS_FR;
 243         rf_updsta (0);
 244         }
 245     else if (sb == 060) {                               /* DSRS */
 246         if (RF_BUSY) rf_sta = rf_sta | RFS_PGE;         /* busy sets PGE */
 247         dat = dat | rf_updsta (0);
 248         }
 249     }
 250 return dat;
 251 }
 252
 253 /* Unit service - assumes the entire disk is buffered */
 254
 255 t_stat rf_svc (UNIT *uptr)
 256 {
 257 int32 f, pa, d, t;
 258 int32 *fbuf = uptr->filebuf;
 259
 260 if ((uptr->flags & UNIT_BUF) == 0) {                    /* not buf? abort */
 261     rf_updsta (RFS_NED | RFS_DON);                      /* set nxd, done */
 262     return IORETURN (rf_stopioe, SCPE_UNATT);
 263     }
 264
 265 f = GET_FNC (rf_sta);                                   /* get function */
 266 do {
 267     if ((uint32) rf_da >= uptr->capac) {                /* disk overflow? */
 268         rf_updsta (RFS_NED);                            /* nx disk error */
 269         break;
 270         }
 271     M[RF_WC] = (M[RF_WC] + 1) & DMASK;                  /* incr word count */
 272         pa = M[RF_CA] = (M[RF_CA] + 1) & AMASK;         /* incr mem addr */
 273     if ((f == FN_READ) && MEM_ADDR_OK (pa))             /* read? */
 274         M[pa] = fbuf[rf_da];
 275     if ((f == FN_WCHK) && (M[pa] != fbuf[rf_da])) {     /* write check? */
 276         rf_updsta (RFS_WCE);                            /* flag error */
 277         break;
 278         }
 279     if (f == FN_WRITE) {                                /* write? */
 280         d = (rf_da >> 18) & 07;                         /* disk */
 281         t = (rf_da >> 14) & 017;                        /* track groups */
 282         if ((rf_wlk[d] >> t) & 1) {                     /* write locked? */
 283             rf_updsta (RFS_WLO);
 284             break;
 285             }
 286         else {                                          /* not locked */
 287             fbuf[rf_da] = M[pa];                                                /* write word */
 288             if (((uint32) rf_da) >= uptr->hwmark) uptr->hwmark = rf_da + 1;
 289             }
 290         }
 291     rf_da = rf_da + 1;                                  /* incr disk addr */
 292     } while ((M[RF_WC] != 0) && (rf_burst != 0));       /* brk if wc, no brst */
 293
 294 if ((M[RF_WC] != 0) && ((rf_sta & RFS_ERR) == 0))       /* more to do? */
 295     sim_activate (&rf_unit, rf_time);                   /* sched next */
 296 else rf_updsta (RFS_DON);
 297 return SCPE_OK;
 298 }
 299
 300 /* Update status */
 301
 302 int32 rf_updsta (int32 new)
 303 {
 304 rf_sta = (rf_sta | new) & ~(RFS_ERR | RFS_CLR);
 305 if (rf_sta & RFS_EFLGS) rf_sta = rf_sta | RFS_ERR;
 306 if ((rf_sta & (RFS_ERR | RFS_DON)) && (rf_sta & RFS_IE))
 307      SET_INT (RF);
 308 else CLR_INT (RF);
 309 return rf_sta;
 310 }
 311
 312 /* Reset routine */
 313
 314 t_stat rf_reset (DEVICE *dptr)
 315 {
 316 rf_sta = rf_da = rf_dbuf = 0;
 317 rf_updsta (0);
 318 sim_cancel (&rf_unit);
 319 return SCPE_OK;
 320 }
 321
 322 /* IORS routine */
 323
 324 int32 rf_iors (void)
 325 {
 326 return ((rf_sta & (RFS_ERR | RFS_DON))? IOS_RF: 0);
 327 }
 328
 329 /* Attach routine */
 330
 331 t_stat rf_attach (UNIT *uptr, char *cptr)
 332 {
 333 uint32 p, sz;
 334 uint32 ds_bytes = RF_DKSIZE * sizeof (int32);
 335
 336 if ((uptr->flags & UNIT_AUTO) && (sz = sim_fsize_name (cptr))) {
 337     p = (sz + ds_bytes - 1) / ds_bytes;
 338     if (p >= RF_NUMDK) p = RF_NUMDK - 1;
 339     uptr->flags = (uptr->flags & ~UNIT_PLAT) |
 340         (p << UNIT_V_PLAT);
 341     }
 342 uptr->capac = UNIT_GETP (uptr->flags) * RF_DKSIZE;
 343 return attach_unit (uptr, cptr);
 344 }
 345
 346 /* Change disk size */
 347
 348 t_stat rf_set_size (UNIT *uptr, int32 val, char *cptr, void *desc)
 349 {
 350 if (val < 0) return SCPE_IERR;
 351 if (uptr->flags & UNIT_ATT) return SCPE_ALATT;
 352 uptr->capac = UNIT_GETP (val) * RF_DKSIZE;
 353 uptr->flags = uptr->flags & ~UNIT_AUTO;
 354 return SCPE_OK;
 355 }