PDP8/pdp8_df.c

   1 /* pdp8_df.c: DF32 fixed head disk simulator
   2
   3    Copyright (c) 1993-2006, Robert M Supnik
   4
   5    Permission is hereby granted, free of charge, to any person obtaining a
   6    copy of this software and associated documentation files (the "Software"),
   7    to deal in the Software without restriction, including without limitation
   8    the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9    and/or sell copies of the Software, and to permit persons to whom the
  10    Software is furnished to do so, subject to the following conditions:
  11
  12    The above copyright notice and this permission notice shall be included in
  13    all copies or substantial portions of the Software.
  14
  15    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18    ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  19    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  20    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  21
  22    Except as contained in this notice, the name of Robert M Supnik shall not be
  23    used in advertising or otherwise to promote the sale, use or other dealings
  24    in this Software without prior written authorization from Robert M Supnik.
  25
  26    df           DF32 fixed head disk
  27
  28    15-May-06    RMS     Fixed bug in autosize attach (reported by Dave Gesswein)
  29    07-Jan-06    RMS     Fixed unaligned register access bug (found by Doug Carman)
  30    04-Jan-04    RMS     Changed sim_fsize calling sequence
  31    26-Oct-03    RMS     Cleaned up buffer copy code
  32    26-Jul-03    RMS     Fixed bug in set size routine
  33    14-Mar-03    RMS     Fixed variable platter interaction with save/restore
  34    03-Mar-03    RMS     Fixed autosizing
  35    02-Feb-03    RMS     Added variable platter and autosizing support
  36    04-Oct-02    RMS     Added DIBs, device number support
  37    28-Nov-01    RMS     Added RL8A support
  38    25-Apr-01    RMS     Added device enable/disable support
  39
  40    The DF32 is a head-per-track disk.  It uses the three cycle data break
  41    facility.  To minimize overhead, the entire DF32 is buffered in memory.
  42
  43    Two timing parameters are provided:
  44
  45    df_time      Interword timing, must be non-zero
  46    df_burst     Burst mode, if 0, DMA occurs cycle by cycle; otherwise,
  47                 DMA occurs in a burst
  48 */
  49
  50 #include "pdp8_defs.h"
  51 #include <math.h>
  52
  53 #define UNIT_V_AUTO     (UNIT_V_UF + 0)                 /* autosize */
  54 #define UNIT_V_PLAT     (UNIT_V_UF + 1)                 /* #platters - 1 */
  55 #define UNIT_M_PLAT     03
  56 #define UNIT_PLAT       (UNIT_M_PLAT << UNIT_V_PLAT)
  57 #define UNIT_GETP(x)    ((((x) >> UNIT_V_PLAT) & UNIT_M_PLAT) + 1)
  58 #define UNIT_AUTO       (1 << UNIT_V_AUTO)
  59 #define UNIT_PLAT       (UNIT_M_PLAT << UNIT_V_PLAT)
  60
  61 /* Constants */
  62
  63 #define DF_NUMWD        2048                            /* words/track */
  64 #define DF_NUMTR        16                              /* tracks/disk */
  65 #define DF_DKSIZE       (DF_NUMTR * DF_NUMWD)           /* words/disk */
  66 #define DF_NUMDK        4                               /* disks/controller */
  67 #define DF_WC           07750                           /* word count */
  68 #define DF_MA           07751                           /* mem address */
  69 #define DF_WMASK        (DF_NUMWD - 1)                  /* word mask */
  70
  71 /* Parameters in the unit descriptor */
  72
  73 #define FUNC            u4                              /* function */
  74 #define DF_READ         2                               /* read */
  75 #define DF_WRITE        4                               /* write */
  76
  77 /* Status register */
  78
  79 #define DFS_PCA         04000                           /* photocell status */
  80 #define DFS_DEX         03700                           /* disk addr extension */
  81 #define DFS_MEX         00070                           /* mem addr extension */
  82 #define DFS_DRL         00004                           /* data late error */
  83 #define DFS_WLS         00002                           /* write lock error */
  84 #define DFS_NXD         00002                           /* non-existent disk */
  85 #define DFS_PER         00001                           /* parity error */
  86 #define DFS_ERR         (DFS_DRL | DFS_WLS | DFS_PER)
  87 #define DFS_V_DEX       6
  88 #define DFS_V_MEX       3
  89
  90 #define GET_MEX(x)      (((x) & DFS_MEX) << (12 - DFS_V_MEX))
  91 #define GET_DEX(x)      (((x) & DFS_DEX) << (12 - DFS_V_DEX))
  92 #define GET_POS(x)      ((int) fmod (sim_gtime() / ((double) (x)), \
  93                         ((double) DF_NUMWD)))
  94 #define UPDATE_PCELL    if (GET_POS (df_time) < 6) df_sta = df_sta | DFS_PCA; \
  95                         else df_sta = df_sta & ~DFS_PCA
  96
  97 extern uint16 M[];
  98 extern int32 int_req, stop_inst;
  99 extern UNIT cpu_unit;
 100
 101 int32 df_sta = 0;                                       /* status register */
 102 int32 df_da = 0;                                        /* disk address */
 103 int32 df_done = 0;                                      /* done flag */
 104 int32 df_wlk = 0;                                       /* write lock */
 105 int32 df_time = 10;                                     /* inter-word time */
 106 int32 df_burst = 1;                                     /* burst mode flag */
 107 int32 df_stopioe = 1;                                   /* stop on error */
 108
 109 DEVICE df_dev;
 110 int32 df60 (int32 IR, int32 AC);
 111 int32 df61 (int32 IR, int32 AC);
 112 int32 df62 (int32 IR, int32 AC);
 113 t_stat df_svc (UNIT *uptr);
 114 t_stat pcell_svc (UNIT *uptr);
 115 t_stat df_reset (DEVICE *dptr);
 116 t_stat df_boot (int32 unitno, DEVICE *dptr);
 117 t_stat df_attach (UNIT *uptr, char *cptr);
 118 t_stat df_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
 119
 120 /* DF32 data structures
 121
 122    df_dev       RF device descriptor
 123    df_unit      RF unit descriptor
 124    pcell_unit   photocell timing unit (orphan)
 125    df_reg       RF register list
 126 */
 127
 128 DIB df_dib = { DEV_DF, 3, { &df60, &df61, &df62 } };
 129
 130 UNIT df_unit = {
 131     UDATA (&df_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_BUFABLE+UNIT_MUSTBUF,
 132                    DF_DKSIZE)
 133     };
 134
 135 REG df_reg[] = {
 136     { ORDATA (STA, df_sta, 12) },
 137     { ORDATA (DA, df_da, 12) },
 138     { ORDATA (WC, M[DF_WC], 12), REG_FIT },
 139     { ORDATA (MA, M[DF_MA], 12), REG_FIT },
 140     { FLDATA (DONE, df_done, 0) },
 141     { FLDATA (INT, int_req, INT_V_DF) },
 142     { ORDATA (WLS, df_wlk, 8) },
 143     { DRDATA (TIME, df_time, 24), REG_NZ + PV_LEFT },
 144     { FLDATA (BURST, df_burst, 0) },
 145     { FLDATA (STOP_IOE, df_stopioe, 0) },
 146     { DRDATA (CAPAC, df_unit.capac, 18), REG_HRO },
 147     { ORDATA (DEVNUM, df_dib.dev, 6), REG_HRO },
 148     { NULL }
 149     };
 150
 151 MTAB df_mod[] = {
 152     { UNIT_PLAT, (0 << UNIT_V_PLAT), NULL, "1P", &df_set_size },
 153     { UNIT_PLAT, (1 << UNIT_V_PLAT), NULL, "2P", &df_set_size },
 154     { UNIT_PLAT, (2 << UNIT_V_PLAT), NULL, "3P", &df_set_size },
 155     { UNIT_PLAT, (3 << UNIT_V_PLAT), NULL, "4P", &df_set_size },
 156     { MTAB_XTD|MTAB_VDV, 0, "DEVNO", "DEVNO",
 157       &set_dev, &show_dev, NULL },
 158     { 0 }
 159     };
 160
 161 DEVICE df_dev = {
 162     "DF", &df_unit, df_reg, df_mod,
 163     1, 8, 17, 1, 8, 12,
 164     NULL, NULL, &df_reset,
 165     &df_boot, &df_attach, NULL,
 166     &df_dib, DEV_DISABLE
 167     };
 168
 169 /* IOT routines */
 170
 171 int32 df60 (int32 IR, int32 AC)
 172 {
 173 int32 t;
 174 int32 pulse = IR & 07;
 175
 176 UPDATE_PCELL;                                           /* update photocell */
 177 if (pulse & 1) {                                        /* DCMA */
 178     df_da = 0;                                          /* clear disk addr */
 179     df_done = 0;                                        /* clear done */
 180     df_sta = df_sta & ~DFS_ERR;                         /* clear errors */
 181     int_req = int_req & ~INT_DF;                        /* clear int req */
 182     }
 183 if (pulse & 6) {                                        /* DMAR, DMAW */
 184     df_da = df_da | AC;                                 /* disk addr |= AC */
 185     df_unit.FUNC = pulse & ~1;                          /* save function */
 186     t = (df_da & DF_WMASK) - GET_POS (df_time);         /* delta to new loc */
 187     if (t < 0) t = t + DF_NUMWD;                        /* wrap around? */
 188     sim_activate (&df_unit, t * df_time);               /* schedule op */
 189     AC = 0;                                             /* clear AC */
 190     }
 191 return AC;
 192 }
 193
 194 /* Based on the hardware implementation.  DEAL and DEAC work as follows:
 195
 196    6615         pulse 1 = clear df_sta<dex,mex>
 197                 pulse 4 = df_sta = df_sta | AC<dex,mex>
 198                           AC = AC | old_df_sta
 199    6616         pulse 2 = clear AC, skip if address confirmed
 200                 pulse 4 = df_sta = df_sta | AC<dex,mex> = 0 (nop)
 201                           AC = AC | old_df_sta
 202 */
 203
 204 int32 df61 (int32 IR, int32 AC)
 205 {
 206 int32 old_df_sta = df_sta;
 207 int32 pulse = IR & 07;
 208
 209 UPDATE_PCELL;                                           /* update photocell */
 210 if (pulse & 1)                                          /* DCEA */
 211     df_sta = df_sta & ~(DFS_DEX | DFS_MEX);             /* clear dex, mex */
 212 if (pulse & 2)                                          /* DSAC */
 213     AC = ((df_da & DF_WMASK) == GET_POS (df_time))? IOT_SKP: 0;
 214 if (pulse & 4) {
 215     df_sta = df_sta | (AC & (DFS_DEX | DFS_MEX));       /* DEAL */
 216     AC = AC | old_df_sta;                               /* DEAC */
 217     }
 218 return AC;
 219 }
 220
 221 int32 df62 (int32 IR, int32 AC)
 222 {
 223 int32 pulse = IR & 07;
 224
 225 UPDATE_PCELL;                                           /* update photocell */
 226 if (pulse & 1) {                                        /* DFSE */
 227     if ((df_sta & DFS_ERR) == 0) AC = AC | IOT_SKP;
 228     }
 229 if (pulse & 2) {                                        /* DFSC */
 230     if (pulse & 4) AC = AC & ~07777;                    /* for DMAC */
 231     else if (df_done) AC = AC | IOT_SKP;
 232     }
 233 if (pulse & 4) AC = AC | df_da;                         /* DMAC */
 234 return AC;
 235 }
 236
 237 /* Unit service
 238
 239    Note that for reads and writes, memory addresses wrap around in the
 240    current field.  This code assumes the entire disk is buffered.
 241 */
 242
 243 t_stat df_svc (UNIT *uptr)
 244 {
 245 int32 pa, t, mex;
 246 uint32 da;
 247 int16 *fbuf = uptr->filebuf;
 248
 249 UPDATE_PCELL;                                           /* update photocell */
 250 if ((uptr->flags & UNIT_BUF) == 0) {                    /* not buf? abort */
 251     df_done = 1;
 252     int_req = int_req | INT_DF;                         /* update int req */
 253     return IORETURN (df_stopioe, SCPE_UNATT);
 254     }
 255
 256 mex = GET_MEX (df_sta);
 257 da = GET_DEX (df_sta) | df_da;                          /* form disk addr */
 258 do {
 259     if (da >= uptr->capac) {                            /* nx disk addr? */
 260         df_sta = df_sta | DFS_NXD;
 261         break;
 262                 }
 263     M[DF_WC] = (M[DF_WC] + 1) & 07777;                  /* incr word count */
 264     M[DF_MA] = (M[DF_MA] + 1) & 07777;                  /* incr mem addr */
 265     pa = mex | M[DF_MA];                                /* add extension */
 266     if (uptr->FUNC == DF_READ) {                        /* read? */
 267         if (MEM_ADDR_OK (pa)) M[pa] = fbuf[da];         /* if !nxm, read wd */
 268         }
 269     else {                                              /* write */
 270         t = (da >> 14) & 07;                            /* check wr lock */
 271         if ((df_wlk >> t) & 1)                          /* locked? set err */
 272             df_sta = df_sta | DFS_WLS;
 273         else {                                          /* not locked */
 274             fbuf[da] = M[pa];                                                   /* write word */
 275             if (da >= uptr->hwmark) uptr->hwmark = da + 1;
 276             }
 277         }
 278     da = (da + 1) & 0377777;                            /* incr disk addr */
 279     } while ((M[DF_WC] != 0) && (df_burst != 0));       /* brk if wc, no brst */
 280
 281 if ((M[DF_WC] != 0) && ((df_sta & DFS_ERR) == 0))       /* more to do? */
 282     sim_activate (&df_unit, df_time);                   /* sched next */
 283 else {
 284     if (uptr->FUNC != DF_READ) da = (da - 1) & 0377777;
 285     df_done = 1;                                        /* done */
 286     int_req = int_req | INT_DF;                         /* update int req */
 287     }
 288 df_sta = (df_sta & ~DFS_DEX) | ((da >> (12 - DFS_V_DEX)) & DFS_DEX);
 289 df_da = da & 07777;                                     /* separate disk addr */
 290 return SCPE_OK;
 291 }
 292
 293 /* Reset routine */
 294
 295 t_stat df_reset (DEVICE *dptr)
 296 {
 297 df_sta = df_da = 0;
 298 df_done = 1;
 299 int_req = int_req & ~INT_DF;                            /* clear interrupt */
 300 sim_cancel (&df_unit);
 301 return SCPE_OK;
 302 }
 303
 304 /* Bootstrap routine */
 305
 306 #define OS8_START       07750
 307 #define OS8_LEN         (sizeof (os8_rom) / sizeof (int16))
 308 #define DM4_START       00200
 309 #define DM4_LEN         (sizeof (dm4_rom) / sizeof (int16))
 310
 311 static const uint16 os8_rom[] = {
 312     07600,                      /* 7750, CLA CLL        ; also word count */
 313     06603,                      /* 7751, DMAR           ; also address */
 314     06622,                      /* 7752, DFSC           ; done? */
 315     05352,                      /* 7753, JMP .-1        ; no */
 316     05752                       /* 7754, JMP @.-2       ; enter boot */
 317     };
 318
 319 static const uint16 dm4_rom[] = {
 320     00200, 07600,               /* 0200, CLA CLL */
 321     00201, 06603,               /* 0201, DMAR           ; read */
 322     00202, 06622,               /* 0202, DFSC           ; done? */
 323     00203, 05202,               /* 0203, JMP .-1        ; no */
 324     00204, 05600,               /* 0204, JMP @.-4       ; enter boot */
 325     07750, 07576,               /* 7750, 7576           ; word count */
 326     07751, 07576                /* 7751, 7576           ; address */
 327     };
 328
 329 t_stat df_boot (int32 unitno, DEVICE *dptr)
 330 {
 331 int32 i;
 332 extern int32 sim_switches, saved_PC;
 333
 334 if (sim_switches & SWMASK ('D')) {
 335     for (i = 0; i < DM4_LEN; i = i + 2)
 336         M[dm4_rom[i]] = dm4_rom[i + 1];
 337     saved_PC = DM4_START;
 338     }
 339 else {
 340     for (i = 0; i < OS8_LEN; i++)
 341          M[OS8_START + i] = os8_rom[i];
 342     saved_PC = OS8_START;
 343     }
 344 return SCPE_OK;
 345 }
 346
 347 /* Attach routine */
 348
 349 t_stat df_attach (UNIT *uptr, char *cptr)
 350 {
 351 uint32 p, sz;
 352 uint32 ds_bytes = DF_DKSIZE * sizeof (int16);
 353
 354 if ((uptr->flags & UNIT_AUTO) && (sz = sim_fsize_name (cptr))) {
 355     p = (sz + ds_bytes - 1) / ds_bytes;
 356     if (p >= DF_NUMDK) p = DF_NUMDK - 1;
 357     uptr->flags = (uptr->flags & ~UNIT_PLAT) |
 358          (p << UNIT_V_PLAT);
 359     }
 360 uptr->capac = UNIT_GETP (uptr->flags) * DF_DKSIZE;
 361 return attach_unit (uptr, cptr);
 362 }
 363
 364 /* Change disk size */
 365
 366 t_stat df_set_size (UNIT *uptr, int32 val, char *cptr, void *desc)
 367 {
 368 if (val < 0) return SCPE_IERR;
 369 if (uptr->flags & UNIT_ATT) return SCPE_ALATT;
 370 uptr->capac = UNIT_GETP (val) * DF_DKSIZE;
 371 uptr->flags = uptr->flags & ~UNIT_AUTO;
 372 return SCPE_OK;
 373 }